wdc_isa.c revision 1.45
1 /* $NetBSD: wdc_isa.c,v 1.45 2004/08/20 06:39:38 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum and by Onno van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: wdc_isa.c,v 1.45 2004/08/20 06:39:38 thorpej Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 47 #include <machine/bus.h> 48 #include <machine/intr.h> 49 50 #include <dev/isa/isavar.h> 51 #include <dev/isa/isadmavar.h> 52 53 #include <dev/ic/wdcreg.h> 54 #include <dev/ata/atavar.h> 55 #include <dev/ic/wdcvar.h> 56 57 #define WDC_ISA_REG_NPORTS 8 58 #define WDC_ISA_AUXREG_OFFSET 0x206 59 #define WDC_ISA_AUXREG_NPORTS 1 /* XXX "fdc" owns ports 0x3f7/0x377 */ 60 61 /* options passed via the 'flags' config keyword */ 62 #define WDC_OPTIONS_32 0x01 /* try to use 32bit data I/O */ 63 #define WDC_OPTIONS_ATA_NOSTREAM 0x04 64 #define WDC_OPTIONS_ATAPI_NOSTREAM 0x08 65 66 struct wdc_isa_softc { 67 struct wdc_softc sc_wdcdev; 68 struct ata_channel *wdc_chanlist[1]; 69 struct ata_channel ata_channel; 70 struct ata_queue wdc_chqueue; 71 struct wdc_regs wdc_regs; 72 isa_chipset_tag_t sc_ic; 73 void *sc_ih; 74 int sc_drq; 75 }; 76 77 static int wdc_isa_probe(struct device *, struct cfdata *, void *); 78 static void wdc_isa_attach(struct device *, struct device *, void *); 79 80 CFATTACH_DECL(wdc_isa, sizeof(struct wdc_isa_softc), 81 wdc_isa_probe, wdc_isa_attach, NULL, NULL); 82 83 #if 0 84 static void wdc_isa_dma_setup(struct wdc_isa_softc *); 85 static int wdc_isa_dma_init(void*, int, int, void *, size_t, int); 86 static void wdc_isa_dma_start(void*, int, int); 87 static int wdc_isa_dma_finish(void*, int, int, int); 88 #endif 89 90 static int 91 wdc_isa_probe(struct device *parent, struct cfdata *match, void *aux) 92 { 93 struct ata_channel ch; 94 struct isa_attach_args *ia = aux; 95 struct wdc_softc wdc; 96 struct wdc_regs wdr; 97 int result = 0, i; 98 99 if (ia->ia_nio < 1) 100 return (0); 101 if (ia->ia_nirq < 1) 102 return (0); 103 104 if (ISA_DIRECT_CONFIG(ia)) 105 return (0); 106 107 if (ia->ia_io[0].ir_addr == ISACF_PORT_DEFAULT) 108 return (0); 109 if (ia->ia_irq[0].ir_irq == ISACF_IRQ_DEFAULT) 110 return (0); 111 if (ia->ia_ndrq > 0 && ia->ia_drq[0].ir_drq == ISACF_DRQ_DEFAULT) 112 ia->ia_ndrq = 0; 113 114 memset(&wdc, 0, sizeof(wdc)); 115 memset(&ch, 0, sizeof(ch)); 116 ch.ch_atac = &wdc.sc_atac; 117 wdc.regs = &wdr; 118 119 wdr.cmd_iot = ia->ia_iot; 120 121 if (bus_space_map(wdr.cmd_iot, ia->ia_io[0].ir_addr, 122 WDC_ISA_REG_NPORTS, 0, &wdr.cmd_baseioh)) 123 goto out; 124 125 for (i = 0; i < WDC_ISA_REG_NPORTS; i++) { 126 if (bus_space_subregion(wdr.cmd_iot, wdr.cmd_baseioh, i, 127 i == 0 ? 4 : 1, &wdr.cmd_iohs[i]) != 0) 128 goto outunmap; 129 } 130 wdc_init_shadow_regs(&ch); 131 132 wdr.ctl_iot = ia->ia_iot; 133 if (bus_space_map(wdr.ctl_iot, ia->ia_io[0].ir_addr + 134 WDC_ISA_AUXREG_OFFSET, WDC_ISA_AUXREG_NPORTS, 0, &wdr.ctl_ioh)) 135 goto outunmap; 136 137 result = wdcprobe(&ch); 138 if (result) { 139 ia->ia_nio = 1; 140 ia->ia_io[0].ir_size = WDC_ISA_REG_NPORTS; 141 142 ia->ia_nirq = 1; 143 144 ia->ia_niomem = 0; 145 } 146 147 bus_space_unmap(wdr.ctl_iot, wdr.ctl_ioh, WDC_ISA_AUXREG_NPORTS); 148 outunmap: 149 bus_space_unmap(wdr.cmd_iot, wdr.cmd_baseioh, WDC_ISA_REG_NPORTS); 150 out: 151 return (result); 152 } 153 154 static void 155 wdc_isa_attach(struct device *parent, struct device *self, void *aux) 156 { 157 struct wdc_isa_softc *sc = (void *)self; 158 struct wdc_regs *wdr; 159 struct isa_attach_args *ia = aux; 160 int wdc_cf_flags = self->dv_cfdata->cf_flags; 161 int i; 162 163 sc->sc_wdcdev.regs = wdr = &sc->wdc_regs; 164 wdr->cmd_iot = ia->ia_iot; 165 wdr->ctl_iot = ia->ia_iot; 166 sc->sc_ic = ia->ia_ic; 167 if (bus_space_map(wdr->cmd_iot, ia->ia_io[0].ir_addr, 168 WDC_ISA_REG_NPORTS, 0, &wdr->cmd_baseioh) || 169 bus_space_map(wdr->ctl_iot, 170 ia->ia_io[0].ir_addr + WDC_ISA_AUXREG_OFFSET, 171 WDC_ISA_AUXREG_NPORTS, 0, &wdr->ctl_ioh)) { 172 printf(": couldn't map registers\n"); 173 return; 174 } 175 176 for (i = 0; i < WDC_ISA_REG_NPORTS; i++) { 177 if (bus_space_subregion(wdr->cmd_iot, 178 wdr->cmd_baseioh, i, i == 0 ? 4 : 1, 179 &wdr->cmd_iohs[i]) != 0) { 180 printf(": couldn't subregion registers\n"); 181 return; 182 } 183 } 184 185 wdr->data32iot = wdr->cmd_iot; 186 wdr->data32ioh = wdr->cmd_iohs[0]; 187 188 #if 0 189 if (ia->ia_ndrq > 0 && ia->ia_drq[0].ir_drq != ISACF_DRQ_DEFAULT) { 190 sc->sc_drq = ia->ia_drq[0].ir_drq; 191 192 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA; 193 sc->sc_wdcdev.dma_arg = sc; 194 sc->sc_wdcdev.dma_init = wdc_isa_dma_init; 195 sc->sc_wdcdev.dma_start = wdc_isa_dma_start; 196 sc->sc_wdcdev.dma_finish = wdc_isa_dma_finish; 197 wdc_isa_dma_setup(sc); 198 } 199 #endif 200 sc->sc_wdcdev.cap |= WDC_CAPABILITY_PREATA; 201 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16; 202 if (wdc_cf_flags & WDC_OPTIONS_32) 203 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA32; 204 if (wdc_cf_flags & WDC_OPTIONS_ATA_NOSTREAM) 205 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_ATA_NOSTREAM; 206 if (wdc_cf_flags & WDC_OPTIONS_ATAPI_NOSTREAM) 207 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_ATAPI_NOSTREAM; 208 209 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0; 210 sc->wdc_chanlist[0] = &sc->ata_channel; 211 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanlist; 212 sc->sc_wdcdev.sc_atac.atac_nchannels = 1; 213 sc->ata_channel.ch_channel = 0; 214 sc->ata_channel.ch_atac = &sc->sc_wdcdev.sc_atac; 215 sc->ata_channel.ch_queue = &sc->wdc_chqueue; 216 wdc_init_shadow_regs(&sc->ata_channel); 217 218 printf("\n"); 219 220 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq, 221 IST_EDGE, IPL_BIO, wdcintr, &sc->ata_channel); 222 223 wdcattach(&sc->ata_channel); 224 } 225 226 #if 0 227 static void 228 wdc_isa_dma_setup(struct wdc_isa_softc *sc) 229 { 230 bus_size_t maxsize; 231 232 if ((maxsize = isa_dmamaxsize(sc->sc_ic, sc->sc_drq)) < MAXPHYS) { 233 printf("%s: max DMA size %lu is less than required %d\n", 234 sc->sc_wdcdev.sc_dev.dv_xname, (u_long)maxsize, MAXPHYS); 235 sc->sc_wdcdev.sc_atac.atac_cap &= ~ATAC_CAP_DMA; 236 return; 237 } 238 239 if (isa_drq_alloc(sc->sc_ic, sc->sc_drq) != 0) { 240 printf("%s: can't reserve drq %d\n", 241 sc->sc_wdcdev.sc_dev.dv_xname, sc->sc_drq); 242 sc->sc_wdcdev.sc_atac.atac_cap &= ~ATAC_CAP_DMA; 243 return; 244 } 245 246 if (isa_dmamap_create(sc->sc_ic, sc->sc_drq, 247 MAXPHYS, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 248 printf("%s: can't create map for drq %d\n", 249 sc->sc_wdcdev.sc_dev.dv_xname, sc->sc_drq); 250 sc->sc_wdcdev.sc_atac.atac_cap &= ~ATAC_CAP_DMA; 251 } 252 } 253 254 static int 255 wdc_isa_dma_init(void *v, int channel, int drive, void *databuf, 256 size_t datalen, int read) 257 { 258 struct wdc_isa_softc *sc = v; 259 260 isa_dmastart(sc->sc_ic, sc->sc_drq, databuf, datalen, NULL, 261 (read ? DMAMODE_READ : DMAMODE_WRITE) | DMAMODE_DEMAND, 262 BUS_DMA_NOWAIT); 263 return 0; 264 } 265 266 static void 267 wdc_isa_dma_start(void *v, int channel, int drive) 268 { 269 /* nothing to do */ 270 } 271 272 static int 273 wdc_isa_dma_finish(void *v, int channel, int drive, int read) 274 { 275 struct wdc_isa_softc *sc = v; 276 277 isa_dmadone(sc->sc_ic, sc->sc_drq); 278 return 0; 279 } 280 #endif 281
Indexes created Tue Sep 30 20:09:53 GMT 2025