wdc_isa.c revision 1.54
1 /* $NetBSD: wdc_isa.c,v 1.54 2008/03/18 20:46:36 cube Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum and by Onno van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: wdc_isa.c,v 1.54 2008/03/18 20:46:36 cube Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/device.h> 45 #include <sys/malloc.h> 46 47 #include <sys/bus.h> 48 #include <sys/intr.h> 49 50 #include <dev/isa/isavar.h> 51 #include <dev/isa/isadmavar.h> 52 53 #include <dev/ic/wdcreg.h> 54 #include <dev/ata/atavar.h> 55 #include <dev/ic/wdcvar.h> 56 57 #define WDC_ISA_REG_NPORTS 8 58 #define WDC_ISA_AUXREG_OFFSET 0x206 59 #define WDC_ISA_AUXREG_NPORTS 1 /* XXX "fdc" owns ports 0x3f7/0x377 */ 60 61 /* options passed via the 'flags' config keyword */ 62 #define WDC_OPTIONS_32 0x01 /* try to use 32bit data I/O */ 63 #define WDC_OPTIONS_ATA_NOSTREAM 0x04 64 #define WDC_OPTIONS_ATAPI_NOSTREAM 0x08 65 66 struct wdc_isa_softc { 67 struct wdc_softc sc_wdcdev; 68 struct ata_channel *wdc_chanlist[1]; 69 struct ata_channel ata_channel; 70 struct ata_queue wdc_chqueue; 71 struct wdc_regs wdc_regs; 72 isa_chipset_tag_t sc_ic; 73 void *sc_ih; 74 int sc_drq; 75 }; 76 77 static int wdc_isa_probe(device_t , cfdata_t, void *); 78 static void wdc_isa_attach(device_t, device_t, void *); 79 static int wdc_isa_detach(device_t, int); 80 81 CFATTACH_DECL2_NEW(wdc_isa, sizeof(struct wdc_isa_softc), 82 wdc_isa_probe, wdc_isa_attach, wdc_isa_detach, NULL, NULL, 83 wdc_childdetached); 84 85 #if 0 86 static void wdc_isa_dma_setup(struct wdc_isa_softc *); 87 static int wdc_isa_dma_init(void*, int, int, void *, size_t, int); 88 static void wdc_isa_dma_start(void*, int, int); 89 static int wdc_isa_dma_finish(void*, int, int, int); 90 #endif 91 92 static int 93 wdc_isa_probe(device_t parent, cfdata_t match, void *aux) 94 { 95 struct ata_channel ch; 96 struct isa_attach_args *ia = aux; 97 struct wdc_softc wdc; 98 struct wdc_regs wdr; 99 int result = 0, i; 100 101 if (ia->ia_nio < 1) 102 return (0); 103 if (ia->ia_nirq < 1) 104 return (0); 105 106 if (ISA_DIRECT_CONFIG(ia)) 107 return (0); 108 109 if (ia->ia_io[0].ir_addr == ISA_UNKNOWN_PORT) 110 return (0); 111 if (ia->ia_irq[0].ir_irq == ISA_UNKNOWN_IRQ) 112 return (0); 113 if (ia->ia_ndrq > 0 && ia->ia_drq[0].ir_drq == ISA_UNKNOWN_DRQ) 114 ia->ia_ndrq = 0; 115 116 memset(&wdc, 0, sizeof(wdc)); 117 memset(&ch, 0, sizeof(ch)); 118 ch.ch_atac = &wdc.sc_atac; 119 wdc.regs = &wdr; 120 121 wdr.cmd_iot = ia->ia_iot; 122 123 if (bus_space_map(wdr.cmd_iot, ia->ia_io[0].ir_addr, 124 WDC_ISA_REG_NPORTS, 0, &wdr.cmd_baseioh)) 125 goto out; 126 127 for (i = 0; i < WDC_ISA_REG_NPORTS; i++) { 128 if (bus_space_subregion(wdr.cmd_iot, wdr.cmd_baseioh, i, 129 i == 0 ? 4 : 1, &wdr.cmd_iohs[i]) != 0) 130 goto outunmap; 131 } 132 wdc_init_shadow_regs(&ch); 133 134 wdr.ctl_iot = ia->ia_iot; 135 if (bus_space_map(wdr.ctl_iot, ia->ia_io[0].ir_addr + 136 WDC_ISA_AUXREG_OFFSET, WDC_ISA_AUXREG_NPORTS, 0, &wdr.ctl_ioh)) 137 goto outunmap; 138 139 result = wdcprobe(&ch); 140 if (result) { 141 ia->ia_nio = 1; 142 ia->ia_io[0].ir_size = WDC_ISA_REG_NPORTS; 143 144 ia->ia_nirq = 1; 145 146 ia->ia_niomem = 0; 147 } 148 149 bus_space_unmap(wdr.ctl_iot, wdr.ctl_ioh, WDC_ISA_AUXREG_NPORTS); 150 outunmap: 151 bus_space_unmap(wdr.cmd_iot, wdr.cmd_baseioh, WDC_ISA_REG_NPORTS); 152 out: 153 return (result); 154 } 155 156 static int 157 wdc_isa_detach(device_t self, int flags) 158 { 159 struct wdc_isa_softc *sc = device_private(self); 160 struct wdc_regs *wdr = &sc->wdc_regs; 161 int rc; 162 163 if ((rc = wdcdetach(self, flags)) != 0) 164 return rc; 165 166 isa_intr_disestablish(sc->sc_ic, sc->sc_ih); 167 168 bus_space_unmap(wdr->ctl_iot, wdr->ctl_ioh, WDC_ISA_AUXREG_NPORTS); 169 bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh, WDC_ISA_REG_NPORTS); 170 171 return 0; 172 } 173 174 static void 175 wdc_isa_attach(device_t parent, device_t self, void *aux) 176 { 177 struct wdc_isa_softc *sc = device_private(self); 178 struct wdc_regs *wdr; 179 struct isa_attach_args *ia = aux; 180 int wdc_cf_flags = device_cfdata(self)->cf_flags; 181 int i; 182 183 sc->sc_wdcdev.sc_atac.atac_dev = self; 184 sc->sc_wdcdev.regs = wdr = &sc->wdc_regs; 185 wdr->cmd_iot = ia->ia_iot; 186 wdr->ctl_iot = ia->ia_iot; 187 sc->sc_ic = ia->ia_ic; 188 if (bus_space_map(wdr->cmd_iot, ia->ia_io[0].ir_addr, 189 WDC_ISA_REG_NPORTS, 0, &wdr->cmd_baseioh) || 190 bus_space_map(wdr->ctl_iot, 191 ia->ia_io[0].ir_addr + WDC_ISA_AUXREG_OFFSET, 192 WDC_ISA_AUXREG_NPORTS, 0, &wdr->ctl_ioh)) { 193 aprint_error(": couldn't map registers\n"); 194 return; 195 } 196 197 for (i = 0; i < WDC_ISA_REG_NPORTS; i++) { 198 if (bus_space_subregion(wdr->cmd_iot, 199 wdr->cmd_baseioh, i, i == 0 ? 4 : 1, 200 &wdr->cmd_iohs[i]) != 0) { 201 aprint_error(": couldn't subregion registers\n"); 202 return; 203 } 204 } 205 206 wdr->data32iot = wdr->cmd_iot; 207 wdr->data32ioh = wdr->cmd_iohs[0]; 208 209 #if 0 210 if (ia->ia_ndrq > 0 && ia->ia_drq[0].ir_drq != ISA_UNKNOWN_DRQ) { 211 sc->sc_drq = ia->ia_drq[0].ir_drq; 212 213 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA; 214 sc->sc_wdcdev.dma_arg = sc; 215 sc->sc_wdcdev.dma_init = wdc_isa_dma_init; 216 sc->sc_wdcdev.dma_start = wdc_isa_dma_start; 217 sc->sc_wdcdev.dma_finish = wdc_isa_dma_finish; 218 wdc_isa_dma_setup(sc); 219 } 220 #endif 221 sc->sc_wdcdev.cap |= WDC_CAPABILITY_PREATA; 222 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16; 223 if (wdc_cf_flags & WDC_OPTIONS_32) 224 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA32; 225 if (wdc_cf_flags & WDC_OPTIONS_ATA_NOSTREAM) 226 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_ATA_NOSTREAM; 227 if (wdc_cf_flags & WDC_OPTIONS_ATAPI_NOSTREAM) 228 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_ATAPI_NOSTREAM; 229 230 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0; 231 sc->wdc_chanlist[0] = &sc->ata_channel; 232 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanlist; 233 sc->sc_wdcdev.sc_atac.atac_nchannels = 1; 234 sc->ata_channel.ch_channel = 0; 235 sc->ata_channel.ch_atac = &sc->sc_wdcdev.sc_atac; 236 sc->ata_channel.ch_queue = &sc->wdc_chqueue; 237 sc->ata_channel.ch_ndrive = 2; 238 wdc_init_shadow_regs(&sc->ata_channel); 239 240 aprint_normal("\n"); 241 242 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq, 243 IST_EDGE, IPL_BIO, wdcintr, &sc->ata_channel); 244 245 wdcattach(&sc->ata_channel); 246 } 247 248 #if 0 249 static void 250 wdc_isa_dma_setup(struct wdc_isa_softc *sc) 251 { 252 bus_size_t maxsize; 253 254 if ((maxsize = isa_dmamaxsize(sc->sc_ic, sc->sc_drq)) < MAXPHYS) { 255 aprint_error_dev(sc_wdcdev.sc_atac.atac_dev, 256 "max DMA size %lu is less than required %d\n", 257 (u_long)maxsize, MAXPHYS); 258 sc->sc_wdcdev.sc_atac.atac_cap &= ~ATAC_CAP_DMA; 259 return; 260 } 261 262 if (isa_drq_alloc(sc->sc_ic, sc->sc_drq) != 0) { 263 aprint_error_dev(sc_wdcdev.sc_atac.atac_dev, 264 "can't reserve drq %d\n", sc->sc_drq); 265 sc->sc_wdcdev.sc_atac.atac_cap &= ~ATAC_CAP_DMA; 266 return; 267 } 268 269 if (isa_dmamap_create(sc->sc_ic, sc->sc_drq, 270 MAXPHYS, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 271 aprint_error_dev(sc_wdcdev.sc_atac.atac_dev, 272 "can't create map for drq %d\n", sc->sc_drq); 273 sc->sc_wdcdev.sc_atac.atac_cap &= ~ATAC_CAP_DMA; 274 } 275 } 276 277 static int 278 wdc_isa_dma_init(void *v, int channel, int drive, void *databuf, 279 size_t datalen, int read) 280 { 281 struct wdc_isa_softc *sc = v; 282 283 isa_dmastart(sc->sc_ic, sc->sc_drq, databuf, datalen, NULL, 284 (read ? DMAMODE_READ : DMAMODE_WRITE) | DMAMODE_DEMAND, 285 BUS_DMA_NOWAIT); 286 return 0; 287 } 288 289 static void 290 wdc_isa_dma_start(void *v, int channel, int drive) 291 { 292 /* nothing to do */ 293 } 294 295 static int 296 wdc_isa_dma_finish(void *v, int channel, int drive, int read) 297 { 298 struct wdc_isa_softc *sc = v; 299 300 isa_dmadone(sc->sc_ic, sc->sc_drq); 301 return 0; 302 } 303 #endif 304
Indexes created Tue Sep 30 20:09:53 GMT 2025