wdc_isa.c revision 1.6.2.4
1 /* $NetBSD: wdc_isa.c,v 1.6.2.4 1998/08/13 14:37:53 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved. 5 * 6 * DMA and multi-sector PIO handling are derived from code contributed by 7 * Onno van der Linden. 8 * 9 * ISA attachment created by Christopher G. Demetriou. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Charles M. Hannum. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #include <sys/types.h> 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/device.h> 41 #include <sys/malloc.h> 42 43 #include <machine/bus.h> 44 #include <machine/intr.h> 45 46 #include <dev/isa/isavar.h> 47 #include <dev/isa/isadmavar.h> 48 49 #include <dev/ata/atavar.h> 50 #include <dev/ic/wdcvar.h> 51 52 #define WDC_ISA_REG_NPORTS 8 53 #define WDC_ISA_AUXREG_OFFSET 0x206 54 #define WDC_ISA_AUXREG_NPORTS 1 /* XXX "fdc" owns ports 0x3f7/0x377 */ 55 56 /* 57 * XXX This code currently doesn't even try to allow 32-bit data port use. 58 */ 59 60 struct wdc_isa_softc { 61 struct wdc_softc sc_wdcdev; 62 struct channel_softc wdc_channel; 63 isa_chipset_tag_t sc_ic; 64 void *sc_ih; 65 int sc_drq; 66 }; 67 68 int wdc_isa_probe __P((struct device *, struct cfdata *, void *)); 69 void wdc_isa_attach __P((struct device *, struct device *, void *)); 70 71 struct cfattach wdc_isa_ca = { 72 sizeof(struct wdc_isa_softc), wdc_isa_probe, wdc_isa_attach 73 }; 74 75 static void wdc_isa_dma_setup __P((struct wdc_isa_softc *)); 76 static int wdc_isa_dma_init __P((void*, int, int, void *, size_t, int)); 77 static void wdc_isa_dma_start __P((void*, int, int, int)); 78 static int wdc_isa_dma_finish __P((void*, int, int, int)); 79 80 int 81 wdc_isa_probe(parent, match, aux) 82 struct device *parent; 83 struct cfdata *match; 84 void *aux; 85 { 86 struct channel_softc ch = { 0 }; 87 struct isa_attach_args *ia = aux; 88 int result = 0; 89 90 ch.cmd_iot = ia->ia_iot; 91 if (bus_space_map(ch.cmd_iot, ia->ia_iobase, WDC_ISA_REG_NPORTS, 0, 92 &ch.cmd_ioh)) 93 goto out; 94 95 ch.ctl_iot = ia->ia_iot; 96 if (bus_space_map(ch.ctl_iot, ia->ia_iobase + WDC_ISA_AUXREG_OFFSET, 97 WDC_ISA_AUXREG_NPORTS, 0, &ch.ctl_ioh)) 98 goto outunmap; 99 100 result = wdcprobe(&ch); 101 if (result) { 102 ia->ia_iosize = WDC_ISA_REG_NPORTS; 103 ia->ia_msize = 0; 104 } 105 106 bus_space_unmap(ch.ctl_iot, ch.ctl_ioh, WDC_ISA_AUXREG_NPORTS); 107 outunmap: 108 bus_space_unmap(ch.cmd_iot, ch.cmd_ioh, WDC_ISA_REG_NPORTS); 109 out: 110 return (result); 111 } 112 113 void 114 wdc_isa_attach(parent, self, aux) 115 struct device *parent, *self; 116 void *aux; 117 { 118 struct wdc_isa_softc *sc = (void *)self; 119 struct isa_attach_args *ia = aux; 120 121 printf("\n"); 122 123 sc->wdc_channel.cmd_iot = ia->ia_iot; 124 sc->wdc_channel.ctl_iot = ia->ia_iot; 125 sc->sc_ic = ia->ia_ic; 126 if (bus_space_map(sc->wdc_channel.cmd_iot, ia->ia_iobase, 127 WDC_ISA_REG_NPORTS, 0, &sc->wdc_channel.cmd_ioh) || 128 bus_space_map(sc->wdc_channel.ctl_iot, 129 ia->ia_iobase + WDC_ISA_AUXREG_OFFSET, WDC_ISA_AUXREG_NPORTS, 130 0, &sc->wdc_channel.ctl_ioh)) { 131 printf("%s: couldn't map registers\n", 132 sc->sc_wdcdev.sc_dev.dv_xname); 133 } 134 135 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 136 IPL_BIO, wdcintr, &sc->wdc_channel); 137 138 if (ia->ia_drq != DRQUNK) { 139 sc->sc_drq = ia->ia_drq; 140 141 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA; 142 sc->sc_wdcdev.dma_arg = sc; 143 sc->sc_wdcdev.dma_init = wdc_isa_dma_init; 144 sc->sc_wdcdev.dma_start = wdc_isa_dma_start; 145 sc->sc_wdcdev.dma_finish = wdc_isa_dma_finish; 146 wdc_isa_dma_setup(sc); 147 } 148 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA32; 149 sc->sc_wdcdev.pio_mode = 0; 150 sc->sc_wdcdev.channels = &sc->wdc_channel; 151 sc->sc_wdcdev.nchannels = 1; 152 sc->wdc_channel.channel = 0; 153 sc->wdc_channel.wdc = &sc->sc_wdcdev; 154 sc->wdc_channel.ch_queue = malloc(sizeof(struct channel_queue), 155 M_DEVBUF, M_NOWAIT); 156 if (sc->wdc_channel.ch_queue == NULL) { 157 printf("%s: can't allocate memory for command queue", 158 sc->sc_wdcdev.sc_dev.dv_xname); 159 return; 160 } 161 wdcattach(&sc->wdc_channel); 162 } 163 164 static void 165 wdc_isa_dma_setup(sc) 166 struct wdc_isa_softc *sc; 167 { 168 if (isa_dmamap_create(sc->sc_ic, sc->sc_drq, 169 MAXPHYS, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 170 printf("%s: can't create map for drq %d\n", 171 sc->sc_wdcdev.sc_dev.dv_xname, sc->sc_drq); 172 sc->sc_wdcdev.cap &= ~WDC_CAPABILITY_DMA; 173 } 174 } 175 176 static int 177 wdc_isa_dma_init(v, channel, drive, databuf, datalen, read) 178 void *v; 179 void *databuf; 180 size_t datalen; 181 int read; 182 { 183 struct wdc_isa_softc *sc = v; 184 185 isa_dmastart(sc->sc_ic, sc->sc_drq, databuf, 186 datalen, NULL, read ? DMAMODE_READ : DMAMODE_WRITE, 187 BUS_DMA_NOWAIT); 188 return 0; 189 } 190 191 static void 192 wdc_isa_dma_start(v, channel, drive, read) 193 void *v; 194 int channel, drive; 195 { 196 /* nothing to do */ 197 } 198 199 static int 200 wdc_isa_dma_finish(v, channel, drive, read) 201 void *v; 202 int channel, drive; 203 int read; 204 { 205 struct wdc_isa_softc *sc = v; 206 207 isa_dmadone(sc->sc_ic, sc->sc_drq); 208 return 0; 209 } 210
Indexes created Tue Oct 14 15:09:51 GMT 2025