wdsreg.h revision 1.4
1 typedef u_char physaddr[3]; 2 typedef u_char physlen[3]; 3 #define ltophys _lto3b 4 #define phystol _3btol 5 6 /* WD7000 registers */ 7 #define WDS_STAT 0 /* read */ 8 #define WDS_IRQSTAT 1 /* read */ 9 10 #define WDS_CMD 0 /* write */ 11 #define WDS_IRQACK 1 /* write */ 12 #define WDS_HCR 2 /* write */ 13 14 /* WDS_STAT (read) defs */ 15 #define WDSS_IRQ 0x80 16 #define WDSS_RDY 0x40 17 #define WDSS_REJ 0x20 18 #define WDSS_INIT 0x10 19 20 /* WDS_IRQSTAT (read) defs */ 21 #define WDSI_MASK 0xc0 22 #define WDSI_ERR 0x00 23 #define WDSI_MFREE 0x80 24 #define WDSI_MSVC 0xc0 25 26 /* WDS_CMD (write) defs */ 27 #define WDSC_NOOP 0x00 28 #define WDSC_INIT 0x01 29 #define WDSC_DISUNSOL 0x02 30 #define WDSC_ENAUNSOL 0x03 31 #define WDSC_IRQMFREE 0x04 32 #define WDSC_SCSIRESETSOFT 0x05 33 #define WDSC_SCSIRESETHARD 0x06 34 #define WDSC_MSTART(m) (0x80 + (m)) 35 #define WDSC_MMSTART(m) (0xc0 + (m)) 36 37 /* WDS_HCR (write) defs */ 38 #define WDSH_IRQEN 0x08 39 #define WDSH_DRQEN 0x04 40 #define WDSH_SCSIRESET 0x02 41 #define WDSH_ASCRESET 0x01 42 43 #define WDS_NSEG 17 44 45 struct wds_scat_gath { 46 physlen seg_len; 47 physaddr seg_addr; 48 }; 49 50 struct wds_cmd { 51 u_char opcode; 52 u_char targ; 53 struct scsi_generic scb; 54 u_char stat; 55 u_char venderr; 56 physlen len; 57 physaddr data; 58 physaddr link; 59 u_char write; 60 u_char xx[6]; 61 }; 62 63 struct wds_scb { 64 struct wds_cmd cmd; 65 struct wds_cmd sense; 66 67 struct wds_scat_gath scat_gath[WDS_NSEG]; 68 struct scsipi_sense_data sense_data; 69 70 TAILQ_ENTRY(wds_scb) chain; 71 struct wds_scb *nexthash; 72 u_long hashkey; 73 struct scsipi_xfer *xs; 74 int flags; 75 #define SCB_ALLOC 0x01 76 #define SCB_ABORT 0x02 77 #ifdef WDSDIAG 78 #define SCB_SENDING 0x04 79 #endif 80 #define SCB_POLLED 0x08 81 #define SCB_SENSE 0x10 82 #define SCB_DONE 0x20 /* for internal commands only */ 83 #define SCB_BUFFER 0x40 84 int timeout; 85 86 /* 87 * DMA maps used by the SCB. These maps are created in 88 * wds_init_scb(). 89 */ 90 91 /* 92 * The DMA map maps an individual SCB. This map is permanently 93 * loaded in wds_init_scb(). 94 */ 95 bus_dmamap_t dmamap_self; 96 97 /* 98 * This map maps the buffer involved in the transfer. 99 * Its contents are loaded into "scat_gath" above. 100 */ 101 bus_dmamap_t dmamap_xfer; 102 }; 103 104 #define WDSX_SCSICMD 0x00 105 #define WDSX_SCSISG 0x01 106 #define WDSX_OPEN_RCVBUF 0x80 107 #define WDSX_RCV_CMD 0x81 108 #define WDSX_RCV_DATA 0x82 109 #define WDSX_RCV_DATASTAT 0x83 110 #define WDSX_SND_DATA 0x84 111 #define WDSX_SND_DATASTAT 0x85 112 #define WDSX_SND_CMDSTAT 0x86 113 #define WDSX_READINIT 0x88 114 #define WDSX_READSCSIID 0x89 115 #define WDSX_SETUNSOLIRQMASK 0x8a 116 #define WDSX_GETUNSOLIRQMASK 0x8b 117 #define WDSX_GETFIRMREV 0x8c 118 #define WDSX_EXECDIAG 0x8d 119 #define WDSX_SETEXECPARM 0x8e 120 #define WDSX_GETEXECPARM 0x8f 121 122 struct wds_mbx_out { 123 u_char cmd; 124 physaddr scb_addr; 125 }; 126 127 struct wds_mbx_in { 128 u_char stat; 129 physaddr scb_addr; 130 }; 131 132 /* 133 * mbo.cmd values 134 */ 135 #define WDS_MBO_FREE 0x0 /* MBO entry is free */ 136 #define WDS_MBO_START 0x1 /* MBO activate entry */ 137 138 /* 139 * mbi.stat values 140 */ 141 #define WDS_MBI_FREE 0x00 /* MBI entry is free */ 142 #define WDS_MBI_OK 0x01 /* completed without error */ 143 #define WDS_MBI_OKERR 0x02 /* completed with error */ 144 #define WDS_MBI_ETIME 0x04 145 #define WDS_MBI_ERESET 0x05 146 #define WDS_MBI_ETARCMD 0x06 147 #define WDS_MBI_ERESEL 0x80 148 #define WDS_MBI_ESEL 0x81 149 #define WDS_MBI_EABORT 0x82 150 #define WDS_MBI_ESRESET 0x83 151 #define WDS_MBI_EHRESET 0x84 152 153 struct wds_setup { 154 u_char opcode; 155 u_char scsi_id; 156 u_char buson_t; 157 u_char busoff_t; 158 u_char xx; 159 physaddr mbaddr; 160 u_char nomb; 161 u_char nimb; 162 }; 163
Indexes created Mon Sep 29 21:09:56 GMT 2025