ym.c revision 1.11 1 1.11 itohy /* $NetBSD: ym.c,v 1.11 1999/10/07 03:28:56 itohy Exp $ */
2 1.1 augustss
3 1.10 itohy /*-
4 1.10 itohy * Copyright (c) 1999 The NetBSD Foundation, Inc.
5 1.10 itohy * All rights reserved.
6 1.10 itohy *
7 1.10 itohy * This code is derived from software contributed to The NetBSD Foundation
8 1.10 itohy * by ITOH Yasufumi.
9 1.10 itohy *
10 1.10 itohy * Redistribution and use in source and binary forms, with or without
11 1.10 itohy * modification, are permitted provided that the following conditions
12 1.10 itohy * are met:
13 1.10 itohy * 1. Redistributions of source code must retain the above copyright
14 1.10 itohy * notice, this list of conditions and the following disclaimer.
15 1.10 itohy * 2. Redistributions in binary form must reproduce the above copyright
16 1.10 itohy * notice, this list of conditions and the following disclaimer in the
17 1.10 itohy * documentation and/or other materials provided with the distribution.
18 1.10 itohy * 3. All advertising materials mentioning features or use of this software
19 1.10 itohy * must display the following acknowledgement:
20 1.10 itohy * This product includes software developed by the NetBSD
21 1.10 itohy * Foundation, Inc. and its contributors.
22 1.10 itohy * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.10 itohy * contributors may be used to endorse or promote products derived
24 1.10 itohy * from this software without specific prior written permission.
25 1.10 itohy *
26 1.10 itohy * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.10 itohy * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.10 itohy * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.10 itohy * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.10 itohy * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.10 itohy * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.10 itohy * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.10 itohy * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.10 itohy * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.10 itohy * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.10 itohy * POSSIBILITY OF SUCH DAMAGE.
37 1.10 itohy */
38 1.1 augustss
39 1.1 augustss /*
40 1.1 augustss * Copyright (c) 1998 Constantine Sapuntzakis. All rights reserved.
41 1.10 itohy *
42 1.1 augustss * Redistribution and use in source and binary forms, with or without
43 1.1 augustss * modification, are permitted provided that the following conditions
44 1.1 augustss * are met:
45 1.1 augustss * 1. Redistributions of source code must retain the above copyright
46 1.1 augustss * notice, this list of conditions and the following disclaimer.
47 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
48 1.1 augustss * notice, this list of conditions and the following disclaimer in the
49 1.1 augustss * documentation and/or other materials provided with the distribution.
50 1.1 augustss * 3. The name of the author may not be used to endorse or promote products
51 1.1 augustss * derived from this software without specific prior written permission.
52 1.1 augustss *
53 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
54 1.1 augustss * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
55 1.1 augustss * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
56 1.1 augustss * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
57 1.1 augustss * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
58 1.1 augustss * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 1.1 augustss * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60 1.1 augustss * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 1.1 augustss * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
62 1.1 augustss * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 1.1 augustss */
64 1.1 augustss
65 1.1 augustss /*
66 1.1 augustss * Original code from OpenBSD.
67 1.1 augustss */
68 1.1 augustss
69 1.10 itohy #include "mpu_ym.h"
70 1.10 itohy #include "opt_ym.h"
71 1.1 augustss
72 1.1 augustss #include <sys/param.h>
73 1.1 augustss #include <sys/systm.h>
74 1.1 augustss #include <sys/errno.h>
75 1.1 augustss #include <sys/device.h>
76 1.10 itohy #include <sys/fcntl.h>
77 1.10 itohy #include <sys/kernel.h>
78 1.10 itohy #include <sys/proc.h>
79 1.1 augustss
80 1.1 augustss #include <machine/cpu.h>
81 1.1 augustss #include <machine/intr.h>
82 1.1 augustss #include <machine/bus.h>
83 1.1 augustss
84 1.1 augustss #include <sys/audioio.h>
85 1.1 augustss #include <dev/audio_if.h>
86 1.1 augustss
87 1.1 augustss #include <dev/isa/isavar.h>
88 1.1 augustss #include <dev/isa/isadmavar.h>
89 1.1 augustss
90 1.1 augustss #include <dev/ic/ad1848reg.h>
91 1.1 augustss #include <dev/isa/ad1848var.h>
92 1.10 itohy #include <dev/ic/opl3sa3reg.h>
93 1.10 itohy #include <dev/isa/wssreg.h>
94 1.10 itohy #if NMPU_YM > 0
95 1.10 itohy #include <dev/ic/mpuvar.h>
96 1.10 itohy #endif
97 1.1 augustss #include <dev/isa/ymvar.h>
98 1.10 itohy #include <dev/isa/sbreg.h>
99 1.1 augustss
100 1.10 itohy #ifndef spllowersoftclock
101 1.10 itohy #error "We depend on the new semantics of splsoftclock(9)."
102 1.10 itohy #endif
103 1.10 itohy
104 1.10 itohy /* Power management mode. */
105 1.10 itohy #ifndef YM_POWER_MODE
106 1.10 itohy #define YM_POWER_MODE YM_POWER_POWERSAVE
107 1.10 itohy #endif
108 1.10 itohy
109 1.10 itohy /* Time in second before power down the chip. */
110 1.10 itohy #ifndef YM_POWER_OFF_SEC
111 1.10 itohy #define YM_POWER_OFF_SEC 5
112 1.10 itohy #endif
113 1.10 itohy
114 1.11 itohy /* Default mixer settings. /
115 1.11 itohy #ifndef YM_VOL_MASTER
116 1.11 itohy #define YM_VOL_MASTER 220
117 1.11 itohy #endif
118 1.11 itohy
119 1.11 itohy #ifndef YM_VOL_DAC
120 1.11 itohy #define YM_VOL_DAC 224
121 1.11 itohy #endif
122 1.11 itohy
123 1.11 itohy #ifndef YM_VOL_OPL3
124 1.11 itohy #define YM_VOL_OPL3 184
125 1.11 itohy #endif
126 1.11 itohy
127 1.10 itohy #ifdef __i386__ /* XXX */
128 1.10 itohy # include "joy.h"
129 1.10 itohy #else
130 1.10 itohy # define NJOY 0
131 1.10 itohy #endif
132 1.10 itohy
133 1.10 itohy #ifdef AUDIO_DEBUG
134 1.10 itohy #define DPRINTF(x) if (ymdebug) printf x
135 1.10 itohy int ymdebug = 0;
136 1.10 itohy #else
137 1.10 itohy #define DPRINTF(x)
138 1.10 itohy #endif
139 1.10 itohy #define DVNAME(softc) ((softc)->sc_ad1848.sc_ad1848.sc_dev.dv_xname)
140 1.1 augustss
141 1.1 augustss int ym_getdev __P((void *, struct audio_device *));
142 1.1 augustss int ym_mixer_set_port __P((void *, mixer_ctrl_t *));
143 1.1 augustss int ym_mixer_get_port __P((void *, mixer_ctrl_t *));
144 1.1 augustss int ym_query_devinfo __P((void *, mixer_devinfo_t *));
145 1.10 itohy int ym_intr __P((void *));
146 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
147 1.10 itohy static void ym_save_codec_regs __P((struct ym_softc *));
148 1.10 itohy static void ym_restore_codec_regs __P((struct ym_softc *));
149 1.10 itohy void ym_power_hook __P((int, void *));
150 1.10 itohy int ym_codec_power_ctl __P((void *, int));
151 1.10 itohy static void ym_chip_powerdown __P((struct ym_softc *));
152 1.10 itohy static void ym_chip_powerup __P((struct ym_softc *, int));
153 1.10 itohy void ym_powerdown_blocks __P((void *));
154 1.10 itohy void ym_power_ctl __P((struct ym_softc *, int, int));
155 1.10 itohy #endif
156 1.1 augustss
157 1.10 itohy static void ym_init __P((struct ym_softc *));
158 1.1 augustss static void ym_mute __P((struct ym_softc *, int, int));
159 1.2 augustss static void ym_set_master_gain __P((struct ym_softc *, struct ad1848_volume*));
160 1.10 itohy static void ym_set_mic_gain __P((struct ym_softc *, int));
161 1.10 itohy static void ym_set_3d __P((struct ym_softc *, mixer_ctrl_t *,
162 1.10 itohy struct ad1848_volume *, int));
163 1.1 augustss
164 1.1 augustss
165 1.1 augustss struct audio_hw_if ym_hw_if = {
166 1.5 pk ad1848_isa_open,
167 1.5 pk ad1848_isa_close,
168 1.1 augustss NULL,
169 1.1 augustss ad1848_query_encoding,
170 1.1 augustss ad1848_set_params,
171 1.8 mycroft ad1848_round_blocksize,
172 1.1 augustss ad1848_commit_settings,
173 1.8 mycroft NULL,
174 1.8 mycroft NULL,
175 1.8 mycroft NULL,
176 1.8 mycroft NULL,
177 1.9 mycroft ad1848_isa_halt_output,
178 1.9 mycroft ad1848_isa_halt_input,
179 1.1 augustss NULL,
180 1.1 augustss ym_getdev,
181 1.1 augustss NULL,
182 1.1 augustss ym_mixer_set_port,
183 1.1 augustss ym_mixer_get_port,
184 1.1 augustss ym_query_devinfo,
185 1.5 pk ad1848_isa_malloc,
186 1.5 pk ad1848_isa_free,
187 1.7 mycroft ad1848_isa_round_buffersize,
188 1.5 pk ad1848_isa_mappage,
189 1.5 pk ad1848_isa_get_props,
190 1.8 mycroft ad1848_isa_trigger_output,
191 1.8 mycroft ad1848_isa_trigger_input,
192 1.1 augustss };
193 1.1 augustss
194 1.1 augustss static __inline int ym_read __P((struct ym_softc *, int));
195 1.1 augustss static __inline void ym_write __P((struct ym_softc *, int, int));
196 1.1 augustss
197 1.1 augustss void
198 1.1 augustss ym_attach(sc)
199 1.2 augustss struct ym_softc *sc;
200 1.1 augustss {
201 1.5 pk struct ad1848_softc *ac = &sc->sc_ad1848.sc_ad1848;
202 1.11 itohy static struct ad1848_volume vol_master = {YM_VOL_MASTER, YM_VOL_MASTER};
203 1.11 itohy static struct ad1848_volume vol_dac = {YM_VOL_DAC, YM_VOL_DAC};
204 1.11 itohy static struct ad1848_volume vol_opl3 = {YM_VOL_OPL3, YM_VOL_OPL3};
205 1.10 itohy struct audio_attach_args arg;
206 1.10 itohy
207 1.11 itohy /* Mute the output to reduce noise during initialization. */
208 1.11 itohy ym_mute(sc, SA3_VOL_L, 1);
209 1.11 itohy ym_mute(sc, SA3_VOL_R, 1);
210 1.11 itohy
211 1.5 pk sc->sc_ad1848.sc_ih = isa_intr_establish(sc->sc_ic, sc->ym_irq,
212 1.10 itohy IST_EDGE, IPL_AUDIO,
213 1.10 itohy ym_intr, sc);
214 1.1 augustss
215 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
216 1.10 itohy sc->sc_ad1848.powerctl = ym_codec_power_ctl;
217 1.10 itohy sc->sc_ad1848.powerarg = sc;
218 1.10 itohy #endif
219 1.6 augustss ad1848_isa_attach(&sc->sc_ad1848);
220 1.2 augustss printf("\n");
221 1.5 pk ac->parent = sc;
222 1.2 augustss
223 1.2 augustss /* Establish chip in well known mode */
224 1.11 itohy ym_set_master_gain(sc, &vol_master);
225 1.10 itohy ym_set_mic_gain(sc, 0);
226 1.2 augustss sc->master_mute = 0;
227 1.10 itohy
228 1.2 augustss sc->mic_mute = 1;
229 1.10 itohy ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
230 1.10 itohy
231 1.11 itohy /* Override ad1848 settings. */
232 1.11 itohy ad1848_set_channel_gain(ac, AD1848_DAC_CHANNEL, &vol_dac);
233 1.11 itohy ad1848_set_channel_gain(ac, AD1848_AUX2_CHANNEL, &vol_opl3);
234 1.11 itohy
235 1.10 itohy sc->sc_version = ym_read(sc, SA3_MISC) & SA3_MISC_VER;
236 1.10 itohy
237 1.10 itohy /* We use only one IRQ (IRQ-A). */
238 1.10 itohy ym_write(sc, SA3_IRQ_CONF, SA3_IRQ_CONF_MPU_A | SA3_IRQ_CONF_WSS_A);
239 1.10 itohy ym_write(sc, SA3_HVOL_INTR_CNF, SA3_HVOL_INTR_CNF_A);
240 1.10 itohy
241 1.10 itohy /* audio at ym attachment */
242 1.10 itohy sc->sc_audiodev = audio_attach_mi(&ym_hw_if, ac, &ac->sc_dev);
243 1.10 itohy
244 1.10 itohy /* opl at ym attachment */
245 1.10 itohy if (sc->sc_opl_ioh) {
246 1.10 itohy arg.type = AUDIODEV_TYPE_OPL;
247 1.10 itohy arg.hwif = 0;
248 1.10 itohy arg.hdl = 0;
249 1.10 itohy (void)config_found(&ac->sc_dev, &arg, audioprint);
250 1.10 itohy }
251 1.10 itohy
252 1.10 itohy #if NMPU_YM > 0
253 1.10 itohy /* mpu at ym attachment */
254 1.10 itohy if (sc->sc_mpu_ioh) {
255 1.10 itohy arg.type = AUDIODEV_TYPE_MPU;
256 1.10 itohy arg.hwif = 0;
257 1.10 itohy arg.hdl = 0;
258 1.10 itohy sc->sc_mpudev = config_found(&ac->sc_dev, &arg, audioprint);
259 1.10 itohy }
260 1.10 itohy #endif
261 1.10 itohy
262 1.10 itohy /* This must be AFTER the attachment of sub-devices. */
263 1.10 itohy ym_init(sc);
264 1.10 itohy
265 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
266 1.10 itohy /*
267 1.10 itohy * Initialize power control.
268 1.10 itohy */
269 1.10 itohy sc->sc_pow_mode = YM_POWER_MODE;
270 1.10 itohy sc->sc_pow_timeout = YM_POWER_OFF_SEC;
271 1.10 itohy
272 1.10 itohy sc->sc_on_blocks = sc->sc_turning_off =
273 1.10 itohy YM_POWER_CODEC_P | YM_POWER_CODEC_R |
274 1.11 itohy YM_POWER_OPL3 | YM_POWER_MPU401 | YM_POWER_3D |
275 1.10 itohy YM_POWER_CODEC_DA | YM_POWER_CODEC_AD | YM_POWER_OPL3_DA;
276 1.10 itohy #if NJOY > 0
277 1.11 itohy sc->sc_on_blocks |= YM_POWER_JOYSTICK; /* prevents chip powerdown */
278 1.10 itohy #endif
279 1.10 itohy ym_powerdown_blocks(sc);
280 1.1 augustss
281 1.10 itohy powerhook_establish(ym_power_hook, sc);
282 1.11 itohy
283 1.11 itohy if (sc->sc_on_blocks /* & YM_POWER_ACTIVE */)
284 1.10 itohy #endif
285 1.11 itohy {
286 1.11 itohy /* Unmute the output now if the chip is on. */
287 1.11 itohy ym_mute(sc, SA3_VOL_L, sc->master_mute);
288 1.11 itohy ym_mute(sc, SA3_VOL_R, sc->master_mute);
289 1.11 itohy }
290 1.1 augustss }
291 1.1 augustss
292 1.1 augustss static __inline int
293 1.1 augustss ym_read(sc, reg)
294 1.2 augustss struct ym_softc *sc;
295 1.2 augustss int reg;
296 1.1 augustss {
297 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
298 1.10 itohy SA3_CTL_INDEX, (reg & 0xff));
299 1.10 itohy return (bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_DATA));
300 1.1 augustss }
301 1.1 augustss
302 1.1 augustss static __inline void
303 1.1 augustss ym_write(sc, reg, data)
304 1.2 augustss struct ym_softc *sc;
305 1.2 augustss int reg;
306 1.2 augustss int data;
307 1.1 augustss {
308 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
309 1.10 itohy SA3_CTL_INDEX, (reg & 0xff));
310 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
311 1.10 itohy SA3_CTL_DATA, (data & 0xff));
312 1.1 augustss }
313 1.1 augustss
314 1.10 itohy static void
315 1.10 itohy ym_init(sc)
316 1.10 itohy struct ym_softc *sc;
317 1.10 itohy {
318 1.10 itohy u_int8_t dpd, apd;
319 1.10 itohy
320 1.10 itohy /* Mute SoundBlaster output if possible. */
321 1.10 itohy if (sc->sc_sb_ioh) {
322 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_ADDR,
323 1.10 itohy SBP_MASTER_VOL);
324 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_DATA,
325 1.10 itohy 0x00);
326 1.10 itohy }
327 1.10 itohy
328 1.10 itohy /* Figure out which part can be power down. */
329 1.10 itohy dpd = SA3_DPWRDWN_SB /* we never use SB */
330 1.10 itohy #if NMPU_YM > 0
331 1.10 itohy | (sc->sc_mpu_ioh ? 0 : SA3_DPWRDWN_MPU)
332 1.10 itohy #else
333 1.10 itohy | SA3_DPWRDWN_MPU
334 1.10 itohy #endif
335 1.10 itohy #if NJOY == 0
336 1.10 itohy | SA3_DPWRDWN_JOY
337 1.10 itohy #endif
338 1.10 itohy | SA3_DPWRDWN_PNP /* ISA Plug and Play is done */
339 1.10 itohy /*
340 1.10 itohy * The master clock is for external wavetable synthesizer
341 1.10 itohy * OPL4-ML (YMF704) or OPL4-ML2 (YMF721),
342 1.10 itohy * and is currently unused.
343 1.10 itohy */
344 1.10 itohy | SA3_DPWRDWN_MCLKO;
345 1.10 itohy
346 1.10 itohy apd = SA3_APWRDWN_SBDAC; /* we never use SB */
347 1.10 itohy
348 1.10 itohy /* Power down OPL3 if not attached. */
349 1.10 itohy if (sc->sc_opl_ioh == 0) {
350 1.10 itohy dpd |= SA3_DPWRDWN_FM;
351 1.10 itohy apd |= SA3_APWRDWN_FMDAC;
352 1.10 itohy }
353 1.10 itohy /* CODEC is always attached. */
354 1.10 itohy
355 1.10 itohy /* Power down unused digital parts. */
356 1.10 itohy ym_write(sc, SA3_DPWRDWN, dpd);
357 1.10 itohy
358 1.10 itohy /* Power down unused analog parts. */
359 1.10 itohy ym_write(sc, SA3_APWRDWN, apd);
360 1.10 itohy }
361 1.1 augustss
362 1.1 augustss
363 1.1 augustss int
364 1.1 augustss ym_getdev(addr, retp)
365 1.2 augustss void *addr;
366 1.2 augustss struct audio_device *retp;
367 1.1 augustss {
368 1.10 itohy struct ym_softc *sc = addr;
369 1.10 itohy
370 1.10 itohy strcpy(retp->name, "OPL3-SA3");
371 1.10 itohy sprintf(retp->version, "%d", sc->sc_version);
372 1.10 itohy strcpy(retp->config, "ym");
373 1.10 itohy
374 1.2 augustss return 0;
375 1.1 augustss }
376 1.1 augustss
377 1.1 augustss
378 1.1 augustss static ad1848_devmap_t mappings[] = {
379 1.10 itohy { YM_DAC_LVL, AD1848_KIND_LVL, AD1848_DAC_CHANNEL },
380 1.2 augustss { YM_MIDI_LVL, AD1848_KIND_LVL, AD1848_AUX2_CHANNEL },
381 1.2 augustss { YM_CD_LVL, AD1848_KIND_LVL, AD1848_AUX1_CHANNEL },
382 1.2 augustss { YM_LINE_LVL, AD1848_KIND_LVL, AD1848_LINE_CHANNEL },
383 1.2 augustss { YM_SPEAKER_LVL, AD1848_KIND_LVL, AD1848_MONO_CHANNEL },
384 1.2 augustss { YM_MONITOR_LVL, AD1848_KIND_LVL, AD1848_MONITOR_CHANNEL },
385 1.10 itohy { YM_DAC_MUTE, AD1848_KIND_MUTE, AD1848_DAC_CHANNEL },
386 1.2 augustss { YM_MIDI_MUTE, AD1848_KIND_MUTE, AD1848_AUX2_CHANNEL },
387 1.2 augustss { YM_CD_MUTE, AD1848_KIND_MUTE, AD1848_AUX1_CHANNEL },
388 1.2 augustss { YM_LINE_MUTE, AD1848_KIND_MUTE, AD1848_LINE_CHANNEL },
389 1.2 augustss { YM_SPEAKER_MUTE, AD1848_KIND_MUTE, AD1848_MONO_CHANNEL },
390 1.2 augustss { YM_MONITOR_MUTE, AD1848_KIND_MUTE, AD1848_MONITOR_CHANNEL },
391 1.2 augustss { YM_REC_LVL, AD1848_KIND_RECORDGAIN, -1 },
392 1.2 augustss { YM_RECORD_SOURCE, AD1848_KIND_RECORDSOURCE, -1}
393 1.1 augustss };
394 1.1 augustss
395 1.10 itohy #define NUMMAP (sizeof(mappings) / sizeof(mappings[0]))
396 1.1 augustss
397 1.1 augustss
398 1.1 augustss static void
399 1.1 augustss ym_mute(sc, left_reg, mute)
400 1.2 augustss struct ym_softc *sc;
401 1.2 augustss int left_reg;
402 1.2 augustss int mute;
403 1.1 augustss
404 1.1 augustss {
405 1.10 itohy u_int8_t reg;
406 1.1 augustss
407 1.10 itohy reg = ym_read(sc, left_reg);
408 1.10 itohy if (mute)
409 1.10 itohy ym_write(sc, left_reg, reg | 0x80);
410 1.10 itohy else
411 1.10 itohy ym_write(sc, left_reg, reg & ~0x80);
412 1.1 augustss }
413 1.1 augustss
414 1.1 augustss
415 1.1 augustss static void
416 1.1 augustss ym_set_master_gain(sc, vol)
417 1.2 augustss struct ym_softc *sc;
418 1.2 augustss struct ad1848_volume *vol;
419 1.1 augustss {
420 1.2 augustss u_int atten;
421 1.10 itohy
422 1.2 augustss sc->master_gain = *vol;
423 1.10 itohy
424 1.10 itohy atten = ((AUDIO_MAX_GAIN - vol->left) * (SA3_VOL_MV + 1)) /
425 1.10 itohy (AUDIO_MAX_GAIN + 1);
426 1.10 itohy
427 1.10 itohy ym_write(sc, SA3_VOL_L, (ym_read(sc, SA3_VOL_L) & ~SA3_VOL_MV) | atten);
428 1.10 itohy
429 1.10 itohy atten = ((AUDIO_MAX_GAIN - vol->right) * (SA3_VOL_MV + 1)) /
430 1.10 itohy (AUDIO_MAX_GAIN + 1);
431 1.10 itohy
432 1.10 itohy ym_write(sc, SA3_VOL_R, (ym_read(sc, SA3_VOL_R) & ~SA3_VOL_MV) | atten);
433 1.1 augustss }
434 1.1 augustss
435 1.1 augustss static void
436 1.1 augustss ym_set_mic_gain(sc, vol)
437 1.2 augustss struct ym_softc *sc;
438 1.10 itohy int vol;
439 1.1 augustss {
440 1.10 itohy u_int atten;
441 1.10 itohy
442 1.10 itohy sc->mic_gain = vol;
443 1.10 itohy
444 1.10 itohy atten = ((AUDIO_MAX_GAIN - vol) * (SA3_MIC_MCV + 1)) /
445 1.10 itohy (AUDIO_MAX_GAIN + 1);
446 1.10 itohy
447 1.10 itohy ym_write(sc, SA3_MIC_VOL,
448 1.10 itohy (ym_read(sc, SA3_MIC_VOL) & ~SA3_MIC_MCV) | atten);
449 1.10 itohy }
450 1.1 augustss
451 1.10 itohy static void
452 1.10 itohy ym_set_3d(sc, cp, val, reg)
453 1.10 itohy struct ym_softc *sc;
454 1.10 itohy mixer_ctrl_t *cp;
455 1.10 itohy struct ad1848_volume *val;
456 1.10 itohy int reg;
457 1.10 itohy {
458 1.10 itohy u_int8_t e;
459 1.1 augustss
460 1.10 itohy ad1848_to_vol(cp, val);
461 1.1 augustss
462 1.10 itohy e = (val->left * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
463 1.10 itohy (AUDIO_MAX_GAIN + 1) << SA3_3D_LSHIFT |
464 1.10 itohy (val->right * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
465 1.10 itohy (AUDIO_MAX_GAIN + 1) << SA3_3D_RSHIFT;
466 1.10 itohy
467 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
468 1.10 itohy /* turn wide stereo on if necessary */
469 1.10 itohy if (e)
470 1.10 itohy ym_power_ctl(sc, YM_POWER_3D, 1);
471 1.10 itohy #endif
472 1.10 itohy
473 1.10 itohy ym_write(sc, reg, e);
474 1.10 itohy
475 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
476 1.10 itohy /* turn wide stereo off if necessary */
477 1.10 itohy if (YM_EQ_OFF(&sc->sc_treble) && YM_EQ_OFF(&sc->sc_bass) &&
478 1.10 itohy YM_EQ_OFF(&sc->sc_wide))
479 1.10 itohy ym_power_ctl(sc, YM_POWER_3D, 0);
480 1.10 itohy #endif
481 1.1 augustss }
482 1.1 augustss
483 1.1 augustss int
484 1.1 augustss ym_mixer_set_port(addr, cp)
485 1.2 augustss void *addr;
486 1.2 augustss mixer_ctrl_t *cp;
487 1.1 augustss {
488 1.2 augustss struct ad1848_softc *ac = addr;
489 1.2 augustss struct ym_softc *sc = ac->parent;
490 1.2 augustss struct ad1848_volume vol;
491 1.10 itohy int error = 0;
492 1.1 augustss
493 1.10 itohy DPRINTF(("%s: ym_mixer_set_port: dev 0x%x, type 0x%x, 0x%x (%d; %d, %d)\n",
494 1.10 itohy DVNAME(sc), cp->dev, cp->type, cp->un.ord,
495 1.10 itohy cp->un.value.num_channels, cp->un.value.level[0],
496 1.10 itohy cp->un.value.level[1]));
497 1.10 itohy
498 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
499 1.10 itohy /* Power-up chip */
500 1.10 itohy ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
501 1.10 itohy #endif
502 1.1 augustss
503 1.2 augustss switch (cp->dev) {
504 1.2 augustss case YM_OUTPUT_LVL:
505 1.2 augustss ad1848_to_vol(cp, &vol);
506 1.2 augustss ym_set_master_gain(sc, &vol);
507 1.10 itohy goto out;
508 1.2 augustss
509 1.2 augustss case YM_OUTPUT_MUTE:
510 1.2 augustss sc->master_mute = (cp->un.ord != 0);
511 1.10 itohy ym_mute(sc, SA3_VOL_L, sc->master_mute);
512 1.10 itohy ym_mute(sc, SA3_VOL_R, sc->master_mute);
513 1.10 itohy goto out;
514 1.2 augustss
515 1.2 augustss case YM_MIC_LVL:
516 1.2 augustss if (cp->un.value.num_channels != 1)
517 1.2 augustss error = EINVAL;
518 1.10 itohy else
519 1.10 itohy ym_set_mic_gain(sc,
520 1.10 itohy cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
521 1.10 itohy goto out;
522 1.10 itohy
523 1.10 itohy case YM_MASTER_EQMODE:
524 1.10 itohy sc->sc_eqmode = cp->un.ord & SA3_SYS_CTL_YMODE;
525 1.10 itohy ym_write(sc, SA3_SYS_CTL, (ym_read(sc, SA3_SYS_CTL) &
526 1.10 itohy ~SA3_SYS_CTL_YMODE) | sc->sc_eqmode);
527 1.10 itohy goto out;
528 1.10 itohy
529 1.10 itohy case YM_MASTER_TREBLE:
530 1.10 itohy ym_set_3d(sc, cp, &sc->sc_treble, SA3_3D_TREBLE);
531 1.10 itohy goto out;
532 1.10 itohy
533 1.10 itohy case YM_MASTER_BASS:
534 1.10 itohy ym_set_3d(sc, cp, &sc->sc_bass, SA3_3D_BASS);
535 1.10 itohy goto out;
536 1.10 itohy
537 1.10 itohy case YM_MASTER_WIDE:
538 1.10 itohy ym_set_3d(sc, cp, &sc->sc_wide, SA3_3D_WIDE);
539 1.10 itohy goto out;
540 1.10 itohy
541 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
542 1.10 itohy case YM_PWR_MODE:
543 1.10 itohy if ((unsigned) cp->un.ord > YM_POWER_NOSAVE)
544 1.10 itohy error = EINVAL;
545 1.10 itohy else
546 1.10 itohy sc->sc_pow_mode = cp->un.ord;
547 1.10 itohy goto out;
548 1.10 itohy
549 1.10 itohy case YM_PWR_TIMEOUT:
550 1.10 itohy if (cp->un.value.num_channels != 1)
551 1.10 itohy error = EINVAL;
552 1.10 itohy else
553 1.10 itohy sc->sc_pow_timeout =
554 1.10 itohy cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
555 1.10 itohy goto out;
556 1.10 itohy
557 1.10 itohy /*
558 1.10 itohy * Power on/off the playback part for monitoring.
559 1.10 itohy */
560 1.10 itohy case YM_MONITOR_MUTE:
561 1.10 itohy if ((ac->open_mode & (FREAD | FWRITE)) == FREAD)
562 1.10 itohy ym_power_ctl(sc, YM_POWER_CODEC_P | YM_POWER_CODEC_DA,
563 1.10 itohy cp->un.ord == 0);
564 1.10 itohy break; /* fall to ad1848_mixer_set_port() */
565 1.10 itohy #endif
566 1.10 itohy }
567 1.10 itohy
568 1.10 itohy error = ad1848_mixer_set_port(ac, mappings, NUMMAP, cp);
569 1.10 itohy
570 1.10 itohy if (error != ENXIO)
571 1.10 itohy goto out;
572 1.10 itohy
573 1.10 itohy error = 0;
574 1.2 augustss
575 1.10 itohy switch (cp->dev) {
576 1.2 augustss case YM_MIC_MUTE:
577 1.2 augustss sc->mic_mute = (cp->un.ord != 0);
578 1.10 itohy ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
579 1.2 augustss break;
580 1.2 augustss
581 1.2 augustss default:
582 1.10 itohy error = ENXIO;
583 1.10 itohy break;
584 1.2 augustss }
585 1.10 itohy
586 1.10 itohy out:
587 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
588 1.10 itohy /* Power-down chip */
589 1.10 itohy ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
590 1.10 itohy #endif
591 1.10 itohy
592 1.2 augustss return (error);
593 1.1 augustss }
594 1.1 augustss
595 1.1 augustss int
596 1.1 augustss ym_mixer_get_port(addr, cp)
597 1.2 augustss void *addr;
598 1.2 augustss mixer_ctrl_t *cp;
599 1.1 augustss {
600 1.2 augustss struct ad1848_softc *ac = addr;
601 1.2 augustss struct ym_softc *sc = ac->parent;
602 1.10 itohy int error;
603 1.1 augustss
604 1.2 augustss switch (cp->dev) {
605 1.2 augustss case YM_OUTPUT_LVL:
606 1.2 augustss ad1848_from_vol(cp, &sc->master_gain);
607 1.10 itohy return 0;
608 1.10 itohy
609 1.2 augustss case YM_OUTPUT_MUTE:
610 1.2 augustss cp->un.ord = sc->master_mute;
611 1.10 itohy return 0;
612 1.10 itohy
613 1.2 augustss case YM_MIC_LVL:
614 1.2 augustss if (cp->un.value.num_channels != 1)
615 1.10 itohy return EINVAL;
616 1.10 itohy cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->mic_gain;
617 1.10 itohy return 0;
618 1.10 itohy
619 1.10 itohy case YM_MASTER_EQMODE:
620 1.10 itohy cp->un.ord = sc->sc_eqmode;
621 1.10 itohy return 0;
622 1.10 itohy
623 1.10 itohy case YM_MASTER_TREBLE:
624 1.10 itohy ad1848_from_vol(cp, &sc->sc_treble);
625 1.10 itohy return 0;
626 1.10 itohy
627 1.10 itohy case YM_MASTER_BASS:
628 1.10 itohy ad1848_from_vol(cp, &sc->sc_bass);
629 1.10 itohy return 0;
630 1.10 itohy
631 1.10 itohy case YM_MASTER_WIDE:
632 1.10 itohy ad1848_from_vol(cp, &sc->sc_wide);
633 1.10 itohy return 0;
634 1.10 itohy
635 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
636 1.10 itohy case YM_PWR_MODE:
637 1.10 itohy cp->un.ord = sc->sc_pow_mode;
638 1.10 itohy return 0;
639 1.10 itohy
640 1.10 itohy case YM_PWR_TIMEOUT:
641 1.10 itohy if (cp->un.value.num_channels != 1)
642 1.10 itohy return EINVAL;
643 1.10 itohy cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_pow_timeout;
644 1.10 itohy return 0;
645 1.10 itohy #endif
646 1.10 itohy }
647 1.10 itohy
648 1.10 itohy error = ad1848_mixer_get_port(ac, mappings, NUMMAP, cp);
649 1.10 itohy
650 1.10 itohy if (error != ENXIO)
651 1.10 itohy return (error);
652 1.10 itohy
653 1.10 itohy error = 0;
654 1.10 itohy
655 1.10 itohy switch (cp->dev) {
656 1.2 augustss case YM_MIC_MUTE:
657 1.2 augustss cp->un.ord = sc->mic_mute;
658 1.2 augustss break;
659 1.10 itohy
660 1.2 augustss default:
661 1.2 augustss error = ENXIO;
662 1.2 augustss break;
663 1.2 augustss }
664 1.10 itohy
665 1.2 augustss return(error);
666 1.1 augustss }
667 1.1 augustss
668 1.10 itohy static char *mixer_classes[] = {
669 1.10 itohy AudioCinputs, AudioCrecord, AudioCoutputs, AudioCmonitor,
670 1.10 itohy AudioCequalization
671 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
672 1.10 itohy , AudioCpower
673 1.10 itohy #endif
674 1.10 itohy };
675 1.1 augustss
676 1.1 augustss int
677 1.1 augustss ym_query_devinfo(addr, dip)
678 1.2 augustss void *addr;
679 1.2 augustss mixer_devinfo_t *dip;
680 1.1 augustss {
681 1.10 itohy static char *mixer_port_names[] = {
682 1.10 itohy AudioNdac, AudioNmidi, AudioNcd, AudioNline, AudioNspeaker,
683 1.10 itohy AudioNmicrophone, AudioNmonitor
684 1.10 itohy };
685 1.1 augustss
686 1.2 augustss dip->next = dip->prev = AUDIO_MIXER_LAST;
687 1.10 itohy
688 1.2 augustss switch(dip->index) {
689 1.2 augustss case YM_INPUT_CLASS: /* input class descriptor */
690 1.2 augustss case YM_OUTPUT_CLASS:
691 1.2 augustss case YM_MONITOR_CLASS:
692 1.2 augustss case YM_RECORD_CLASS:
693 1.10 itohy case YM_EQ_CLASS:
694 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
695 1.10 itohy case YM_PWR_CLASS:
696 1.10 itohy #endif
697 1.2 augustss dip->type = AUDIO_MIXER_CLASS;
698 1.2 augustss dip->mixer_class = dip->index;
699 1.10 itohy strcpy(dip->label.name,
700 1.2 augustss mixer_classes[dip->index - YM_INPUT_CLASS]);
701 1.2 augustss break;
702 1.10 itohy
703 1.10 itohy case YM_DAC_LVL:
704 1.2 augustss case YM_MIDI_LVL:
705 1.2 augustss case YM_CD_LVL:
706 1.10 itohy case YM_LINE_LVL:
707 1.2 augustss case YM_SPEAKER_LVL:
708 1.2 augustss case YM_MIC_LVL:
709 1.2 augustss case YM_MONITOR_LVL:
710 1.2 augustss dip->type = AUDIO_MIXER_VALUE;
711 1.2 augustss if (dip->index == YM_MONITOR_LVL)
712 1.2 augustss dip->mixer_class = YM_MONITOR_CLASS;
713 1.2 augustss else
714 1.2 augustss dip->mixer_class = YM_INPUT_CLASS;
715 1.10 itohy
716 1.2 augustss dip->next = dip->index + 7;
717 1.10 itohy
718 1.2 augustss strcpy(dip->label.name,
719 1.10 itohy mixer_port_names[dip->index - YM_DAC_LVL]);
720 1.10 itohy
721 1.2 augustss if (dip->index == YM_SPEAKER_LVL ||
722 1.2 augustss dip->index == YM_MIC_LVL)
723 1.2 augustss dip->un.v.num_channels = 1;
724 1.2 augustss else
725 1.2 augustss dip->un.v.num_channels = 2;
726 1.10 itohy
727 1.2 augustss strcpy(dip->un.v.units.name, AudioNvolume);
728 1.2 augustss break;
729 1.10 itohy
730 1.10 itohy case YM_DAC_MUTE:
731 1.2 augustss case YM_MIDI_MUTE:
732 1.2 augustss case YM_CD_MUTE:
733 1.2 augustss case YM_LINE_MUTE:
734 1.2 augustss case YM_SPEAKER_MUTE:
735 1.2 augustss case YM_MIC_MUTE:
736 1.2 augustss case YM_MONITOR_MUTE:
737 1.2 augustss if (dip->index == YM_MONITOR_MUTE)
738 1.2 augustss dip->mixer_class = YM_MONITOR_CLASS;
739 1.2 augustss else
740 1.2 augustss dip->mixer_class = YM_INPUT_CLASS;
741 1.2 augustss dip->type = AUDIO_MIXER_ENUM;
742 1.2 augustss dip->prev = dip->index - 7;
743 1.2 augustss mute:
744 1.2 augustss strcpy(dip->label.name, AudioNmute);
745 1.2 augustss dip->un.e.num_mem = 2;
746 1.2 augustss strcpy(dip->un.e.member[0].label.name, AudioNoff);
747 1.2 augustss dip->un.e.member[0].ord = 0;
748 1.2 augustss strcpy(dip->un.e.member[1].label.name, AudioNon);
749 1.2 augustss dip->un.e.member[1].ord = 1;
750 1.2 augustss break;
751 1.10 itohy
752 1.10 itohy
753 1.2 augustss case YM_OUTPUT_LVL:
754 1.2 augustss dip->type = AUDIO_MIXER_VALUE;
755 1.2 augustss dip->mixer_class = YM_OUTPUT_CLASS;
756 1.2 augustss dip->next = YM_OUTPUT_MUTE;
757 1.2 augustss strcpy(dip->label.name, AudioNmaster);
758 1.2 augustss dip->un.v.num_channels = 2;
759 1.2 augustss strcpy(dip->un.v.units.name, AudioNvolume);
760 1.2 augustss break;
761 1.10 itohy
762 1.2 augustss case YM_OUTPUT_MUTE:
763 1.2 augustss dip->mixer_class = YM_OUTPUT_CLASS;
764 1.2 augustss dip->type = AUDIO_MIXER_ENUM;
765 1.2 augustss dip->prev = YM_OUTPUT_LVL;
766 1.2 augustss goto mute;
767 1.10 itohy
768 1.10 itohy
769 1.2 augustss case YM_REC_LVL: /* record level */
770 1.2 augustss dip->type = AUDIO_MIXER_VALUE;
771 1.2 augustss dip->mixer_class = YM_RECORD_CLASS;
772 1.2 augustss dip->next = YM_RECORD_SOURCE;
773 1.2 augustss strcpy(dip->label.name, AudioNrecord);
774 1.2 augustss dip->un.v.num_channels = 2;
775 1.2 augustss strcpy(dip->un.v.units.name, AudioNvolume);
776 1.2 augustss break;
777 1.10 itohy
778 1.2 augustss case YM_RECORD_SOURCE:
779 1.2 augustss dip->mixer_class = YM_RECORD_CLASS;
780 1.2 augustss dip->type = AUDIO_MIXER_ENUM;
781 1.2 augustss dip->prev = YM_REC_LVL;
782 1.2 augustss strcpy(dip->label.name, AudioNsource);
783 1.2 augustss dip->un.e.num_mem = 4;
784 1.2 augustss strcpy(dip->un.e.member[0].label.name, AudioNmicrophone);
785 1.2 augustss dip->un.e.member[0].ord = MIC_IN_PORT;
786 1.2 augustss strcpy(dip->un.e.member[1].label.name, AudioNline);
787 1.2 augustss dip->un.e.member[1].ord = LINE_IN_PORT;
788 1.2 augustss strcpy(dip->un.e.member[2].label.name, AudioNdac);
789 1.2 augustss dip->un.e.member[2].ord = DAC_IN_PORT;
790 1.2 augustss strcpy(dip->un.e.member[3].label.name, AudioNcd);
791 1.2 augustss dip->un.e.member[3].ord = AUX1_IN_PORT;
792 1.2 augustss break;
793 1.10 itohy
794 1.10 itohy
795 1.10 itohy case YM_MASTER_EQMODE:
796 1.10 itohy dip->type = AUDIO_MIXER_ENUM;
797 1.10 itohy dip->mixer_class = YM_EQ_CLASS;
798 1.10 itohy strcpy(dip->label.name, AudioNmode);
799 1.10 itohy strcpy(dip->un.v.units.name, AudioNmode);
800 1.10 itohy dip->un.e.num_mem = 4;
801 1.10 itohy strcpy(dip->un.e.member[0].label.name, AudioNdesktop);
802 1.10 itohy dip->un.e.member[0].ord = SA3_SYS_CTL_YMODE0;
803 1.10 itohy strcpy(dip->un.e.member[1].label.name, AudioNlaptop);
804 1.10 itohy dip->un.e.member[1].ord = SA3_SYS_CTL_YMODE1;
805 1.10 itohy strcpy(dip->un.e.member[2].label.name, AudioNsubnote);
806 1.10 itohy dip->un.e.member[2].ord = SA3_SYS_CTL_YMODE2;
807 1.10 itohy strcpy(dip->un.e.member[3].label.name, AudioNhifi);
808 1.10 itohy dip->un.e.member[3].ord = SA3_SYS_CTL_YMODE3;
809 1.10 itohy break;
810 1.10 itohy
811 1.10 itohy case YM_MASTER_TREBLE:
812 1.10 itohy dip->type = AUDIO_MIXER_VALUE;
813 1.10 itohy dip->mixer_class = YM_EQ_CLASS;
814 1.10 itohy strcpy(dip->label.name, AudioNtreble);
815 1.10 itohy dip->un.v.num_channels = 2;
816 1.10 itohy strcpy(dip->un.v.units.name, AudioNtreble);
817 1.10 itohy break;
818 1.10 itohy
819 1.10 itohy case YM_MASTER_BASS:
820 1.10 itohy dip->type = AUDIO_MIXER_VALUE;
821 1.10 itohy dip->mixer_class = YM_EQ_CLASS;
822 1.10 itohy strcpy(dip->label.name, AudioNbass);
823 1.10 itohy dip->un.v.num_channels = 2;
824 1.10 itohy strcpy(dip->un.v.units.name, AudioNbass);
825 1.10 itohy break;
826 1.10 itohy
827 1.10 itohy case YM_MASTER_WIDE:
828 1.10 itohy dip->type = AUDIO_MIXER_VALUE;
829 1.10 itohy dip->mixer_class = YM_EQ_CLASS;
830 1.10 itohy strcpy(dip->label.name, AudioNsurround);
831 1.10 itohy dip->un.v.num_channels = 2;
832 1.10 itohy strcpy(dip->un.v.units.name, AudioNsurround);
833 1.10 itohy break;
834 1.10 itohy
835 1.10 itohy
836 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
837 1.10 itohy case YM_PWR_MODE:
838 1.10 itohy dip->type = AUDIO_MIXER_ENUM;
839 1.10 itohy dip->mixer_class = YM_PWR_CLASS;
840 1.10 itohy dip->next = YM_PWR_TIMEOUT;
841 1.10 itohy strcpy(dip->label.name, AudioNpower);
842 1.10 itohy dip->un.e.num_mem = 3;
843 1.10 itohy strcpy(dip->un.e.member[0].label.name, AudioNpowerdown);
844 1.10 itohy dip->un.e.member[0].ord = YM_POWER_POWERDOWN;
845 1.10 itohy strcpy(dip->un.e.member[1].label.name, AudioNpowersave);
846 1.10 itohy dip->un.e.member[1].ord = YM_POWER_POWERSAVE;
847 1.10 itohy strcpy(dip->un.e.member[2].label.name, AudioNnosave);
848 1.10 itohy dip->un.e.member[2].ord = YM_POWER_NOSAVE;
849 1.10 itohy break;
850 1.10 itohy
851 1.10 itohy case YM_PWR_TIMEOUT:
852 1.10 itohy dip->type = AUDIO_MIXER_VALUE;
853 1.10 itohy dip->mixer_class = YM_PWR_CLASS;
854 1.10 itohy dip->prev = YM_PWR_MODE;
855 1.10 itohy strcpy(dip->label.name, AudioNtimeout);
856 1.10 itohy dip->un.v.num_channels = 1;
857 1.10 itohy strcpy(dip->un.v.units.name, AudioNtimeout);
858 1.10 itohy break;
859 1.10 itohy #endif /* not AUDIO_NO_POWER_CTL */
860 1.10 itohy
861 1.2 augustss default:
862 1.2 augustss return ENXIO;
863 1.2 augustss /*NOTREACHED*/
864 1.2 augustss }
865 1.10 itohy
866 1.10 itohy return 0;
867 1.10 itohy }
868 1.10 itohy
869 1.10 itohy int
870 1.10 itohy ym_intr(arg)
871 1.10 itohy void *arg;
872 1.10 itohy {
873 1.10 itohy struct ym_softc *sc = arg;
874 1.10 itohy u_int8_t ist;
875 1.10 itohy int processed;
876 1.10 itohy
877 1.10 itohy /* OPL3 timer is currently unused. */
878 1.10 itohy if (((ist = ym_read(sc, SA3_IRQA_STAT)) &
879 1.10 itohy ~(SA3_IRQ_STAT_SB|SA3_IRQ_STAT_OPL3)) == 0) {
880 1.10 itohy DPRINTF(("%s: ym_intr: spurious interrupt\n", DVNAME(sc)));
881 1.10 itohy return 0;
882 1.10 itohy }
883 1.10 itohy
884 1.10 itohy /* Process pending interrupts. */
885 1.10 itohy do {
886 1.10 itohy processed = 0;
887 1.10 itohy /*
888 1.10 itohy * CODEC interrupts.
889 1.10 itohy */
890 1.10 itohy if (ist & (SA3_IRQ_STAT_TI|SA3_IRQ_STAT_CI|SA3_IRQ_STAT_PI)) {
891 1.10 itohy ad1848_isa_intr(&sc->sc_ad1848);
892 1.10 itohy processed = 1;
893 1.10 itohy }
894 1.10 itohy #if NMPU_YM > 0
895 1.10 itohy /*
896 1.10 itohy * MPU401 interrupt.
897 1.10 itohy */
898 1.10 itohy if (ist & SA3_IRQ_STAT_MPU) {
899 1.10 itohy mpu_intr(sc->sc_mpudev);
900 1.10 itohy processed = 1;
901 1.10 itohy }
902 1.10 itohy #endif
903 1.10 itohy /*
904 1.10 itohy * Hardware volume interrupt.
905 1.10 itohy * Recalculate master volume from the hardware setting.
906 1.10 itohy */
907 1.10 itohy if (ist & SA3_IRQ_STAT_MV) {
908 1.10 itohy sc->master_gain.left =
909 1.10 itohy (SA3_VOL_MV & ~ym_read(sc, SA3_VOL_L)) *
910 1.10 itohy (SA3_VOL_MV + 1) + (SA3_VOL_MV + 1) / 2;
911 1.10 itohy sc->master_gain.right =
912 1.10 itohy (SA3_VOL_MV & ~ym_read(sc, SA3_VOL_R)) *
913 1.10 itohy (SA3_VOL_MV + 1) + (SA3_VOL_MV + 1) / 2;
914 1.10 itohy
915 1.10 itohy #if 0 /* XXX NOT YET */
916 1.10 itohy /* Notify the change to async processes. */
917 1.10 itohy if (sc->sc_audiodev)
918 1.10 itohy mixer_signal(sc->sc_audiodev);
919 1.10 itohy #endif
920 1.10 itohy processed = 1;
921 1.10 itohy }
922 1.10 itohy } while (processed && (ist = ym_read(sc, SA3_IRQA_STAT)));
923 1.10 itohy
924 1.10 itohy return 1;
925 1.10 itohy }
926 1.10 itohy
927 1.10 itohy
928 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
929 1.10 itohy static void
930 1.10 itohy ym_save_codec_regs(sc)
931 1.10 itohy struct ym_softc *sc;
932 1.10 itohy {
933 1.10 itohy struct ad1848_softc *ac = &sc->sc_ad1848.sc_ad1848;
934 1.10 itohy int i;
935 1.10 itohy
936 1.10 itohy DPRINTF(("%s: ym_save_codec_regs\n", DVNAME(sc)));
937 1.10 itohy
938 1.10 itohy for (i = 0; i <= 0x1f; i++)
939 1.10 itohy sc->sc_codec_scan[i] = ad_read(ac, i);
940 1.10 itohy }
941 1.10 itohy
942 1.10 itohy static void
943 1.10 itohy ym_restore_codec_regs(sc)
944 1.10 itohy struct ym_softc *sc;
945 1.10 itohy {
946 1.10 itohy struct ad1848_softc *ac = &sc->sc_ad1848.sc_ad1848;
947 1.10 itohy int i, t;
948 1.10 itohy
949 1.10 itohy DPRINTF(("%s: ym_restore_codec_regs\n", DVNAME(sc)));
950 1.10 itohy
951 1.10 itohy for (i = 0; i <= 0x1f; i++) {
952 1.10 itohy /*
953 1.10 itohy * Wait til the chip becomes ready.
954 1.10 itohy * This is required after suspend/resume.
955 1.10 itohy */
956 1.10 itohy for (t = 0;
957 1.10 itohy t < 100000 && ADREAD(ac, AD1848_IADDR) & SP_IN_INIT; t++)
958 1.10 itohy ;
959 1.10 itohy #ifdef AUDIO_DEBUG
960 1.10 itohy if (t)
961 1.10 itohy DPRINTF(("%s: ym_restore_codec_regs: reg %d, t %d\n",
962 1.10 itohy DVNAME(sc), i, t));
963 1.10 itohy #endif
964 1.10 itohy ad_write(ac, i, sc->sc_codec_scan[i]);
965 1.10 itohy }
966 1.10 itohy }
967 1.10 itohy
968 1.10 itohy /*
969 1.10 itohy * Save and restore the state on suspending / resumning.
970 1.10 itohy *
971 1.10 itohy * XXX This is not complete.
972 1.10 itohy * Currently only the parameters, such as output gain, are restored.
973 1.10 itohy * DMA state should also be restored. FIXME.
974 1.10 itohy */
975 1.10 itohy void
976 1.10 itohy ym_power_hook(why, v)
977 1.10 itohy int why;
978 1.10 itohy void *v;
979 1.10 itohy {
980 1.10 itohy struct ym_softc *sc = v;
981 1.10 itohy int i;
982 1.10 itohy int s;
983 1.10 itohy
984 1.10 itohy DPRINTF(("%s: ym_power_hook: why = %d\n", DVNAME(sc), why));
985 1.10 itohy
986 1.10 itohy s = splaudio();
987 1.10 itohy
988 1.10 itohy if (why != PWR_RESUME) {
989 1.10 itohy /*
990 1.10 itohy * suspending...
991 1.10 itohy */
992 1.10 itohy untimeout(ym_powerdown_blocks, sc);
993 1.10 itohy if (sc->sc_turning_off)
994 1.10 itohy ym_powerdown_blocks(sc);
995 1.10 itohy
996 1.10 itohy /*
997 1.10 itohy * Save CODEC registers.
998 1.10 itohy * Note that the registers read incorrect
999 1.10 itohy * if the CODEC part is in power-down mode.
1000 1.10 itohy */
1001 1.10 itohy if (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL)
1002 1.10 itohy ym_save_codec_regs(sc);
1003 1.10 itohy
1004 1.10 itohy /*
1005 1.10 itohy * Save OPL3-SA3 control registers and power-down the chip.
1006 1.10 itohy * Note that the registers read incorrect
1007 1.10 itohy * if the chip is in global power-down mode.
1008 1.10 itohy */
1009 1.10 itohy sc->sc_sa3_scan[SA3_PWR_MNG] = ym_read(sc, SA3_PWR_MNG);
1010 1.10 itohy if (sc->sc_on_blocks)
1011 1.10 itohy ym_chip_powerdown(sc);
1012 1.10 itohy } else {
1013 1.10 itohy /*
1014 1.10 itohy * resuming...
1015 1.10 itohy */
1016 1.10 itohy ym_chip_powerup(sc, 1);
1017 1.10 itohy ym_init(sc); /* power-on CODEC */
1018 1.10 itohy
1019 1.10 itohy /* Restore control registers. */
1020 1.10 itohy for (i = SA3_PWR_MNG + 1; i <= YM_SAVE_REG_MAX; i++) {
1021 1.10 itohy if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA ||
1022 1.10 itohy i == SA3_DPWRDWN)
1023 1.10 itohy continue;
1024 1.10 itohy ym_write(sc, i, sc->sc_sa3_scan[i]);
1025 1.10 itohy }
1026 1.10 itohy
1027 1.10 itohy /* Restore CODEC registers (including mixer). */
1028 1.10 itohy ym_restore_codec_regs(sc);
1029 1.10 itohy
1030 1.10 itohy /* Restore global/digital power-down state. */
1031 1.10 itohy ym_write(sc, SA3_PWR_MNG, sc->sc_sa3_scan[SA3_PWR_MNG]);
1032 1.10 itohy ym_write(sc, SA3_DPWRDWN, sc->sc_sa3_scan[SA3_DPWRDWN]);
1033 1.10 itohy }
1034 1.10 itohy splx(s);
1035 1.10 itohy }
1036 1.10 itohy
1037 1.10 itohy int
1038 1.10 itohy ym_codec_power_ctl(arg, flags)
1039 1.10 itohy void *arg;
1040 1.10 itohy int flags;
1041 1.10 itohy {
1042 1.10 itohy struct ym_softc *sc = arg;
1043 1.10 itohy struct ad1848_softc *ac = &sc->sc_ad1848.sc_ad1848;
1044 1.10 itohy int parts;
1045 1.10 itohy
1046 1.10 itohy DPRINTF(("%s: ym_codec_power_ctl: flags = 0x%x\n", DVNAME(sc), flags));
1047 1.10 itohy
1048 1.10 itohy if (flags != 0) {
1049 1.10 itohy parts = 0;
1050 1.10 itohy if (flags & FREAD) {
1051 1.10 itohy parts |= YM_POWER_CODEC_R | YM_POWER_CODEC_AD;
1052 1.10 itohy if (ac->mute[AD1848_MONITOR_CHANNEL] == 0)
1053 1.10 itohy parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
1054 1.10 itohy }
1055 1.10 itohy if (flags & FWRITE)
1056 1.10 itohy parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
1057 1.10 itohy } else
1058 1.10 itohy parts = YM_POWER_CODEC_P | YM_POWER_CODEC_R |
1059 1.10 itohy YM_POWER_CODEC_DA | YM_POWER_CODEC_AD;
1060 1.10 itohy
1061 1.10 itohy ym_power_ctl(sc, parts, flags);
1062 1.10 itohy
1063 1.2 augustss return 0;
1064 1.1 augustss }
1065 1.10 itohy
1066 1.10 itohy /*
1067 1.10 itohy * Enter Power Save mode or Global Power Down mode.
1068 1.10 itohy * Total dissipation becomes 5mA and 10uA (typ.) respective.
1069 1.10 itohy *
1070 1.10 itohy * This must be called at splaudio().
1071 1.10 itohy */
1072 1.10 itohy static void
1073 1.10 itohy ym_chip_powerdown(sc)
1074 1.10 itohy struct ym_softc *sc;
1075 1.10 itohy {
1076 1.10 itohy int i;
1077 1.10 itohy
1078 1.10 itohy DPRINTF(("%s: ym_chip_powerdown\n", DVNAME(sc)));
1079 1.10 itohy
1080 1.10 itohy /* Save control registers. */
1081 1.10 itohy for (i = SA3_PWR_MNG + 1; i <= YM_SAVE_REG_MAX; i++) {
1082 1.10 itohy if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA)
1083 1.10 itohy continue;
1084 1.10 itohy sc->sc_sa3_scan[i] = ym_read(sc, i);
1085 1.10 itohy }
1086 1.10 itohy ym_write(sc, SA3_PWR_MNG,
1087 1.10 itohy (sc->sc_pow_mode == YM_POWER_POWERDOWN ?
1088 1.10 itohy SA3_PWR_MNG_PDN : SA3_PWR_MNG_PSV) | SA3_PWR_MNG_PDX);
1089 1.10 itohy }
1090 1.10 itohy
1091 1.10 itohy /*
1092 1.10 itohy * Power up from Power Save / Global Power Down Mode.
1093 1.10 itohy *
1094 1.10 itohy * We assume no ym interrupt shall occur, since the chip is
1095 1.10 itohy * in power-down mode (or should be blocked by splaudio()).
1096 1.10 itohy */
1097 1.10 itohy static void
1098 1.10 itohy ym_chip_powerup(sc, nosleep)
1099 1.10 itohy struct ym_softc *sc;
1100 1.10 itohy int nosleep;
1101 1.10 itohy {
1102 1.10 itohy int wchan;
1103 1.10 itohy u_int8_t pw;
1104 1.10 itohy
1105 1.10 itohy DPRINTF(("%s: ym_chip_powerup\n", DVNAME(sc)));
1106 1.10 itohy
1107 1.10 itohy pw = ym_read(sc, SA3_PWR_MNG);
1108 1.10 itohy
1109 1.10 itohy if ((pw & (SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN | SA3_PWR_MNG_PDX)) == 0)
1110 1.10 itohy return; /* already on */
1111 1.10 itohy
1112 1.10 itohy pw &= ~SA3_PWR_MNG_PDX;
1113 1.10 itohy ym_write(sc, SA3_PWR_MNG, pw);
1114 1.10 itohy
1115 1.10 itohy /* wait 100 ms */
1116 1.10 itohy if (nosleep)
1117 1.10 itohy delay(100000);
1118 1.10 itohy else
1119 1.10 itohy tsleep(&wchan, PWAIT, "ym_pwu1", hz / 10);
1120 1.10 itohy
1121 1.10 itohy pw &= ~(SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN);
1122 1.10 itohy ym_write(sc, SA3_PWR_MNG, pw);
1123 1.10 itohy
1124 1.10 itohy /* wait 70 ms */
1125 1.10 itohy if (nosleep)
1126 1.10 itohy delay(70000);
1127 1.10 itohy else
1128 1.10 itohy tsleep(&wchan, PWAIT, "ym_pwu2", hz / 14);
1129 1.10 itohy
1130 1.10 itohy /* The chip is muted automatically --- unmute it now. */
1131 1.10 itohy ym_mute(sc, SA3_VOL_L, sc->master_mute);
1132 1.10 itohy ym_mute(sc, SA3_VOL_R, sc->master_mute);
1133 1.10 itohy }
1134 1.10 itohy
1135 1.10 itohy /* timeout() handler for power-down */
1136 1.10 itohy void
1137 1.10 itohy ym_powerdown_blocks(arg)
1138 1.10 itohy void *arg;
1139 1.10 itohy {
1140 1.10 itohy struct ym_softc *sc = arg;
1141 1.10 itohy u_int16_t parts;
1142 1.10 itohy u_int16_t on_blocks = sc->sc_on_blocks;
1143 1.10 itohy u_int8_t sv;
1144 1.10 itohy int s;
1145 1.10 itohy
1146 1.10 itohy DPRINTF(("%s: ym_powerdown_blocks: turning_off 0x%x\n",
1147 1.10 itohy DVNAME(sc), sc->sc_turning_off));
1148 1.10 itohy
1149 1.10 itohy s = splaudio();
1150 1.10 itohy
1151 1.10 itohy on_blocks = sc->sc_on_blocks;
1152 1.10 itohy
1153 1.10 itohy /* Be sure not to change the state of the chip. Save it first. */
1154 1.10 itohy sv = bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX);
1155 1.10 itohy
1156 1.10 itohy parts = sc->sc_turning_off;
1157 1.10 itohy
1158 1.10 itohy if (on_blocks & ~parts & YM_POWER_CODEC_CTL)
1159 1.10 itohy parts &= ~(YM_POWER_CODEC_P | YM_POWER_CODEC_R);
1160 1.10 itohy if (parts & YM_POWER_CODEC_CTL) {
1161 1.10 itohy if ((on_blocks & YM_POWER_CODEC_P) == 0)
1162 1.10 itohy parts |= YM_POWER_CODEC_P;
1163 1.10 itohy if ((on_blocks & YM_POWER_CODEC_R) == 0)
1164 1.10 itohy parts |= YM_POWER_CODEC_R;
1165 1.10 itohy parts &= ~YM_POWER_CODEC_CTL;
1166 1.10 itohy }
1167 1.10 itohy
1168 1.10 itohy /* If CODEC is being off, save the state. */
1169 1.10 itohy if ((sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) &&
1170 1.10 itohy (sc->sc_on_blocks & ~sc->sc_turning_off &
1171 1.10 itohy YM_POWER_CODEC_DIGITAL) == 0)
1172 1.10 itohy ym_save_codec_regs(sc);
1173 1.10 itohy
1174 1.10 itohy ym_write(sc, SA3_DPWRDWN, ym_read(sc, SA3_DPWRDWN) | (u_int8_t) parts);
1175 1.10 itohy ym_write(sc, SA3_APWRDWN, ym_read(sc, SA3_APWRDWN) | (parts >> 8));
1176 1.10 itohy
1177 1.10 itohy if (((sc->sc_on_blocks &= ~sc->sc_turning_off) & YM_POWER_ACTIVE) == 0)
1178 1.10 itohy ym_chip_powerdown(sc);
1179 1.10 itohy
1180 1.10 itohy sc->sc_turning_off = 0;
1181 1.10 itohy
1182 1.10 itohy /* Restore the state of the chip. */
1183 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX, sv);
1184 1.10 itohy
1185 1.10 itohy splx(s);
1186 1.10 itohy }
1187 1.10 itohy
1188 1.10 itohy /*
1189 1.10 itohy * Power control entry point.
1190 1.10 itohy */
1191 1.10 itohy void
1192 1.10 itohy ym_power_ctl(sc, parts, onoff)
1193 1.10 itohy struct ym_softc *sc;
1194 1.10 itohy int parts, onoff;
1195 1.10 itohy {
1196 1.10 itohy int s;
1197 1.10 itohy int need_restore_codec;
1198 1.10 itohy
1199 1.10 itohy DPRINTF(("%s: ym_power_ctl: parts = 0x%x, %s\n",
1200 1.10 itohy DVNAME(sc), parts, onoff ? "on" : "off"));
1201 1.10 itohy
1202 1.10 itohy #ifdef DIAGNOSTIC
1203 1.10 itohy if (curproc == NULL)
1204 1.10 itohy panic("ym_power_ctl: no curproc");
1205 1.10 itohy #endif
1206 1.10 itohy /* This function may sleep --- needs locking. */
1207 1.10 itohy while (sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) {
1208 1.10 itohy sc->sc_in_power_ctl |= YM_POWER_CTL_WANTED;
1209 1.10 itohy DPRINTF(("%s: ym_power_ctl: sleeping\n", DVNAME(sc)));
1210 1.10 itohy tsleep(&sc->sc_in_power_ctl, PWAIT, "ym_pwc", 0);
1211 1.10 itohy DPRINTF(("%s: ym_power_ctl: awaken\n", DVNAME(sc)));
1212 1.10 itohy }
1213 1.10 itohy sc->sc_in_power_ctl |= YM_POWER_CTL_INUSE;
1214 1.10 itohy
1215 1.10 itohy /* Defeat timeout(9) interrupts. */
1216 1.10 itohy s = splsoftclock();
1217 1.10 itohy
1218 1.10 itohy /* If ON requested to parts which are scheduled to OFF, cancel it. */
1219 1.10 itohy if (onoff && sc->sc_turning_off && (sc->sc_turning_off &= ~parts) == 0)
1220 1.10 itohy untimeout(ym_powerdown_blocks, sc);
1221 1.10 itohy
1222 1.10 itohy if (!onoff && sc->sc_turning_off)
1223 1.10 itohy parts &= ~sc->sc_turning_off;
1224 1.10 itohy
1225 1.10 itohy /* Discard bits which are currently {on,off}. */
1226 1.10 itohy parts &= onoff ? ~sc->sc_on_blocks : sc->sc_on_blocks;
1227 1.10 itohy
1228 1.10 itohy /* Cancel previous timeout if needed. */
1229 1.10 itohy if (parts != 0 && sc->sc_turning_off)
1230 1.10 itohy untimeout(ym_powerdown_blocks, sc);
1231 1.10 itohy
1232 1.10 itohy (void) splx(s);
1233 1.10 itohy
1234 1.10 itohy if (parts == 0)
1235 1.10 itohy goto unlock; /* no work to do */
1236 1.10 itohy
1237 1.10 itohy if (onoff) {
1238 1.10 itohy /* Turning on is done immediately. */
1239 1.10 itohy
1240 1.10 itohy /* If the chip is off, turn it on. */
1241 1.10 itohy if ((sc->sc_on_blocks & YM_POWER_ACTIVE) == 0)
1242 1.10 itohy ym_chip_powerup(sc, 0);
1243 1.10 itohy
1244 1.10 itohy need_restore_codec = (parts & YM_POWER_CODEC_DIGITAL) &&
1245 1.10 itohy (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) == 0;
1246 1.10 itohy
1247 1.10 itohy sc->sc_on_blocks |= parts;
1248 1.10 itohy if (parts & YM_POWER_CODEC_CTL)
1249 1.10 itohy parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_R;
1250 1.10 itohy
1251 1.10 itohy s = splaudio();
1252 1.10 itohy
1253 1.10 itohy ym_write(sc, SA3_DPWRDWN,
1254 1.10 itohy ym_read(sc, SA3_DPWRDWN) & (u_int8_t)~parts);
1255 1.10 itohy ym_write(sc, SA3_APWRDWN,
1256 1.10 itohy ym_read(sc, SA3_APWRDWN) & ~(parts >> 8));
1257 1.10 itohy if (need_restore_codec)
1258 1.10 itohy ym_restore_codec_regs(sc);
1259 1.10 itohy
1260 1.10 itohy (void) splx(s);
1261 1.10 itohy } else {
1262 1.10 itohy /* Turning off is delayed. */
1263 1.10 itohy sc->sc_turning_off |= parts;
1264 1.10 itohy }
1265 1.10 itohy
1266 1.10 itohy /* Schedule turning off. */
1267 1.10 itohy if (sc->sc_pow_mode != YM_POWER_NOSAVE && sc->sc_turning_off)
1268 1.10 itohy timeout(ym_powerdown_blocks, sc, hz * sc->sc_pow_timeout);
1269 1.10 itohy
1270 1.10 itohy unlock:
1271 1.10 itohy if (sc->sc_in_power_ctl & YM_POWER_CTL_WANTED)
1272 1.10 itohy wakeup(&sc->sc_in_power_ctl);
1273 1.10 itohy sc->sc_in_power_ctl = 0;
1274 1.10 itohy }
1275 1.10 itohy #endif /* not AUDIO_NO_POWER_CTL */
1276