ym.c revision 1.14.4.4 1 1.14.4.4 he /* $NetBSD: ym.c,v 1.14.4.4 2002/03/27 10:18:04 he Exp $ */
2 1.1 augustss
3 1.10 itohy /*-
4 1.14.4.4 he * Copyright (c) 1999-2002 The NetBSD Foundation, Inc.
5 1.10 itohy * All rights reserved.
6 1.10 itohy *
7 1.10 itohy * This code is derived from software contributed to The NetBSD Foundation
8 1.10 itohy * by ITOH Yasufumi.
9 1.10 itohy *
10 1.10 itohy * Redistribution and use in source and binary forms, with or without
11 1.10 itohy * modification, are permitted provided that the following conditions
12 1.10 itohy * are met:
13 1.10 itohy * 1. Redistributions of source code must retain the above copyright
14 1.10 itohy * notice, this list of conditions and the following disclaimer.
15 1.10 itohy * 2. Redistributions in binary form must reproduce the above copyright
16 1.10 itohy * notice, this list of conditions and the following disclaimer in the
17 1.10 itohy * documentation and/or other materials provided with the distribution.
18 1.10 itohy * 3. All advertising materials mentioning features or use of this software
19 1.10 itohy * must display the following acknowledgement:
20 1.10 itohy * This product includes software developed by the NetBSD
21 1.10 itohy * Foundation, Inc. and its contributors.
22 1.10 itohy * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.10 itohy * contributors may be used to endorse or promote products derived
24 1.10 itohy * from this software without specific prior written permission.
25 1.10 itohy *
26 1.10 itohy * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.10 itohy * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.10 itohy * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.10 itohy * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.10 itohy * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.10 itohy * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.10 itohy * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.10 itohy * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.10 itohy * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.10 itohy * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.10 itohy * POSSIBILITY OF SUCH DAMAGE.
37 1.10 itohy */
38 1.1 augustss
39 1.1 augustss /*
40 1.1 augustss * Copyright (c) 1998 Constantine Sapuntzakis. All rights reserved.
41 1.10 itohy *
42 1.1 augustss * Redistribution and use in source and binary forms, with or without
43 1.1 augustss * modification, are permitted provided that the following conditions
44 1.1 augustss * are met:
45 1.1 augustss * 1. Redistributions of source code must retain the above copyright
46 1.1 augustss * notice, this list of conditions and the following disclaimer.
47 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
48 1.1 augustss * notice, this list of conditions and the following disclaimer in the
49 1.1 augustss * documentation and/or other materials provided with the distribution.
50 1.1 augustss * 3. The name of the author may not be used to endorse or promote products
51 1.1 augustss * derived from this software without specific prior written permission.
52 1.1 augustss *
53 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
54 1.1 augustss * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
55 1.1 augustss * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
56 1.1 augustss * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
57 1.1 augustss * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
58 1.1 augustss * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 1.1 augustss * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60 1.1 augustss * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 1.1 augustss * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
62 1.1 augustss * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 1.1 augustss */
64 1.1 augustss
65 1.1 augustss /*
66 1.1 augustss * Original code from OpenBSD.
67 1.1 augustss */
68 1.1 augustss
69 1.14.4.4 he #include <sys/cdefs.h>
70 1.14.4.4 he __KERNEL_RCSID(0, "$NetBSD: ym.c,v 1.14.4.4 2002/03/27 10:18:04 he Exp $");
71 1.14.4.4 he
72 1.10 itohy #include "mpu_ym.h"
73 1.10 itohy #include "opt_ym.h"
74 1.1 augustss
75 1.1 augustss #include <sys/param.h>
76 1.1 augustss #include <sys/systm.h>
77 1.1 augustss #include <sys/errno.h>
78 1.1 augustss #include <sys/device.h>
79 1.10 itohy #include <sys/fcntl.h>
80 1.10 itohy #include <sys/kernel.h>
81 1.10 itohy #include <sys/proc.h>
82 1.1 augustss
83 1.1 augustss #include <machine/cpu.h>
84 1.1 augustss #include <machine/intr.h>
85 1.1 augustss #include <machine/bus.h>
86 1.1 augustss
87 1.1 augustss #include <sys/audioio.h>
88 1.1 augustss #include <dev/audio_if.h>
89 1.1 augustss
90 1.1 augustss #include <dev/isa/isavar.h>
91 1.1 augustss #include <dev/isa/isadmavar.h>
92 1.1 augustss
93 1.1 augustss #include <dev/ic/ad1848reg.h>
94 1.1 augustss #include <dev/isa/ad1848var.h>
95 1.10 itohy #include <dev/ic/opl3sa3reg.h>
96 1.10 itohy #include <dev/isa/wssreg.h>
97 1.10 itohy #if NMPU_YM > 0
98 1.10 itohy #include <dev/ic/mpuvar.h>
99 1.10 itohy #endif
100 1.1 augustss #include <dev/isa/ymvar.h>
101 1.10 itohy #include <dev/isa/sbreg.h>
102 1.1 augustss
103 1.10 itohy #ifndef spllowersoftclock
104 1.10 itohy #error "We depend on the new semantics of splsoftclock(9)."
105 1.10 itohy #endif
106 1.10 itohy
107 1.10 itohy /* Power management mode. */
108 1.10 itohy #ifndef YM_POWER_MODE
109 1.10 itohy #define YM_POWER_MODE YM_POWER_POWERSAVE
110 1.10 itohy #endif
111 1.10 itohy
112 1.10 itohy /* Time in second before power down the chip. */
113 1.10 itohy #ifndef YM_POWER_OFF_SEC
114 1.10 itohy #define YM_POWER_OFF_SEC 5
115 1.10 itohy #endif
116 1.10 itohy
117 1.12 itohy /* Default mixer settings. */
118 1.11 itohy #ifndef YM_VOL_MASTER
119 1.11 itohy #define YM_VOL_MASTER 220
120 1.11 itohy #endif
121 1.11 itohy
122 1.11 itohy #ifndef YM_VOL_DAC
123 1.11 itohy #define YM_VOL_DAC 224
124 1.11 itohy #endif
125 1.11 itohy
126 1.11 itohy #ifndef YM_VOL_OPL3
127 1.11 itohy #define YM_VOL_OPL3 184
128 1.11 itohy #endif
129 1.11 itohy
130 1.14.4.2 itohy /*
131 1.14.4.2 itohy * The equalizer is ``flat'' if the 3D Enhance is turned off,
132 1.14.4.2 itohy * but you can set other default values.
133 1.14.4.2 itohy */
134 1.14.4.2 itohy #ifndef YM_ENHANCE_TREBLE
135 1.14.4.2 itohy #define YM_ENHANCE_TREBLE 0
136 1.14.4.2 itohy #endif
137 1.14.4.2 itohy #ifndef YM_ENHANCE_BASS
138 1.14.4.2 itohy #define YM_ENHANCE_BASS 0
139 1.14.4.1 augustss #endif
140 1.14.4.1 augustss
141 1.10 itohy #ifdef __i386__ /* XXX */
142 1.10 itohy # include "joy.h"
143 1.10 itohy #else
144 1.10 itohy # define NJOY 0
145 1.10 itohy #endif
146 1.10 itohy
147 1.10 itohy #ifdef AUDIO_DEBUG
148 1.10 itohy #define DPRINTF(x) if (ymdebug) printf x
149 1.10 itohy int ymdebug = 0;
150 1.10 itohy #else
151 1.10 itohy #define DPRINTF(x)
152 1.10 itohy #endif
153 1.10 itohy #define DVNAME(softc) ((softc)->sc_ad1848.sc_ad1848.sc_dev.dv_xname)
154 1.1 augustss
155 1.1 augustss int ym_getdev __P((void *, struct audio_device *));
156 1.1 augustss int ym_mixer_set_port __P((void *, mixer_ctrl_t *));
157 1.1 augustss int ym_mixer_get_port __P((void *, mixer_ctrl_t *));
158 1.1 augustss int ym_query_devinfo __P((void *, mixer_devinfo_t *));
159 1.10 itohy int ym_intr __P((void *));
160 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
161 1.10 itohy static void ym_save_codec_regs __P((struct ym_softc *));
162 1.10 itohy static void ym_restore_codec_regs __P((struct ym_softc *));
163 1.10 itohy void ym_power_hook __P((int, void *));
164 1.10 itohy int ym_codec_power_ctl __P((void *, int));
165 1.10 itohy static void ym_chip_powerdown __P((struct ym_softc *));
166 1.10 itohy static void ym_chip_powerup __P((struct ym_softc *, int));
167 1.10 itohy void ym_powerdown_blocks __P((void *));
168 1.10 itohy void ym_power_ctl __P((struct ym_softc *, int, int));
169 1.10 itohy #endif
170 1.1 augustss
171 1.10 itohy static void ym_init __P((struct ym_softc *));
172 1.1 augustss static void ym_mute __P((struct ym_softc *, int, int));
173 1.2 augustss static void ym_set_master_gain __P((struct ym_softc *, struct ad1848_volume*));
174 1.14.4.4 he static void ym_hvol_to_master_gain __P((struct ym_softc *));
175 1.10 itohy static void ym_set_mic_gain __P((struct ym_softc *, int));
176 1.10 itohy static void ym_set_3d __P((struct ym_softc *, mixer_ctrl_t *,
177 1.10 itohy struct ad1848_volume *, int));
178 1.1 augustss
179 1.1 augustss
180 1.1 augustss struct audio_hw_if ym_hw_if = {
181 1.5 pk ad1848_isa_open,
182 1.5 pk ad1848_isa_close,
183 1.1 augustss NULL,
184 1.1 augustss ad1848_query_encoding,
185 1.1 augustss ad1848_set_params,
186 1.8 mycroft ad1848_round_blocksize,
187 1.1 augustss ad1848_commit_settings,
188 1.8 mycroft NULL,
189 1.8 mycroft NULL,
190 1.8 mycroft NULL,
191 1.8 mycroft NULL,
192 1.9 mycroft ad1848_isa_halt_output,
193 1.9 mycroft ad1848_isa_halt_input,
194 1.1 augustss NULL,
195 1.1 augustss ym_getdev,
196 1.1 augustss NULL,
197 1.1 augustss ym_mixer_set_port,
198 1.1 augustss ym_mixer_get_port,
199 1.1 augustss ym_query_devinfo,
200 1.5 pk ad1848_isa_malloc,
201 1.5 pk ad1848_isa_free,
202 1.7 mycroft ad1848_isa_round_buffersize,
203 1.5 pk ad1848_isa_mappage,
204 1.5 pk ad1848_isa_get_props,
205 1.8 mycroft ad1848_isa_trigger_output,
206 1.8 mycroft ad1848_isa_trigger_input,
207 1.1 augustss };
208 1.1 augustss
209 1.1 augustss static __inline int ym_read __P((struct ym_softc *, int));
210 1.1 augustss static __inline void ym_write __P((struct ym_softc *, int, int));
211 1.1 augustss
212 1.1 augustss void
213 1.1 augustss ym_attach(sc)
214 1.2 augustss struct ym_softc *sc;
215 1.1 augustss {
216 1.5 pk struct ad1848_softc *ac = &sc->sc_ad1848.sc_ad1848;
217 1.11 itohy static struct ad1848_volume vol_master = {YM_VOL_MASTER, YM_VOL_MASTER};
218 1.11 itohy static struct ad1848_volume vol_dac = {YM_VOL_DAC, YM_VOL_DAC};
219 1.11 itohy static struct ad1848_volume vol_opl3 = {YM_VOL_OPL3, YM_VOL_OPL3};
220 1.14.4.2 itohy #if YM_ENHANCE_TREBLE || YM_ENHANCE_BASS
221 1.14.4.1 augustss mixer_ctrl_t mctl;
222 1.14.4.2 itohy #endif
223 1.10 itohy struct audio_attach_args arg;
224 1.10 itohy
225 1.14 thorpej callout_init(&sc->sc_powerdown_ch);
226 1.14 thorpej
227 1.11 itohy /* Mute the output to reduce noise during initialization. */
228 1.11 itohy ym_mute(sc, SA3_VOL_L, 1);
229 1.11 itohy ym_mute(sc, SA3_VOL_R, 1);
230 1.11 itohy
231 1.14.4.4 he sc->sc_version = ym_read(sc, SA3_MISC) & SA3_MISC_VER;
232 1.14.4.4 he ac->chip_name = YM_IS_SA3(sc) ? "OPL3-SA3" : "OPL3-SA2";
233 1.14.4.4 he
234 1.5 pk sc->sc_ad1848.sc_ih = isa_intr_establish(sc->sc_ic, sc->ym_irq,
235 1.10 itohy IST_EDGE, IPL_AUDIO,
236 1.10 itohy ym_intr, sc);
237 1.1 augustss
238 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
239 1.10 itohy sc->sc_ad1848.powerctl = ym_codec_power_ctl;
240 1.10 itohy sc->sc_ad1848.powerarg = sc;
241 1.10 itohy #endif
242 1.6 augustss ad1848_isa_attach(&sc->sc_ad1848);
243 1.2 augustss printf("\n");
244 1.5 pk ac->parent = sc;
245 1.2 augustss
246 1.2 augustss /* Establish chip in well known mode */
247 1.11 itohy ym_set_master_gain(sc, &vol_master);
248 1.10 itohy ym_set_mic_gain(sc, 0);
249 1.2 augustss sc->master_mute = 0;
250 1.10 itohy
251 1.2 augustss sc->mic_mute = 1;
252 1.10 itohy ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
253 1.10 itohy
254 1.11 itohy /* Override ad1848 settings. */
255 1.11 itohy ad1848_set_channel_gain(ac, AD1848_DAC_CHANNEL, &vol_dac);
256 1.11 itohy ad1848_set_channel_gain(ac, AD1848_AUX2_CHANNEL, &vol_opl3);
257 1.14.4.1 augustss
258 1.13 itohy /*
259 1.13 itohy * Mute all external sources. If you change this, you must
260 1.13 itohy * also change the initial value of sc->sc_external_sources
261 1.13 itohy * (currently 0 --- no external source is active).
262 1.13 itohy */
263 1.13 itohy ad1848_mute_channel(ac, AD1848_AUX1_CHANNEL, MUTE_ALL); /* CD */
264 1.13 itohy ad1848_mute_channel(ac, AD1848_LINE_CHANNEL, MUTE_ALL); /* line */
265 1.13 itohy ac->mute[AD1848_AUX1_CHANNEL] = MUTE_ALL;
266 1.13 itohy ac->mute[AD1848_LINE_CHANNEL] = MUTE_ALL;
267 1.13 itohy /* speaker is muted by default */
268 1.13 itohy
269 1.10 itohy /* We use only one IRQ (IRQ-A). */
270 1.10 itohy ym_write(sc, SA3_IRQ_CONF, SA3_IRQ_CONF_MPU_A | SA3_IRQ_CONF_WSS_A);
271 1.10 itohy ym_write(sc, SA3_HVOL_INTR_CNF, SA3_HVOL_INTR_CNF_A);
272 1.10 itohy
273 1.10 itohy /* audio at ym attachment */
274 1.10 itohy sc->sc_audiodev = audio_attach_mi(&ym_hw_if, ac, &ac->sc_dev);
275 1.10 itohy
276 1.10 itohy /* opl at ym attachment */
277 1.10 itohy if (sc->sc_opl_ioh) {
278 1.10 itohy arg.type = AUDIODEV_TYPE_OPL;
279 1.10 itohy arg.hwif = 0;
280 1.10 itohy arg.hdl = 0;
281 1.10 itohy (void)config_found(&ac->sc_dev, &arg, audioprint);
282 1.10 itohy }
283 1.10 itohy
284 1.10 itohy #if NMPU_YM > 0
285 1.10 itohy /* mpu at ym attachment */
286 1.10 itohy if (sc->sc_mpu_ioh) {
287 1.10 itohy arg.type = AUDIODEV_TYPE_MPU;
288 1.10 itohy arg.hwif = 0;
289 1.10 itohy arg.hdl = 0;
290 1.10 itohy sc->sc_mpudev = config_found(&ac->sc_dev, &arg, audioprint);
291 1.10 itohy }
292 1.10 itohy #endif
293 1.10 itohy
294 1.10 itohy /* This must be AFTER the attachment of sub-devices. */
295 1.10 itohy ym_init(sc);
296 1.10 itohy
297 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
298 1.10 itohy /*
299 1.10 itohy * Initialize power control.
300 1.10 itohy */
301 1.10 itohy sc->sc_pow_mode = YM_POWER_MODE;
302 1.10 itohy sc->sc_pow_timeout = YM_POWER_OFF_SEC;
303 1.10 itohy
304 1.10 itohy sc->sc_on_blocks = sc->sc_turning_off =
305 1.10 itohy YM_POWER_CODEC_P | YM_POWER_CODEC_R |
306 1.11 itohy YM_POWER_OPL3 | YM_POWER_MPU401 | YM_POWER_3D |
307 1.10 itohy YM_POWER_CODEC_DA | YM_POWER_CODEC_AD | YM_POWER_OPL3_DA;
308 1.10 itohy #if NJOY > 0
309 1.11 itohy sc->sc_on_blocks |= YM_POWER_JOYSTICK; /* prevents chip powerdown */
310 1.10 itohy #endif
311 1.10 itohy ym_powerdown_blocks(sc);
312 1.1 augustss
313 1.10 itohy powerhook_establish(ym_power_hook, sc);
314 1.11 itohy
315 1.11 itohy if (sc->sc_on_blocks /* & YM_POWER_ACTIVE */)
316 1.10 itohy #endif
317 1.11 itohy {
318 1.11 itohy /* Unmute the output now if the chip is on. */
319 1.11 itohy ym_mute(sc, SA3_VOL_L, sc->master_mute);
320 1.11 itohy ym_mute(sc, SA3_VOL_R, sc->master_mute);
321 1.11 itohy }
322 1.14.4.2 itohy
323 1.14.4.2 itohy #if YM_ENHANCE_TREBLE || YM_ENHANCE_BASS
324 1.14.4.2 itohy /* Set tone control to the default position. */
325 1.14.4.2 itohy mctl.un.value.num_channels = 1;
326 1.14.4.2 itohy #if YM_ENHANCE_TREBLE
327 1.14.4.2 itohy mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_ENHANCE_TREBLE;
328 1.14.4.2 itohy mctl.dev = YM_MASTER_TREBLE;
329 1.14.4.2 itohy ym_mixer_set_port(sc, &mctl);
330 1.14.4.2 itohy #endif
331 1.14.4.2 itohy #if YM_ENHANCE_BASS
332 1.14.4.2 itohy mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_ENHANCE_BASS;
333 1.14.4.2 itohy mctl.dev = YM_MASTER_BASS;
334 1.14.4.2 itohy ym_mixer_set_port(sc, &mctl);
335 1.14.4.2 itohy #endif
336 1.14.4.2 itohy #endif
337 1.1 augustss }
338 1.1 augustss
339 1.1 augustss static __inline int
340 1.1 augustss ym_read(sc, reg)
341 1.2 augustss struct ym_softc *sc;
342 1.2 augustss int reg;
343 1.1 augustss {
344 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
345 1.10 itohy SA3_CTL_INDEX, (reg & 0xff));
346 1.10 itohy return (bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_DATA));
347 1.1 augustss }
348 1.1 augustss
349 1.1 augustss static __inline void
350 1.1 augustss ym_write(sc, reg, data)
351 1.2 augustss struct ym_softc *sc;
352 1.2 augustss int reg;
353 1.2 augustss int data;
354 1.1 augustss {
355 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
356 1.10 itohy SA3_CTL_INDEX, (reg & 0xff));
357 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
358 1.10 itohy SA3_CTL_DATA, (data & 0xff));
359 1.1 augustss }
360 1.1 augustss
361 1.10 itohy static void
362 1.10 itohy ym_init(sc)
363 1.10 itohy struct ym_softc *sc;
364 1.10 itohy {
365 1.10 itohy u_int8_t dpd, apd;
366 1.10 itohy
367 1.10 itohy /* Mute SoundBlaster output if possible. */
368 1.10 itohy if (sc->sc_sb_ioh) {
369 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_ADDR,
370 1.10 itohy SBP_MASTER_VOL);
371 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_DATA,
372 1.10 itohy 0x00);
373 1.10 itohy }
374 1.10 itohy
375 1.14.4.4 he if (!YM_IS_SA3(sc)) {
376 1.14.4.4 he /* OPL3-SA2 */
377 1.14.4.4 he ym_write(sc, SA3_PWR_MNG, SA2_PWR_MNG_CLKO |
378 1.14.4.4 he (sc->sc_opl_ioh == 0 ? SA2_PWR_MNG_FMPS : 0));
379 1.14.4.4 he return;
380 1.14.4.4 he }
381 1.14.4.4 he
382 1.14.4.4 he /* OPL3-SA3 */
383 1.10 itohy /* Figure out which part can be power down. */
384 1.10 itohy dpd = SA3_DPWRDWN_SB /* we never use SB */
385 1.10 itohy #if NMPU_YM > 0
386 1.10 itohy | (sc->sc_mpu_ioh ? 0 : SA3_DPWRDWN_MPU)
387 1.10 itohy #else
388 1.10 itohy | SA3_DPWRDWN_MPU
389 1.10 itohy #endif
390 1.10 itohy #if NJOY == 0
391 1.10 itohy | SA3_DPWRDWN_JOY
392 1.10 itohy #endif
393 1.10 itohy | SA3_DPWRDWN_PNP /* ISA Plug and Play is done */
394 1.10 itohy /*
395 1.10 itohy * The master clock is for external wavetable synthesizer
396 1.10 itohy * OPL4-ML (YMF704) or OPL4-ML2 (YMF721),
397 1.10 itohy * and is currently unused.
398 1.10 itohy */
399 1.10 itohy | SA3_DPWRDWN_MCLKO;
400 1.10 itohy
401 1.10 itohy apd = SA3_APWRDWN_SBDAC; /* we never use SB */
402 1.10 itohy
403 1.10 itohy /* Power down OPL3 if not attached. */
404 1.10 itohy if (sc->sc_opl_ioh == 0) {
405 1.10 itohy dpd |= SA3_DPWRDWN_FM;
406 1.10 itohy apd |= SA3_APWRDWN_FMDAC;
407 1.10 itohy }
408 1.10 itohy /* CODEC is always attached. */
409 1.10 itohy
410 1.10 itohy /* Power down unused digital parts. */
411 1.10 itohy ym_write(sc, SA3_DPWRDWN, dpd);
412 1.10 itohy
413 1.10 itohy /* Power down unused analog parts. */
414 1.10 itohy ym_write(sc, SA3_APWRDWN, apd);
415 1.10 itohy }
416 1.1 augustss
417 1.1 augustss
418 1.1 augustss int
419 1.1 augustss ym_getdev(addr, retp)
420 1.2 augustss void *addr;
421 1.2 augustss struct audio_device *retp;
422 1.1 augustss {
423 1.10 itohy struct ym_softc *sc = addr;
424 1.14.4.4 he struct ad1848_softc *ac = &sc->sc_ad1848.sc_ad1848;
425 1.10 itohy
426 1.14.4.4 he strcpy(retp->name, ac->chip_name);
427 1.10 itohy sprintf(retp->version, "%d", sc->sc_version);
428 1.10 itohy strcpy(retp->config, "ym");
429 1.10 itohy
430 1.2 augustss return 0;
431 1.1 augustss }
432 1.1 augustss
433 1.1 augustss
434 1.1 augustss static ad1848_devmap_t mappings[] = {
435 1.10 itohy { YM_DAC_LVL, AD1848_KIND_LVL, AD1848_DAC_CHANNEL },
436 1.2 augustss { YM_MIDI_LVL, AD1848_KIND_LVL, AD1848_AUX2_CHANNEL },
437 1.2 augustss { YM_CD_LVL, AD1848_KIND_LVL, AD1848_AUX1_CHANNEL },
438 1.2 augustss { YM_LINE_LVL, AD1848_KIND_LVL, AD1848_LINE_CHANNEL },
439 1.2 augustss { YM_SPEAKER_LVL, AD1848_KIND_LVL, AD1848_MONO_CHANNEL },
440 1.2 augustss { YM_MONITOR_LVL, AD1848_KIND_LVL, AD1848_MONITOR_CHANNEL },
441 1.10 itohy { YM_DAC_MUTE, AD1848_KIND_MUTE, AD1848_DAC_CHANNEL },
442 1.2 augustss { YM_MIDI_MUTE, AD1848_KIND_MUTE, AD1848_AUX2_CHANNEL },
443 1.2 augustss { YM_CD_MUTE, AD1848_KIND_MUTE, AD1848_AUX1_CHANNEL },
444 1.2 augustss { YM_LINE_MUTE, AD1848_KIND_MUTE, AD1848_LINE_CHANNEL },
445 1.2 augustss { YM_SPEAKER_MUTE, AD1848_KIND_MUTE, AD1848_MONO_CHANNEL },
446 1.2 augustss { YM_MONITOR_MUTE, AD1848_KIND_MUTE, AD1848_MONITOR_CHANNEL },
447 1.2 augustss { YM_REC_LVL, AD1848_KIND_RECORDGAIN, -1 },
448 1.2 augustss { YM_RECORD_SOURCE, AD1848_KIND_RECORDSOURCE, -1}
449 1.1 augustss };
450 1.1 augustss
451 1.10 itohy #define NUMMAP (sizeof(mappings) / sizeof(mappings[0]))
452 1.1 augustss
453 1.1 augustss
454 1.1 augustss static void
455 1.1 augustss ym_mute(sc, left_reg, mute)
456 1.2 augustss struct ym_softc *sc;
457 1.2 augustss int left_reg;
458 1.2 augustss int mute;
459 1.1 augustss {
460 1.10 itohy u_int8_t reg;
461 1.1 augustss
462 1.10 itohy reg = ym_read(sc, left_reg);
463 1.10 itohy if (mute)
464 1.10 itohy ym_write(sc, left_reg, reg | 0x80);
465 1.10 itohy else
466 1.10 itohy ym_write(sc, left_reg, reg & ~0x80);
467 1.1 augustss }
468 1.1 augustss
469 1.1 augustss
470 1.1 augustss static void
471 1.1 augustss ym_set_master_gain(sc, vol)
472 1.2 augustss struct ym_softc *sc;
473 1.2 augustss struct ad1848_volume *vol;
474 1.1 augustss {
475 1.14.4.4 he u_int atten;
476 1.10 itohy
477 1.2 augustss sc->master_gain = *vol;
478 1.10 itohy
479 1.10 itohy atten = ((AUDIO_MAX_GAIN - vol->left) * (SA3_VOL_MV + 1)) /
480 1.10 itohy (AUDIO_MAX_GAIN + 1);
481 1.10 itohy
482 1.10 itohy ym_write(sc, SA3_VOL_L, (ym_read(sc, SA3_VOL_L) & ~SA3_VOL_MV) | atten);
483 1.10 itohy
484 1.10 itohy atten = ((AUDIO_MAX_GAIN - vol->right) * (SA3_VOL_MV + 1)) /
485 1.10 itohy (AUDIO_MAX_GAIN + 1);
486 1.10 itohy
487 1.10 itohy ym_write(sc, SA3_VOL_R, (ym_read(sc, SA3_VOL_R) & ~SA3_VOL_MV) | atten);
488 1.1 augustss }
489 1.1 augustss
490 1.14.4.4 he /*
491 1.14.4.4 he * Read current setting of master volume from hardware
492 1.14.4.4 he * and update the software value if changed.
493 1.14.4.4 he * [SA3] This function clears hardware volume interrupt.
494 1.14.4.4 he */
495 1.14.4.4 he static void
496 1.14.4.4 he ym_hvol_to_master_gain(sc)
497 1.14.4.4 he struct ym_softc *sc;
498 1.14.4.4 he {
499 1.14.4.4 he u_int prevval, val;
500 1.14.4.4 he int changed = 0;
501 1.14.4.4 he
502 1.14.4.4 he val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_L);
503 1.14.4.4 he prevval = (sc->master_gain.left * (SA3_VOL_MV + 1)) /
504 1.14.4.4 he (AUDIO_MAX_GAIN + 1);
505 1.14.4.4 he if (val != prevval) {
506 1.14.4.4 he sc->master_gain.left =
507 1.14.4.4 he val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
508 1.14.4.4 he changed = 1;
509 1.14.4.4 he }
510 1.14.4.4 he
511 1.14.4.4 he val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_R);
512 1.14.4.4 he prevval = (sc->master_gain.right * (SA3_VOL_MV + 1)) /
513 1.14.4.4 he (AUDIO_MAX_GAIN + 1);
514 1.14.4.4 he if (val != prevval) {
515 1.14.4.4 he sc->master_gain.right =
516 1.14.4.4 he val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
517 1.14.4.4 he changed = 1;
518 1.14.4.4 he }
519 1.14.4.4 he
520 1.14.4.4 he #if 0 /* XXX NOT YET */
521 1.14.4.4 he /* Notify the change to async processes. */
522 1.14.4.4 he if (changed && sc->sc_audiodev)
523 1.14.4.4 he mixer_signal(sc->sc_audiodev);
524 1.14.4.4 he #endif
525 1.14.4.4 he }
526 1.14.4.4 he
527 1.1 augustss static void
528 1.1 augustss ym_set_mic_gain(sc, vol)
529 1.2 augustss struct ym_softc *sc;
530 1.10 itohy int vol;
531 1.1 augustss {
532 1.10 itohy u_int atten;
533 1.10 itohy
534 1.10 itohy sc->mic_gain = vol;
535 1.10 itohy
536 1.10 itohy atten = ((AUDIO_MAX_GAIN - vol) * (SA3_MIC_MCV + 1)) /
537 1.10 itohy (AUDIO_MAX_GAIN + 1);
538 1.10 itohy
539 1.10 itohy ym_write(sc, SA3_MIC_VOL,
540 1.10 itohy (ym_read(sc, SA3_MIC_VOL) & ~SA3_MIC_MCV) | atten);
541 1.10 itohy }
542 1.1 augustss
543 1.10 itohy static void
544 1.10 itohy ym_set_3d(sc, cp, val, reg)
545 1.10 itohy struct ym_softc *sc;
546 1.10 itohy mixer_ctrl_t *cp;
547 1.10 itohy struct ad1848_volume *val;
548 1.10 itohy int reg;
549 1.10 itohy {
550 1.10 itohy u_int8_t e;
551 1.1 augustss
552 1.10 itohy ad1848_to_vol(cp, val);
553 1.1 augustss
554 1.10 itohy e = (val->left * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
555 1.10 itohy (AUDIO_MAX_GAIN + 1) << SA3_3D_LSHIFT |
556 1.10 itohy (val->right * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
557 1.10 itohy (AUDIO_MAX_GAIN + 1) << SA3_3D_RSHIFT;
558 1.10 itohy
559 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
560 1.10 itohy /* turn wide stereo on if necessary */
561 1.10 itohy if (e)
562 1.10 itohy ym_power_ctl(sc, YM_POWER_3D, 1);
563 1.10 itohy #endif
564 1.10 itohy
565 1.10 itohy ym_write(sc, reg, e);
566 1.10 itohy
567 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
568 1.10 itohy /* turn wide stereo off if necessary */
569 1.10 itohy if (YM_EQ_OFF(&sc->sc_treble) && YM_EQ_OFF(&sc->sc_bass) &&
570 1.10 itohy YM_EQ_OFF(&sc->sc_wide))
571 1.10 itohy ym_power_ctl(sc, YM_POWER_3D, 0);
572 1.10 itohy #endif
573 1.1 augustss }
574 1.1 augustss
575 1.1 augustss int
576 1.1 augustss ym_mixer_set_port(addr, cp)
577 1.2 augustss void *addr;
578 1.2 augustss mixer_ctrl_t *cp;
579 1.1 augustss {
580 1.2 augustss struct ad1848_softc *ac = addr;
581 1.2 augustss struct ym_softc *sc = ac->parent;
582 1.2 augustss struct ad1848_volume vol;
583 1.10 itohy int error = 0;
584 1.13 itohy u_int8_t extsources;
585 1.1 augustss
586 1.10 itohy DPRINTF(("%s: ym_mixer_set_port: dev 0x%x, type 0x%x, 0x%x (%d; %d, %d)\n",
587 1.10 itohy DVNAME(sc), cp->dev, cp->type, cp->un.ord,
588 1.10 itohy cp->un.value.num_channels, cp->un.value.level[0],
589 1.10 itohy cp->un.value.level[1]));
590 1.10 itohy
591 1.14.4.4 he /* SA2 doesn't have equalizer */
592 1.14.4.4 he if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
593 1.14.4.4 he return ENXIO;
594 1.14.4.4 he
595 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
596 1.10 itohy /* Power-up chip */
597 1.10 itohy ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
598 1.10 itohy #endif
599 1.1 augustss
600 1.2 augustss switch (cp->dev) {
601 1.2 augustss case YM_OUTPUT_LVL:
602 1.2 augustss ad1848_to_vol(cp, &vol);
603 1.2 augustss ym_set_master_gain(sc, &vol);
604 1.10 itohy goto out;
605 1.2 augustss
606 1.2 augustss case YM_OUTPUT_MUTE:
607 1.2 augustss sc->master_mute = (cp->un.ord != 0);
608 1.10 itohy ym_mute(sc, SA3_VOL_L, sc->master_mute);
609 1.10 itohy ym_mute(sc, SA3_VOL_R, sc->master_mute);
610 1.10 itohy goto out;
611 1.2 augustss
612 1.2 augustss case YM_MIC_LVL:
613 1.2 augustss if (cp->un.value.num_channels != 1)
614 1.2 augustss error = EINVAL;
615 1.10 itohy else
616 1.10 itohy ym_set_mic_gain(sc,
617 1.10 itohy cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
618 1.10 itohy goto out;
619 1.10 itohy
620 1.10 itohy case YM_MASTER_EQMODE:
621 1.10 itohy sc->sc_eqmode = cp->un.ord & SA3_SYS_CTL_YMODE;
622 1.10 itohy ym_write(sc, SA3_SYS_CTL, (ym_read(sc, SA3_SYS_CTL) &
623 1.10 itohy ~SA3_SYS_CTL_YMODE) | sc->sc_eqmode);
624 1.10 itohy goto out;
625 1.10 itohy
626 1.10 itohy case YM_MASTER_TREBLE:
627 1.10 itohy ym_set_3d(sc, cp, &sc->sc_treble, SA3_3D_TREBLE);
628 1.10 itohy goto out;
629 1.10 itohy
630 1.10 itohy case YM_MASTER_BASS:
631 1.10 itohy ym_set_3d(sc, cp, &sc->sc_bass, SA3_3D_BASS);
632 1.10 itohy goto out;
633 1.10 itohy
634 1.10 itohy case YM_MASTER_WIDE:
635 1.10 itohy ym_set_3d(sc, cp, &sc->sc_wide, SA3_3D_WIDE);
636 1.10 itohy goto out;
637 1.10 itohy
638 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
639 1.10 itohy case YM_PWR_MODE:
640 1.10 itohy if ((unsigned) cp->un.ord > YM_POWER_NOSAVE)
641 1.10 itohy error = EINVAL;
642 1.10 itohy else
643 1.10 itohy sc->sc_pow_mode = cp->un.ord;
644 1.10 itohy goto out;
645 1.10 itohy
646 1.10 itohy case YM_PWR_TIMEOUT:
647 1.10 itohy if (cp->un.value.num_channels != 1)
648 1.10 itohy error = EINVAL;
649 1.10 itohy else
650 1.10 itohy sc->sc_pow_timeout =
651 1.10 itohy cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
652 1.10 itohy goto out;
653 1.10 itohy
654 1.10 itohy /*
655 1.13 itohy * Needs power-up to hear external sources.
656 1.13 itohy */
657 1.13 itohy case YM_CD_MUTE:
658 1.13 itohy case YM_LINE_MUTE:
659 1.13 itohy case YM_SPEAKER_MUTE:
660 1.14.4.4 he case YM_MIC_MUTE:
661 1.13 itohy extsources = YM_MIXER_TO_XS(cp->dev);
662 1.13 itohy if (cp->un.ord) {
663 1.13 itohy if ((sc->sc_external_sources &= ~extsources) == 0) {
664 1.13 itohy /*
665 1.13 itohy * All the external sources are muted
666 1.13 itohy * --- no need to keep the chip on.
667 1.13 itohy */
668 1.13 itohy ym_power_ctl(sc, YM_POWER_EXT_SRC, 0);
669 1.13 itohy DPRINTF(("%s: ym_mixer_set_port: off for ext\n",
670 1.13 itohy DVNAME(sc)));
671 1.13 itohy }
672 1.13 itohy } else {
673 1.13 itohy /* mute off - power-up the chip */
674 1.13 itohy sc->sc_external_sources |= extsources;
675 1.13 itohy ym_power_ctl(sc, YM_POWER_EXT_SRC, 1);
676 1.13 itohy DPRINTF(("%s: ym_mixer_set_port: on for ext\n",
677 1.13 itohy DVNAME(sc)));
678 1.13 itohy }
679 1.13 itohy break; /* fall to ad1848_mixer_set_port() */
680 1.13 itohy
681 1.13 itohy /*
682 1.10 itohy * Power on/off the playback part for monitoring.
683 1.10 itohy */
684 1.10 itohy case YM_MONITOR_MUTE:
685 1.10 itohy if ((ac->open_mode & (FREAD | FWRITE)) == FREAD)
686 1.10 itohy ym_power_ctl(sc, YM_POWER_CODEC_P | YM_POWER_CODEC_DA,
687 1.10 itohy cp->un.ord == 0);
688 1.10 itohy break; /* fall to ad1848_mixer_set_port() */
689 1.10 itohy #endif
690 1.10 itohy }
691 1.10 itohy
692 1.10 itohy error = ad1848_mixer_set_port(ac, mappings, NUMMAP, cp);
693 1.10 itohy
694 1.10 itohy if (error != ENXIO)
695 1.10 itohy goto out;
696 1.10 itohy
697 1.10 itohy error = 0;
698 1.2 augustss
699 1.10 itohy switch (cp->dev) {
700 1.2 augustss case YM_MIC_MUTE:
701 1.2 augustss sc->mic_mute = (cp->un.ord != 0);
702 1.10 itohy ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
703 1.2 augustss break;
704 1.2 augustss
705 1.2 augustss default:
706 1.10 itohy error = ENXIO;
707 1.10 itohy break;
708 1.2 augustss }
709 1.10 itohy
710 1.10 itohy out:
711 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
712 1.10 itohy /* Power-down chip */
713 1.10 itohy ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
714 1.10 itohy #endif
715 1.10 itohy
716 1.2 augustss return (error);
717 1.1 augustss }
718 1.1 augustss
719 1.1 augustss int
720 1.1 augustss ym_mixer_get_port(addr, cp)
721 1.2 augustss void *addr;
722 1.2 augustss mixer_ctrl_t *cp;
723 1.1 augustss {
724 1.2 augustss struct ad1848_softc *ac = addr;
725 1.2 augustss struct ym_softc *sc = ac->parent;
726 1.10 itohy int error;
727 1.1 augustss
728 1.14.4.4 he /* SA2 doesn't have equalizer */
729 1.14.4.4 he if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
730 1.14.4.4 he return ENXIO;
731 1.14.4.4 he
732 1.2 augustss switch (cp->dev) {
733 1.2 augustss case YM_OUTPUT_LVL:
734 1.14.4.4 he if (!YM_IS_SA3(sc)) {
735 1.14.4.4 he /*
736 1.14.4.4 he * SA2 doesn't have hardware volume interrupt.
737 1.14.4.4 he * Read current value and update every time.
738 1.14.4.4 he */
739 1.14.4.4 he #ifndef AUDIO_NO_POWER_CTL
740 1.14.4.4 he /* Power-up chip */
741 1.14.4.4 he ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
742 1.14.4.4 he #endif
743 1.14.4.4 he ym_hvol_to_master_gain(sc);
744 1.14.4.4 he #ifndef AUDIO_NO_POWER_CTL
745 1.14.4.4 he /* Power-down chip */
746 1.14.4.4 he ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
747 1.14.4.4 he #endif
748 1.14.4.4 he }
749 1.2 augustss ad1848_from_vol(cp, &sc->master_gain);
750 1.10 itohy return 0;
751 1.10 itohy
752 1.2 augustss case YM_OUTPUT_MUTE:
753 1.2 augustss cp->un.ord = sc->master_mute;
754 1.10 itohy return 0;
755 1.10 itohy
756 1.2 augustss case YM_MIC_LVL:
757 1.2 augustss if (cp->un.value.num_channels != 1)
758 1.10 itohy return EINVAL;
759 1.10 itohy cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->mic_gain;
760 1.10 itohy return 0;
761 1.10 itohy
762 1.10 itohy case YM_MASTER_EQMODE:
763 1.10 itohy cp->un.ord = sc->sc_eqmode;
764 1.10 itohy return 0;
765 1.10 itohy
766 1.10 itohy case YM_MASTER_TREBLE:
767 1.10 itohy ad1848_from_vol(cp, &sc->sc_treble);
768 1.10 itohy return 0;
769 1.10 itohy
770 1.10 itohy case YM_MASTER_BASS:
771 1.10 itohy ad1848_from_vol(cp, &sc->sc_bass);
772 1.10 itohy return 0;
773 1.10 itohy
774 1.10 itohy case YM_MASTER_WIDE:
775 1.10 itohy ad1848_from_vol(cp, &sc->sc_wide);
776 1.10 itohy return 0;
777 1.10 itohy
778 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
779 1.10 itohy case YM_PWR_MODE:
780 1.10 itohy cp->un.ord = sc->sc_pow_mode;
781 1.10 itohy return 0;
782 1.10 itohy
783 1.10 itohy case YM_PWR_TIMEOUT:
784 1.10 itohy if (cp->un.value.num_channels != 1)
785 1.10 itohy return EINVAL;
786 1.10 itohy cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_pow_timeout;
787 1.10 itohy return 0;
788 1.10 itohy #endif
789 1.10 itohy }
790 1.10 itohy
791 1.10 itohy error = ad1848_mixer_get_port(ac, mappings, NUMMAP, cp);
792 1.10 itohy
793 1.10 itohy if (error != ENXIO)
794 1.10 itohy return (error);
795 1.10 itohy
796 1.10 itohy error = 0;
797 1.10 itohy
798 1.10 itohy switch (cp->dev) {
799 1.2 augustss case YM_MIC_MUTE:
800 1.2 augustss cp->un.ord = sc->mic_mute;
801 1.2 augustss break;
802 1.10 itohy
803 1.2 augustss default:
804 1.2 augustss error = ENXIO;
805 1.2 augustss break;
806 1.2 augustss }
807 1.10 itohy
808 1.2 augustss return(error);
809 1.1 augustss }
810 1.1 augustss
811 1.10 itohy static char *mixer_classes[] = {
812 1.10 itohy AudioCinputs, AudioCrecord, AudioCoutputs, AudioCmonitor,
813 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
814 1.14.4.4 he AudioCpower,
815 1.10 itohy #endif
816 1.14.4.4 he AudioCequalization
817 1.10 itohy };
818 1.1 augustss
819 1.1 augustss int
820 1.1 augustss ym_query_devinfo(addr, dip)
821 1.2 augustss void *addr;
822 1.2 augustss mixer_devinfo_t *dip;
823 1.1 augustss {
824 1.10 itohy static char *mixer_port_names[] = {
825 1.10 itohy AudioNdac, AudioNmidi, AudioNcd, AudioNline, AudioNspeaker,
826 1.10 itohy AudioNmicrophone, AudioNmonitor
827 1.10 itohy };
828 1.14.4.4 he struct ad1848_softc *ac = addr;
829 1.14.4.4 he struct ym_softc *sc = ac->parent;
830 1.14.4.4 he
831 1.14.4.4 he /* SA2 doesn't have equalizer */
832 1.14.4.4 he if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(dip->index))
833 1.14.4.4 he return ENXIO;
834 1.1 augustss
835 1.2 augustss dip->next = dip->prev = AUDIO_MIXER_LAST;
836 1.10 itohy
837 1.2 augustss switch(dip->index) {
838 1.14.4.4 he case YM_INPUT_CLASS:
839 1.2 augustss case YM_OUTPUT_CLASS:
840 1.2 augustss case YM_MONITOR_CLASS:
841 1.2 augustss case YM_RECORD_CLASS:
842 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
843 1.10 itohy case YM_PWR_CLASS:
844 1.10 itohy #endif
845 1.14.4.4 he case YM_EQ_CLASS:
846 1.2 augustss dip->type = AUDIO_MIXER_CLASS;
847 1.2 augustss dip->mixer_class = dip->index;
848 1.10 itohy strcpy(dip->label.name,
849 1.2 augustss mixer_classes[dip->index - YM_INPUT_CLASS]);
850 1.2 augustss break;
851 1.10 itohy
852 1.10 itohy case YM_DAC_LVL:
853 1.2 augustss case YM_MIDI_LVL:
854 1.2 augustss case YM_CD_LVL:
855 1.10 itohy case YM_LINE_LVL:
856 1.2 augustss case YM_SPEAKER_LVL:
857 1.2 augustss case YM_MIC_LVL:
858 1.2 augustss case YM_MONITOR_LVL:
859 1.2 augustss dip->type = AUDIO_MIXER_VALUE;
860 1.2 augustss if (dip->index == YM_MONITOR_LVL)
861 1.2 augustss dip->mixer_class = YM_MONITOR_CLASS;
862 1.2 augustss else
863 1.2 augustss dip->mixer_class = YM_INPUT_CLASS;
864 1.10 itohy
865 1.2 augustss dip->next = dip->index + 7;
866 1.10 itohy
867 1.2 augustss strcpy(dip->label.name,
868 1.10 itohy mixer_port_names[dip->index - YM_DAC_LVL]);
869 1.10 itohy
870 1.2 augustss if (dip->index == YM_SPEAKER_LVL ||
871 1.2 augustss dip->index == YM_MIC_LVL)
872 1.2 augustss dip->un.v.num_channels = 1;
873 1.2 augustss else
874 1.2 augustss dip->un.v.num_channels = 2;
875 1.10 itohy
876 1.2 augustss strcpy(dip->un.v.units.name, AudioNvolume);
877 1.2 augustss break;
878 1.10 itohy
879 1.10 itohy case YM_DAC_MUTE:
880 1.2 augustss case YM_MIDI_MUTE:
881 1.2 augustss case YM_CD_MUTE:
882 1.2 augustss case YM_LINE_MUTE:
883 1.2 augustss case YM_SPEAKER_MUTE:
884 1.2 augustss case YM_MIC_MUTE:
885 1.2 augustss case YM_MONITOR_MUTE:
886 1.2 augustss if (dip->index == YM_MONITOR_MUTE)
887 1.2 augustss dip->mixer_class = YM_MONITOR_CLASS;
888 1.2 augustss else
889 1.2 augustss dip->mixer_class = YM_INPUT_CLASS;
890 1.2 augustss dip->type = AUDIO_MIXER_ENUM;
891 1.2 augustss dip->prev = dip->index - 7;
892 1.2 augustss mute:
893 1.2 augustss strcpy(dip->label.name, AudioNmute);
894 1.2 augustss dip->un.e.num_mem = 2;
895 1.2 augustss strcpy(dip->un.e.member[0].label.name, AudioNoff);
896 1.2 augustss dip->un.e.member[0].ord = 0;
897 1.2 augustss strcpy(dip->un.e.member[1].label.name, AudioNon);
898 1.2 augustss dip->un.e.member[1].ord = 1;
899 1.2 augustss break;
900 1.10 itohy
901 1.10 itohy
902 1.2 augustss case YM_OUTPUT_LVL:
903 1.2 augustss dip->type = AUDIO_MIXER_VALUE;
904 1.2 augustss dip->mixer_class = YM_OUTPUT_CLASS;
905 1.2 augustss dip->next = YM_OUTPUT_MUTE;
906 1.2 augustss strcpy(dip->label.name, AudioNmaster);
907 1.2 augustss dip->un.v.num_channels = 2;
908 1.2 augustss strcpy(dip->un.v.units.name, AudioNvolume);
909 1.2 augustss break;
910 1.10 itohy
911 1.2 augustss case YM_OUTPUT_MUTE:
912 1.2 augustss dip->mixer_class = YM_OUTPUT_CLASS;
913 1.2 augustss dip->type = AUDIO_MIXER_ENUM;
914 1.2 augustss dip->prev = YM_OUTPUT_LVL;
915 1.2 augustss goto mute;
916 1.10 itohy
917 1.10 itohy
918 1.2 augustss case YM_REC_LVL: /* record level */
919 1.2 augustss dip->type = AUDIO_MIXER_VALUE;
920 1.2 augustss dip->mixer_class = YM_RECORD_CLASS;
921 1.2 augustss dip->next = YM_RECORD_SOURCE;
922 1.2 augustss strcpy(dip->label.name, AudioNrecord);
923 1.2 augustss dip->un.v.num_channels = 2;
924 1.2 augustss strcpy(dip->un.v.units.name, AudioNvolume);
925 1.2 augustss break;
926 1.10 itohy
927 1.2 augustss case YM_RECORD_SOURCE:
928 1.2 augustss dip->mixer_class = YM_RECORD_CLASS;
929 1.2 augustss dip->type = AUDIO_MIXER_ENUM;
930 1.2 augustss dip->prev = YM_REC_LVL;
931 1.2 augustss strcpy(dip->label.name, AudioNsource);
932 1.2 augustss dip->un.e.num_mem = 4;
933 1.2 augustss strcpy(dip->un.e.member[0].label.name, AudioNmicrophone);
934 1.2 augustss dip->un.e.member[0].ord = MIC_IN_PORT;
935 1.2 augustss strcpy(dip->un.e.member[1].label.name, AudioNline);
936 1.2 augustss dip->un.e.member[1].ord = LINE_IN_PORT;
937 1.2 augustss strcpy(dip->un.e.member[2].label.name, AudioNdac);
938 1.2 augustss dip->un.e.member[2].ord = DAC_IN_PORT;
939 1.2 augustss strcpy(dip->un.e.member[3].label.name, AudioNcd);
940 1.2 augustss dip->un.e.member[3].ord = AUX1_IN_PORT;
941 1.2 augustss break;
942 1.10 itohy
943 1.10 itohy
944 1.10 itohy case YM_MASTER_EQMODE:
945 1.10 itohy dip->type = AUDIO_MIXER_ENUM;
946 1.10 itohy dip->mixer_class = YM_EQ_CLASS;
947 1.10 itohy strcpy(dip->label.name, AudioNmode);
948 1.10 itohy strcpy(dip->un.v.units.name, AudioNmode);
949 1.10 itohy dip->un.e.num_mem = 4;
950 1.10 itohy strcpy(dip->un.e.member[0].label.name, AudioNdesktop);
951 1.10 itohy dip->un.e.member[0].ord = SA3_SYS_CTL_YMODE0;
952 1.10 itohy strcpy(dip->un.e.member[1].label.name, AudioNlaptop);
953 1.10 itohy dip->un.e.member[1].ord = SA3_SYS_CTL_YMODE1;
954 1.10 itohy strcpy(dip->un.e.member[2].label.name, AudioNsubnote);
955 1.10 itohy dip->un.e.member[2].ord = SA3_SYS_CTL_YMODE2;
956 1.10 itohy strcpy(dip->un.e.member[3].label.name, AudioNhifi);
957 1.10 itohy dip->un.e.member[3].ord = SA3_SYS_CTL_YMODE3;
958 1.10 itohy break;
959 1.10 itohy
960 1.10 itohy case YM_MASTER_TREBLE:
961 1.10 itohy dip->type = AUDIO_MIXER_VALUE;
962 1.10 itohy dip->mixer_class = YM_EQ_CLASS;
963 1.10 itohy strcpy(dip->label.name, AudioNtreble);
964 1.10 itohy dip->un.v.num_channels = 2;
965 1.10 itohy strcpy(dip->un.v.units.name, AudioNtreble);
966 1.10 itohy break;
967 1.10 itohy
968 1.10 itohy case YM_MASTER_BASS:
969 1.10 itohy dip->type = AUDIO_MIXER_VALUE;
970 1.10 itohy dip->mixer_class = YM_EQ_CLASS;
971 1.10 itohy strcpy(dip->label.name, AudioNbass);
972 1.10 itohy dip->un.v.num_channels = 2;
973 1.10 itohy strcpy(dip->un.v.units.name, AudioNbass);
974 1.10 itohy break;
975 1.10 itohy
976 1.10 itohy case YM_MASTER_WIDE:
977 1.10 itohy dip->type = AUDIO_MIXER_VALUE;
978 1.10 itohy dip->mixer_class = YM_EQ_CLASS;
979 1.10 itohy strcpy(dip->label.name, AudioNsurround);
980 1.10 itohy dip->un.v.num_channels = 2;
981 1.10 itohy strcpy(dip->un.v.units.name, AudioNsurround);
982 1.10 itohy break;
983 1.10 itohy
984 1.10 itohy
985 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
986 1.10 itohy case YM_PWR_MODE:
987 1.10 itohy dip->type = AUDIO_MIXER_ENUM;
988 1.10 itohy dip->mixer_class = YM_PWR_CLASS;
989 1.10 itohy dip->next = YM_PWR_TIMEOUT;
990 1.13 itohy strcpy(dip->label.name, AudioNsave);
991 1.10 itohy dip->un.e.num_mem = 3;
992 1.10 itohy strcpy(dip->un.e.member[0].label.name, AudioNpowerdown);
993 1.10 itohy dip->un.e.member[0].ord = YM_POWER_POWERDOWN;
994 1.10 itohy strcpy(dip->un.e.member[1].label.name, AudioNpowersave);
995 1.10 itohy dip->un.e.member[1].ord = YM_POWER_POWERSAVE;
996 1.10 itohy strcpy(dip->un.e.member[2].label.name, AudioNnosave);
997 1.10 itohy dip->un.e.member[2].ord = YM_POWER_NOSAVE;
998 1.10 itohy break;
999 1.10 itohy
1000 1.10 itohy case YM_PWR_TIMEOUT:
1001 1.10 itohy dip->type = AUDIO_MIXER_VALUE;
1002 1.10 itohy dip->mixer_class = YM_PWR_CLASS;
1003 1.10 itohy dip->prev = YM_PWR_MODE;
1004 1.10 itohy strcpy(dip->label.name, AudioNtimeout);
1005 1.10 itohy dip->un.v.num_channels = 1;
1006 1.10 itohy strcpy(dip->un.v.units.name, AudioNtimeout);
1007 1.10 itohy break;
1008 1.10 itohy #endif /* not AUDIO_NO_POWER_CTL */
1009 1.10 itohy
1010 1.2 augustss default:
1011 1.2 augustss return ENXIO;
1012 1.2 augustss /*NOTREACHED*/
1013 1.2 augustss }
1014 1.10 itohy
1015 1.10 itohy return 0;
1016 1.10 itohy }
1017 1.10 itohy
1018 1.10 itohy int
1019 1.10 itohy ym_intr(arg)
1020 1.10 itohy void *arg;
1021 1.10 itohy {
1022 1.10 itohy struct ym_softc *sc = arg;
1023 1.10 itohy u_int8_t ist;
1024 1.10 itohy int processed;
1025 1.10 itohy
1026 1.10 itohy /* OPL3 timer is currently unused. */
1027 1.10 itohy if (((ist = ym_read(sc, SA3_IRQA_STAT)) &
1028 1.10 itohy ~(SA3_IRQ_STAT_SB|SA3_IRQ_STAT_OPL3)) == 0) {
1029 1.10 itohy DPRINTF(("%s: ym_intr: spurious interrupt\n", DVNAME(sc)));
1030 1.10 itohy return 0;
1031 1.10 itohy }
1032 1.10 itohy
1033 1.10 itohy /* Process pending interrupts. */
1034 1.10 itohy do {
1035 1.10 itohy processed = 0;
1036 1.10 itohy /*
1037 1.10 itohy * CODEC interrupts.
1038 1.10 itohy */
1039 1.10 itohy if (ist & (SA3_IRQ_STAT_TI|SA3_IRQ_STAT_CI|SA3_IRQ_STAT_PI)) {
1040 1.10 itohy ad1848_isa_intr(&sc->sc_ad1848);
1041 1.10 itohy processed = 1;
1042 1.10 itohy }
1043 1.10 itohy #if NMPU_YM > 0
1044 1.10 itohy /*
1045 1.10 itohy * MPU401 interrupt.
1046 1.10 itohy */
1047 1.10 itohy if (ist & SA3_IRQ_STAT_MPU) {
1048 1.10 itohy mpu_intr(sc->sc_mpudev);
1049 1.10 itohy processed = 1;
1050 1.10 itohy }
1051 1.10 itohy #endif
1052 1.10 itohy /*
1053 1.14.4.4 he * Hardware volume interrupt (SA3 only).
1054 1.10 itohy * Recalculate master volume from the hardware setting.
1055 1.10 itohy */
1056 1.14.4.4 he if ((ist & SA3_IRQ_STAT_MV) && YM_IS_SA3(sc)) {
1057 1.14.4.4 he ym_hvol_to_master_gain(sc);
1058 1.10 itohy processed = 1;
1059 1.10 itohy }
1060 1.10 itohy } while (processed && (ist = ym_read(sc, SA3_IRQA_STAT)));
1061 1.10 itohy
1062 1.10 itohy return 1;
1063 1.10 itohy }
1064 1.10 itohy
1065 1.10 itohy
1066 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
1067 1.10 itohy static void
1068 1.10 itohy ym_save_codec_regs(sc)
1069 1.10 itohy struct ym_softc *sc;
1070 1.10 itohy {
1071 1.10 itohy struct ad1848_softc *ac = &sc->sc_ad1848.sc_ad1848;
1072 1.10 itohy int i;
1073 1.10 itohy
1074 1.10 itohy DPRINTF(("%s: ym_save_codec_regs\n", DVNAME(sc)));
1075 1.10 itohy
1076 1.10 itohy for (i = 0; i <= 0x1f; i++)
1077 1.10 itohy sc->sc_codec_scan[i] = ad_read(ac, i);
1078 1.10 itohy }
1079 1.10 itohy
1080 1.10 itohy static void
1081 1.10 itohy ym_restore_codec_regs(sc)
1082 1.10 itohy struct ym_softc *sc;
1083 1.10 itohy {
1084 1.10 itohy struct ad1848_softc *ac = &sc->sc_ad1848.sc_ad1848;
1085 1.10 itohy int i, t;
1086 1.10 itohy
1087 1.10 itohy DPRINTF(("%s: ym_restore_codec_regs\n", DVNAME(sc)));
1088 1.10 itohy
1089 1.10 itohy for (i = 0; i <= 0x1f; i++) {
1090 1.10 itohy /*
1091 1.10 itohy * Wait til the chip becomes ready.
1092 1.10 itohy * This is required after suspend/resume.
1093 1.10 itohy */
1094 1.10 itohy for (t = 0;
1095 1.10 itohy t < 100000 && ADREAD(ac, AD1848_IADDR) & SP_IN_INIT; t++)
1096 1.10 itohy ;
1097 1.10 itohy #ifdef AUDIO_DEBUG
1098 1.10 itohy if (t)
1099 1.10 itohy DPRINTF(("%s: ym_restore_codec_regs: reg %d, t %d\n",
1100 1.10 itohy DVNAME(sc), i, t));
1101 1.10 itohy #endif
1102 1.10 itohy ad_write(ac, i, sc->sc_codec_scan[i]);
1103 1.10 itohy }
1104 1.10 itohy }
1105 1.10 itohy
1106 1.10 itohy /*
1107 1.10 itohy * Save and restore the state on suspending / resumning.
1108 1.10 itohy *
1109 1.10 itohy * XXX This is not complete.
1110 1.10 itohy * Currently only the parameters, such as output gain, are restored.
1111 1.10 itohy * DMA state should also be restored. FIXME.
1112 1.10 itohy */
1113 1.10 itohy void
1114 1.10 itohy ym_power_hook(why, v)
1115 1.10 itohy int why;
1116 1.10 itohy void *v;
1117 1.10 itohy {
1118 1.10 itohy struct ym_softc *sc = v;
1119 1.14.4.4 he int i, max;
1120 1.10 itohy int s;
1121 1.10 itohy
1122 1.10 itohy DPRINTF(("%s: ym_power_hook: why = %d\n", DVNAME(sc), why));
1123 1.10 itohy
1124 1.10 itohy s = splaudio();
1125 1.10 itohy
1126 1.14.4.3 he switch (why) {
1127 1.14.4.3 he case PWR_SUSPEND:
1128 1.14.4.3 he case PWR_STANDBY:
1129 1.10 itohy /*
1130 1.10 itohy * suspending...
1131 1.10 itohy */
1132 1.14 thorpej callout_stop(&sc->sc_powerdown_ch);
1133 1.10 itohy if (sc->sc_turning_off)
1134 1.10 itohy ym_powerdown_blocks(sc);
1135 1.10 itohy
1136 1.10 itohy /*
1137 1.10 itohy * Save CODEC registers.
1138 1.10 itohy * Note that the registers read incorrect
1139 1.10 itohy * if the CODEC part is in power-down mode.
1140 1.10 itohy */
1141 1.10 itohy if (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL)
1142 1.10 itohy ym_save_codec_regs(sc);
1143 1.10 itohy
1144 1.10 itohy /*
1145 1.10 itohy * Save OPL3-SA3 control registers and power-down the chip.
1146 1.10 itohy * Note that the registers read incorrect
1147 1.10 itohy * if the chip is in global power-down mode.
1148 1.10 itohy */
1149 1.10 itohy sc->sc_sa3_scan[SA3_PWR_MNG] = ym_read(sc, SA3_PWR_MNG);
1150 1.10 itohy if (sc->sc_on_blocks)
1151 1.10 itohy ym_chip_powerdown(sc);
1152 1.14.4.3 he break;
1153 1.14.4.3 he
1154 1.14.4.3 he case PWR_RESUME:
1155 1.10 itohy /*
1156 1.10 itohy * resuming...
1157 1.10 itohy */
1158 1.10 itohy ym_chip_powerup(sc, 1);
1159 1.10 itohy ym_init(sc); /* power-on CODEC */
1160 1.10 itohy
1161 1.10 itohy /* Restore control registers. */
1162 1.14.4.4 he max = YM_IS_SA3(sc)? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
1163 1.14.4.4 he for (i = SA3_PWR_MNG + 1; i <= max; i++) {
1164 1.10 itohy if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA ||
1165 1.10 itohy i == SA3_DPWRDWN)
1166 1.10 itohy continue;
1167 1.10 itohy ym_write(sc, i, sc->sc_sa3_scan[i]);
1168 1.10 itohy }
1169 1.10 itohy
1170 1.10 itohy /* Restore CODEC registers (including mixer). */
1171 1.10 itohy ym_restore_codec_regs(sc);
1172 1.10 itohy
1173 1.10 itohy /* Restore global/digital power-down state. */
1174 1.10 itohy ym_write(sc, SA3_PWR_MNG, sc->sc_sa3_scan[SA3_PWR_MNG]);
1175 1.14.4.4 he if (YM_IS_SA3(sc))
1176 1.14.4.4 he ym_write(sc, SA3_DPWRDWN, sc->sc_sa3_scan[SA3_DPWRDWN]);
1177 1.14.4.3 he break;
1178 1.14.4.3 he case PWR_SOFTSUSPEND:
1179 1.14.4.3 he case PWR_SOFTSTANDBY:
1180 1.14.4.3 he case PWR_SOFTRESUME:
1181 1.14.4.3 he break;
1182 1.10 itohy }
1183 1.10 itohy splx(s);
1184 1.10 itohy }
1185 1.10 itohy
1186 1.10 itohy int
1187 1.10 itohy ym_codec_power_ctl(arg, flags)
1188 1.10 itohy void *arg;
1189 1.10 itohy int flags;
1190 1.10 itohy {
1191 1.10 itohy struct ym_softc *sc = arg;
1192 1.10 itohy struct ad1848_softc *ac = &sc->sc_ad1848.sc_ad1848;
1193 1.10 itohy int parts;
1194 1.10 itohy
1195 1.10 itohy DPRINTF(("%s: ym_codec_power_ctl: flags = 0x%x\n", DVNAME(sc), flags));
1196 1.10 itohy
1197 1.10 itohy if (flags != 0) {
1198 1.10 itohy parts = 0;
1199 1.10 itohy if (flags & FREAD) {
1200 1.10 itohy parts |= YM_POWER_CODEC_R | YM_POWER_CODEC_AD;
1201 1.10 itohy if (ac->mute[AD1848_MONITOR_CHANNEL] == 0)
1202 1.10 itohy parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
1203 1.10 itohy }
1204 1.10 itohy if (flags & FWRITE)
1205 1.10 itohy parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
1206 1.10 itohy } else
1207 1.10 itohy parts = YM_POWER_CODEC_P | YM_POWER_CODEC_R |
1208 1.10 itohy YM_POWER_CODEC_DA | YM_POWER_CODEC_AD;
1209 1.10 itohy
1210 1.10 itohy ym_power_ctl(sc, parts, flags);
1211 1.10 itohy
1212 1.2 augustss return 0;
1213 1.1 augustss }
1214 1.10 itohy
1215 1.10 itohy /*
1216 1.10 itohy * Enter Power Save mode or Global Power Down mode.
1217 1.10 itohy * Total dissipation becomes 5mA and 10uA (typ.) respective.
1218 1.10 itohy *
1219 1.10 itohy * This must be called at splaudio().
1220 1.10 itohy */
1221 1.10 itohy static void
1222 1.10 itohy ym_chip_powerdown(sc)
1223 1.10 itohy struct ym_softc *sc;
1224 1.10 itohy {
1225 1.14.4.4 he int i, max;
1226 1.10 itohy
1227 1.10 itohy DPRINTF(("%s: ym_chip_powerdown\n", DVNAME(sc)));
1228 1.10 itohy
1229 1.14.4.4 he max = YM_IS_SA3(sc) ? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
1230 1.14.4.4 he
1231 1.10 itohy /* Save control registers. */
1232 1.14.4.4 he for (i = SA3_PWR_MNG + 1; i <= max; i++) {
1233 1.10 itohy if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA)
1234 1.10 itohy continue;
1235 1.10 itohy sc->sc_sa3_scan[i] = ym_read(sc, i);
1236 1.10 itohy }
1237 1.10 itohy ym_write(sc, SA3_PWR_MNG,
1238 1.10 itohy (sc->sc_pow_mode == YM_POWER_POWERDOWN ?
1239 1.10 itohy SA3_PWR_MNG_PDN : SA3_PWR_MNG_PSV) | SA3_PWR_MNG_PDX);
1240 1.10 itohy }
1241 1.10 itohy
1242 1.10 itohy /*
1243 1.10 itohy * Power up from Power Save / Global Power Down Mode.
1244 1.10 itohy *
1245 1.10 itohy * We assume no ym interrupt shall occur, since the chip is
1246 1.10 itohy * in power-down mode (or should be blocked by splaudio()).
1247 1.10 itohy */
1248 1.10 itohy static void
1249 1.10 itohy ym_chip_powerup(sc, nosleep)
1250 1.10 itohy struct ym_softc *sc;
1251 1.10 itohy int nosleep;
1252 1.10 itohy {
1253 1.10 itohy int wchan;
1254 1.10 itohy u_int8_t pw;
1255 1.10 itohy
1256 1.10 itohy DPRINTF(("%s: ym_chip_powerup\n", DVNAME(sc)));
1257 1.10 itohy
1258 1.10 itohy pw = ym_read(sc, SA3_PWR_MNG);
1259 1.10 itohy
1260 1.10 itohy if ((pw & (SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN | SA3_PWR_MNG_PDX)) == 0)
1261 1.10 itohy return; /* already on */
1262 1.10 itohy
1263 1.10 itohy pw &= ~SA3_PWR_MNG_PDX;
1264 1.10 itohy ym_write(sc, SA3_PWR_MNG, pw);
1265 1.10 itohy
1266 1.10 itohy /* wait 100 ms */
1267 1.10 itohy if (nosleep)
1268 1.10 itohy delay(100000);
1269 1.10 itohy else
1270 1.13 itohy tsleep(&wchan, PWAIT, "ym_pu1", hz / 10);
1271 1.10 itohy
1272 1.10 itohy pw &= ~(SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN);
1273 1.10 itohy ym_write(sc, SA3_PWR_MNG, pw);
1274 1.10 itohy
1275 1.10 itohy /* wait 70 ms */
1276 1.10 itohy if (nosleep)
1277 1.10 itohy delay(70000);
1278 1.10 itohy else
1279 1.13 itohy tsleep(&wchan, PWAIT, "ym_pu2", hz / 14);
1280 1.10 itohy
1281 1.10 itohy /* The chip is muted automatically --- unmute it now. */
1282 1.10 itohy ym_mute(sc, SA3_VOL_L, sc->master_mute);
1283 1.10 itohy ym_mute(sc, SA3_VOL_R, sc->master_mute);
1284 1.10 itohy }
1285 1.10 itohy
1286 1.14 thorpej /* callout handler for power-down */
1287 1.10 itohy void
1288 1.10 itohy ym_powerdown_blocks(arg)
1289 1.10 itohy void *arg;
1290 1.10 itohy {
1291 1.10 itohy struct ym_softc *sc = arg;
1292 1.10 itohy u_int16_t parts;
1293 1.10 itohy u_int16_t on_blocks = sc->sc_on_blocks;
1294 1.10 itohy u_int8_t sv;
1295 1.10 itohy int s;
1296 1.10 itohy
1297 1.10 itohy DPRINTF(("%s: ym_powerdown_blocks: turning_off 0x%x\n",
1298 1.10 itohy DVNAME(sc), sc->sc_turning_off));
1299 1.10 itohy
1300 1.10 itohy s = splaudio();
1301 1.10 itohy
1302 1.10 itohy on_blocks = sc->sc_on_blocks;
1303 1.10 itohy
1304 1.10 itohy /* Be sure not to change the state of the chip. Save it first. */
1305 1.10 itohy sv = bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX);
1306 1.10 itohy
1307 1.10 itohy parts = sc->sc_turning_off;
1308 1.10 itohy
1309 1.10 itohy if (on_blocks & ~parts & YM_POWER_CODEC_CTL)
1310 1.10 itohy parts &= ~(YM_POWER_CODEC_P | YM_POWER_CODEC_R);
1311 1.10 itohy if (parts & YM_POWER_CODEC_CTL) {
1312 1.10 itohy if ((on_blocks & YM_POWER_CODEC_P) == 0)
1313 1.10 itohy parts |= YM_POWER_CODEC_P;
1314 1.10 itohy if ((on_blocks & YM_POWER_CODEC_R) == 0)
1315 1.10 itohy parts |= YM_POWER_CODEC_R;
1316 1.10 itohy }
1317 1.13 itohy parts &= ~YM_POWER_CODEC_PSEUDO;
1318 1.10 itohy
1319 1.10 itohy /* If CODEC is being off, save the state. */
1320 1.10 itohy if ((sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) &&
1321 1.10 itohy (sc->sc_on_blocks & ~sc->sc_turning_off &
1322 1.10 itohy YM_POWER_CODEC_DIGITAL) == 0)
1323 1.10 itohy ym_save_codec_regs(sc);
1324 1.10 itohy
1325 1.14.4.4 he if (YM_IS_SA3(sc)) {
1326 1.14.4.4 he /* OPL3-SA3 */
1327 1.14.4.4 he ym_write(sc, SA3_DPWRDWN,
1328 1.14.4.4 he ym_read(sc, SA3_DPWRDWN) | (u_int8_t) parts);
1329 1.14.4.4 he ym_write(sc, SA3_APWRDWN,
1330 1.14.4.4 he ym_read(sc, SA3_APWRDWN) | (parts >> 8));
1331 1.14.4.4 he } else {
1332 1.14.4.4 he /* OPL3-SA2 (only OPL3 can be off partially) */
1333 1.14.4.4 he if (parts & YM_POWER_OPL3)
1334 1.14.4.4 he ym_write(sc, SA3_PWR_MNG,
1335 1.14.4.4 he ym_read(sc, SA3_PWR_MNG) | SA2_PWR_MNG_FMPS);
1336 1.14.4.4 he }
1337 1.10 itohy
1338 1.10 itohy if (((sc->sc_on_blocks &= ~sc->sc_turning_off) & YM_POWER_ACTIVE) == 0)
1339 1.10 itohy ym_chip_powerdown(sc);
1340 1.10 itohy
1341 1.10 itohy sc->sc_turning_off = 0;
1342 1.10 itohy
1343 1.10 itohy /* Restore the state of the chip. */
1344 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX, sv);
1345 1.10 itohy
1346 1.10 itohy splx(s);
1347 1.10 itohy }
1348 1.10 itohy
1349 1.10 itohy /*
1350 1.10 itohy * Power control entry point.
1351 1.10 itohy */
1352 1.10 itohy void
1353 1.10 itohy ym_power_ctl(sc, parts, onoff)
1354 1.10 itohy struct ym_softc *sc;
1355 1.10 itohy int parts, onoff;
1356 1.10 itohy {
1357 1.10 itohy int s;
1358 1.10 itohy int need_restore_codec;
1359 1.10 itohy
1360 1.10 itohy DPRINTF(("%s: ym_power_ctl: parts = 0x%x, %s\n",
1361 1.10 itohy DVNAME(sc), parts, onoff ? "on" : "off"));
1362 1.10 itohy
1363 1.10 itohy #ifdef DIAGNOSTIC
1364 1.10 itohy if (curproc == NULL)
1365 1.10 itohy panic("ym_power_ctl: no curproc");
1366 1.10 itohy #endif
1367 1.10 itohy /* This function may sleep --- needs locking. */
1368 1.10 itohy while (sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) {
1369 1.10 itohy sc->sc_in_power_ctl |= YM_POWER_CTL_WANTED;
1370 1.10 itohy DPRINTF(("%s: ym_power_ctl: sleeping\n", DVNAME(sc)));
1371 1.13 itohy tsleep(&sc->sc_in_power_ctl, PWAIT, "ym_pc", 0);
1372 1.10 itohy DPRINTF(("%s: ym_power_ctl: awaken\n", DVNAME(sc)));
1373 1.10 itohy }
1374 1.10 itohy sc->sc_in_power_ctl |= YM_POWER_CTL_INUSE;
1375 1.10 itohy
1376 1.14 thorpej /* Defeat softclock interrupts. */
1377 1.10 itohy s = splsoftclock();
1378 1.10 itohy
1379 1.10 itohy /* If ON requested to parts which are scheduled to OFF, cancel it. */
1380 1.10 itohy if (onoff && sc->sc_turning_off && (sc->sc_turning_off &= ~parts) == 0)
1381 1.14 thorpej callout_stop(&sc->sc_powerdown_ch);
1382 1.10 itohy
1383 1.10 itohy if (!onoff && sc->sc_turning_off)
1384 1.10 itohy parts &= ~sc->sc_turning_off;
1385 1.10 itohy
1386 1.10 itohy /* Discard bits which are currently {on,off}. */
1387 1.10 itohy parts &= onoff ? ~sc->sc_on_blocks : sc->sc_on_blocks;
1388 1.10 itohy
1389 1.10 itohy /* Cancel previous timeout if needed. */
1390 1.10 itohy if (parts != 0 && sc->sc_turning_off)
1391 1.14 thorpej callout_stop(&sc->sc_powerdown_ch);
1392 1.10 itohy
1393 1.10 itohy (void) splx(s);
1394 1.10 itohy
1395 1.10 itohy if (parts == 0)
1396 1.10 itohy goto unlock; /* no work to do */
1397 1.10 itohy
1398 1.10 itohy if (onoff) {
1399 1.10 itohy /* Turning on is done immediately. */
1400 1.10 itohy
1401 1.10 itohy /* If the chip is off, turn it on. */
1402 1.10 itohy if ((sc->sc_on_blocks & YM_POWER_ACTIVE) == 0)
1403 1.10 itohy ym_chip_powerup(sc, 0);
1404 1.10 itohy
1405 1.10 itohy need_restore_codec = (parts & YM_POWER_CODEC_DIGITAL) &&
1406 1.10 itohy (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) == 0;
1407 1.10 itohy
1408 1.10 itohy sc->sc_on_blocks |= parts;
1409 1.10 itohy if (parts & YM_POWER_CODEC_CTL)
1410 1.10 itohy parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_R;
1411 1.10 itohy
1412 1.10 itohy s = splaudio();
1413 1.10 itohy
1414 1.14.4.4 he if (YM_IS_SA3(sc)) {
1415 1.14.4.4 he /* OPL3-SA3 */
1416 1.14.4.4 he ym_write(sc, SA3_DPWRDWN,
1417 1.14.4.4 he ym_read(sc, SA3_DPWRDWN) & (u_int8_t)~parts);
1418 1.14.4.4 he ym_write(sc, SA3_APWRDWN,
1419 1.14.4.4 he ym_read(sc, SA3_APWRDWN) & ~(parts >> 8));
1420 1.14.4.4 he } else {
1421 1.14.4.4 he /* OPL3-SA2 (only OPL3 can be off partially) */
1422 1.14.4.4 he if (parts & YM_POWER_OPL3)
1423 1.14.4.4 he ym_write(sc, SA3_PWR_MNG,
1424 1.14.4.4 he ym_read(sc, SA3_PWR_MNG)
1425 1.14.4.4 he & ~SA2_PWR_MNG_FMPS);
1426 1.14.4.4 he }
1427 1.10 itohy if (need_restore_codec)
1428 1.10 itohy ym_restore_codec_regs(sc);
1429 1.10 itohy
1430 1.10 itohy (void) splx(s);
1431 1.10 itohy } else {
1432 1.10 itohy /* Turning off is delayed. */
1433 1.10 itohy sc->sc_turning_off |= parts;
1434 1.10 itohy }
1435 1.10 itohy
1436 1.10 itohy /* Schedule turning off. */
1437 1.10 itohy if (sc->sc_pow_mode != YM_POWER_NOSAVE && sc->sc_turning_off)
1438 1.14 thorpej callout_reset(&sc->sc_powerdown_ch, hz * sc->sc_pow_timeout,
1439 1.14 thorpej ym_powerdown_blocks, sc);
1440 1.10 itohy
1441 1.10 itohy unlock:
1442 1.10 itohy if (sc->sc_in_power_ctl & YM_POWER_CTL_WANTED)
1443 1.10 itohy wakeup(&sc->sc_in_power_ctl);
1444 1.10 itohy sc->sc_in_power_ctl = 0;
1445 1.10 itohy }
1446 1.10 itohy #endif /* not AUDIO_NO_POWER_CTL */
1447