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ym.c revision 1.17.2.4
      1  1.17.2.4   nathanw /*	$NetBSD: ym.c,v 1.17.2.4 2002/04/01 07:45:58 nathanw Exp $	*/
      2       1.1  augustss 
      3      1.10     itohy /*-
      4  1.17.2.3   nathanw  * Copyright (c) 1999-2002 The NetBSD Foundation, Inc.
      5      1.10     itohy  * All rights reserved.
      6      1.10     itohy  *
      7      1.10     itohy  * This code is derived from software contributed to The NetBSD Foundation
      8      1.10     itohy  * by ITOH Yasufumi.
      9      1.10     itohy  *
     10      1.10     itohy  * Redistribution and use in source and binary forms, with or without
     11      1.10     itohy  * modification, are permitted provided that the following conditions
     12      1.10     itohy  * are met:
     13      1.10     itohy  * 1. Redistributions of source code must retain the above copyright
     14      1.10     itohy  *    notice, this list of conditions and the following disclaimer.
     15      1.10     itohy  * 2. Redistributions in binary form must reproduce the above copyright
     16      1.10     itohy  *    notice, this list of conditions and the following disclaimer in the
     17      1.10     itohy  *    documentation and/or other materials provided with the distribution.
     18      1.10     itohy  * 3. All advertising materials mentioning features or use of this software
     19      1.10     itohy  *    must display the following acknowledgement:
     20      1.10     itohy  *	This product includes software developed by the NetBSD
     21      1.10     itohy  *	Foundation, Inc. and its contributors.
     22      1.10     itohy  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23      1.10     itohy  *    contributors may be used to endorse or promote products derived
     24      1.10     itohy  *    from this software without specific prior written permission.
     25      1.10     itohy  *
     26      1.10     itohy  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27      1.10     itohy  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28      1.10     itohy  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29      1.10     itohy  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30      1.10     itohy  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31      1.10     itohy  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32      1.10     itohy  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33      1.10     itohy  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34      1.10     itohy  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35      1.10     itohy  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36      1.10     itohy  * POSSIBILITY OF SUCH DAMAGE.
     37      1.10     itohy  */
     38       1.1  augustss 
     39       1.1  augustss /*
     40       1.1  augustss  * Copyright (c) 1998 Constantine Sapuntzakis. All rights reserved.
     41      1.10     itohy  *
     42       1.1  augustss  * Redistribution and use in source and binary forms, with or without
     43       1.1  augustss  * modification, are permitted provided that the following conditions
     44       1.1  augustss  * are met:
     45       1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     46       1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     47       1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     48       1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     49       1.1  augustss  *    documentation and/or other materials provided with the distribution.
     50       1.1  augustss  * 3. The name of the author may not be used to endorse or promote products
     51       1.1  augustss  *    derived from this software without specific prior written permission.
     52       1.1  augustss  *
     53       1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     54       1.1  augustss  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     55       1.1  augustss  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     56       1.1  augustss  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     57       1.1  augustss  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     58       1.1  augustss  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     59       1.1  augustss  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     60       1.1  augustss  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     61       1.1  augustss  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     62       1.1  augustss  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     63       1.1  augustss  */
     64       1.1  augustss 
     65       1.1  augustss /*
     66       1.1  augustss  *  Original code from OpenBSD.
     67       1.1  augustss  */
     68  1.17.2.2   nathanw 
     69  1.17.2.2   nathanw #include <sys/cdefs.h>
     70  1.17.2.4   nathanw __KERNEL_RCSID(0, "$NetBSD: ym.c,v 1.17.2.4 2002/04/01 07:45:58 nathanw Exp $");
     71       1.1  augustss 
     72      1.10     itohy #include "mpu_ym.h"
     73      1.10     itohy #include "opt_ym.h"
     74       1.1  augustss 
     75       1.1  augustss #include <sys/param.h>
     76       1.1  augustss #include <sys/systm.h>
     77       1.1  augustss #include <sys/errno.h>
     78       1.1  augustss #include <sys/device.h>
     79      1.10     itohy #include <sys/fcntl.h>
     80      1.10     itohy #include <sys/kernel.h>
     81      1.10     itohy #include <sys/proc.h>
     82       1.1  augustss 
     83       1.1  augustss #include <machine/cpu.h>
     84       1.1  augustss #include <machine/intr.h>
     85       1.1  augustss #include <machine/bus.h>
     86       1.1  augustss 
     87       1.1  augustss #include <sys/audioio.h>
     88       1.1  augustss #include <dev/audio_if.h>
     89       1.1  augustss 
     90       1.1  augustss #include <dev/isa/isavar.h>
     91       1.1  augustss #include <dev/isa/isadmavar.h>
     92       1.1  augustss 
     93       1.1  augustss #include <dev/ic/ad1848reg.h>
     94       1.1  augustss #include <dev/isa/ad1848var.h>
     95      1.10     itohy #include <dev/ic/opl3sa3reg.h>
     96      1.10     itohy #include <dev/isa/wssreg.h>
     97      1.10     itohy #if NMPU_YM > 0
     98      1.10     itohy #include <dev/ic/mpuvar.h>
     99      1.10     itohy #endif
    100       1.1  augustss #include <dev/isa/ymvar.h>
    101      1.10     itohy #include <dev/isa/sbreg.h>
    102       1.1  augustss 
    103      1.10     itohy #ifndef spllowersoftclock
    104      1.10     itohy  #error "We depend on the new semantics of splsoftclock(9)."
    105      1.10     itohy #endif
    106      1.10     itohy 
    107      1.10     itohy /* Power management mode. */
    108      1.10     itohy #ifndef YM_POWER_MODE
    109      1.10     itohy #define YM_POWER_MODE		YM_POWER_POWERSAVE
    110      1.10     itohy #endif
    111      1.10     itohy 
    112      1.10     itohy /* Time in second before power down the chip. */
    113      1.10     itohy #ifndef YM_POWER_OFF_SEC
    114      1.10     itohy #define YM_POWER_OFF_SEC	5
    115      1.10     itohy #endif
    116      1.10     itohy 
    117      1.12     itohy /* Default mixer settings. */
    118      1.11     itohy #ifndef YM_VOL_MASTER
    119  1.17.2.3   nathanw #define YM_VOL_MASTER		208
    120      1.11     itohy #endif
    121      1.11     itohy 
    122      1.11     itohy #ifndef YM_VOL_DAC
    123      1.11     itohy #define YM_VOL_DAC		224
    124      1.11     itohy #endif
    125      1.11     itohy 
    126      1.11     itohy #ifndef YM_VOL_OPL3
    127      1.11     itohy #define YM_VOL_OPL3		184
    128      1.11     itohy #endif
    129      1.11     itohy 
    130      1.16     itohy /*
    131  1.17.2.3   nathanw  * Default position of the equalizer.
    132      1.16     itohy  */
    133  1.17.2.3   nathanw #ifndef YM_DEFAULT_TREBLE
    134  1.17.2.3   nathanw #define YM_DEFAULT_TREBLE	YM_EQ_FLAT_OFFSET
    135      1.16     itohy #endif
    136  1.17.2.3   nathanw #ifndef YM_DEFAULT_BASS
    137  1.17.2.3   nathanw #define YM_DEFAULT_BASS		YM_EQ_FLAT_OFFSET
    138      1.15  augustss #endif
    139      1.15  augustss 
    140      1.10     itohy #ifdef __i386__		/* XXX */
    141      1.10     itohy # include "joy.h"
    142      1.10     itohy #else
    143      1.10     itohy # define NJOY	0
    144      1.10     itohy #endif
    145      1.10     itohy 
    146      1.10     itohy #ifdef AUDIO_DEBUG
    147      1.10     itohy #define DPRINTF(x)	if (ymdebug) printf x
    148      1.10     itohy int	ymdebug = 0;
    149      1.10     itohy #else
    150      1.10     itohy #define DPRINTF(x)
    151      1.10     itohy #endif
    152      1.10     itohy #define DVNAME(softc)	((softc)->sc_ad1848.sc_ad1848.sc_dev.dv_xname)
    153       1.1  augustss 
    154       1.1  augustss int	ym_getdev __P((void *, struct audio_device *));
    155       1.1  augustss int	ym_mixer_set_port __P((void *, mixer_ctrl_t *));
    156       1.1  augustss int	ym_mixer_get_port __P((void *, mixer_ctrl_t *));
    157       1.1  augustss int	ym_query_devinfo __P((void *, mixer_devinfo_t *));
    158      1.10     itohy int	ym_intr __P((void *));
    159      1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    160      1.10     itohy static void ym_save_codec_regs __P((struct ym_softc *));
    161      1.10     itohy static void ym_restore_codec_regs __P((struct ym_softc *));
    162      1.10     itohy void	ym_power_hook __P((int, void *));
    163      1.10     itohy int	ym_codec_power_ctl __P((void *, int));
    164      1.10     itohy static void ym_chip_powerdown __P((struct ym_softc *));
    165      1.10     itohy static void ym_chip_powerup __P((struct ym_softc *, int));
    166      1.10     itohy void ym_powerdown_blocks __P((void *));
    167      1.10     itohy void ym_power_ctl __P((struct ym_softc *, int, int));
    168      1.10     itohy #endif
    169       1.1  augustss 
    170      1.10     itohy static void ym_init __P((struct ym_softc *));
    171       1.1  augustss static void ym_mute __P((struct ym_softc *, int, int));
    172       1.2  augustss static void ym_set_master_gain __P((struct ym_softc *, struct ad1848_volume*));
    173  1.17.2.4   nathanw static void ym_hvol_to_master_gain __P((struct ym_softc *));
    174      1.10     itohy static void ym_set_mic_gain __P((struct ym_softc *, int));
    175      1.10     itohy static void ym_set_3d __P((struct ym_softc *, mixer_ctrl_t *,
    176      1.10     itohy 	struct ad1848_volume *, int));
    177       1.1  augustss 
    178       1.1  augustss 
    179       1.1  augustss struct audio_hw_if ym_hw_if = {
    180       1.5        pk 	ad1848_isa_open,
    181       1.5        pk 	ad1848_isa_close,
    182       1.1  augustss 	NULL,
    183       1.1  augustss 	ad1848_query_encoding,
    184       1.1  augustss 	ad1848_set_params,
    185       1.8   mycroft 	ad1848_round_blocksize,
    186       1.1  augustss 	ad1848_commit_settings,
    187       1.8   mycroft 	NULL,
    188       1.8   mycroft 	NULL,
    189       1.8   mycroft 	NULL,
    190       1.8   mycroft 	NULL,
    191       1.9   mycroft 	ad1848_isa_halt_output,
    192       1.9   mycroft 	ad1848_isa_halt_input,
    193       1.1  augustss 	NULL,
    194       1.1  augustss 	ym_getdev,
    195       1.1  augustss 	NULL,
    196       1.1  augustss 	ym_mixer_set_port,
    197       1.1  augustss 	ym_mixer_get_port,
    198       1.1  augustss 	ym_query_devinfo,
    199       1.5        pk 	ad1848_isa_malloc,
    200       1.5        pk 	ad1848_isa_free,
    201       1.7   mycroft 	ad1848_isa_round_buffersize,
    202       1.5        pk 	ad1848_isa_mappage,
    203       1.5        pk 	ad1848_isa_get_props,
    204       1.8   mycroft 	ad1848_isa_trigger_output,
    205       1.8   mycroft 	ad1848_isa_trigger_input,
    206  1.17.2.1   nathanw 	NULL,
    207       1.1  augustss };
    208       1.1  augustss 
    209       1.1  augustss static __inline int ym_read __P((struct ym_softc *, int));
    210       1.1  augustss static __inline void ym_write __P((struct ym_softc *, int, int));
    211       1.1  augustss 
    212       1.1  augustss void
    213       1.1  augustss ym_attach(sc)
    214       1.2  augustss 	struct ym_softc *sc;
    215       1.1  augustss {
    216       1.5        pk 	struct ad1848_softc *ac = &sc->sc_ad1848.sc_ad1848;
    217      1.11     itohy 	static struct ad1848_volume vol_master = {YM_VOL_MASTER, YM_VOL_MASTER};
    218      1.11     itohy 	static struct ad1848_volume vol_dac    = {YM_VOL_DAC,    YM_VOL_DAC};
    219      1.11     itohy 	static struct ad1848_volume vol_opl3   = {YM_VOL_OPL3,   YM_VOL_OPL3};
    220      1.15  augustss 	mixer_ctrl_t mctl;
    221      1.10     itohy 	struct audio_attach_args arg;
    222      1.10     itohy 
    223      1.14   thorpej 	callout_init(&sc->sc_powerdown_ch);
    224      1.14   thorpej 
    225      1.11     itohy 	/* Mute the output to reduce noise during initialization. */
    226      1.11     itohy 	ym_mute(sc, SA3_VOL_L, 1);
    227      1.11     itohy 	ym_mute(sc, SA3_VOL_R, 1);
    228      1.11     itohy 
    229  1.17.2.4   nathanw 	sc->sc_version = ym_read(sc, SA3_MISC) & SA3_MISC_VER;
    230  1.17.2.4   nathanw 	ac->chip_name = YM_IS_SA3(sc) ? "OPL3-SA3" : "OPL3-SA2";
    231  1.17.2.4   nathanw 
    232       1.5        pk 	sc->sc_ad1848.sc_ih = isa_intr_establish(sc->sc_ic, sc->ym_irq,
    233      1.10     itohy 						 IST_EDGE, IPL_AUDIO,
    234      1.10     itohy 						 ym_intr, sc);
    235       1.1  augustss 
    236      1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    237      1.10     itohy 	sc->sc_ad1848.powerctl = ym_codec_power_ctl;
    238      1.10     itohy 	sc->sc_ad1848.powerarg = sc;
    239      1.10     itohy #endif
    240       1.6  augustss 	ad1848_isa_attach(&sc->sc_ad1848);
    241       1.2  augustss 	printf("\n");
    242       1.5        pk 	ac->parent = sc;
    243       1.2  augustss 
    244       1.2  augustss 	/* Establish chip in well known mode */
    245      1.11     itohy 	ym_set_master_gain(sc, &vol_master);
    246      1.10     itohy 	ym_set_mic_gain(sc, 0);
    247       1.2  augustss 	sc->master_mute = 0;
    248      1.10     itohy 
    249      1.11     itohy 	/* Override ad1848 settings. */
    250      1.11     itohy 	ad1848_set_channel_gain(ac, AD1848_DAC_CHANNEL, &vol_dac);
    251      1.11     itohy 	ad1848_set_channel_gain(ac, AD1848_AUX2_CHANNEL, &vol_opl3);
    252      1.15  augustss 
    253      1.13     itohy 	/*
    254      1.13     itohy 	 * Mute all external sources.  If you change this, you must
    255      1.13     itohy 	 * also change the initial value of sc->sc_external_sources
    256      1.13     itohy 	 * (currently 0 --- no external source is active).
    257      1.13     itohy 	 */
    258  1.17.2.3   nathanw 	sc->mic_mute = 1;
    259  1.17.2.3   nathanw 	ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
    260      1.13     itohy 	ad1848_mute_channel(ac, AD1848_AUX1_CHANNEL, MUTE_ALL);	/* CD */
    261      1.13     itohy 	ad1848_mute_channel(ac, AD1848_LINE_CHANNEL, MUTE_ALL);	/* line */
    262      1.13     itohy 	ac->mute[AD1848_AUX1_CHANNEL] = MUTE_ALL;
    263      1.13     itohy 	ac->mute[AD1848_LINE_CHANNEL] = MUTE_ALL;
    264      1.13     itohy 	/* speaker is muted by default */
    265      1.13     itohy 
    266      1.10     itohy 	/* We use only one IRQ (IRQ-A). */
    267      1.10     itohy 	ym_write(sc, SA3_IRQ_CONF, SA3_IRQ_CONF_MPU_A | SA3_IRQ_CONF_WSS_A);
    268      1.10     itohy 	ym_write(sc, SA3_HVOL_INTR_CNF, SA3_HVOL_INTR_CNF_A);
    269      1.10     itohy 
    270      1.10     itohy 	/* audio at ym attachment */
    271      1.10     itohy 	sc->sc_audiodev = audio_attach_mi(&ym_hw_if, ac, &ac->sc_dev);
    272      1.10     itohy 
    273      1.10     itohy 	/* opl at ym attachment */
    274      1.10     itohy 	if (sc->sc_opl_ioh) {
    275      1.10     itohy 		arg.type = AUDIODEV_TYPE_OPL;
    276      1.10     itohy 		arg.hwif = 0;
    277      1.10     itohy 		arg.hdl = 0;
    278      1.10     itohy 		(void)config_found(&ac->sc_dev, &arg, audioprint);
    279      1.10     itohy 	}
    280      1.10     itohy 
    281      1.10     itohy #if NMPU_YM > 0
    282      1.10     itohy 	/* mpu at ym attachment */
    283      1.10     itohy 	if (sc->sc_mpu_ioh) {
    284      1.10     itohy 		arg.type = AUDIODEV_TYPE_MPU;
    285      1.10     itohy 		arg.hwif = 0;
    286      1.10     itohy 		arg.hdl = 0;
    287      1.10     itohy 		sc->sc_mpudev = config_found(&ac->sc_dev, &arg, audioprint);
    288      1.10     itohy 	}
    289      1.10     itohy #endif
    290      1.10     itohy 
    291      1.10     itohy 	/* This must be AFTER the attachment of sub-devices. */
    292      1.10     itohy 	ym_init(sc);
    293      1.10     itohy 
    294      1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    295      1.10     itohy 	/*
    296      1.10     itohy 	 * Initialize power control.
    297      1.10     itohy 	 */
    298      1.10     itohy 	sc->sc_pow_mode = YM_POWER_MODE;
    299      1.10     itohy 	sc->sc_pow_timeout = YM_POWER_OFF_SEC;
    300      1.10     itohy 
    301      1.10     itohy 	sc->sc_on_blocks = sc->sc_turning_off =
    302      1.10     itohy 		YM_POWER_CODEC_P | YM_POWER_CODEC_R |
    303      1.11     itohy 		YM_POWER_OPL3 | YM_POWER_MPU401 | YM_POWER_3D |
    304      1.10     itohy 		YM_POWER_CODEC_DA | YM_POWER_CODEC_AD | YM_POWER_OPL3_DA;
    305      1.10     itohy #if NJOY > 0
    306      1.11     itohy 	sc->sc_on_blocks |= YM_POWER_JOYSTICK;	/* prevents chip powerdown */
    307      1.10     itohy #endif
    308      1.10     itohy 	ym_powerdown_blocks(sc);
    309       1.1  augustss 
    310      1.10     itohy 	powerhook_establish(ym_power_hook, sc);
    311      1.10     itohy #endif
    312      1.16     itohy 
    313      1.16     itohy 	/* Set tone control to the default position. */
    314      1.16     itohy 	mctl.un.value.num_channels = 1;
    315  1.17.2.3   nathanw 	mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_TREBLE;
    316      1.16     itohy 	mctl.dev = YM_MASTER_TREBLE;
    317      1.16     itohy 	ym_mixer_set_port(sc, &mctl);
    318  1.17.2.3   nathanw 	mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_BASS;
    319      1.16     itohy 	mctl.dev = YM_MASTER_BASS;
    320      1.16     itohy 	ym_mixer_set_port(sc, &mctl);
    321  1.17.2.3   nathanw 
    322  1.17.2.3   nathanw 	/* Unmute the output now if the chip is on. */
    323  1.17.2.3   nathanw #ifndef AUDIO_NO_POWER_CTL
    324  1.17.2.3   nathanw 	if (sc->sc_on_blocks & YM_POWER_ACTIVE)
    325      1.16     itohy #endif
    326  1.17.2.3   nathanw 	{
    327  1.17.2.3   nathanw 		ym_mute(sc, SA3_VOL_L, sc->master_mute);
    328  1.17.2.3   nathanw 		ym_mute(sc, SA3_VOL_R, sc->master_mute);
    329  1.17.2.3   nathanw 	}
    330       1.1  augustss }
    331       1.1  augustss 
    332       1.1  augustss static __inline int
    333       1.1  augustss ym_read(sc, reg)
    334       1.2  augustss 	struct ym_softc *sc;
    335       1.2  augustss 	int reg;
    336       1.1  augustss {
    337      1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
    338      1.10     itohy 				SA3_CTL_INDEX, (reg & 0xff));
    339      1.10     itohy 	return (bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_DATA));
    340       1.1  augustss }
    341       1.1  augustss 
    342       1.1  augustss static __inline void
    343       1.1  augustss ym_write(sc, reg, data)
    344       1.2  augustss 	struct ym_softc *sc;
    345       1.2  augustss 	int reg;
    346       1.2  augustss 	int data;
    347       1.1  augustss {
    348      1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
    349      1.10     itohy 				SA3_CTL_INDEX, (reg & 0xff));
    350      1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
    351      1.10     itohy 				SA3_CTL_DATA, (data & 0xff));
    352       1.1  augustss }
    353       1.1  augustss 
    354      1.10     itohy static void
    355      1.10     itohy ym_init(sc)
    356      1.10     itohy 	struct ym_softc *sc;
    357      1.10     itohy {
    358      1.10     itohy 	u_int8_t dpd, apd;
    359      1.10     itohy 
    360      1.10     itohy 	/* Mute SoundBlaster output if possible. */
    361      1.10     itohy 	if (sc->sc_sb_ioh) {
    362      1.10     itohy 		bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_ADDR,
    363      1.10     itohy 				  SBP_MASTER_VOL);
    364      1.10     itohy 		bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_DATA,
    365      1.10     itohy 				  0x00);
    366      1.10     itohy 	}
    367      1.10     itohy 
    368  1.17.2.4   nathanw 	if (!YM_IS_SA3(sc)) {
    369  1.17.2.4   nathanw 		/* OPL3-SA2 */
    370  1.17.2.4   nathanw 		ym_write(sc, SA3_PWR_MNG, SA2_PWR_MNG_CLKO |
    371  1.17.2.4   nathanw 		    (sc->sc_opl_ioh == 0 ? SA2_PWR_MNG_FMPS : 0));
    372  1.17.2.4   nathanw 		return;
    373  1.17.2.4   nathanw 	}
    374  1.17.2.4   nathanw 
    375  1.17.2.4   nathanw 	/* OPL3-SA3 */
    376      1.10     itohy 	/* Figure out which part can be power down. */
    377      1.10     itohy 	dpd = SA3_DPWRDWN_SB		/* we never use SB */
    378      1.10     itohy #if NMPU_YM > 0
    379      1.10     itohy 		| (sc->sc_mpu_ioh ? 0 : SA3_DPWRDWN_MPU)
    380      1.10     itohy #else
    381      1.10     itohy 		| SA3_DPWRDWN_MPU
    382      1.10     itohy #endif
    383      1.10     itohy #if NJOY == 0
    384      1.10     itohy 		| SA3_DPWRDWN_JOY
    385      1.10     itohy #endif
    386      1.10     itohy 		| SA3_DPWRDWN_PNP	/* ISA Plug and Play is done */
    387      1.10     itohy 		/*
    388      1.10     itohy 		 * The master clock is for external wavetable synthesizer
    389      1.10     itohy 		 * OPL4-ML (YMF704) or OPL4-ML2 (YMF721),
    390      1.10     itohy 		 * and is currently unused.
    391      1.10     itohy 		 */
    392      1.10     itohy 		| SA3_DPWRDWN_MCLKO;
    393      1.10     itohy 
    394      1.10     itohy 	apd = SA3_APWRDWN_SBDAC;	/* we never use SB */
    395      1.10     itohy 
    396      1.10     itohy 	/* Power down OPL3 if not attached. */
    397      1.10     itohy 	if (sc->sc_opl_ioh == 0) {
    398      1.10     itohy 		dpd |= SA3_DPWRDWN_FM;
    399      1.10     itohy 		apd |= SA3_APWRDWN_FMDAC;
    400      1.10     itohy 	}
    401      1.10     itohy 	/* CODEC is always attached. */
    402      1.10     itohy 
    403      1.10     itohy 	/* Power down unused digital parts. */
    404      1.10     itohy 	ym_write(sc, SA3_DPWRDWN, dpd);
    405      1.10     itohy 
    406      1.10     itohy 	/* Power down unused analog parts. */
    407      1.10     itohy 	ym_write(sc, SA3_APWRDWN, apd);
    408      1.10     itohy }
    409       1.1  augustss 
    410       1.1  augustss 
    411       1.1  augustss int
    412       1.1  augustss ym_getdev(addr, retp)
    413       1.2  augustss 	void *addr;
    414       1.2  augustss 	struct audio_device *retp;
    415       1.1  augustss {
    416      1.10     itohy 	struct ym_softc *sc = addr;
    417  1.17.2.4   nathanw 	struct ad1848_softc *ac = &sc->sc_ad1848.sc_ad1848;
    418      1.10     itohy 
    419  1.17.2.4   nathanw 	strcpy(retp->name, ac->chip_name);
    420      1.10     itohy 	sprintf(retp->version, "%d", sc->sc_version);
    421      1.10     itohy 	strcpy(retp->config, "ym");
    422      1.10     itohy 
    423       1.2  augustss 	return 0;
    424       1.1  augustss }
    425       1.1  augustss 
    426       1.1  augustss 
    427       1.1  augustss static ad1848_devmap_t mappings[] = {
    428      1.10     itohy 	{ YM_DAC_LVL, AD1848_KIND_LVL, AD1848_DAC_CHANNEL },
    429       1.2  augustss 	{ YM_MIDI_LVL, AD1848_KIND_LVL, AD1848_AUX2_CHANNEL },
    430       1.2  augustss 	{ YM_CD_LVL, AD1848_KIND_LVL, AD1848_AUX1_CHANNEL },
    431       1.2  augustss 	{ YM_LINE_LVL, AD1848_KIND_LVL, AD1848_LINE_CHANNEL },
    432       1.2  augustss 	{ YM_SPEAKER_LVL, AD1848_KIND_LVL, AD1848_MONO_CHANNEL },
    433       1.2  augustss 	{ YM_MONITOR_LVL, AD1848_KIND_LVL, AD1848_MONITOR_CHANNEL },
    434      1.10     itohy 	{ YM_DAC_MUTE, AD1848_KIND_MUTE, AD1848_DAC_CHANNEL },
    435       1.2  augustss 	{ YM_MIDI_MUTE, AD1848_KIND_MUTE, AD1848_AUX2_CHANNEL },
    436       1.2  augustss 	{ YM_CD_MUTE, AD1848_KIND_MUTE, AD1848_AUX1_CHANNEL },
    437       1.2  augustss 	{ YM_LINE_MUTE, AD1848_KIND_MUTE, AD1848_LINE_CHANNEL },
    438       1.2  augustss 	{ YM_SPEAKER_MUTE, AD1848_KIND_MUTE, AD1848_MONO_CHANNEL },
    439       1.2  augustss 	{ YM_MONITOR_MUTE, AD1848_KIND_MUTE, AD1848_MONITOR_CHANNEL },
    440       1.2  augustss 	{ YM_REC_LVL, AD1848_KIND_RECORDGAIN, -1 },
    441       1.2  augustss 	{ YM_RECORD_SOURCE, AD1848_KIND_RECORDSOURCE, -1}
    442       1.1  augustss };
    443       1.1  augustss 
    444      1.10     itohy #define NUMMAP	(sizeof(mappings) / sizeof(mappings[0]))
    445       1.1  augustss 
    446       1.1  augustss 
    447       1.1  augustss static void
    448       1.1  augustss ym_mute(sc, left_reg, mute)
    449       1.2  augustss 	struct ym_softc *sc;
    450       1.2  augustss 	int left_reg;
    451       1.2  augustss 	int mute;
    452       1.1  augustss {
    453      1.10     itohy 	u_int8_t reg;
    454       1.1  augustss 
    455      1.10     itohy 	reg = ym_read(sc, left_reg);
    456      1.10     itohy 	if (mute)
    457      1.10     itohy 		ym_write(sc, left_reg, reg | 0x80);
    458      1.10     itohy 	else
    459      1.10     itohy 		ym_write(sc, left_reg, reg & ~0x80);
    460       1.1  augustss }
    461       1.1  augustss 
    462       1.1  augustss 
    463       1.1  augustss static void
    464       1.1  augustss ym_set_master_gain(sc, vol)
    465       1.2  augustss 	struct ym_softc *sc;
    466       1.2  augustss 	struct ad1848_volume *vol;
    467       1.1  augustss {
    468  1.17.2.4   nathanw 	u_int atten;
    469      1.10     itohy 
    470       1.2  augustss 	sc->master_gain = *vol;
    471      1.10     itohy 
    472      1.10     itohy 	atten = ((AUDIO_MAX_GAIN - vol->left) * (SA3_VOL_MV + 1)) /
    473      1.10     itohy 		(AUDIO_MAX_GAIN + 1);
    474      1.10     itohy 
    475      1.10     itohy 	ym_write(sc, SA3_VOL_L, (ym_read(sc, SA3_VOL_L) & ~SA3_VOL_MV) | atten);
    476      1.10     itohy 
    477      1.10     itohy 	atten = ((AUDIO_MAX_GAIN - vol->right) * (SA3_VOL_MV + 1)) /
    478      1.10     itohy 		(AUDIO_MAX_GAIN + 1);
    479      1.10     itohy 
    480      1.10     itohy 	ym_write(sc, SA3_VOL_R, (ym_read(sc, SA3_VOL_R) & ~SA3_VOL_MV) | atten);
    481       1.1  augustss }
    482       1.1  augustss 
    483  1.17.2.4   nathanw /*
    484  1.17.2.4   nathanw  * Read current setting of master volume from hardware
    485  1.17.2.4   nathanw  * and update the software value if changed.
    486  1.17.2.4   nathanw  * [SA3] This function clears hardware volume interrupt.
    487  1.17.2.4   nathanw  */
    488  1.17.2.4   nathanw static void
    489  1.17.2.4   nathanw ym_hvol_to_master_gain(sc)
    490  1.17.2.4   nathanw 	struct ym_softc *sc;
    491  1.17.2.4   nathanw {
    492  1.17.2.4   nathanw 	u_int prevval, val;
    493  1.17.2.4   nathanw 	int changed = 0;
    494  1.17.2.4   nathanw 
    495  1.17.2.4   nathanw 	val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_L);
    496  1.17.2.4   nathanw 	prevval = (sc->master_gain.left * (SA3_VOL_MV + 1)) /
    497  1.17.2.4   nathanw 	    (AUDIO_MAX_GAIN + 1);
    498  1.17.2.4   nathanw 	if (val != prevval) {
    499  1.17.2.4   nathanw 		sc->master_gain.left =
    500  1.17.2.4   nathanw 		    val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
    501  1.17.2.4   nathanw 		changed = 1;
    502  1.17.2.4   nathanw 	}
    503  1.17.2.4   nathanw 
    504  1.17.2.4   nathanw 	val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_R);
    505  1.17.2.4   nathanw 	prevval = (sc->master_gain.right * (SA3_VOL_MV + 1)) /
    506  1.17.2.4   nathanw 	    (AUDIO_MAX_GAIN + 1);
    507  1.17.2.4   nathanw 	if (val != prevval) {
    508  1.17.2.4   nathanw 		sc->master_gain.right =
    509  1.17.2.4   nathanw 		    val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
    510  1.17.2.4   nathanw 		changed = 1;
    511  1.17.2.4   nathanw 	}
    512  1.17.2.4   nathanw 
    513  1.17.2.4   nathanw #if 0	/* XXX NOT YET */
    514  1.17.2.4   nathanw 	/* Notify the change to async processes. */
    515  1.17.2.4   nathanw 	if (changed && sc->sc_audiodev)
    516  1.17.2.4   nathanw 		mixer_signal(sc->sc_audiodev);
    517  1.17.2.4   nathanw #endif
    518  1.17.2.4   nathanw }
    519  1.17.2.4   nathanw 
    520       1.1  augustss static void
    521       1.1  augustss ym_set_mic_gain(sc, vol)
    522       1.2  augustss 	struct ym_softc *sc;
    523      1.10     itohy 	int vol;
    524       1.1  augustss {
    525      1.10     itohy 	u_int atten;
    526      1.10     itohy 
    527      1.10     itohy 	sc->mic_gain = vol;
    528      1.10     itohy 
    529      1.10     itohy 	atten = ((AUDIO_MAX_GAIN - vol) * (SA3_MIC_MCV + 1)) /
    530      1.10     itohy 		(AUDIO_MAX_GAIN + 1);
    531      1.10     itohy 
    532      1.10     itohy 	ym_write(sc, SA3_MIC_VOL,
    533      1.10     itohy 		 (ym_read(sc, SA3_MIC_VOL) & ~SA3_MIC_MCV) | atten);
    534      1.10     itohy }
    535       1.1  augustss 
    536      1.10     itohy static void
    537      1.10     itohy ym_set_3d(sc, cp, val, reg)
    538      1.10     itohy 	struct ym_softc *sc;
    539      1.10     itohy 	mixer_ctrl_t *cp;
    540      1.10     itohy 	struct ad1848_volume *val;
    541      1.10     itohy 	int reg;
    542      1.10     itohy {
    543  1.17.2.3   nathanw 	u_int8_t l, r, e;
    544       1.1  augustss 
    545      1.10     itohy 	ad1848_to_vol(cp, val);
    546       1.1  augustss 
    547  1.17.2.3   nathanw 	l = val->left;
    548  1.17.2.3   nathanw 	r = val->right;
    549  1.17.2.3   nathanw 	if (reg != SA3_3D_WIDE) {
    550  1.17.2.3   nathanw 		/* flat on center */
    551  1.17.2.3   nathanw 		l = YM_EQ_EXPAND_VALUE(l);
    552  1.17.2.3   nathanw 		r = YM_EQ_EXPAND_VALUE(r);
    553  1.17.2.3   nathanw 	}
    554  1.17.2.3   nathanw 
    555  1.17.2.3   nathanw 	e = (l * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
    556      1.10     itohy 		(AUDIO_MAX_GAIN + 1) << SA3_3D_LSHIFT |
    557  1.17.2.3   nathanw 	    (r * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
    558      1.10     itohy 		(AUDIO_MAX_GAIN + 1) << SA3_3D_RSHIFT;
    559      1.10     itohy 
    560      1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    561      1.10     itohy 	/* turn wide stereo on if necessary */
    562      1.10     itohy 	if (e)
    563      1.10     itohy 		ym_power_ctl(sc, YM_POWER_3D, 1);
    564      1.10     itohy #endif
    565      1.10     itohy 
    566      1.10     itohy 	ym_write(sc, reg, e);
    567      1.10     itohy 
    568      1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    569      1.10     itohy 	/* turn wide stereo off if necessary */
    570      1.10     itohy 	if (YM_EQ_OFF(&sc->sc_treble) && YM_EQ_OFF(&sc->sc_bass) &&
    571  1.17.2.3   nathanw 	    YM_WIDE_OFF(&sc->sc_wide))
    572      1.10     itohy 		ym_power_ctl(sc, YM_POWER_3D, 0);
    573      1.10     itohy #endif
    574       1.1  augustss }
    575       1.1  augustss 
    576       1.1  augustss int
    577       1.1  augustss ym_mixer_set_port(addr, cp)
    578       1.2  augustss 	void *addr;
    579       1.2  augustss 	mixer_ctrl_t *cp;
    580       1.1  augustss {
    581       1.2  augustss 	struct ad1848_softc *ac = addr;
    582       1.2  augustss 	struct ym_softc *sc = ac->parent;
    583       1.2  augustss 	struct ad1848_volume vol;
    584      1.10     itohy 	int error = 0;
    585      1.13     itohy 	u_int8_t extsources;
    586       1.1  augustss 
    587      1.10     itohy 	DPRINTF(("%s: ym_mixer_set_port: dev 0x%x, type 0x%x, 0x%x (%d; %d, %d)\n",
    588      1.10     itohy 		DVNAME(sc), cp->dev, cp->type, cp->un.ord,
    589      1.10     itohy 		cp->un.value.num_channels, cp->un.value.level[0],
    590      1.10     itohy 		cp->un.value.level[1]));
    591      1.10     itohy 
    592  1.17.2.4   nathanw 	/* SA2 doesn't have equalizer */
    593  1.17.2.4   nathanw 	if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
    594  1.17.2.4   nathanw 		return ENXIO;
    595  1.17.2.4   nathanw 
    596      1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    597      1.10     itohy 	/* Power-up chip */
    598      1.10     itohy 	ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
    599      1.10     itohy #endif
    600       1.1  augustss 
    601       1.2  augustss 	switch (cp->dev) {
    602       1.2  augustss 	case YM_OUTPUT_LVL:
    603       1.2  augustss 		ad1848_to_vol(cp, &vol);
    604       1.2  augustss 		ym_set_master_gain(sc, &vol);
    605      1.10     itohy 		goto out;
    606       1.2  augustss 
    607       1.2  augustss 	case YM_OUTPUT_MUTE:
    608       1.2  augustss 		sc->master_mute = (cp->un.ord != 0);
    609      1.10     itohy 		ym_mute(sc, SA3_VOL_L, sc->master_mute);
    610      1.10     itohy 		ym_mute(sc, SA3_VOL_R, sc->master_mute);
    611      1.10     itohy 		goto out;
    612       1.2  augustss 
    613       1.2  augustss 	case YM_MIC_LVL:
    614       1.2  augustss 		if (cp->un.value.num_channels != 1)
    615       1.2  augustss 			error = EINVAL;
    616      1.10     itohy 		else
    617      1.10     itohy 			ym_set_mic_gain(sc,
    618      1.10     itohy 				cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
    619      1.10     itohy 		goto out;
    620      1.10     itohy 
    621      1.10     itohy 	case YM_MASTER_EQMODE:
    622      1.10     itohy 		sc->sc_eqmode = cp->un.ord & SA3_SYS_CTL_YMODE;
    623      1.10     itohy 		ym_write(sc, SA3_SYS_CTL, (ym_read(sc, SA3_SYS_CTL) &
    624      1.10     itohy 					   ~SA3_SYS_CTL_YMODE) | sc->sc_eqmode);
    625      1.10     itohy 		goto out;
    626      1.10     itohy 
    627      1.10     itohy 	case YM_MASTER_TREBLE:
    628      1.10     itohy 		ym_set_3d(sc, cp, &sc->sc_treble, SA3_3D_TREBLE);
    629      1.10     itohy 		goto out;
    630      1.10     itohy 
    631      1.10     itohy 	case YM_MASTER_BASS:
    632      1.10     itohy 		ym_set_3d(sc, cp, &sc->sc_bass, SA3_3D_BASS);
    633      1.10     itohy 		goto out;
    634      1.10     itohy 
    635      1.10     itohy 	case YM_MASTER_WIDE:
    636      1.10     itohy 		ym_set_3d(sc, cp, &sc->sc_wide, SA3_3D_WIDE);
    637      1.10     itohy 		goto out;
    638      1.10     itohy 
    639      1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    640      1.10     itohy 	case YM_PWR_MODE:
    641      1.10     itohy 		if ((unsigned) cp->un.ord > YM_POWER_NOSAVE)
    642      1.10     itohy 			error = EINVAL;
    643      1.10     itohy 		else
    644      1.10     itohy 			sc->sc_pow_mode = cp->un.ord;
    645      1.10     itohy 		goto out;
    646      1.10     itohy 
    647      1.10     itohy 	case YM_PWR_TIMEOUT:
    648      1.10     itohy 		if (cp->un.value.num_channels != 1)
    649      1.10     itohy 			error = EINVAL;
    650      1.10     itohy 		else
    651      1.10     itohy 			sc->sc_pow_timeout =
    652      1.10     itohy 				cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
    653      1.10     itohy 		goto out;
    654      1.10     itohy 
    655      1.10     itohy 	/*
    656      1.13     itohy 	 * Needs power-up to hear external sources.
    657      1.13     itohy 	 */
    658      1.13     itohy 	case YM_CD_MUTE:
    659      1.13     itohy 	case YM_LINE_MUTE:
    660      1.13     itohy 	case YM_SPEAKER_MUTE:
    661  1.17.2.3   nathanw 	case YM_MIC_MUTE:
    662      1.13     itohy 		extsources = YM_MIXER_TO_XS(cp->dev);
    663      1.13     itohy 		if (cp->un.ord) {
    664      1.13     itohy 			if ((sc->sc_external_sources &= ~extsources) == 0) {
    665      1.13     itohy 				/*
    666      1.13     itohy 				 * All the external sources are muted
    667      1.13     itohy 				 *  --- no need to keep the chip on.
    668      1.13     itohy 				 */
    669      1.13     itohy 				ym_power_ctl(sc, YM_POWER_EXT_SRC, 0);
    670      1.13     itohy 				DPRINTF(("%s: ym_mixer_set_port: off for ext\n",
    671      1.13     itohy 					DVNAME(sc)));
    672      1.13     itohy 			}
    673      1.13     itohy 		} else {
    674      1.13     itohy 			/* mute off - power-up the chip */
    675      1.13     itohy 			sc->sc_external_sources |= extsources;
    676      1.13     itohy 			ym_power_ctl(sc, YM_POWER_EXT_SRC, 1);
    677      1.13     itohy 			DPRINTF(("%s: ym_mixer_set_port: on for ext\n",
    678      1.13     itohy 				DVNAME(sc)));
    679      1.13     itohy 		}
    680      1.13     itohy 		break;	/* fall to ad1848_mixer_set_port() */
    681      1.13     itohy 
    682      1.13     itohy 	/*
    683      1.10     itohy 	 * Power on/off the playback part for monitoring.
    684      1.10     itohy 	 */
    685      1.10     itohy 	case YM_MONITOR_MUTE:
    686      1.10     itohy 		if ((ac->open_mode & (FREAD | FWRITE)) == FREAD)
    687      1.10     itohy 			ym_power_ctl(sc, YM_POWER_CODEC_P | YM_POWER_CODEC_DA,
    688      1.10     itohy 					cp->un.ord == 0);
    689      1.10     itohy 		break;	/* fall to ad1848_mixer_set_port() */
    690      1.10     itohy #endif
    691      1.10     itohy 	}
    692      1.10     itohy 
    693      1.10     itohy 	error = ad1848_mixer_set_port(ac, mappings, NUMMAP, cp);
    694      1.10     itohy 
    695      1.10     itohy 	if (error != ENXIO)
    696      1.10     itohy 		goto out;
    697      1.10     itohy 
    698      1.10     itohy 	error = 0;
    699       1.2  augustss 
    700      1.10     itohy 	switch (cp->dev) {
    701       1.2  augustss 	case YM_MIC_MUTE:
    702       1.2  augustss 		sc->mic_mute = (cp->un.ord != 0);
    703      1.10     itohy 		ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
    704       1.2  augustss 		break;
    705       1.2  augustss 
    706       1.2  augustss 	default:
    707      1.10     itohy 		error = ENXIO;
    708      1.10     itohy 		break;
    709       1.2  augustss 	}
    710      1.10     itohy 
    711      1.10     itohy out:
    712      1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    713      1.10     itohy 	/* Power-down chip */
    714      1.10     itohy 	ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
    715      1.10     itohy #endif
    716      1.10     itohy 
    717       1.2  augustss 	return (error);
    718       1.1  augustss }
    719       1.1  augustss 
    720       1.1  augustss int
    721       1.1  augustss ym_mixer_get_port(addr, cp)
    722       1.2  augustss 	void *addr;
    723       1.2  augustss 	mixer_ctrl_t *cp;
    724       1.1  augustss {
    725       1.2  augustss 	struct ad1848_softc *ac = addr;
    726       1.2  augustss 	struct ym_softc *sc = ac->parent;
    727      1.10     itohy 	int error;
    728       1.1  augustss 
    729  1.17.2.4   nathanw 	/* SA2 doesn't have equalizer */
    730  1.17.2.4   nathanw 	if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
    731  1.17.2.4   nathanw 		return ENXIO;
    732  1.17.2.4   nathanw 
    733       1.2  augustss 	switch (cp->dev) {
    734       1.2  augustss 	case YM_OUTPUT_LVL:
    735  1.17.2.4   nathanw 		if (!YM_IS_SA3(sc)) {
    736  1.17.2.4   nathanw 			/*
    737  1.17.2.4   nathanw 			 * SA2 doesn't have hardware volume interrupt.
    738  1.17.2.4   nathanw 			 * Read current value and update every time.
    739  1.17.2.4   nathanw 			 */
    740  1.17.2.4   nathanw #ifndef AUDIO_NO_POWER_CTL
    741  1.17.2.4   nathanw 			/* Power-up chip */
    742  1.17.2.4   nathanw 			ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
    743  1.17.2.4   nathanw #endif
    744  1.17.2.4   nathanw 			ym_hvol_to_master_gain(sc);
    745  1.17.2.4   nathanw #ifndef AUDIO_NO_POWER_CTL
    746  1.17.2.4   nathanw 			/* Power-down chip */
    747  1.17.2.4   nathanw 			ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
    748  1.17.2.4   nathanw #endif
    749  1.17.2.4   nathanw 		}
    750       1.2  augustss 		ad1848_from_vol(cp, &sc->master_gain);
    751      1.10     itohy 		return 0;
    752      1.10     itohy 
    753       1.2  augustss 	case YM_OUTPUT_MUTE:
    754       1.2  augustss 		cp->un.ord = sc->master_mute;
    755      1.10     itohy 		return 0;
    756      1.10     itohy 
    757       1.2  augustss 	case YM_MIC_LVL:
    758       1.2  augustss 		if (cp->un.value.num_channels != 1)
    759      1.10     itohy 			return EINVAL;
    760      1.10     itohy 		cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->mic_gain;
    761      1.10     itohy 		return 0;
    762      1.10     itohy 
    763      1.10     itohy 	case YM_MASTER_EQMODE:
    764      1.10     itohy 		cp->un.ord = sc->sc_eqmode;
    765      1.10     itohy 		return 0;
    766      1.10     itohy 
    767      1.10     itohy 	case YM_MASTER_TREBLE:
    768      1.10     itohy 		ad1848_from_vol(cp, &sc->sc_treble);
    769      1.10     itohy 		return 0;
    770      1.10     itohy 
    771      1.10     itohy 	case YM_MASTER_BASS:
    772      1.10     itohy 		ad1848_from_vol(cp, &sc->sc_bass);
    773      1.10     itohy 		return 0;
    774      1.10     itohy 
    775      1.10     itohy 	case YM_MASTER_WIDE:
    776      1.10     itohy 		ad1848_from_vol(cp, &sc->sc_wide);
    777      1.10     itohy 		return 0;
    778      1.10     itohy 
    779      1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    780      1.10     itohy 	case YM_PWR_MODE:
    781      1.10     itohy 		cp->un.ord = sc->sc_pow_mode;
    782      1.10     itohy 		return 0;
    783      1.10     itohy 
    784      1.10     itohy 	case YM_PWR_TIMEOUT:
    785      1.10     itohy 		if (cp->un.value.num_channels != 1)
    786      1.10     itohy 			return EINVAL;
    787      1.10     itohy 		cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_pow_timeout;
    788      1.10     itohy 		return 0;
    789      1.10     itohy #endif
    790      1.10     itohy 	}
    791      1.10     itohy 
    792      1.10     itohy 	error = ad1848_mixer_get_port(ac, mappings, NUMMAP, cp);
    793      1.10     itohy 
    794      1.10     itohy 	if (error != ENXIO)
    795      1.10     itohy 		return (error);
    796      1.10     itohy 
    797      1.10     itohy 	error = 0;
    798      1.10     itohy 
    799      1.10     itohy 	switch (cp->dev) {
    800       1.2  augustss 	case YM_MIC_MUTE:
    801       1.2  augustss 		cp->un.ord = sc->mic_mute;
    802       1.2  augustss 		break;
    803      1.10     itohy 
    804       1.2  augustss 	default:
    805       1.2  augustss 		error = ENXIO;
    806       1.2  augustss 		break;
    807       1.2  augustss 	}
    808      1.10     itohy 
    809       1.2  augustss 	return(error);
    810       1.1  augustss }
    811       1.1  augustss 
    812      1.10     itohy static char *mixer_classes[] = {
    813      1.10     itohy 	AudioCinputs, AudioCrecord, AudioCoutputs, AudioCmonitor,
    814      1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    815  1.17.2.4   nathanw 	AudioCpower,
    816      1.10     itohy #endif
    817  1.17.2.4   nathanw 	AudioCequalization
    818      1.10     itohy };
    819       1.1  augustss 
    820       1.1  augustss int
    821       1.1  augustss ym_query_devinfo(addr, dip)
    822       1.2  augustss 	void *addr;
    823       1.2  augustss 	mixer_devinfo_t *dip;
    824       1.1  augustss {
    825      1.10     itohy 	static char *mixer_port_names[] = {
    826      1.10     itohy 		AudioNdac, AudioNmidi, AudioNcd, AudioNline, AudioNspeaker,
    827      1.10     itohy 		AudioNmicrophone, AudioNmonitor
    828      1.10     itohy 	};
    829  1.17.2.4   nathanw 	struct ad1848_softc *ac = addr;
    830  1.17.2.4   nathanw 	struct ym_softc *sc = ac->parent;
    831  1.17.2.4   nathanw 
    832  1.17.2.4   nathanw 	/* SA2 doesn't have equalizer */
    833  1.17.2.4   nathanw 	if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(dip->index))
    834  1.17.2.4   nathanw 		return ENXIO;
    835       1.1  augustss 
    836       1.2  augustss 	dip->next = dip->prev = AUDIO_MIXER_LAST;
    837      1.10     itohy 
    838       1.2  augustss 	switch(dip->index) {
    839  1.17.2.4   nathanw 	case YM_INPUT_CLASS:
    840       1.2  augustss 	case YM_OUTPUT_CLASS:
    841       1.2  augustss 	case YM_MONITOR_CLASS:
    842       1.2  augustss 	case YM_RECORD_CLASS:
    843      1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    844      1.10     itohy 	case YM_PWR_CLASS:
    845      1.10     itohy #endif
    846  1.17.2.4   nathanw 	case YM_EQ_CLASS:
    847       1.2  augustss 		dip->type = AUDIO_MIXER_CLASS;
    848       1.2  augustss 		dip->mixer_class = dip->index;
    849      1.10     itohy 		strcpy(dip->label.name,
    850       1.2  augustss 		       mixer_classes[dip->index - YM_INPUT_CLASS]);
    851       1.2  augustss 		break;
    852      1.10     itohy 
    853      1.10     itohy 	case YM_DAC_LVL:
    854       1.2  augustss 	case YM_MIDI_LVL:
    855       1.2  augustss 	case YM_CD_LVL:
    856      1.10     itohy 	case YM_LINE_LVL:
    857       1.2  augustss 	case YM_SPEAKER_LVL:
    858       1.2  augustss 	case YM_MIC_LVL:
    859       1.2  augustss 	case YM_MONITOR_LVL:
    860       1.2  augustss 		dip->type = AUDIO_MIXER_VALUE;
    861       1.2  augustss 		if (dip->index == YM_MONITOR_LVL)
    862       1.2  augustss 			dip->mixer_class = YM_MONITOR_CLASS;
    863       1.2  augustss 		else
    864       1.2  augustss 			dip->mixer_class = YM_INPUT_CLASS;
    865      1.10     itohy 
    866       1.2  augustss 		dip->next = dip->index + 7;
    867      1.10     itohy 
    868       1.2  augustss 		strcpy(dip->label.name,
    869      1.10     itohy 		       mixer_port_names[dip->index - YM_DAC_LVL]);
    870      1.10     itohy 
    871       1.2  augustss 		if (dip->index == YM_SPEAKER_LVL ||
    872       1.2  augustss 		    dip->index == YM_MIC_LVL)
    873       1.2  augustss 			dip->un.v.num_channels = 1;
    874       1.2  augustss 		else
    875       1.2  augustss 			dip->un.v.num_channels = 2;
    876      1.10     itohy 
    877  1.17.2.3   nathanw 		if (dip->index == YM_SPEAKER_LVL)
    878  1.17.2.3   nathanw 			dip->un.v.delta = 1 << (8 - 4 /* valid bits */);
    879  1.17.2.3   nathanw 		else if (dip->index == YM_DAC_LVL ||
    880  1.17.2.3   nathanw 		    dip->index == YM_MONITOR_LVL)
    881  1.17.2.3   nathanw 			dip->un.v.delta = 1 << (8 - 6 /* valid bits */);
    882  1.17.2.3   nathanw 		else
    883  1.17.2.3   nathanw 			dip->un.v.delta = 1 << (8 - 5 /* valid bits */);
    884  1.17.2.3   nathanw 
    885       1.2  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
    886       1.2  augustss 		break;
    887      1.10     itohy 
    888      1.10     itohy 	case YM_DAC_MUTE:
    889       1.2  augustss 	case YM_MIDI_MUTE:
    890       1.2  augustss 	case YM_CD_MUTE:
    891       1.2  augustss 	case YM_LINE_MUTE:
    892       1.2  augustss 	case YM_SPEAKER_MUTE:
    893       1.2  augustss 	case YM_MIC_MUTE:
    894       1.2  augustss 	case YM_MONITOR_MUTE:
    895       1.2  augustss 		if (dip->index == YM_MONITOR_MUTE)
    896       1.2  augustss 			dip->mixer_class = YM_MONITOR_CLASS;
    897       1.2  augustss 		else
    898       1.2  augustss 			dip->mixer_class = YM_INPUT_CLASS;
    899       1.2  augustss 		dip->type = AUDIO_MIXER_ENUM;
    900       1.2  augustss 		dip->prev = dip->index - 7;
    901       1.2  augustss 	mute:
    902       1.2  augustss 		strcpy(dip->label.name, AudioNmute);
    903       1.2  augustss 		dip->un.e.num_mem = 2;
    904       1.2  augustss 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
    905       1.2  augustss 		dip->un.e.member[0].ord = 0;
    906       1.2  augustss 		strcpy(dip->un.e.member[1].label.name, AudioNon);
    907       1.2  augustss 		dip->un.e.member[1].ord = 1;
    908       1.2  augustss 		break;
    909      1.10     itohy 
    910      1.10     itohy 
    911       1.2  augustss 	case YM_OUTPUT_LVL:
    912       1.2  augustss 		dip->type = AUDIO_MIXER_VALUE;
    913       1.2  augustss 		dip->mixer_class = YM_OUTPUT_CLASS;
    914       1.2  augustss 		dip->next = YM_OUTPUT_MUTE;
    915       1.2  augustss 		strcpy(dip->label.name, AudioNmaster);
    916       1.2  augustss 		dip->un.v.num_channels = 2;
    917  1.17.2.3   nathanw 		dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1);
    918       1.2  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
    919       1.2  augustss 		break;
    920      1.10     itohy 
    921       1.2  augustss 	case YM_OUTPUT_MUTE:
    922       1.2  augustss 		dip->mixer_class = YM_OUTPUT_CLASS;
    923       1.2  augustss 		dip->type = AUDIO_MIXER_ENUM;
    924       1.2  augustss 		dip->prev = YM_OUTPUT_LVL;
    925       1.2  augustss 		goto mute;
    926      1.10     itohy 
    927      1.10     itohy 
    928       1.2  augustss 	case YM_REC_LVL:	/* record level */
    929       1.2  augustss 		dip->type = AUDIO_MIXER_VALUE;
    930       1.2  augustss 		dip->mixer_class = YM_RECORD_CLASS;
    931       1.2  augustss 		dip->next = YM_RECORD_SOURCE;
    932       1.2  augustss 		strcpy(dip->label.name, AudioNrecord);
    933       1.2  augustss 		dip->un.v.num_channels = 2;
    934  1.17.2.3   nathanw 		dip->un.v.delta = 1 << (8 - 4 /* valid bits */);
    935       1.2  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
    936       1.2  augustss 		break;
    937      1.10     itohy 
    938       1.2  augustss 	case YM_RECORD_SOURCE:
    939       1.2  augustss 		dip->mixer_class = YM_RECORD_CLASS;
    940       1.2  augustss 		dip->type = AUDIO_MIXER_ENUM;
    941       1.2  augustss 		dip->prev = YM_REC_LVL;
    942       1.2  augustss 		strcpy(dip->label.name, AudioNsource);
    943       1.2  augustss 		dip->un.e.num_mem = 4;
    944       1.2  augustss 		strcpy(dip->un.e.member[0].label.name, AudioNmicrophone);
    945       1.2  augustss 		dip->un.e.member[0].ord = MIC_IN_PORT;
    946       1.2  augustss 		strcpy(dip->un.e.member[1].label.name, AudioNline);
    947       1.2  augustss 		dip->un.e.member[1].ord = LINE_IN_PORT;
    948       1.2  augustss 		strcpy(dip->un.e.member[2].label.name, AudioNdac);
    949       1.2  augustss 		dip->un.e.member[2].ord = DAC_IN_PORT;
    950       1.2  augustss 		strcpy(dip->un.e.member[3].label.name, AudioNcd);
    951       1.2  augustss 		dip->un.e.member[3].ord = AUX1_IN_PORT;
    952       1.2  augustss 		break;
    953      1.10     itohy 
    954      1.10     itohy 
    955      1.10     itohy 	case YM_MASTER_EQMODE:
    956      1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    957      1.10     itohy 		dip->mixer_class = YM_EQ_CLASS;
    958      1.10     itohy 		strcpy(dip->label.name, AudioNmode);
    959      1.10     itohy 		strcpy(dip->un.v.units.name, AudioNmode);
    960      1.10     itohy 		dip->un.e.num_mem = 4;
    961      1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNdesktop);
    962      1.10     itohy 		dip->un.e.member[0].ord = SA3_SYS_CTL_YMODE0;
    963      1.10     itohy 		strcpy(dip->un.e.member[1].label.name, AudioNlaptop);
    964      1.10     itohy 		dip->un.e.member[1].ord = SA3_SYS_CTL_YMODE1;
    965      1.10     itohy 		strcpy(dip->un.e.member[2].label.name, AudioNsubnote);
    966      1.10     itohy 		dip->un.e.member[2].ord = SA3_SYS_CTL_YMODE2;
    967      1.10     itohy 		strcpy(dip->un.e.member[3].label.name, AudioNhifi);
    968      1.10     itohy 		dip->un.e.member[3].ord = SA3_SYS_CTL_YMODE3;
    969      1.10     itohy 		break;
    970      1.10     itohy 
    971      1.10     itohy 	case YM_MASTER_TREBLE:
    972      1.10     itohy 		dip->type = AUDIO_MIXER_VALUE;
    973      1.10     itohy 		dip->mixer_class = YM_EQ_CLASS;
    974      1.10     itohy 		strcpy(dip->label.name, AudioNtreble);
    975      1.10     itohy 		dip->un.v.num_channels = 2;
    976  1.17.2.3   nathanw 		dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1)
    977  1.17.2.3   nathanw 		    >> YM_EQ_REDUCE_BIT;
    978      1.10     itohy 		strcpy(dip->un.v.units.name, AudioNtreble);
    979      1.10     itohy 		break;
    980      1.10     itohy 
    981      1.10     itohy 	case YM_MASTER_BASS:
    982      1.10     itohy 		dip->type = AUDIO_MIXER_VALUE;
    983      1.10     itohy 		dip->mixer_class = YM_EQ_CLASS;
    984      1.10     itohy 		strcpy(dip->label.name, AudioNbass);
    985      1.10     itohy 		dip->un.v.num_channels = 2;
    986  1.17.2.3   nathanw 		dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1)
    987  1.17.2.3   nathanw 		    >> YM_EQ_REDUCE_BIT;
    988      1.10     itohy 		strcpy(dip->un.v.units.name, AudioNbass);
    989      1.10     itohy 		break;
    990      1.10     itohy 
    991      1.10     itohy 	case YM_MASTER_WIDE:
    992      1.10     itohy 		dip->type = AUDIO_MIXER_VALUE;
    993      1.10     itohy 		dip->mixer_class = YM_EQ_CLASS;
    994      1.10     itohy 		strcpy(dip->label.name, AudioNsurround);
    995      1.10     itohy 		dip->un.v.num_channels = 2;
    996  1.17.2.3   nathanw 		dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1);
    997      1.10     itohy 		strcpy(dip->un.v.units.name, AudioNsurround);
    998      1.10     itohy 		break;
    999      1.10     itohy 
   1000      1.10     itohy 
   1001      1.10     itohy #ifndef AUDIO_NO_POWER_CTL
   1002      1.10     itohy 	case YM_PWR_MODE:
   1003      1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
   1004      1.10     itohy 		dip->mixer_class = YM_PWR_CLASS;
   1005      1.10     itohy 		dip->next = YM_PWR_TIMEOUT;
   1006      1.13     itohy 		strcpy(dip->label.name, AudioNsave);
   1007      1.10     itohy 		dip->un.e.num_mem = 3;
   1008      1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNpowerdown);
   1009      1.10     itohy 		dip->un.e.member[0].ord = YM_POWER_POWERDOWN;
   1010      1.10     itohy 		strcpy(dip->un.e.member[1].label.name, AudioNpowersave);
   1011      1.10     itohy 		dip->un.e.member[1].ord = YM_POWER_POWERSAVE;
   1012      1.10     itohy 		strcpy(dip->un.e.member[2].label.name, AudioNnosave);
   1013      1.10     itohy 		dip->un.e.member[2].ord = YM_POWER_NOSAVE;
   1014      1.10     itohy 		break;
   1015      1.10     itohy 
   1016      1.10     itohy 	case YM_PWR_TIMEOUT:
   1017      1.10     itohy 		dip->type = AUDIO_MIXER_VALUE;
   1018      1.10     itohy 		dip->mixer_class = YM_PWR_CLASS;
   1019      1.10     itohy 		dip->prev = YM_PWR_MODE;
   1020      1.10     itohy 		strcpy(dip->label.name, AudioNtimeout);
   1021      1.10     itohy 		dip->un.v.num_channels = 1;
   1022      1.10     itohy 		strcpy(dip->un.v.units.name, AudioNtimeout);
   1023      1.10     itohy 		break;
   1024      1.10     itohy #endif /* not AUDIO_NO_POWER_CTL */
   1025      1.10     itohy 
   1026       1.2  augustss 	default:
   1027       1.2  augustss 		return ENXIO;
   1028       1.2  augustss 		/*NOTREACHED*/
   1029       1.2  augustss 	}
   1030      1.10     itohy 
   1031      1.10     itohy 	return 0;
   1032      1.10     itohy }
   1033      1.10     itohy 
   1034      1.10     itohy int
   1035      1.10     itohy ym_intr(arg)
   1036      1.10     itohy 	void *arg;
   1037      1.10     itohy {
   1038      1.10     itohy 	struct ym_softc *sc = arg;
   1039      1.10     itohy 	u_int8_t ist;
   1040      1.10     itohy 	int processed;
   1041      1.10     itohy 
   1042      1.10     itohy 	/* OPL3 timer is currently unused. */
   1043      1.10     itohy 	if (((ist = ym_read(sc, SA3_IRQA_STAT)) &
   1044      1.10     itohy 	     ~(SA3_IRQ_STAT_SB|SA3_IRQ_STAT_OPL3)) == 0) {
   1045      1.10     itohy 		DPRINTF(("%s: ym_intr: spurious interrupt\n", DVNAME(sc)));
   1046      1.10     itohy 		return 0;
   1047      1.10     itohy 	}
   1048      1.10     itohy 
   1049      1.10     itohy 	/* Process pending interrupts. */
   1050      1.10     itohy 	do {
   1051      1.10     itohy 		processed = 0;
   1052      1.10     itohy 		/*
   1053      1.10     itohy 		 * CODEC interrupts.
   1054      1.10     itohy 		 */
   1055      1.10     itohy 		if (ist & (SA3_IRQ_STAT_TI|SA3_IRQ_STAT_CI|SA3_IRQ_STAT_PI)) {
   1056      1.10     itohy 			ad1848_isa_intr(&sc->sc_ad1848);
   1057      1.10     itohy 			processed = 1;
   1058      1.10     itohy 		}
   1059      1.10     itohy #if NMPU_YM > 0
   1060      1.10     itohy 		/*
   1061      1.10     itohy 		 * MPU401 interrupt.
   1062      1.10     itohy 		 */
   1063      1.10     itohy 		if (ist & SA3_IRQ_STAT_MPU) {
   1064      1.10     itohy 			mpu_intr(sc->sc_mpudev);
   1065      1.10     itohy 			processed = 1;
   1066      1.10     itohy 		}
   1067      1.10     itohy #endif
   1068      1.10     itohy 		/*
   1069  1.17.2.4   nathanw 		 * Hardware volume interrupt (SA3 only).
   1070      1.10     itohy 		 * Recalculate master volume from the hardware setting.
   1071      1.10     itohy 		 */
   1072  1.17.2.4   nathanw 		if ((ist & SA3_IRQ_STAT_MV) && YM_IS_SA3(sc)) {
   1073  1.17.2.4   nathanw 			ym_hvol_to_master_gain(sc);
   1074      1.10     itohy 			processed = 1;
   1075      1.10     itohy 		}
   1076      1.10     itohy 	} while (processed && (ist = ym_read(sc, SA3_IRQA_STAT)));
   1077      1.10     itohy 
   1078      1.10     itohy 	return 1;
   1079      1.10     itohy }
   1080      1.10     itohy 
   1081      1.10     itohy 
   1082      1.10     itohy #ifndef AUDIO_NO_POWER_CTL
   1083      1.10     itohy static void
   1084      1.10     itohy ym_save_codec_regs(sc)
   1085      1.10     itohy 	struct ym_softc *sc;
   1086      1.10     itohy {
   1087      1.10     itohy 	struct ad1848_softc *ac = &sc->sc_ad1848.sc_ad1848;
   1088      1.10     itohy 	int i;
   1089      1.10     itohy 
   1090      1.10     itohy 	DPRINTF(("%s: ym_save_codec_regs\n", DVNAME(sc)));
   1091      1.10     itohy 
   1092      1.10     itohy 	for (i = 0; i <= 0x1f; i++)
   1093      1.10     itohy 		sc->sc_codec_scan[i] = ad_read(ac, i);
   1094      1.10     itohy }
   1095      1.10     itohy 
   1096      1.10     itohy static void
   1097      1.10     itohy ym_restore_codec_regs(sc)
   1098      1.10     itohy 	struct ym_softc *sc;
   1099      1.10     itohy {
   1100      1.10     itohy 	struct ad1848_softc *ac = &sc->sc_ad1848.sc_ad1848;
   1101      1.10     itohy 	int i, t;
   1102      1.10     itohy 
   1103      1.10     itohy 	DPRINTF(("%s: ym_restore_codec_regs\n", DVNAME(sc)));
   1104      1.10     itohy 
   1105      1.10     itohy 	for (i = 0; i <= 0x1f; i++) {
   1106      1.10     itohy 		/*
   1107      1.10     itohy 		 * Wait til the chip becomes ready.
   1108      1.10     itohy 		 * This is required after suspend/resume.
   1109      1.10     itohy 		 */
   1110      1.10     itohy 		for (t = 0;
   1111      1.10     itohy 		    t < 100000 && ADREAD(ac, AD1848_IADDR) & SP_IN_INIT; t++)
   1112      1.10     itohy 			;
   1113      1.10     itohy #ifdef AUDIO_DEBUG
   1114      1.10     itohy 		if (t)
   1115      1.10     itohy 			DPRINTF(("%s: ym_restore_codec_regs: reg %d, t %d\n",
   1116      1.10     itohy 				 DVNAME(sc), i, t));
   1117      1.10     itohy #endif
   1118      1.10     itohy 		ad_write(ac, i, sc->sc_codec_scan[i]);
   1119      1.10     itohy 	}
   1120      1.10     itohy }
   1121      1.10     itohy 
   1122      1.10     itohy /*
   1123      1.10     itohy  * Save and restore the state on suspending / resumning.
   1124      1.10     itohy  *
   1125      1.10     itohy  * XXX This is not complete.
   1126      1.10     itohy  * Currently only the parameters, such as output gain, are restored.
   1127      1.10     itohy  * DMA state should also be restored.  FIXME.
   1128      1.10     itohy  */
   1129      1.10     itohy void
   1130      1.10     itohy ym_power_hook(why, v)
   1131      1.10     itohy 	int why;
   1132      1.10     itohy 	void *v;
   1133      1.10     itohy {
   1134      1.10     itohy 	struct ym_softc *sc = v;
   1135  1.17.2.4   nathanw 	int i, max;
   1136      1.10     itohy 	int s;
   1137      1.10     itohy 
   1138      1.10     itohy 	DPRINTF(("%s: ym_power_hook: why = %d\n", DVNAME(sc), why));
   1139      1.10     itohy 
   1140      1.10     itohy 	s = splaudio();
   1141      1.10     itohy 
   1142      1.17  takemura 	switch (why) {
   1143      1.17  takemura 	case PWR_SUSPEND:
   1144      1.17  takemura 	case PWR_STANDBY:
   1145      1.10     itohy 		/*
   1146      1.10     itohy 		 * suspending...
   1147      1.10     itohy 		 */
   1148      1.14   thorpej 		callout_stop(&sc->sc_powerdown_ch);
   1149      1.10     itohy 		if (sc->sc_turning_off)
   1150      1.10     itohy 			ym_powerdown_blocks(sc);
   1151      1.10     itohy 
   1152      1.10     itohy 		/*
   1153      1.10     itohy 		 * Save CODEC registers.
   1154      1.10     itohy 		 * Note that the registers read incorrect
   1155      1.10     itohy 		 * if the CODEC part is in power-down mode.
   1156      1.10     itohy 		 */
   1157      1.10     itohy 		if (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL)
   1158      1.10     itohy 			ym_save_codec_regs(sc);
   1159      1.10     itohy 
   1160      1.10     itohy 		/*
   1161      1.10     itohy 		 * Save OPL3-SA3 control registers and power-down the chip.
   1162      1.10     itohy 		 * Note that the registers read incorrect
   1163      1.10     itohy 		 * if the chip is in global power-down mode.
   1164      1.10     itohy 		 */
   1165      1.10     itohy 		sc->sc_sa3_scan[SA3_PWR_MNG] = ym_read(sc, SA3_PWR_MNG);
   1166      1.10     itohy 		if (sc->sc_on_blocks)
   1167      1.10     itohy 			ym_chip_powerdown(sc);
   1168      1.17  takemura 		break;
   1169      1.17  takemura 
   1170      1.17  takemura 	case PWR_RESUME:
   1171      1.10     itohy 		/*
   1172      1.10     itohy 		 * resuming...
   1173      1.10     itohy 		 */
   1174      1.10     itohy 		ym_chip_powerup(sc, 1);
   1175      1.10     itohy 		ym_init(sc);		/* power-on CODEC */
   1176      1.10     itohy 
   1177      1.10     itohy 		/* Restore control registers. */
   1178  1.17.2.4   nathanw 		max = YM_IS_SA3(sc)? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
   1179  1.17.2.4   nathanw 		for (i = SA3_PWR_MNG + 1; i <= max; i++) {
   1180      1.10     itohy 			if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA ||
   1181      1.10     itohy 			    i == SA3_DPWRDWN)
   1182      1.10     itohy 				continue;
   1183      1.10     itohy 			ym_write(sc, i, sc->sc_sa3_scan[i]);
   1184      1.10     itohy 		}
   1185      1.10     itohy 
   1186      1.10     itohy 		/* Restore CODEC registers (including mixer). */
   1187      1.10     itohy 		ym_restore_codec_regs(sc);
   1188      1.10     itohy 
   1189      1.10     itohy 		/* Restore global/digital power-down state. */
   1190      1.10     itohy 		ym_write(sc, SA3_PWR_MNG, sc->sc_sa3_scan[SA3_PWR_MNG]);
   1191  1.17.2.4   nathanw 		if (YM_IS_SA3(sc))
   1192  1.17.2.4   nathanw 			ym_write(sc, SA3_DPWRDWN, sc->sc_sa3_scan[SA3_DPWRDWN]);
   1193      1.17  takemura 		break;
   1194      1.17  takemura 	case PWR_SOFTSUSPEND:
   1195      1.17  takemura 	case PWR_SOFTSTANDBY:
   1196      1.17  takemura 	case PWR_SOFTRESUME:
   1197      1.17  takemura 		break;
   1198      1.10     itohy 	}
   1199      1.10     itohy 	splx(s);
   1200      1.10     itohy }
   1201      1.10     itohy 
   1202      1.10     itohy int
   1203      1.10     itohy ym_codec_power_ctl(arg, flags)
   1204      1.10     itohy 	void *arg;
   1205      1.10     itohy 	int flags;
   1206      1.10     itohy {
   1207      1.10     itohy 	struct ym_softc *sc = arg;
   1208      1.10     itohy 	struct ad1848_softc *ac = &sc->sc_ad1848.sc_ad1848;
   1209      1.10     itohy 	int parts;
   1210      1.10     itohy 
   1211      1.10     itohy 	DPRINTF(("%s: ym_codec_power_ctl: flags = 0x%x\n", DVNAME(sc), flags));
   1212      1.10     itohy 
   1213      1.10     itohy 	if (flags != 0) {
   1214      1.10     itohy 		parts = 0;
   1215      1.10     itohy 		if (flags & FREAD) {
   1216      1.10     itohy 			parts |= YM_POWER_CODEC_R | YM_POWER_CODEC_AD;
   1217      1.10     itohy 			if (ac->mute[AD1848_MONITOR_CHANNEL] == 0)
   1218      1.10     itohy 				parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
   1219      1.10     itohy 		}
   1220      1.10     itohy 		if (flags & FWRITE)
   1221      1.10     itohy 			parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
   1222      1.10     itohy 	} else
   1223      1.10     itohy 		parts = YM_POWER_CODEC_P | YM_POWER_CODEC_R |
   1224      1.10     itohy 			YM_POWER_CODEC_DA | YM_POWER_CODEC_AD;
   1225      1.10     itohy 
   1226      1.10     itohy 	ym_power_ctl(sc, parts, flags);
   1227      1.10     itohy 
   1228       1.2  augustss 	return 0;
   1229       1.1  augustss }
   1230      1.10     itohy 
   1231      1.10     itohy /*
   1232      1.10     itohy  * Enter Power Save mode or Global Power Down mode.
   1233      1.10     itohy  * Total dissipation becomes 5mA and 10uA (typ.) respective.
   1234      1.10     itohy  *
   1235      1.10     itohy  * This must be called at splaudio().
   1236      1.10     itohy  */
   1237      1.10     itohy static void
   1238      1.10     itohy ym_chip_powerdown(sc)
   1239      1.10     itohy 	struct ym_softc *sc;
   1240      1.10     itohy {
   1241  1.17.2.4   nathanw 	int i, max;
   1242      1.10     itohy 
   1243      1.10     itohy 	DPRINTF(("%s: ym_chip_powerdown\n", DVNAME(sc)));
   1244      1.10     itohy 
   1245  1.17.2.4   nathanw 	max = YM_IS_SA3(sc) ? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
   1246  1.17.2.4   nathanw 
   1247      1.10     itohy 	/* Save control registers. */
   1248  1.17.2.4   nathanw 	for (i = SA3_PWR_MNG + 1; i <= max; i++) {
   1249      1.10     itohy 		if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA)
   1250      1.10     itohy 			continue;
   1251      1.10     itohy 		sc->sc_sa3_scan[i] = ym_read(sc, i);
   1252      1.10     itohy 	}
   1253      1.10     itohy 	ym_write(sc, SA3_PWR_MNG,
   1254      1.10     itohy 		 (sc->sc_pow_mode == YM_POWER_POWERDOWN ?
   1255      1.10     itohy 			SA3_PWR_MNG_PDN : SA3_PWR_MNG_PSV) | SA3_PWR_MNG_PDX);
   1256      1.10     itohy }
   1257      1.10     itohy 
   1258      1.10     itohy /*
   1259      1.10     itohy  * Power up from Power Save / Global Power Down Mode.
   1260      1.10     itohy  *
   1261      1.10     itohy  * We assume no ym interrupt shall occur, since the chip is
   1262      1.10     itohy  * in power-down mode (or should be blocked by splaudio()).
   1263      1.10     itohy  */
   1264      1.10     itohy static void
   1265      1.10     itohy ym_chip_powerup(sc, nosleep)
   1266      1.10     itohy 	struct ym_softc *sc;
   1267      1.10     itohy 	int nosleep;
   1268      1.10     itohy {
   1269      1.10     itohy 	int wchan;
   1270      1.10     itohy 	u_int8_t pw;
   1271      1.10     itohy 
   1272      1.10     itohy 	DPRINTF(("%s: ym_chip_powerup\n", DVNAME(sc)));
   1273      1.10     itohy 
   1274      1.10     itohy 	pw = ym_read(sc, SA3_PWR_MNG);
   1275      1.10     itohy 
   1276      1.10     itohy 	if ((pw & (SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN | SA3_PWR_MNG_PDX)) == 0)
   1277      1.10     itohy 		return;		/* already on */
   1278      1.10     itohy 
   1279      1.10     itohy 	pw &= ~SA3_PWR_MNG_PDX;
   1280      1.10     itohy 	ym_write(sc, SA3_PWR_MNG, pw);
   1281      1.10     itohy 
   1282      1.10     itohy 	/* wait 100 ms */
   1283      1.10     itohy 	if (nosleep)
   1284      1.10     itohy 		delay(100000);
   1285      1.10     itohy 	else
   1286      1.13     itohy 		tsleep(&wchan, PWAIT, "ym_pu1", hz / 10);
   1287      1.10     itohy 
   1288      1.10     itohy 	pw &= ~(SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN);
   1289      1.10     itohy 	ym_write(sc, SA3_PWR_MNG, pw);
   1290      1.10     itohy 
   1291      1.10     itohy 	/* wait 70 ms */
   1292      1.10     itohy 	if (nosleep)
   1293      1.10     itohy 		delay(70000);
   1294      1.10     itohy 	else
   1295      1.13     itohy 		tsleep(&wchan, PWAIT, "ym_pu2", hz / 14);
   1296      1.10     itohy 
   1297      1.10     itohy 	/* The chip is muted automatically --- unmute it now. */
   1298      1.10     itohy 	ym_mute(sc, SA3_VOL_L, sc->master_mute);
   1299      1.10     itohy 	ym_mute(sc, SA3_VOL_R, sc->master_mute);
   1300      1.10     itohy }
   1301      1.10     itohy 
   1302      1.14   thorpej /* callout handler for power-down */
   1303      1.10     itohy void
   1304      1.10     itohy ym_powerdown_blocks(arg)
   1305      1.10     itohy 	void *arg;
   1306      1.10     itohy {
   1307      1.10     itohy 	struct ym_softc *sc = arg;
   1308      1.10     itohy 	u_int16_t parts;
   1309      1.10     itohy 	u_int16_t on_blocks = sc->sc_on_blocks;
   1310      1.10     itohy 	u_int8_t sv;
   1311      1.10     itohy 	int s;
   1312      1.10     itohy 
   1313      1.10     itohy 	DPRINTF(("%s: ym_powerdown_blocks: turning_off 0x%x\n",
   1314      1.10     itohy 		DVNAME(sc), sc->sc_turning_off));
   1315      1.10     itohy 
   1316      1.10     itohy 	s = splaudio();
   1317      1.10     itohy 
   1318      1.10     itohy 	on_blocks = sc->sc_on_blocks;
   1319      1.10     itohy 
   1320      1.10     itohy 	/* Be sure not to change the state of the chip.  Save it first. */
   1321      1.10     itohy 	sv =  bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX);
   1322      1.10     itohy 
   1323      1.10     itohy 	parts = sc->sc_turning_off;
   1324      1.10     itohy 
   1325      1.10     itohy 	if (on_blocks & ~parts & YM_POWER_CODEC_CTL)
   1326      1.10     itohy 		parts &= ~(YM_POWER_CODEC_P | YM_POWER_CODEC_R);
   1327      1.10     itohy 	if (parts & YM_POWER_CODEC_CTL) {
   1328      1.10     itohy 		if ((on_blocks & YM_POWER_CODEC_P) == 0)
   1329      1.10     itohy 			parts |= YM_POWER_CODEC_P;
   1330      1.10     itohy 		if ((on_blocks & YM_POWER_CODEC_R) == 0)
   1331      1.10     itohy 			parts |= YM_POWER_CODEC_R;
   1332      1.10     itohy 	}
   1333      1.13     itohy 	parts &= ~YM_POWER_CODEC_PSEUDO;
   1334      1.10     itohy 
   1335      1.10     itohy 	/* If CODEC is being off, save the state. */
   1336      1.10     itohy 	if ((sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) &&
   1337      1.10     itohy 	    (sc->sc_on_blocks & ~sc->sc_turning_off &
   1338      1.10     itohy 				YM_POWER_CODEC_DIGITAL) == 0)
   1339      1.10     itohy 		ym_save_codec_regs(sc);
   1340      1.10     itohy 
   1341  1.17.2.4   nathanw 	if (YM_IS_SA3(sc)) {
   1342  1.17.2.4   nathanw 		/* OPL3-SA3 */
   1343  1.17.2.4   nathanw 		ym_write(sc, SA3_DPWRDWN,
   1344  1.17.2.4   nathanw 		    ym_read(sc, SA3_DPWRDWN) | (u_int8_t) parts);
   1345  1.17.2.4   nathanw 		ym_write(sc, SA3_APWRDWN,
   1346  1.17.2.4   nathanw 		    ym_read(sc, SA3_APWRDWN) | (parts >> 8));
   1347  1.17.2.4   nathanw 	} else {
   1348  1.17.2.4   nathanw 		/* OPL3-SA2 (only OPL3 can be off partially) */
   1349  1.17.2.4   nathanw 		if (parts & YM_POWER_OPL3)
   1350  1.17.2.4   nathanw 			ym_write(sc, SA3_PWR_MNG,
   1351  1.17.2.4   nathanw 			    ym_read(sc, SA3_PWR_MNG) | SA2_PWR_MNG_FMPS);
   1352  1.17.2.4   nathanw 	}
   1353      1.10     itohy 
   1354      1.10     itohy 	if (((sc->sc_on_blocks &= ~sc->sc_turning_off) & YM_POWER_ACTIVE) == 0)
   1355      1.10     itohy 		ym_chip_powerdown(sc);
   1356      1.10     itohy 
   1357      1.10     itohy 	sc->sc_turning_off = 0;
   1358      1.10     itohy 
   1359      1.10     itohy 	/* Restore the state of the chip. */
   1360      1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX, sv);
   1361      1.10     itohy 
   1362      1.10     itohy 	splx(s);
   1363      1.10     itohy }
   1364      1.10     itohy 
   1365      1.10     itohy /*
   1366      1.10     itohy  * Power control entry point.
   1367      1.10     itohy  */
   1368      1.10     itohy void
   1369      1.10     itohy ym_power_ctl(sc, parts, onoff)
   1370      1.10     itohy 	struct ym_softc *sc;
   1371      1.10     itohy 	int parts, onoff;
   1372      1.10     itohy {
   1373      1.10     itohy 	int s;
   1374      1.10     itohy 	int need_restore_codec;
   1375      1.10     itohy 
   1376      1.10     itohy 	DPRINTF(("%s: ym_power_ctl: parts = 0x%x, %s\n",
   1377      1.10     itohy 		DVNAME(sc), parts, onoff ? "on" : "off"));
   1378      1.10     itohy 
   1379      1.10     itohy #ifdef DIAGNOSTIC
   1380      1.10     itohy 	if (curproc == NULL)
   1381      1.10     itohy 		panic("ym_power_ctl: no curproc");
   1382      1.10     itohy #endif
   1383      1.10     itohy 	/* This function may sleep --- needs locking. */
   1384      1.10     itohy 	while (sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) {
   1385      1.10     itohy 		sc->sc_in_power_ctl |= YM_POWER_CTL_WANTED;
   1386      1.10     itohy 		DPRINTF(("%s: ym_power_ctl: sleeping\n", DVNAME(sc)));
   1387      1.13     itohy 		tsleep(&sc->sc_in_power_ctl, PWAIT, "ym_pc", 0);
   1388      1.10     itohy 		DPRINTF(("%s: ym_power_ctl: awaken\n", DVNAME(sc)));
   1389      1.10     itohy 	}
   1390      1.10     itohy 	sc->sc_in_power_ctl |= YM_POWER_CTL_INUSE;
   1391      1.10     itohy 
   1392      1.14   thorpej 	/* Defeat softclock interrupts. */
   1393      1.10     itohy 	s = splsoftclock();
   1394      1.10     itohy 
   1395      1.10     itohy 	/* If ON requested to parts which are scheduled to OFF, cancel it. */
   1396      1.10     itohy 	if (onoff && sc->sc_turning_off && (sc->sc_turning_off &= ~parts) == 0)
   1397      1.14   thorpej 		callout_stop(&sc->sc_powerdown_ch);
   1398      1.10     itohy 
   1399      1.10     itohy 	if (!onoff && sc->sc_turning_off)
   1400      1.10     itohy 		parts &= ~sc->sc_turning_off;
   1401      1.10     itohy 
   1402      1.10     itohy 	/* Discard bits which are currently {on,off}. */
   1403      1.10     itohy 	parts &= onoff ? ~sc->sc_on_blocks : sc->sc_on_blocks;
   1404      1.10     itohy 
   1405      1.10     itohy 	/* Cancel previous timeout if needed. */
   1406      1.10     itohy 	if (parts != 0 && sc->sc_turning_off)
   1407      1.14   thorpej 		callout_stop(&sc->sc_powerdown_ch);
   1408      1.10     itohy 
   1409      1.10     itohy 	(void) splx(s);
   1410      1.10     itohy 
   1411      1.10     itohy 	if (parts == 0)
   1412      1.10     itohy 		goto unlock;		/* no work to do */
   1413      1.10     itohy 
   1414      1.10     itohy 	if (onoff) {
   1415      1.10     itohy 		/* Turning on is done immediately. */
   1416      1.10     itohy 
   1417      1.10     itohy 		/* If the chip is off, turn it on. */
   1418      1.10     itohy 		if ((sc->sc_on_blocks & YM_POWER_ACTIVE) == 0)
   1419      1.10     itohy 			ym_chip_powerup(sc, 0);
   1420      1.10     itohy 
   1421      1.10     itohy 		need_restore_codec = (parts & YM_POWER_CODEC_DIGITAL) &&
   1422      1.10     itohy 		    (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) == 0;
   1423      1.10     itohy 
   1424      1.10     itohy 		sc->sc_on_blocks |= parts;
   1425      1.10     itohy 		if (parts & YM_POWER_CODEC_CTL)
   1426      1.10     itohy 			parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_R;
   1427      1.10     itohy 
   1428      1.10     itohy 		s = splaudio();
   1429      1.10     itohy 
   1430  1.17.2.4   nathanw 		if (YM_IS_SA3(sc)) {
   1431  1.17.2.4   nathanw 			/* OPL3-SA3 */
   1432  1.17.2.4   nathanw 			ym_write(sc, SA3_DPWRDWN,
   1433  1.17.2.4   nathanw 			    ym_read(sc, SA3_DPWRDWN) & (u_int8_t)~parts);
   1434  1.17.2.4   nathanw 			ym_write(sc, SA3_APWRDWN,
   1435  1.17.2.4   nathanw 			    ym_read(sc, SA3_APWRDWN) & ~(parts >> 8));
   1436  1.17.2.4   nathanw 		} else {
   1437  1.17.2.4   nathanw 			/* OPL3-SA2 (only OPL3 can be off partially) */
   1438  1.17.2.4   nathanw 			if (parts & YM_POWER_OPL3)
   1439  1.17.2.4   nathanw 				ym_write(sc, SA3_PWR_MNG,
   1440  1.17.2.4   nathanw 				    ym_read(sc, SA3_PWR_MNG)
   1441  1.17.2.4   nathanw 					& ~SA2_PWR_MNG_FMPS);
   1442  1.17.2.4   nathanw 		}
   1443      1.10     itohy 		if (need_restore_codec)
   1444      1.10     itohy 			ym_restore_codec_regs(sc);
   1445      1.10     itohy 
   1446      1.10     itohy 		(void) splx(s);
   1447      1.10     itohy 	} else {
   1448      1.10     itohy 		/* Turning off is delayed. */
   1449      1.10     itohy 		sc->sc_turning_off |= parts;
   1450      1.10     itohy 	}
   1451      1.10     itohy 
   1452      1.10     itohy 	/* Schedule turning off. */
   1453      1.10     itohy 	if (sc->sc_pow_mode != YM_POWER_NOSAVE && sc->sc_turning_off)
   1454      1.14   thorpej 		callout_reset(&sc->sc_powerdown_ch, hz * sc->sc_pow_timeout,
   1455      1.14   thorpej 		    ym_powerdown_blocks, sc);
   1456      1.10     itohy 
   1457      1.10     itohy unlock:
   1458      1.10     itohy 	if (sc->sc_in_power_ctl & YM_POWER_CTL_WANTED)
   1459      1.10     itohy 		wakeup(&sc->sc_in_power_ctl);
   1460      1.10     itohy 	sc->sc_in_power_ctl = 0;
   1461      1.10     itohy }
   1462      1.10     itohy #endif /* not AUDIO_NO_POWER_CTL */
   1463