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ym.c revision 1.35.12.2
      1  1.35.12.2        ad /*	$NetBSD: ym.c,v 1.35.12.2 2008/12/12 23:06:57 ad Exp $	*/
      2        1.1  augustss 
      3       1.10     itohy /*-
      4  1.35.12.2        ad  * Copyright (c) 1999-2002, 2008 The NetBSD Foundation, Inc.
      5       1.10     itohy  * All rights reserved.
      6       1.10     itohy  *
      7       1.10     itohy  * This code is derived from software contributed to The NetBSD Foundation
      8       1.10     itohy  * by ITOH Yasufumi.
      9       1.10     itohy  *
     10       1.10     itohy  * Redistribution and use in source and binary forms, with or without
     11       1.10     itohy  * modification, are permitted provided that the following conditions
     12       1.10     itohy  * are met:
     13       1.10     itohy  * 1. Redistributions of source code must retain the above copyright
     14       1.10     itohy  *    notice, this list of conditions and the following disclaimer.
     15       1.10     itohy  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.10     itohy  *    notice, this list of conditions and the following disclaimer in the
     17       1.10     itohy  *    documentation and/or other materials provided with the distribution.
     18       1.10     itohy  *
     19       1.10     itohy  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20       1.10     itohy  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21       1.10     itohy  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22       1.10     itohy  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23       1.10     itohy  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24       1.10     itohy  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25       1.10     itohy  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26       1.10     itohy  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27       1.10     itohy  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28       1.10     itohy  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29       1.10     itohy  * POSSIBILITY OF SUCH DAMAGE.
     30       1.10     itohy  */
     31        1.1  augustss 
     32        1.1  augustss /*
     33        1.1  augustss  * Copyright (c) 1998 Constantine Sapuntzakis. All rights reserved.
     34       1.10     itohy  *
     35        1.1  augustss  * Redistribution and use in source and binary forms, with or without
     36        1.1  augustss  * modification, are permitted provided that the following conditions
     37        1.1  augustss  * are met:
     38        1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     39        1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     40        1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     41        1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     42        1.1  augustss  *    documentation and/or other materials provided with the distribution.
     43        1.1  augustss  * 3. The name of the author may not be used to endorse or promote products
     44        1.1  augustss  *    derived from this software without specific prior written permission.
     45        1.1  augustss  *
     46        1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     47        1.1  augustss  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     48        1.1  augustss  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     49        1.1  augustss  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     50        1.1  augustss  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     51        1.1  augustss  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     52        1.1  augustss  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     53        1.1  augustss  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     54        1.1  augustss  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     55        1.1  augustss  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     56        1.1  augustss  */
     57        1.1  augustss 
     58        1.1  augustss /*
     59        1.1  augustss  *  Original code from OpenBSD.
     60        1.1  augustss  */
     61       1.19     lukem 
     62       1.19     lukem #include <sys/cdefs.h>
     63  1.35.12.2        ad __KERNEL_RCSID(0, "$NetBSD: ym.c,v 1.35.12.2 2008/12/12 23:06:57 ad Exp $");
     64        1.1  augustss 
     65       1.10     itohy #include "mpu_ym.h"
     66       1.10     itohy #include "opt_ym.h"
     67        1.1  augustss 
     68        1.1  augustss #include <sys/param.h>
     69        1.1  augustss #include <sys/systm.h>
     70        1.1  augustss #include <sys/errno.h>
     71        1.1  augustss #include <sys/device.h>
     72       1.10     itohy #include <sys/fcntl.h>
     73       1.10     itohy #include <sys/kernel.h>
     74       1.10     itohy #include <sys/proc.h>
     75        1.1  augustss 
     76       1.32        ad #include <sys/cpu.h>
     77       1.32        ad #include <sys/intr.h>
     78       1.32        ad #include <sys/bus.h>
     79        1.1  augustss 
     80        1.1  augustss #include <sys/audioio.h>
     81        1.1  augustss #include <dev/audio_if.h>
     82        1.1  augustss 
     83        1.1  augustss #include <dev/isa/isavar.h>
     84        1.1  augustss #include <dev/isa/isadmavar.h>
     85        1.1  augustss 
     86        1.1  augustss #include <dev/ic/ad1848reg.h>
     87        1.1  augustss #include <dev/isa/ad1848var.h>
     88       1.10     itohy #include <dev/ic/opl3sa3reg.h>
     89       1.10     itohy #include <dev/isa/wssreg.h>
     90       1.10     itohy #if NMPU_YM > 0
     91       1.10     itohy #include <dev/ic/mpuvar.h>
     92       1.10     itohy #endif
     93        1.1  augustss #include <dev/isa/ymvar.h>
     94       1.10     itohy #include <dev/isa/sbreg.h>
     95        1.1  augustss 
     96       1.10     itohy /* Power management mode. */
     97       1.10     itohy #ifndef YM_POWER_MODE
     98       1.10     itohy #define YM_POWER_MODE		YM_POWER_POWERSAVE
     99       1.10     itohy #endif
    100       1.10     itohy 
    101       1.10     itohy /* Time in second before power down the chip. */
    102       1.10     itohy #ifndef YM_POWER_OFF_SEC
    103       1.10     itohy #define YM_POWER_OFF_SEC	5
    104       1.10     itohy #endif
    105       1.10     itohy 
    106       1.12     itohy /* Default mixer settings. */
    107       1.11     itohy #ifndef YM_VOL_MASTER
    108       1.20     itohy #define YM_VOL_MASTER		208
    109       1.11     itohy #endif
    110       1.11     itohy 
    111       1.11     itohy #ifndef YM_VOL_DAC
    112       1.11     itohy #define YM_VOL_DAC		224
    113       1.11     itohy #endif
    114       1.11     itohy 
    115       1.11     itohy #ifndef YM_VOL_OPL3
    116       1.11     itohy #define YM_VOL_OPL3		184
    117       1.11     itohy #endif
    118       1.11     itohy 
    119       1.16     itohy /*
    120       1.20     itohy  * Default position of the equalizer.
    121       1.16     itohy  */
    122       1.20     itohy #ifndef YM_DEFAULT_TREBLE
    123       1.20     itohy #define YM_DEFAULT_TREBLE	YM_EQ_FLAT_OFFSET
    124       1.16     itohy #endif
    125       1.20     itohy #ifndef YM_DEFAULT_BASS
    126       1.20     itohy #define YM_DEFAULT_BASS		YM_EQ_FLAT_OFFSET
    127       1.15  augustss #endif
    128       1.15  augustss 
    129       1.10     itohy #ifdef __i386__		/* XXX */
    130       1.10     itohy # include "joy.h"
    131       1.10     itohy #else
    132       1.10     itohy # define NJOY	0
    133       1.10     itohy #endif
    134       1.10     itohy 
    135       1.10     itohy #ifdef AUDIO_DEBUG
    136       1.10     itohy #define DPRINTF(x)	if (ymdebug) printf x
    137       1.10     itohy int	ymdebug = 0;
    138       1.10     itohy #else
    139       1.10     itohy #define DPRINTF(x)
    140       1.10     itohy #endif
    141       1.34    cegger #define DVNAME(softc)	(device_xname(&(softc)->sc_ad1848.sc_ad1848.sc_dev))
    142        1.1  augustss 
    143       1.24      kent int	ym_getdev(void *, struct audio_device *);
    144       1.24      kent int	ym_mixer_set_port(void *, mixer_ctrl_t *);
    145       1.24      kent int	ym_mixer_get_port(void *, mixer_ctrl_t *);
    146       1.24      kent int	ym_query_devinfo(void *, mixer_devinfo_t *);
    147       1.24      kent int	ym_intr(void *);
    148       1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    149       1.24      kent static void ym_save_codec_regs(struct ym_softc *);
    150       1.24      kent static void ym_restore_codec_regs(struct ym_softc *);
    151       1.24      kent void	ym_power_hook(int, void *);
    152       1.24      kent int	ym_codec_power_ctl(void *, int);
    153       1.24      kent static void ym_chip_powerdown(struct ym_softc *);
    154       1.24      kent static void ym_chip_powerup(struct ym_softc *, int);
    155  1.35.12.2        ad static void	ym_powerdown_blocks(struct ym_softc *);
    156  1.35.12.2        ad static void	ym_powerdown_callout(void *);
    157       1.24      kent void	ym_power_ctl(struct ym_softc *, int, int);
    158       1.24      kent #endif
    159       1.24      kent 
    160       1.24      kent static void ym_init(struct ym_softc *);
    161       1.24      kent static void ym_mute(struct ym_softc *, int, int);
    162       1.24      kent static void ym_set_master_gain(struct ym_softc *, struct ad1848_volume*);
    163       1.24      kent static void ym_hvol_to_master_gain(struct ym_softc *);
    164       1.24      kent static void ym_set_mic_gain(struct ym_softc *, int);
    165       1.24      kent static void ym_set_3d(struct ym_softc *, mixer_ctrl_t *,
    166       1.24      kent 	struct ad1848_volume *, int);
    167        1.1  augustss 
    168        1.1  augustss 
    169       1.23      yamt const struct audio_hw_if ym_hw_if = {
    170        1.5        pk 	ad1848_isa_open,
    171        1.5        pk 	ad1848_isa_close,
    172        1.1  augustss 	NULL,
    173        1.1  augustss 	ad1848_query_encoding,
    174        1.1  augustss 	ad1848_set_params,
    175        1.8   mycroft 	ad1848_round_blocksize,
    176        1.1  augustss 	ad1848_commit_settings,
    177        1.8   mycroft 	NULL,
    178        1.8   mycroft 	NULL,
    179        1.8   mycroft 	NULL,
    180        1.8   mycroft 	NULL,
    181        1.9   mycroft 	ad1848_isa_halt_output,
    182        1.9   mycroft 	ad1848_isa_halt_input,
    183        1.1  augustss 	NULL,
    184        1.1  augustss 	ym_getdev,
    185        1.1  augustss 	NULL,
    186        1.1  augustss 	ym_mixer_set_port,
    187        1.1  augustss 	ym_mixer_get_port,
    188        1.1  augustss 	ym_query_devinfo,
    189        1.5        pk 	ad1848_isa_malloc,
    190        1.5        pk 	ad1848_isa_free,
    191        1.7   mycroft 	ad1848_isa_round_buffersize,
    192        1.5        pk 	ad1848_isa_mappage,
    193        1.5        pk 	ad1848_isa_get_props,
    194        1.8   mycroft 	ad1848_isa_trigger_output,
    195        1.8   mycroft 	ad1848_isa_trigger_input,
    196       1.18  augustss 	NULL,
    197       1.28  christos 	NULL,	/* powerstate */
    198  1.35.12.1        ad 	ad1848_get_locks,
    199        1.1  augustss };
    200        1.1  augustss 
    201       1.27     perry static inline int ym_read(struct ym_softc *, int);
    202       1.27     perry static inline void ym_write(struct ym_softc *, int, int);
    203        1.1  augustss 
    204        1.1  augustss void
    205       1.24      kent ym_attach(struct ym_softc *sc)
    206        1.1  augustss {
    207       1.11     itohy 	static struct ad1848_volume vol_master = {YM_VOL_MASTER, YM_VOL_MASTER};
    208       1.11     itohy 	static struct ad1848_volume vol_dac    = {YM_VOL_DAC,    YM_VOL_DAC};
    209       1.11     itohy 	static struct ad1848_volume vol_opl3   = {YM_VOL_OPL3,   YM_VOL_OPL3};
    210       1.24      kent 	struct ad1848_softc *ac;
    211       1.15  augustss 	mixer_ctrl_t mctl;
    212       1.10     itohy 	struct audio_attach_args arg;
    213       1.10     itohy 
    214       1.24      kent 	ac = &sc->sc_ad1848.sc_ad1848;
    215  1.35.12.2        ad 	callout_init(&sc->sc_powerdown_ch, CALLOUT_MPSAFE);
    216  1.35.12.2        ad 	cv_init(&sc->sc_cv, "ym");
    217  1.35.12.2        ad 	ad1848_init_locks(ac, IPL_SCHED);
    218       1.14   thorpej 
    219       1.11     itohy 	/* Mute the output to reduce noise during initialization. */
    220       1.11     itohy 	ym_mute(sc, SA3_VOL_L, 1);
    221       1.11     itohy 	ym_mute(sc, SA3_VOL_R, 1);
    222       1.11     itohy 
    223       1.21     itohy 	sc->sc_version = ym_read(sc, SA3_MISC) & SA3_MISC_VER;
    224       1.21     itohy 	ac->chip_name = YM_IS_SA3(sc) ? "OPL3-SA3" : "OPL3-SA2";
    225       1.21     itohy 
    226        1.5        pk 	sc->sc_ad1848.sc_ih = isa_intr_establish(sc->sc_ic, sc->ym_irq,
    227  1.35.12.2        ad 	    IST_EDGE, IPL_SCHED, ym_intr, sc);
    228        1.1  augustss 
    229       1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    230       1.10     itohy 	sc->sc_ad1848.powerctl = ym_codec_power_ctl;
    231       1.10     itohy 	sc->sc_ad1848.powerarg = sc;
    232       1.10     itohy #endif
    233        1.6  augustss 	ad1848_isa_attach(&sc->sc_ad1848);
    234        1.2  augustss 	printf("\n");
    235        1.5        pk 	ac->parent = sc;
    236        1.2  augustss 
    237        1.2  augustss 	/* Establish chip in well known mode */
    238       1.11     itohy 	ym_set_master_gain(sc, &vol_master);
    239       1.10     itohy 	ym_set_mic_gain(sc, 0);
    240        1.2  augustss 	sc->master_mute = 0;
    241       1.10     itohy 
    242       1.11     itohy 	/* Override ad1848 settings. */
    243       1.11     itohy 	ad1848_set_channel_gain(ac, AD1848_DAC_CHANNEL, &vol_dac);
    244       1.11     itohy 	ad1848_set_channel_gain(ac, AD1848_AUX2_CHANNEL, &vol_opl3);
    245       1.15  augustss 
    246       1.13     itohy 	/*
    247       1.13     itohy 	 * Mute all external sources.  If you change this, you must
    248       1.13     itohy 	 * also change the initial value of sc->sc_external_sources
    249       1.13     itohy 	 * (currently 0 --- no external source is active).
    250       1.13     itohy 	 */
    251       1.20     itohy 	sc->mic_mute = 1;
    252       1.20     itohy 	ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
    253       1.13     itohy 	ad1848_mute_channel(ac, AD1848_AUX1_CHANNEL, MUTE_ALL);	/* CD */
    254       1.13     itohy 	ad1848_mute_channel(ac, AD1848_LINE_CHANNEL, MUTE_ALL);	/* line */
    255       1.13     itohy 	ac->mute[AD1848_AUX1_CHANNEL] = MUTE_ALL;
    256       1.13     itohy 	ac->mute[AD1848_LINE_CHANNEL] = MUTE_ALL;
    257       1.13     itohy 	/* speaker is muted by default */
    258       1.13     itohy 
    259       1.10     itohy 	/* We use only one IRQ (IRQ-A). */
    260       1.10     itohy 	ym_write(sc, SA3_IRQ_CONF, SA3_IRQ_CONF_MPU_A | SA3_IRQ_CONF_WSS_A);
    261       1.10     itohy 	ym_write(sc, SA3_HVOL_INTR_CNF, SA3_HVOL_INTR_CNF_A);
    262       1.10     itohy 
    263       1.10     itohy 	/* audio at ym attachment */
    264       1.10     itohy 	sc->sc_audiodev = audio_attach_mi(&ym_hw_if, ac, &ac->sc_dev);
    265       1.10     itohy 
    266       1.10     itohy 	/* opl at ym attachment */
    267       1.10     itohy 	if (sc->sc_opl_ioh) {
    268       1.10     itohy 		arg.type = AUDIODEV_TYPE_OPL;
    269       1.10     itohy 		arg.hwif = 0;
    270       1.10     itohy 		arg.hdl = 0;
    271       1.10     itohy 		(void)config_found(&ac->sc_dev, &arg, audioprint);
    272       1.10     itohy 	}
    273       1.10     itohy 
    274       1.10     itohy #if NMPU_YM > 0
    275       1.10     itohy 	/* mpu at ym attachment */
    276       1.10     itohy 	if (sc->sc_mpu_ioh) {
    277       1.10     itohy 		arg.type = AUDIODEV_TYPE_MPU;
    278       1.10     itohy 		arg.hwif = 0;
    279       1.10     itohy 		arg.hdl = 0;
    280       1.10     itohy 		sc->sc_mpudev = config_found(&ac->sc_dev, &arg, audioprint);
    281       1.10     itohy 	}
    282       1.10     itohy #endif
    283       1.10     itohy 
    284       1.10     itohy 	/* This must be AFTER the attachment of sub-devices. */
    285  1.35.12.2        ad 	mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
    286       1.10     itohy 	ym_init(sc);
    287       1.10     itohy 
    288       1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    289       1.10     itohy 	/*
    290       1.10     itohy 	 * Initialize power control.
    291       1.10     itohy 	 */
    292       1.10     itohy 	sc->sc_pow_mode = YM_POWER_MODE;
    293       1.10     itohy 	sc->sc_pow_timeout = YM_POWER_OFF_SEC;
    294       1.10     itohy 
    295       1.10     itohy 	sc->sc_on_blocks = sc->sc_turning_off =
    296       1.24      kent 	    YM_POWER_CODEC_P | YM_POWER_CODEC_R |
    297       1.24      kent 	    YM_POWER_OPL3 | YM_POWER_MPU401 | YM_POWER_3D |
    298       1.24      kent 	    YM_POWER_CODEC_DA | YM_POWER_CODEC_AD | YM_POWER_OPL3_DA;
    299       1.10     itohy #if NJOY > 0
    300       1.11     itohy 	sc->sc_on_blocks |= YM_POWER_JOYSTICK;	/* prevents chip powerdown */
    301       1.10     itohy #endif
    302       1.10     itohy 	ym_powerdown_blocks(sc);
    303  1.35.12.2        ad 	mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
    304        1.1  augustss 
    305       1.29  jmcneill 	powerhook_establish(DVNAME(sc), ym_power_hook, sc);
    306       1.10     itohy #endif
    307       1.16     itohy 
    308       1.16     itohy 	/* Set tone control to the default position. */
    309       1.16     itohy 	mctl.un.value.num_channels = 1;
    310       1.20     itohy 	mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_TREBLE;
    311       1.16     itohy 	mctl.dev = YM_MASTER_TREBLE;
    312       1.16     itohy 	ym_mixer_set_port(sc, &mctl);
    313       1.20     itohy 	mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_BASS;
    314       1.16     itohy 	mctl.dev = YM_MASTER_BASS;
    315       1.16     itohy 	ym_mixer_set_port(sc, &mctl);
    316       1.20     itohy 
    317       1.20     itohy 	/* Unmute the output now if the chip is on. */
    318       1.20     itohy #ifndef AUDIO_NO_POWER_CTL
    319       1.20     itohy 	if (sc->sc_on_blocks & YM_POWER_ACTIVE)
    320       1.16     itohy #endif
    321       1.20     itohy 	{
    322       1.20     itohy 		ym_mute(sc, SA3_VOL_L, sc->master_mute);
    323       1.20     itohy 		ym_mute(sc, SA3_VOL_R, sc->master_mute);
    324       1.20     itohy 	}
    325        1.1  augustss }
    326        1.1  augustss 
    327       1.27     perry static inline int
    328       1.24      kent ym_read(struct ym_softc *sc, int reg)
    329        1.1  augustss {
    330       1.24      kent 
    331       1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
    332       1.24      kent 	    SA3_CTL_INDEX, (reg & 0xff));
    333       1.24      kent 	return bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_DATA);
    334        1.1  augustss }
    335        1.1  augustss 
    336       1.27     perry static inline void
    337       1.24      kent ym_write(struct ym_softc *sc, int reg, int data)
    338        1.1  augustss {
    339       1.24      kent 
    340       1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
    341       1.24      kent 	    SA3_CTL_INDEX, (reg & 0xff));
    342       1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
    343       1.24      kent 	    SA3_CTL_DATA, (data & 0xff));
    344        1.1  augustss }
    345        1.1  augustss 
    346       1.10     itohy static void
    347       1.24      kent ym_init(struct ym_softc *sc)
    348       1.10     itohy {
    349       1.24      kent 	uint8_t dpd, apd;
    350       1.10     itohy 
    351  1.35.12.2        ad 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
    352  1.35.12.2        ad 
    353       1.10     itohy 	/* Mute SoundBlaster output if possible. */
    354       1.10     itohy 	if (sc->sc_sb_ioh) {
    355       1.10     itohy 		bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_ADDR,
    356       1.24      kent 		    SBP_MASTER_VOL);
    357       1.10     itohy 		bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_DATA,
    358       1.24      kent 		    0x00);
    359       1.10     itohy 	}
    360       1.10     itohy 
    361       1.21     itohy 	if (!YM_IS_SA3(sc)) {
    362       1.21     itohy 		/* OPL3-SA2 */
    363       1.21     itohy 		ym_write(sc, SA3_PWR_MNG, SA2_PWR_MNG_CLKO |
    364       1.21     itohy 		    (sc->sc_opl_ioh == 0 ? SA2_PWR_MNG_FMPS : 0));
    365       1.21     itohy 		return;
    366       1.21     itohy 	}
    367       1.21     itohy 
    368       1.21     itohy 	/* OPL3-SA3 */
    369       1.10     itohy 	/* Figure out which part can be power down. */
    370       1.10     itohy 	dpd = SA3_DPWRDWN_SB		/* we never use SB */
    371       1.10     itohy #if NMPU_YM > 0
    372       1.24      kent 	    | (sc->sc_mpu_ioh ? 0 : SA3_DPWRDWN_MPU)
    373       1.10     itohy #else
    374       1.24      kent 	    | SA3_DPWRDWN_MPU
    375       1.10     itohy #endif
    376       1.10     itohy #if NJOY == 0
    377       1.24      kent 	    | SA3_DPWRDWN_JOY
    378       1.10     itohy #endif
    379       1.24      kent 	    | SA3_DPWRDWN_PNP	/* ISA Plug and Play is done */
    380       1.24      kent 	    /*
    381       1.24      kent 	     * The master clock is for external wavetable synthesizer
    382       1.24      kent 	     * OPL4-ML (YMF704) or OPL4-ML2 (YMF721),
    383       1.24      kent 	     * and is currently unused.
    384       1.24      kent 	     */
    385       1.24      kent 	    | SA3_DPWRDWN_MCLKO;
    386       1.10     itohy 
    387       1.10     itohy 	apd = SA3_APWRDWN_SBDAC;	/* we never use SB */
    388       1.10     itohy 
    389       1.10     itohy 	/* Power down OPL3 if not attached. */
    390       1.10     itohy 	if (sc->sc_opl_ioh == 0) {
    391       1.10     itohy 		dpd |= SA3_DPWRDWN_FM;
    392       1.10     itohy 		apd |= SA3_APWRDWN_FMDAC;
    393       1.10     itohy 	}
    394       1.10     itohy 	/* CODEC is always attached. */
    395       1.10     itohy 
    396       1.10     itohy 	/* Power down unused digital parts. */
    397       1.10     itohy 	ym_write(sc, SA3_DPWRDWN, dpd);
    398       1.10     itohy 
    399       1.10     itohy 	/* Power down unused analog parts. */
    400       1.10     itohy 	ym_write(sc, SA3_APWRDWN, apd);
    401       1.10     itohy }
    402        1.1  augustss 
    403        1.1  augustss 
    404        1.1  augustss int
    405       1.24      kent ym_getdev(void *addr, struct audio_device *retp)
    406        1.1  augustss {
    407       1.24      kent 	struct ym_softc *sc;
    408       1.24      kent 	struct ad1848_softc *ac;
    409       1.10     itohy 
    410       1.24      kent 	sc = addr;
    411       1.24      kent 	ac = &sc->sc_ad1848.sc_ad1848;
    412       1.22    itojun 	strlcpy(retp->name, ac->chip_name, sizeof(retp->name));
    413       1.22    itojun 	snprintf(retp->version, sizeof(retp->version), "%d", sc->sc_version);
    414       1.22    itojun 	strlcpy(retp->config, "ym", sizeof(retp->config));
    415       1.10     itohy 
    416        1.2  augustss 	return 0;
    417        1.1  augustss }
    418        1.1  augustss 
    419        1.1  augustss 
    420        1.1  augustss static ad1848_devmap_t mappings[] = {
    421       1.10     itohy 	{ YM_DAC_LVL, AD1848_KIND_LVL, AD1848_DAC_CHANNEL },
    422        1.2  augustss 	{ YM_MIDI_LVL, AD1848_KIND_LVL, AD1848_AUX2_CHANNEL },
    423        1.2  augustss 	{ YM_CD_LVL, AD1848_KIND_LVL, AD1848_AUX1_CHANNEL },
    424        1.2  augustss 	{ YM_LINE_LVL, AD1848_KIND_LVL, AD1848_LINE_CHANNEL },
    425        1.2  augustss 	{ YM_SPEAKER_LVL, AD1848_KIND_LVL, AD1848_MONO_CHANNEL },
    426        1.2  augustss 	{ YM_MONITOR_LVL, AD1848_KIND_LVL, AD1848_MONITOR_CHANNEL },
    427       1.10     itohy 	{ YM_DAC_MUTE, AD1848_KIND_MUTE, AD1848_DAC_CHANNEL },
    428        1.2  augustss 	{ YM_MIDI_MUTE, AD1848_KIND_MUTE, AD1848_AUX2_CHANNEL },
    429        1.2  augustss 	{ YM_CD_MUTE, AD1848_KIND_MUTE, AD1848_AUX1_CHANNEL },
    430        1.2  augustss 	{ YM_LINE_MUTE, AD1848_KIND_MUTE, AD1848_LINE_CHANNEL },
    431        1.2  augustss 	{ YM_SPEAKER_MUTE, AD1848_KIND_MUTE, AD1848_MONO_CHANNEL },
    432        1.2  augustss 	{ YM_MONITOR_MUTE, AD1848_KIND_MUTE, AD1848_MONITOR_CHANNEL },
    433        1.2  augustss 	{ YM_REC_LVL, AD1848_KIND_RECORDGAIN, -1 },
    434        1.2  augustss 	{ YM_RECORD_SOURCE, AD1848_KIND_RECORDSOURCE, -1}
    435        1.1  augustss };
    436        1.1  augustss 
    437       1.10     itohy #define NUMMAP	(sizeof(mappings) / sizeof(mappings[0]))
    438        1.1  augustss 
    439        1.1  augustss 
    440        1.1  augustss static void
    441       1.24      kent ym_mute(struct ym_softc *sc, int left_reg, int mute)
    442        1.1  augustss {
    443       1.24      kent 	uint8_t reg;
    444        1.1  augustss 
    445       1.10     itohy 	reg = ym_read(sc, left_reg);
    446       1.10     itohy 	if (mute)
    447       1.10     itohy 		ym_write(sc, left_reg, reg | 0x80);
    448       1.10     itohy 	else
    449       1.10     itohy 		ym_write(sc, left_reg, reg & ~0x80);
    450        1.1  augustss }
    451        1.1  augustss 
    452        1.1  augustss 
    453        1.1  augustss static void
    454       1.24      kent ym_set_master_gain(struct ym_softc *sc, struct ad1848_volume *vol)
    455        1.1  augustss {
    456       1.21     itohy 	u_int atten;
    457       1.10     itohy 
    458        1.2  augustss 	sc->master_gain = *vol;
    459       1.10     itohy 
    460       1.10     itohy 	atten = ((AUDIO_MAX_GAIN - vol->left) * (SA3_VOL_MV + 1)) /
    461       1.10     itohy 		(AUDIO_MAX_GAIN + 1);
    462       1.10     itohy 
    463       1.10     itohy 	ym_write(sc, SA3_VOL_L, (ym_read(sc, SA3_VOL_L) & ~SA3_VOL_MV) | atten);
    464       1.10     itohy 
    465       1.10     itohy 	atten = ((AUDIO_MAX_GAIN - vol->right) * (SA3_VOL_MV + 1)) /
    466       1.10     itohy 		(AUDIO_MAX_GAIN + 1);
    467       1.10     itohy 
    468       1.10     itohy 	ym_write(sc, SA3_VOL_R, (ym_read(sc, SA3_VOL_R) & ~SA3_VOL_MV) | atten);
    469        1.1  augustss }
    470        1.1  augustss 
    471       1.21     itohy /*
    472       1.21     itohy  * Read current setting of master volume from hardware
    473       1.21     itohy  * and update the software value if changed.
    474       1.21     itohy  * [SA3] This function clears hardware volume interrupt.
    475       1.21     itohy  */
    476       1.21     itohy static void
    477       1.24      kent ym_hvol_to_master_gain(struct ym_softc *sc)
    478       1.21     itohy {
    479       1.21     itohy 	u_int prevval, val;
    480       1.24      kent 	int changed;
    481       1.21     itohy 
    482       1.24      kent 	changed = 0;
    483       1.21     itohy 	val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_L);
    484       1.21     itohy 	prevval = (sc->master_gain.left * (SA3_VOL_MV + 1)) /
    485       1.21     itohy 	    (AUDIO_MAX_GAIN + 1);
    486       1.21     itohy 	if (val != prevval) {
    487       1.21     itohy 		sc->master_gain.left =
    488       1.21     itohy 		    val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
    489       1.21     itohy 		changed = 1;
    490       1.21     itohy 	}
    491       1.21     itohy 
    492       1.21     itohy 	val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_R);
    493       1.21     itohy 	prevval = (sc->master_gain.right * (SA3_VOL_MV + 1)) /
    494       1.21     itohy 	    (AUDIO_MAX_GAIN + 1);
    495       1.21     itohy 	if (val != prevval) {
    496       1.21     itohy 		sc->master_gain.right =
    497       1.21     itohy 		    val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
    498       1.21     itohy 		changed = 1;
    499       1.21     itohy 	}
    500       1.21     itohy 
    501       1.21     itohy #if 0	/* XXX NOT YET */
    502       1.21     itohy 	/* Notify the change to async processes. */
    503       1.21     itohy 	if (changed && sc->sc_audiodev)
    504       1.21     itohy 		mixer_signal(sc->sc_audiodev);
    505       1.21     itohy #endif
    506       1.21     itohy }
    507       1.21     itohy 
    508        1.1  augustss static void
    509       1.24      kent ym_set_mic_gain(struct ym_softc *sc, int vol)
    510        1.1  augustss {
    511       1.10     itohy 	u_int atten;
    512       1.10     itohy 
    513       1.10     itohy 	sc->mic_gain = vol;
    514       1.10     itohy 
    515       1.10     itohy 	atten = ((AUDIO_MAX_GAIN - vol) * (SA3_MIC_MCV + 1)) /
    516       1.10     itohy 		(AUDIO_MAX_GAIN + 1);
    517       1.10     itohy 
    518       1.10     itohy 	ym_write(sc, SA3_MIC_VOL,
    519       1.10     itohy 		 (ym_read(sc, SA3_MIC_VOL) & ~SA3_MIC_MCV) | atten);
    520       1.10     itohy }
    521        1.1  augustss 
    522       1.10     itohy static void
    523       1.24      kent ym_set_3d(struct ym_softc *sc, mixer_ctrl_t *cp,
    524       1.24      kent     struct ad1848_volume *val, int reg)
    525       1.10     itohy {
    526       1.24      kent 	uint8_t l, r, e;
    527        1.1  augustss 
    528  1.35.12.2        ad 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
    529  1.35.12.2        ad 
    530       1.10     itohy 	ad1848_to_vol(cp, val);
    531        1.1  augustss 
    532       1.20     itohy 	l = val->left;
    533       1.20     itohy 	r = val->right;
    534       1.20     itohy 	if (reg != SA3_3D_WIDE) {
    535       1.20     itohy 		/* flat on center */
    536       1.20     itohy 		l = YM_EQ_EXPAND_VALUE(l);
    537       1.20     itohy 		r = YM_EQ_EXPAND_VALUE(r);
    538       1.20     itohy 	}
    539       1.20     itohy 
    540       1.20     itohy 	e = (l * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
    541       1.24      kent 	    (AUDIO_MAX_GAIN + 1) << SA3_3D_LSHIFT |
    542       1.20     itohy 	    (r * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
    543       1.24      kent 	    (AUDIO_MAX_GAIN + 1) << SA3_3D_RSHIFT;
    544       1.10     itohy 
    545       1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    546       1.10     itohy 	/* turn wide stereo on if necessary */
    547       1.10     itohy 	if (e)
    548       1.10     itohy 		ym_power_ctl(sc, YM_POWER_3D, 1);
    549       1.10     itohy #endif
    550       1.10     itohy 
    551       1.10     itohy 	ym_write(sc, reg, e);
    552       1.10     itohy 
    553       1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    554       1.10     itohy 	/* turn wide stereo off if necessary */
    555       1.10     itohy 	if (YM_EQ_OFF(&sc->sc_treble) && YM_EQ_OFF(&sc->sc_bass) &&
    556       1.20     itohy 	    YM_WIDE_OFF(&sc->sc_wide))
    557       1.10     itohy 		ym_power_ctl(sc, YM_POWER_3D, 0);
    558       1.10     itohy #endif
    559        1.1  augustss }
    560        1.1  augustss 
    561        1.1  augustss int
    562       1.24      kent ym_mixer_set_port(void *addr, mixer_ctrl_t *cp)
    563        1.1  augustss {
    564       1.24      kent 	struct ad1848_softc *ac;
    565       1.24      kent 	struct ym_softc *sc;
    566        1.2  augustss 	struct ad1848_volume vol;
    567       1.24      kent 	int error;
    568       1.24      kent 	uint8_t extsources;
    569        1.1  augustss 
    570       1.24      kent 	ac = addr;
    571       1.24      kent 	sc = ac->parent;
    572       1.24      kent 	error = 0;
    573       1.10     itohy 	DPRINTF(("%s: ym_mixer_set_port: dev 0x%x, type 0x%x, 0x%x (%d; %d, %d)\n",
    574       1.10     itohy 		DVNAME(sc), cp->dev, cp->type, cp->un.ord,
    575       1.10     itohy 		cp->un.value.num_channels, cp->un.value.level[0],
    576       1.10     itohy 		cp->un.value.level[1]));
    577       1.10     itohy 
    578       1.21     itohy 	/* SA2 doesn't have equalizer */
    579       1.21     itohy 	if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
    580       1.21     itohy 		return ENXIO;
    581       1.21     itohy 
    582  1.35.12.2        ad 	mutex_spin_enter(&ac->sc_intr_lock);
    583  1.35.12.2        ad 
    584       1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    585       1.10     itohy 	/* Power-up chip */
    586       1.10     itohy 	ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
    587       1.10     itohy #endif
    588        1.1  augustss 
    589        1.2  augustss 	switch (cp->dev) {
    590        1.2  augustss 	case YM_OUTPUT_LVL:
    591        1.2  augustss 		ad1848_to_vol(cp, &vol);
    592        1.2  augustss 		ym_set_master_gain(sc, &vol);
    593       1.10     itohy 		goto out;
    594        1.2  augustss 
    595        1.2  augustss 	case YM_OUTPUT_MUTE:
    596        1.2  augustss 		sc->master_mute = (cp->un.ord != 0);
    597       1.10     itohy 		ym_mute(sc, SA3_VOL_L, sc->master_mute);
    598       1.10     itohy 		ym_mute(sc, SA3_VOL_R, sc->master_mute);
    599       1.10     itohy 		goto out;
    600        1.2  augustss 
    601        1.2  augustss 	case YM_MIC_LVL:
    602        1.2  augustss 		if (cp->un.value.num_channels != 1)
    603        1.2  augustss 			error = EINVAL;
    604       1.10     itohy 		else
    605       1.10     itohy 			ym_set_mic_gain(sc,
    606       1.24      kent 			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
    607       1.10     itohy 		goto out;
    608       1.10     itohy 
    609       1.10     itohy 	case YM_MASTER_EQMODE:
    610       1.10     itohy 		sc->sc_eqmode = cp->un.ord & SA3_SYS_CTL_YMODE;
    611       1.10     itohy 		ym_write(sc, SA3_SYS_CTL, (ym_read(sc, SA3_SYS_CTL) &
    612       1.24      kent 			     ~SA3_SYS_CTL_YMODE) | sc->sc_eqmode);
    613       1.10     itohy 		goto out;
    614       1.10     itohy 
    615       1.10     itohy 	case YM_MASTER_TREBLE:
    616       1.10     itohy 		ym_set_3d(sc, cp, &sc->sc_treble, SA3_3D_TREBLE);
    617       1.10     itohy 		goto out;
    618       1.10     itohy 
    619       1.10     itohy 	case YM_MASTER_BASS:
    620       1.10     itohy 		ym_set_3d(sc, cp, &sc->sc_bass, SA3_3D_BASS);
    621       1.10     itohy 		goto out;
    622       1.10     itohy 
    623       1.10     itohy 	case YM_MASTER_WIDE:
    624       1.10     itohy 		ym_set_3d(sc, cp, &sc->sc_wide, SA3_3D_WIDE);
    625       1.10     itohy 		goto out;
    626       1.10     itohy 
    627       1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    628       1.10     itohy 	case YM_PWR_MODE:
    629       1.10     itohy 		if ((unsigned) cp->un.ord > YM_POWER_NOSAVE)
    630       1.10     itohy 			error = EINVAL;
    631       1.10     itohy 		else
    632       1.10     itohy 			sc->sc_pow_mode = cp->un.ord;
    633       1.10     itohy 		goto out;
    634       1.10     itohy 
    635       1.10     itohy 	case YM_PWR_TIMEOUT:
    636       1.10     itohy 		if (cp->un.value.num_channels != 1)
    637       1.10     itohy 			error = EINVAL;
    638       1.10     itohy 		else
    639       1.10     itohy 			sc->sc_pow_timeout =
    640       1.24      kent 			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
    641       1.10     itohy 		goto out;
    642       1.10     itohy 
    643       1.10     itohy 	/*
    644       1.13     itohy 	 * Needs power-up to hear external sources.
    645       1.13     itohy 	 */
    646       1.13     itohy 	case YM_CD_MUTE:
    647       1.13     itohy 	case YM_LINE_MUTE:
    648       1.13     itohy 	case YM_SPEAKER_MUTE:
    649       1.20     itohy 	case YM_MIC_MUTE:
    650       1.13     itohy 		extsources = YM_MIXER_TO_XS(cp->dev);
    651       1.13     itohy 		if (cp->un.ord) {
    652       1.13     itohy 			if ((sc->sc_external_sources &= ~extsources) == 0) {
    653       1.13     itohy 				/*
    654       1.13     itohy 				 * All the external sources are muted
    655       1.13     itohy 				 *  --- no need to keep the chip on.
    656       1.13     itohy 				 */
    657       1.13     itohy 				ym_power_ctl(sc, YM_POWER_EXT_SRC, 0);
    658       1.13     itohy 				DPRINTF(("%s: ym_mixer_set_port: off for ext\n",
    659       1.13     itohy 					DVNAME(sc)));
    660       1.13     itohy 			}
    661       1.13     itohy 		} else {
    662       1.13     itohy 			/* mute off - power-up the chip */
    663       1.13     itohy 			sc->sc_external_sources |= extsources;
    664       1.13     itohy 			ym_power_ctl(sc, YM_POWER_EXT_SRC, 1);
    665       1.13     itohy 			DPRINTF(("%s: ym_mixer_set_port: on for ext\n",
    666       1.13     itohy 				DVNAME(sc)));
    667       1.13     itohy 		}
    668       1.13     itohy 		break;	/* fall to ad1848_mixer_set_port() */
    669       1.13     itohy 
    670       1.13     itohy 	/*
    671       1.10     itohy 	 * Power on/off the playback part for monitoring.
    672       1.10     itohy 	 */
    673       1.10     itohy 	case YM_MONITOR_MUTE:
    674       1.10     itohy 		if ((ac->open_mode & (FREAD | FWRITE)) == FREAD)
    675       1.10     itohy 			ym_power_ctl(sc, YM_POWER_CODEC_P | YM_POWER_CODEC_DA,
    676       1.24      kent 			    cp->un.ord == 0);
    677       1.10     itohy 		break;	/* fall to ad1848_mixer_set_port() */
    678       1.10     itohy #endif
    679       1.10     itohy 	}
    680       1.10     itohy 
    681       1.10     itohy 	error = ad1848_mixer_set_port(ac, mappings, NUMMAP, cp);
    682       1.10     itohy 
    683       1.10     itohy 	if (error != ENXIO)
    684       1.10     itohy 		goto out;
    685       1.10     itohy 
    686       1.10     itohy 	error = 0;
    687        1.2  augustss 
    688       1.10     itohy 	switch (cp->dev) {
    689        1.2  augustss 	case YM_MIC_MUTE:
    690        1.2  augustss 		sc->mic_mute = (cp->un.ord != 0);
    691       1.10     itohy 		ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
    692        1.2  augustss 		break;
    693        1.2  augustss 
    694        1.2  augustss 	default:
    695       1.10     itohy 		error = ENXIO;
    696       1.10     itohy 		break;
    697        1.2  augustss 	}
    698       1.10     itohy 
    699       1.10     itohy out:
    700       1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    701       1.10     itohy 	/* Power-down chip */
    702       1.10     itohy 	ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
    703       1.10     itohy #endif
    704  1.35.12.2        ad 	mutex_spin_exit(&ac->sc_intr_lock);
    705       1.10     itohy 
    706       1.24      kent 	return error;
    707        1.1  augustss }
    708        1.1  augustss 
    709        1.1  augustss int
    710       1.24      kent ym_mixer_get_port(void *addr, mixer_ctrl_t *cp)
    711        1.1  augustss {
    712       1.24      kent 	struct ad1848_softc *ac;
    713       1.24      kent 	struct ym_softc *sc;
    714       1.10     itohy 	int error;
    715        1.1  augustss 
    716       1.24      kent 	ac = addr;
    717       1.24      kent 	sc = ac->parent;
    718       1.21     itohy 	/* SA2 doesn't have equalizer */
    719       1.21     itohy 	if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
    720       1.21     itohy 		return ENXIO;
    721       1.21     itohy 
    722        1.2  augustss 	switch (cp->dev) {
    723        1.2  augustss 	case YM_OUTPUT_LVL:
    724       1.21     itohy 		if (!YM_IS_SA3(sc)) {
    725       1.21     itohy 			/*
    726       1.21     itohy 			 * SA2 doesn't have hardware volume interrupt.
    727       1.21     itohy 			 * Read current value and update every time.
    728       1.21     itohy 			 */
    729  1.35.12.2        ad 			mutex_spin_enter(&ac->sc_intr_lock);
    730       1.21     itohy #ifndef AUDIO_NO_POWER_CTL
    731       1.21     itohy 			/* Power-up chip */
    732       1.21     itohy 			ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
    733       1.21     itohy #endif
    734       1.21     itohy 			ym_hvol_to_master_gain(sc);
    735       1.21     itohy #ifndef AUDIO_NO_POWER_CTL
    736       1.21     itohy 			/* Power-down chip */
    737       1.21     itohy 			ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
    738       1.21     itohy #endif
    739  1.35.12.2        ad 			mutex_spin_exit(&ac->sc_intr_lock);
    740       1.21     itohy 		}
    741        1.2  augustss 		ad1848_from_vol(cp, &sc->master_gain);
    742       1.10     itohy 		return 0;
    743       1.10     itohy 
    744        1.2  augustss 	case YM_OUTPUT_MUTE:
    745        1.2  augustss 		cp->un.ord = sc->master_mute;
    746       1.10     itohy 		return 0;
    747       1.10     itohy 
    748        1.2  augustss 	case YM_MIC_LVL:
    749        1.2  augustss 		if (cp->un.value.num_channels != 1)
    750       1.10     itohy 			return EINVAL;
    751       1.10     itohy 		cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->mic_gain;
    752       1.10     itohy 		return 0;
    753       1.10     itohy 
    754       1.10     itohy 	case YM_MASTER_EQMODE:
    755       1.10     itohy 		cp->un.ord = sc->sc_eqmode;
    756       1.10     itohy 		return 0;
    757       1.10     itohy 
    758       1.10     itohy 	case YM_MASTER_TREBLE:
    759       1.10     itohy 		ad1848_from_vol(cp, &sc->sc_treble);
    760       1.10     itohy 		return 0;
    761       1.10     itohy 
    762       1.10     itohy 	case YM_MASTER_BASS:
    763       1.10     itohy 		ad1848_from_vol(cp, &sc->sc_bass);
    764       1.10     itohy 		return 0;
    765       1.10     itohy 
    766       1.10     itohy 	case YM_MASTER_WIDE:
    767       1.10     itohy 		ad1848_from_vol(cp, &sc->sc_wide);
    768       1.10     itohy 		return 0;
    769       1.10     itohy 
    770       1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    771       1.10     itohy 	case YM_PWR_MODE:
    772       1.10     itohy 		cp->un.ord = sc->sc_pow_mode;
    773       1.10     itohy 		return 0;
    774       1.10     itohy 
    775       1.10     itohy 	case YM_PWR_TIMEOUT:
    776       1.10     itohy 		if (cp->un.value.num_channels != 1)
    777       1.10     itohy 			return EINVAL;
    778       1.10     itohy 		cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_pow_timeout;
    779       1.10     itohy 		return 0;
    780       1.10     itohy #endif
    781       1.10     itohy 	}
    782       1.10     itohy 
    783       1.10     itohy 	error = ad1848_mixer_get_port(ac, mappings, NUMMAP, cp);
    784       1.10     itohy 
    785       1.10     itohy 	if (error != ENXIO)
    786       1.24      kent 		return error;
    787       1.10     itohy 
    788       1.10     itohy 	error = 0;
    789       1.10     itohy 
    790       1.10     itohy 	switch (cp->dev) {
    791        1.2  augustss 	case YM_MIC_MUTE:
    792        1.2  augustss 		cp->un.ord = sc->mic_mute;
    793        1.2  augustss 		break;
    794       1.10     itohy 
    795        1.2  augustss 	default:
    796        1.2  augustss 		error = ENXIO;
    797        1.2  augustss 		break;
    798        1.2  augustss 	}
    799       1.10     itohy 
    800       1.24      kent 	return error;
    801        1.1  augustss }
    802        1.1  augustss 
    803       1.25  christos static const char *mixer_classes[] = {
    804       1.10     itohy 	AudioCinputs, AudioCrecord, AudioCoutputs, AudioCmonitor,
    805       1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    806       1.21     itohy 	AudioCpower,
    807       1.10     itohy #endif
    808       1.21     itohy 	AudioCequalization
    809       1.10     itohy };
    810        1.1  augustss 
    811        1.1  augustss int
    812       1.24      kent ym_query_devinfo(void *addr, mixer_devinfo_t *dip)
    813        1.1  augustss {
    814       1.25  christos 	static const char *mixer_port_names[] = {
    815       1.10     itohy 		AudioNdac, AudioNmidi, AudioNcd, AudioNline, AudioNspeaker,
    816       1.10     itohy 		AudioNmicrophone, AudioNmonitor
    817       1.10     itohy 	};
    818       1.24      kent 	struct ad1848_softc *ac;
    819       1.24      kent 	struct ym_softc *sc;
    820       1.21     itohy 
    821       1.24      kent 	ac = addr;
    822       1.24      kent 	sc = ac->parent;
    823       1.21     itohy 	/* SA2 doesn't have equalizer */
    824       1.21     itohy 	if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(dip->index))
    825       1.21     itohy 		return ENXIO;
    826        1.1  augustss 
    827        1.2  augustss 	dip->next = dip->prev = AUDIO_MIXER_LAST;
    828       1.10     itohy 
    829        1.2  augustss 	switch(dip->index) {
    830       1.21     itohy 	case YM_INPUT_CLASS:
    831        1.2  augustss 	case YM_OUTPUT_CLASS:
    832        1.2  augustss 	case YM_MONITOR_CLASS:
    833        1.2  augustss 	case YM_RECORD_CLASS:
    834       1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    835       1.10     itohy 	case YM_PWR_CLASS:
    836       1.10     itohy #endif
    837       1.21     itohy 	case YM_EQ_CLASS:
    838        1.2  augustss 		dip->type = AUDIO_MIXER_CLASS;
    839        1.2  augustss 		dip->mixer_class = dip->index;
    840       1.10     itohy 		strcpy(dip->label.name,
    841        1.2  augustss 		       mixer_classes[dip->index - YM_INPUT_CLASS]);
    842        1.2  augustss 		break;
    843       1.10     itohy 
    844       1.10     itohy 	case YM_DAC_LVL:
    845        1.2  augustss 	case YM_MIDI_LVL:
    846        1.2  augustss 	case YM_CD_LVL:
    847       1.10     itohy 	case YM_LINE_LVL:
    848        1.2  augustss 	case YM_SPEAKER_LVL:
    849        1.2  augustss 	case YM_MIC_LVL:
    850        1.2  augustss 	case YM_MONITOR_LVL:
    851        1.2  augustss 		dip->type = AUDIO_MIXER_VALUE;
    852        1.2  augustss 		if (dip->index == YM_MONITOR_LVL)
    853        1.2  augustss 			dip->mixer_class = YM_MONITOR_CLASS;
    854        1.2  augustss 		else
    855        1.2  augustss 			dip->mixer_class = YM_INPUT_CLASS;
    856       1.10     itohy 
    857        1.2  augustss 		dip->next = dip->index + 7;
    858       1.10     itohy 
    859        1.2  augustss 		strcpy(dip->label.name,
    860       1.10     itohy 		       mixer_port_names[dip->index - YM_DAC_LVL]);
    861       1.10     itohy 
    862        1.2  augustss 		if (dip->index == YM_SPEAKER_LVL ||
    863        1.2  augustss 		    dip->index == YM_MIC_LVL)
    864        1.2  augustss 			dip->un.v.num_channels = 1;
    865        1.2  augustss 		else
    866        1.2  augustss 			dip->un.v.num_channels = 2;
    867       1.10     itohy 
    868       1.20     itohy 		if (dip->index == YM_SPEAKER_LVL)
    869       1.20     itohy 			dip->un.v.delta = 1 << (8 - 4 /* valid bits */);
    870       1.20     itohy 		else if (dip->index == YM_DAC_LVL ||
    871       1.20     itohy 		    dip->index == YM_MONITOR_LVL)
    872       1.20     itohy 			dip->un.v.delta = 1 << (8 - 6 /* valid bits */);
    873       1.20     itohy 		else
    874       1.20     itohy 			dip->un.v.delta = 1 << (8 - 5 /* valid bits */);
    875       1.20     itohy 
    876        1.2  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
    877        1.2  augustss 		break;
    878       1.10     itohy 
    879       1.10     itohy 	case YM_DAC_MUTE:
    880        1.2  augustss 	case YM_MIDI_MUTE:
    881        1.2  augustss 	case YM_CD_MUTE:
    882        1.2  augustss 	case YM_LINE_MUTE:
    883        1.2  augustss 	case YM_SPEAKER_MUTE:
    884        1.2  augustss 	case YM_MIC_MUTE:
    885        1.2  augustss 	case YM_MONITOR_MUTE:
    886        1.2  augustss 		if (dip->index == YM_MONITOR_MUTE)
    887        1.2  augustss 			dip->mixer_class = YM_MONITOR_CLASS;
    888        1.2  augustss 		else
    889        1.2  augustss 			dip->mixer_class = YM_INPUT_CLASS;
    890        1.2  augustss 		dip->type = AUDIO_MIXER_ENUM;
    891        1.2  augustss 		dip->prev = dip->index - 7;
    892        1.2  augustss 	mute:
    893        1.2  augustss 		strcpy(dip->label.name, AudioNmute);
    894        1.2  augustss 		dip->un.e.num_mem = 2;
    895        1.2  augustss 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
    896        1.2  augustss 		dip->un.e.member[0].ord = 0;
    897        1.2  augustss 		strcpy(dip->un.e.member[1].label.name, AudioNon);
    898        1.2  augustss 		dip->un.e.member[1].ord = 1;
    899        1.2  augustss 		break;
    900       1.10     itohy 
    901       1.10     itohy 
    902        1.2  augustss 	case YM_OUTPUT_LVL:
    903        1.2  augustss 		dip->type = AUDIO_MIXER_VALUE;
    904        1.2  augustss 		dip->mixer_class = YM_OUTPUT_CLASS;
    905        1.2  augustss 		dip->next = YM_OUTPUT_MUTE;
    906        1.2  augustss 		strcpy(dip->label.name, AudioNmaster);
    907        1.2  augustss 		dip->un.v.num_channels = 2;
    908       1.20     itohy 		dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1);
    909        1.2  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
    910        1.2  augustss 		break;
    911       1.10     itohy 
    912        1.2  augustss 	case YM_OUTPUT_MUTE:
    913        1.2  augustss 		dip->mixer_class = YM_OUTPUT_CLASS;
    914        1.2  augustss 		dip->type = AUDIO_MIXER_ENUM;
    915        1.2  augustss 		dip->prev = YM_OUTPUT_LVL;
    916        1.2  augustss 		goto mute;
    917       1.10     itohy 
    918       1.10     itohy 
    919        1.2  augustss 	case YM_REC_LVL:	/* record level */
    920        1.2  augustss 		dip->type = AUDIO_MIXER_VALUE;
    921        1.2  augustss 		dip->mixer_class = YM_RECORD_CLASS;
    922        1.2  augustss 		dip->next = YM_RECORD_SOURCE;
    923        1.2  augustss 		strcpy(dip->label.name, AudioNrecord);
    924        1.2  augustss 		dip->un.v.num_channels = 2;
    925       1.20     itohy 		dip->un.v.delta = 1 << (8 - 4 /* valid bits */);
    926        1.2  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
    927        1.2  augustss 		break;
    928       1.10     itohy 
    929        1.2  augustss 	case YM_RECORD_SOURCE:
    930        1.2  augustss 		dip->mixer_class = YM_RECORD_CLASS;
    931        1.2  augustss 		dip->type = AUDIO_MIXER_ENUM;
    932        1.2  augustss 		dip->prev = YM_REC_LVL;
    933        1.2  augustss 		strcpy(dip->label.name, AudioNsource);
    934        1.2  augustss 		dip->un.e.num_mem = 4;
    935        1.2  augustss 		strcpy(dip->un.e.member[0].label.name, AudioNmicrophone);
    936        1.2  augustss 		dip->un.e.member[0].ord = MIC_IN_PORT;
    937        1.2  augustss 		strcpy(dip->un.e.member[1].label.name, AudioNline);
    938        1.2  augustss 		dip->un.e.member[1].ord = LINE_IN_PORT;
    939        1.2  augustss 		strcpy(dip->un.e.member[2].label.name, AudioNdac);
    940        1.2  augustss 		dip->un.e.member[2].ord = DAC_IN_PORT;
    941        1.2  augustss 		strcpy(dip->un.e.member[3].label.name, AudioNcd);
    942        1.2  augustss 		dip->un.e.member[3].ord = AUX1_IN_PORT;
    943        1.2  augustss 		break;
    944       1.10     itohy 
    945       1.10     itohy 
    946       1.10     itohy 	case YM_MASTER_EQMODE:
    947       1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    948       1.10     itohy 		dip->mixer_class = YM_EQ_CLASS;
    949       1.10     itohy 		strcpy(dip->label.name, AudioNmode);
    950       1.10     itohy 		strcpy(dip->un.v.units.name, AudioNmode);
    951       1.10     itohy 		dip->un.e.num_mem = 4;
    952       1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNdesktop);
    953       1.10     itohy 		dip->un.e.member[0].ord = SA3_SYS_CTL_YMODE0;
    954       1.10     itohy 		strcpy(dip->un.e.member[1].label.name, AudioNlaptop);
    955       1.10     itohy 		dip->un.e.member[1].ord = SA3_SYS_CTL_YMODE1;
    956       1.10     itohy 		strcpy(dip->un.e.member[2].label.name, AudioNsubnote);
    957       1.10     itohy 		dip->un.e.member[2].ord = SA3_SYS_CTL_YMODE2;
    958       1.10     itohy 		strcpy(dip->un.e.member[3].label.name, AudioNhifi);
    959       1.10     itohy 		dip->un.e.member[3].ord = SA3_SYS_CTL_YMODE3;
    960       1.10     itohy 		break;
    961       1.10     itohy 
    962       1.10     itohy 	case YM_MASTER_TREBLE:
    963       1.10     itohy 		dip->type = AUDIO_MIXER_VALUE;
    964       1.10     itohy 		dip->mixer_class = YM_EQ_CLASS;
    965       1.10     itohy 		strcpy(dip->label.name, AudioNtreble);
    966       1.10     itohy 		dip->un.v.num_channels = 2;
    967       1.20     itohy 		dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1)
    968       1.20     itohy 		    >> YM_EQ_REDUCE_BIT;
    969       1.10     itohy 		strcpy(dip->un.v.units.name, AudioNtreble);
    970       1.10     itohy 		break;
    971       1.10     itohy 
    972       1.10     itohy 	case YM_MASTER_BASS:
    973       1.10     itohy 		dip->type = AUDIO_MIXER_VALUE;
    974       1.10     itohy 		dip->mixer_class = YM_EQ_CLASS;
    975       1.10     itohy 		strcpy(dip->label.name, AudioNbass);
    976       1.10     itohy 		dip->un.v.num_channels = 2;
    977       1.20     itohy 		dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1)
    978       1.20     itohy 		    >> YM_EQ_REDUCE_BIT;
    979       1.10     itohy 		strcpy(dip->un.v.units.name, AudioNbass);
    980       1.10     itohy 		break;
    981       1.10     itohy 
    982       1.10     itohy 	case YM_MASTER_WIDE:
    983       1.10     itohy 		dip->type = AUDIO_MIXER_VALUE;
    984       1.10     itohy 		dip->mixer_class = YM_EQ_CLASS;
    985       1.10     itohy 		strcpy(dip->label.name, AudioNsurround);
    986       1.10     itohy 		dip->un.v.num_channels = 2;
    987       1.20     itohy 		dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1);
    988       1.10     itohy 		strcpy(dip->un.v.units.name, AudioNsurround);
    989       1.10     itohy 		break;
    990       1.10     itohy 
    991       1.10     itohy 
    992       1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    993       1.10     itohy 	case YM_PWR_MODE:
    994       1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    995       1.10     itohy 		dip->mixer_class = YM_PWR_CLASS;
    996       1.10     itohy 		dip->next = YM_PWR_TIMEOUT;
    997       1.13     itohy 		strcpy(dip->label.name, AudioNsave);
    998       1.10     itohy 		dip->un.e.num_mem = 3;
    999       1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNpowerdown);
   1000       1.10     itohy 		dip->un.e.member[0].ord = YM_POWER_POWERDOWN;
   1001       1.10     itohy 		strcpy(dip->un.e.member[1].label.name, AudioNpowersave);
   1002       1.10     itohy 		dip->un.e.member[1].ord = YM_POWER_POWERSAVE;
   1003       1.10     itohy 		strcpy(dip->un.e.member[2].label.name, AudioNnosave);
   1004       1.10     itohy 		dip->un.e.member[2].ord = YM_POWER_NOSAVE;
   1005       1.10     itohy 		break;
   1006       1.10     itohy 
   1007       1.10     itohy 	case YM_PWR_TIMEOUT:
   1008       1.10     itohy 		dip->type = AUDIO_MIXER_VALUE;
   1009       1.10     itohy 		dip->mixer_class = YM_PWR_CLASS;
   1010       1.10     itohy 		dip->prev = YM_PWR_MODE;
   1011       1.10     itohy 		strcpy(dip->label.name, AudioNtimeout);
   1012       1.10     itohy 		dip->un.v.num_channels = 1;
   1013       1.10     itohy 		strcpy(dip->un.v.units.name, AudioNtimeout);
   1014       1.10     itohy 		break;
   1015       1.10     itohy #endif /* not AUDIO_NO_POWER_CTL */
   1016       1.10     itohy 
   1017        1.2  augustss 	default:
   1018        1.2  augustss 		return ENXIO;
   1019        1.2  augustss 		/*NOTREACHED*/
   1020        1.2  augustss 	}
   1021       1.10     itohy 
   1022       1.10     itohy 	return 0;
   1023       1.10     itohy }
   1024       1.10     itohy 
   1025       1.10     itohy int
   1026       1.24      kent ym_intr(void *arg)
   1027       1.10     itohy {
   1028       1.33   xtraeme 	struct ym_softc *sc = arg;
   1029       1.33   xtraeme #if NMPU_YM > 0
   1030       1.33   xtraeme 	struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev);
   1031       1.33   xtraeme #endif
   1032       1.10     itohy 	u_int8_t ist;
   1033       1.10     itohy 	int processed;
   1034       1.10     itohy 
   1035  1.35.12.2        ad 	mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1036  1.35.12.2        ad 
   1037       1.10     itohy 	/* OPL3 timer is currently unused. */
   1038       1.10     itohy 	if (((ist = ym_read(sc, SA3_IRQA_STAT)) &
   1039       1.10     itohy 	     ~(SA3_IRQ_STAT_SB|SA3_IRQ_STAT_OPL3)) == 0) {
   1040       1.10     itohy 		DPRINTF(("%s: ym_intr: spurious interrupt\n", DVNAME(sc)));
   1041  1.35.12.2        ad 		mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1042       1.10     itohy 		return 0;
   1043       1.10     itohy 	}
   1044       1.10     itohy 
   1045       1.10     itohy 	/* Process pending interrupts. */
   1046       1.10     itohy 	do {
   1047       1.10     itohy 		processed = 0;
   1048       1.10     itohy 		/*
   1049       1.10     itohy 		 * CODEC interrupts.
   1050       1.10     itohy 		 */
   1051       1.10     itohy 		if (ist & (SA3_IRQ_STAT_TI|SA3_IRQ_STAT_CI|SA3_IRQ_STAT_PI)) {
   1052       1.10     itohy 			ad1848_isa_intr(&sc->sc_ad1848);
   1053       1.10     itohy 			processed = 1;
   1054       1.10     itohy 		}
   1055       1.10     itohy #if NMPU_YM > 0
   1056       1.10     itohy 		/*
   1057       1.10     itohy 		 * MPU401 interrupt.
   1058       1.10     itohy 		 */
   1059       1.10     itohy 		if (ist & SA3_IRQ_STAT_MPU) {
   1060       1.33   xtraeme 			mpu_intr(sc_mpu);
   1061       1.10     itohy 			processed = 1;
   1062       1.10     itohy 		}
   1063       1.10     itohy #endif
   1064       1.10     itohy 		/*
   1065       1.21     itohy 		 * Hardware volume interrupt (SA3 only).
   1066       1.10     itohy 		 * Recalculate master volume from the hardware setting.
   1067       1.10     itohy 		 */
   1068       1.21     itohy 		if ((ist & SA3_IRQ_STAT_MV) && YM_IS_SA3(sc)) {
   1069       1.21     itohy 			ym_hvol_to_master_gain(sc);
   1070       1.10     itohy 			processed = 1;
   1071       1.10     itohy 		}
   1072       1.10     itohy 	} while (processed && (ist = ym_read(sc, SA3_IRQA_STAT)));
   1073       1.10     itohy 
   1074  1.35.12.1        ad 	mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1075       1.10     itohy 	return 1;
   1076       1.10     itohy }
   1077       1.10     itohy 
   1078       1.10     itohy 
   1079       1.10     itohy #ifndef AUDIO_NO_POWER_CTL
   1080       1.10     itohy static void
   1081       1.24      kent ym_save_codec_regs(struct ym_softc *sc)
   1082       1.10     itohy {
   1083       1.24      kent 	struct ad1848_softc *ac;
   1084       1.10     itohy 	int i;
   1085       1.10     itohy 
   1086       1.10     itohy 	DPRINTF(("%s: ym_save_codec_regs\n", DVNAME(sc)));
   1087       1.24      kent 	ac = &sc->sc_ad1848.sc_ad1848;
   1088       1.10     itohy 	for (i = 0; i <= 0x1f; i++)
   1089       1.10     itohy 		sc->sc_codec_scan[i] = ad_read(ac, i);
   1090       1.10     itohy }
   1091       1.10     itohy 
   1092       1.10     itohy static void
   1093       1.24      kent ym_restore_codec_regs(struct ym_softc *sc)
   1094       1.10     itohy {
   1095       1.24      kent 	struct ad1848_softc *ac;
   1096       1.10     itohy 	int i, t;
   1097       1.10     itohy 
   1098       1.10     itohy 	DPRINTF(("%s: ym_restore_codec_regs\n", DVNAME(sc)));
   1099       1.24      kent 	ac = &sc->sc_ad1848.sc_ad1848;
   1100       1.10     itohy 	for (i = 0; i <= 0x1f; i++) {
   1101       1.10     itohy 		/*
   1102       1.10     itohy 		 * Wait til the chip becomes ready.
   1103       1.10     itohy 		 * This is required after suspend/resume.
   1104       1.10     itohy 		 */
   1105       1.10     itohy 		for (t = 0;
   1106       1.10     itohy 		    t < 100000 && ADREAD(ac, AD1848_IADDR) & SP_IN_INIT; t++)
   1107       1.10     itohy 			;
   1108       1.10     itohy #ifdef AUDIO_DEBUG
   1109       1.10     itohy 		if (t)
   1110       1.10     itohy 			DPRINTF(("%s: ym_restore_codec_regs: reg %d, t %d\n",
   1111       1.10     itohy 				 DVNAME(sc), i, t));
   1112       1.10     itohy #endif
   1113       1.10     itohy 		ad_write(ac, i, sc->sc_codec_scan[i]);
   1114       1.10     itohy 	}
   1115       1.10     itohy }
   1116       1.10     itohy 
   1117       1.10     itohy /*
   1118       1.10     itohy  * Save and restore the state on suspending / resumning.
   1119       1.10     itohy  *
   1120       1.10     itohy  * XXX This is not complete.
   1121       1.10     itohy  * Currently only the parameters, such as output gain, are restored.
   1122       1.10     itohy  * DMA state should also be restored.  FIXME.
   1123       1.10     itohy  */
   1124       1.10     itohy void
   1125       1.24      kent ym_power_hook(int why, void *v)
   1126       1.10     itohy {
   1127       1.24      kent 	struct ym_softc *sc;
   1128       1.25  christos 	int i, xmax;
   1129       1.10     itohy 
   1130       1.24      kent 	sc = v;
   1131       1.10     itohy 	DPRINTF(("%s: ym_power_hook: why = %d\n", DVNAME(sc), why));
   1132       1.10     itohy 
   1133  1.35.12.1        ad 	mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1134       1.10     itohy 
   1135       1.17  takemura 	switch (why) {
   1136       1.17  takemura 	case PWR_SUSPEND:
   1137       1.17  takemura 	case PWR_STANDBY:
   1138       1.10     itohy 		/*
   1139       1.10     itohy 		 * suspending...
   1140       1.10     itohy 		 */
   1141  1.35.12.2        ad 		callout_halt(&sc->sc_powerdown_ch,
   1142  1.35.12.2        ad 		    &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1143       1.10     itohy 		if (sc->sc_turning_off)
   1144       1.10     itohy 			ym_powerdown_blocks(sc);
   1145       1.10     itohy 
   1146       1.10     itohy 		/*
   1147       1.10     itohy 		 * Save CODEC registers.
   1148       1.10     itohy 		 * Note that the registers read incorrect
   1149       1.10     itohy 		 * if the CODEC part is in power-down mode.
   1150       1.10     itohy 		 */
   1151       1.10     itohy 		if (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL)
   1152       1.10     itohy 			ym_save_codec_regs(sc);
   1153       1.10     itohy 
   1154       1.10     itohy 		/*
   1155       1.10     itohy 		 * Save OPL3-SA3 control registers and power-down the chip.
   1156       1.10     itohy 		 * Note that the registers read incorrect
   1157       1.10     itohy 		 * if the chip is in global power-down mode.
   1158       1.10     itohy 		 */
   1159       1.10     itohy 		sc->sc_sa3_scan[SA3_PWR_MNG] = ym_read(sc, SA3_PWR_MNG);
   1160       1.10     itohy 		if (sc->sc_on_blocks)
   1161       1.10     itohy 			ym_chip_powerdown(sc);
   1162       1.17  takemura 		break;
   1163       1.17  takemura 
   1164       1.17  takemura 	case PWR_RESUME:
   1165       1.10     itohy 		/*
   1166       1.10     itohy 		 * resuming...
   1167       1.10     itohy 		 */
   1168       1.10     itohy 		ym_chip_powerup(sc, 1);
   1169       1.10     itohy 		ym_init(sc);		/* power-on CODEC */
   1170       1.10     itohy 
   1171       1.10     itohy 		/* Restore control registers. */
   1172       1.25  christos 		xmax = YM_IS_SA3(sc)? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
   1173       1.25  christos 		for (i = SA3_PWR_MNG + 1; i <= xmax; i++) {
   1174       1.10     itohy 			if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA ||
   1175       1.10     itohy 			    i == SA3_DPWRDWN)
   1176       1.10     itohy 				continue;
   1177       1.10     itohy 			ym_write(sc, i, sc->sc_sa3_scan[i]);
   1178       1.10     itohy 		}
   1179       1.10     itohy 
   1180       1.10     itohy 		/* Restore CODEC registers (including mixer). */
   1181       1.10     itohy 		ym_restore_codec_regs(sc);
   1182       1.10     itohy 
   1183       1.10     itohy 		/* Restore global/digital power-down state. */
   1184       1.10     itohy 		ym_write(sc, SA3_PWR_MNG, sc->sc_sa3_scan[SA3_PWR_MNG]);
   1185       1.21     itohy 		if (YM_IS_SA3(sc))
   1186       1.21     itohy 			ym_write(sc, SA3_DPWRDWN, sc->sc_sa3_scan[SA3_DPWRDWN]);
   1187       1.17  takemura 		break;
   1188       1.17  takemura 	case PWR_SOFTSUSPEND:
   1189       1.17  takemura 	case PWR_SOFTSTANDBY:
   1190       1.17  takemura 	case PWR_SOFTRESUME:
   1191       1.17  takemura 		break;
   1192       1.10     itohy 	}
   1193  1.35.12.1        ad 	mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1194       1.10     itohy }
   1195       1.10     itohy 
   1196       1.10     itohy int
   1197       1.24      kent ym_codec_power_ctl(void *arg, int flags)
   1198       1.10     itohy {
   1199       1.24      kent 	struct ym_softc *sc;
   1200       1.24      kent 	struct ad1848_softc *ac;
   1201       1.10     itohy 	int parts;
   1202       1.10     itohy 
   1203       1.24      kent 	sc = arg;
   1204       1.24      kent 	ac = &sc->sc_ad1848.sc_ad1848;
   1205       1.10     itohy 	DPRINTF(("%s: ym_codec_power_ctl: flags = 0x%x\n", DVNAME(sc), flags));
   1206  1.35.12.2        ad 	KASSERT(mutex_owned(&ac->sc_intr_lock));
   1207       1.10     itohy 
   1208       1.10     itohy 	if (flags != 0) {
   1209       1.10     itohy 		parts = 0;
   1210       1.10     itohy 		if (flags & FREAD) {
   1211       1.10     itohy 			parts |= YM_POWER_CODEC_R | YM_POWER_CODEC_AD;
   1212       1.10     itohy 			if (ac->mute[AD1848_MONITOR_CHANNEL] == 0)
   1213       1.10     itohy 				parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
   1214       1.10     itohy 		}
   1215       1.10     itohy 		if (flags & FWRITE)
   1216       1.10     itohy 			parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
   1217       1.10     itohy 	} else
   1218       1.10     itohy 		parts = YM_POWER_CODEC_P | YM_POWER_CODEC_R |
   1219       1.10     itohy 			YM_POWER_CODEC_DA | YM_POWER_CODEC_AD;
   1220       1.10     itohy 
   1221       1.10     itohy 	ym_power_ctl(sc, parts, flags);
   1222       1.10     itohy 
   1223        1.2  augustss 	return 0;
   1224        1.1  augustss }
   1225       1.10     itohy 
   1226       1.10     itohy /*
   1227       1.10     itohy  * Enter Power Save mode or Global Power Down mode.
   1228       1.10     itohy  * Total dissipation becomes 5mA and 10uA (typ.) respective.
   1229       1.10     itohy  */
   1230       1.10     itohy static void
   1231       1.24      kent ym_chip_powerdown(struct ym_softc *sc)
   1232       1.10     itohy {
   1233       1.25  christos 	int i, xmax;
   1234       1.10     itohy 
   1235       1.10     itohy 	DPRINTF(("%s: ym_chip_powerdown\n", DVNAME(sc)));
   1236  1.35.12.2        ad 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
   1237       1.10     itohy 
   1238       1.25  christos 	xmax = YM_IS_SA3(sc) ? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
   1239       1.21     itohy 
   1240       1.10     itohy 	/* Save control registers. */
   1241       1.25  christos 	for (i = SA3_PWR_MNG + 1; i <= xmax; i++) {
   1242       1.10     itohy 		if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA)
   1243       1.10     itohy 			continue;
   1244       1.10     itohy 		sc->sc_sa3_scan[i] = ym_read(sc, i);
   1245       1.10     itohy 	}
   1246       1.10     itohy 	ym_write(sc, SA3_PWR_MNG,
   1247       1.10     itohy 		 (sc->sc_pow_mode == YM_POWER_POWERDOWN ?
   1248       1.10     itohy 			SA3_PWR_MNG_PDN : SA3_PWR_MNG_PSV) | SA3_PWR_MNG_PDX);
   1249       1.10     itohy }
   1250       1.10     itohy 
   1251       1.10     itohy /*
   1252       1.10     itohy  * Power up from Power Save / Global Power Down Mode.
   1253       1.10     itohy  */
   1254       1.10     itohy static void
   1255       1.24      kent ym_chip_powerup(struct ym_softc *sc, int nosleep)
   1256       1.10     itohy {
   1257       1.24      kent 	uint8_t pw;
   1258       1.10     itohy 
   1259       1.10     itohy 	DPRINTF(("%s: ym_chip_powerup\n", DVNAME(sc)));
   1260  1.35.12.2        ad 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
   1261       1.10     itohy 
   1262       1.10     itohy 	pw = ym_read(sc, SA3_PWR_MNG);
   1263       1.10     itohy 
   1264       1.10     itohy 	if ((pw & (SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN | SA3_PWR_MNG_PDX)) == 0)
   1265       1.10     itohy 		return;		/* already on */
   1266       1.10     itohy 
   1267       1.10     itohy 	pw &= ~SA3_PWR_MNG_PDX;
   1268       1.10     itohy 	ym_write(sc, SA3_PWR_MNG, pw);
   1269       1.10     itohy 
   1270       1.10     itohy 	/* wait 100 ms */
   1271       1.10     itohy 	if (nosleep)
   1272       1.10     itohy 		delay(100000);
   1273       1.10     itohy 	else
   1274  1.35.12.2        ad 		kpause("ym_pu1", false, hz / 10,
   1275  1.35.12.2        ad 		    &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1276       1.10     itohy 
   1277       1.10     itohy 	pw &= ~(SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN);
   1278       1.10     itohy 	ym_write(sc, SA3_PWR_MNG, pw);
   1279       1.10     itohy 
   1280       1.10     itohy 	/* wait 70 ms */
   1281       1.10     itohy 	if (nosleep)
   1282       1.10     itohy 		delay(70000);
   1283       1.10     itohy 	else
   1284  1.35.12.2        ad 		kpause("ym_pu1", false, hz / 10,
   1285  1.35.12.2        ad 		    &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1286       1.10     itohy 
   1287       1.10     itohy 	/* The chip is muted automatically --- unmute it now. */
   1288       1.10     itohy 	ym_mute(sc, SA3_VOL_L, sc->master_mute);
   1289       1.10     itohy 	ym_mute(sc, SA3_VOL_R, sc->master_mute);
   1290       1.10     itohy }
   1291       1.10     itohy 
   1292       1.14   thorpej /* callout handler for power-down */
   1293  1.35.12.2        ad static void
   1294  1.35.12.2        ad ym_powerdown_callout(void *arg)
   1295       1.10     itohy {
   1296       1.24      kent 	struct ym_softc *sc;
   1297  1.35.12.2        ad 
   1298  1.35.12.2        ad 	sc = arg;
   1299  1.35.12.2        ad 
   1300  1.35.12.2        ad 	mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1301  1.35.12.2        ad 	if ((sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) == 0) {
   1302  1.35.12.2        ad 		ym_powerdown_blocks(sc);
   1303  1.35.12.2        ad 	}
   1304  1.35.12.2        ad 	mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1305  1.35.12.2        ad }
   1306  1.35.12.2        ad 
   1307  1.35.12.2        ad static void
   1308  1.35.12.2        ad ym_powerdown_blocks(struct ym_softc *sc)
   1309  1.35.12.2        ad {
   1310       1.24      kent 	uint16_t parts;
   1311       1.24      kent 	uint16_t on_blocks;
   1312       1.24      kent 	uint8_t sv;
   1313       1.10     itohy 
   1314       1.24      kent 	on_blocks = sc->sc_on_blocks;
   1315       1.10     itohy 	DPRINTF(("%s: ym_powerdown_blocks: turning_off 0x%x\n",
   1316       1.10     itohy 		DVNAME(sc), sc->sc_turning_off));
   1317  1.35.12.2        ad 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
   1318       1.10     itohy 
   1319       1.10     itohy 	on_blocks = sc->sc_on_blocks;
   1320       1.10     itohy 
   1321       1.10     itohy 	/* Be sure not to change the state of the chip.  Save it first. */
   1322       1.10     itohy 	sv =  bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX);
   1323       1.10     itohy 
   1324       1.10     itohy 	parts = sc->sc_turning_off;
   1325       1.10     itohy 
   1326       1.10     itohy 	if (on_blocks & ~parts & YM_POWER_CODEC_CTL)
   1327       1.10     itohy 		parts &= ~(YM_POWER_CODEC_P | YM_POWER_CODEC_R);
   1328       1.10     itohy 	if (parts & YM_POWER_CODEC_CTL) {
   1329       1.10     itohy 		if ((on_blocks & YM_POWER_CODEC_P) == 0)
   1330       1.10     itohy 			parts |= YM_POWER_CODEC_P;
   1331       1.10     itohy 		if ((on_blocks & YM_POWER_CODEC_R) == 0)
   1332       1.10     itohy 			parts |= YM_POWER_CODEC_R;
   1333       1.10     itohy 	}
   1334       1.13     itohy 	parts &= ~YM_POWER_CODEC_PSEUDO;
   1335       1.10     itohy 
   1336       1.10     itohy 	/* If CODEC is being off, save the state. */
   1337       1.10     itohy 	if ((sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) &&
   1338       1.10     itohy 	    (sc->sc_on_blocks & ~sc->sc_turning_off &
   1339       1.10     itohy 				YM_POWER_CODEC_DIGITAL) == 0)
   1340       1.10     itohy 		ym_save_codec_regs(sc);
   1341       1.10     itohy 
   1342       1.21     itohy 	if (YM_IS_SA3(sc)) {
   1343       1.21     itohy 		/* OPL3-SA3 */
   1344       1.21     itohy 		ym_write(sc, SA3_DPWRDWN,
   1345       1.21     itohy 		    ym_read(sc, SA3_DPWRDWN) | (u_int8_t) parts);
   1346       1.21     itohy 		ym_write(sc, SA3_APWRDWN,
   1347       1.21     itohy 		    ym_read(sc, SA3_APWRDWN) | (parts >> 8));
   1348       1.21     itohy 	} else {
   1349       1.21     itohy 		/* OPL3-SA2 (only OPL3 can be off partially) */
   1350       1.21     itohy 		if (parts & YM_POWER_OPL3)
   1351       1.21     itohy 			ym_write(sc, SA3_PWR_MNG,
   1352       1.21     itohy 			    ym_read(sc, SA3_PWR_MNG) | SA2_PWR_MNG_FMPS);
   1353       1.21     itohy 	}
   1354       1.10     itohy 
   1355       1.10     itohy 	if (((sc->sc_on_blocks &= ~sc->sc_turning_off) & YM_POWER_ACTIVE) == 0)
   1356       1.10     itohy 		ym_chip_powerdown(sc);
   1357       1.10     itohy 
   1358       1.10     itohy 	sc->sc_turning_off = 0;
   1359       1.10     itohy 
   1360       1.10     itohy 	/* Restore the state of the chip. */
   1361       1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX, sv);
   1362       1.10     itohy }
   1363       1.10     itohy 
   1364       1.10     itohy /*
   1365       1.10     itohy  * Power control entry point.
   1366       1.10     itohy  */
   1367       1.10     itohy void
   1368       1.24      kent ym_power_ctl(struct ym_softc *sc, int parts, int onoff)
   1369       1.10     itohy {
   1370       1.10     itohy 	int need_restore_codec;
   1371       1.10     itohy 
   1372  1.35.12.2        ad 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
   1373  1.35.12.2        ad 
   1374       1.10     itohy 	DPRINTF(("%s: ym_power_ctl: parts = 0x%x, %s\n",
   1375       1.10     itohy 		DVNAME(sc), parts, onoff ? "on" : "off"));
   1376       1.10     itohy 
   1377       1.10     itohy 	/* This function may sleep --- needs locking. */
   1378       1.10     itohy 	while (sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) {
   1379       1.10     itohy 		sc->sc_in_power_ctl |= YM_POWER_CTL_WANTED;
   1380       1.10     itohy 		DPRINTF(("%s: ym_power_ctl: sleeping\n", DVNAME(sc)));
   1381  1.35.12.2        ad 		cv_wait(&sc->sc_cv, &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1382       1.10     itohy 		DPRINTF(("%s: ym_power_ctl: awaken\n", DVNAME(sc)));
   1383       1.10     itohy 	}
   1384       1.10     itohy 	sc->sc_in_power_ctl |= YM_POWER_CTL_INUSE;
   1385       1.10     itohy 
   1386       1.10     itohy 	/* If ON requested to parts which are scheduled to OFF, cancel it. */
   1387       1.10     itohy 	if (onoff && sc->sc_turning_off && (sc->sc_turning_off &= ~parts) == 0)
   1388  1.35.12.2        ad 		callout_halt(&sc->sc_powerdown_ch,
   1389  1.35.12.2        ad 		    &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1390       1.10     itohy 
   1391       1.10     itohy 	if (!onoff && sc->sc_turning_off)
   1392       1.10     itohy 		parts &= ~sc->sc_turning_off;
   1393       1.10     itohy 
   1394       1.10     itohy 	/* Discard bits which are currently {on,off}. */
   1395       1.10     itohy 	parts &= onoff ? ~sc->sc_on_blocks : sc->sc_on_blocks;
   1396       1.10     itohy 
   1397       1.10     itohy 	/* Cancel previous timeout if needed. */
   1398       1.10     itohy 	if (parts != 0 && sc->sc_turning_off)
   1399  1.35.12.2        ad 		callout_halt(&sc->sc_powerdown_ch,
   1400  1.35.12.2        ad 		    &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1401       1.10     itohy 
   1402       1.10     itohy 	if (parts == 0)
   1403       1.10     itohy 		goto unlock;		/* no work to do */
   1404       1.10     itohy 
   1405       1.10     itohy 	if (onoff) {
   1406       1.10     itohy 		/* Turning on is done immediately. */
   1407       1.10     itohy 
   1408       1.10     itohy 		/* If the chip is off, turn it on. */
   1409       1.10     itohy 		if ((sc->sc_on_blocks & YM_POWER_ACTIVE) == 0)
   1410       1.10     itohy 			ym_chip_powerup(sc, 0);
   1411       1.10     itohy 
   1412       1.10     itohy 		need_restore_codec = (parts & YM_POWER_CODEC_DIGITAL) &&
   1413       1.10     itohy 		    (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) == 0;
   1414       1.10     itohy 
   1415       1.10     itohy 		sc->sc_on_blocks |= parts;
   1416       1.10     itohy 		if (parts & YM_POWER_CODEC_CTL)
   1417       1.10     itohy 			parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_R;
   1418       1.10     itohy 
   1419       1.21     itohy 		if (YM_IS_SA3(sc)) {
   1420       1.21     itohy 			/* OPL3-SA3 */
   1421       1.21     itohy 			ym_write(sc, SA3_DPWRDWN,
   1422       1.21     itohy 			    ym_read(sc, SA3_DPWRDWN) & (u_int8_t)~parts);
   1423       1.21     itohy 			ym_write(sc, SA3_APWRDWN,
   1424       1.21     itohy 			    ym_read(sc, SA3_APWRDWN) & ~(parts >> 8));
   1425       1.21     itohy 		} else {
   1426       1.21     itohy 			/* OPL3-SA2 (only OPL3 can be off partially) */
   1427       1.21     itohy 			if (parts & YM_POWER_OPL3)
   1428       1.21     itohy 				ym_write(sc, SA3_PWR_MNG,
   1429       1.21     itohy 				    ym_read(sc, SA3_PWR_MNG)
   1430       1.21     itohy 					& ~SA2_PWR_MNG_FMPS);
   1431       1.21     itohy 		}
   1432       1.10     itohy 		if (need_restore_codec)
   1433       1.10     itohy 			ym_restore_codec_regs(sc);
   1434       1.10     itohy 	} else {
   1435       1.10     itohy 		/* Turning off is delayed. */
   1436       1.10     itohy 		sc->sc_turning_off |= parts;
   1437       1.10     itohy 	}
   1438       1.10     itohy 
   1439       1.10     itohy 	/* Schedule turning off. */
   1440       1.10     itohy 	if (sc->sc_pow_mode != YM_POWER_NOSAVE && sc->sc_turning_off)
   1441       1.14   thorpej 		callout_reset(&sc->sc_powerdown_ch, hz * sc->sc_pow_timeout,
   1442  1.35.12.2        ad 		    ym_powerdown_callout, sc);
   1443       1.10     itohy 
   1444       1.10     itohy unlock:
   1445       1.10     itohy 	if (sc->sc_in_power_ctl & YM_POWER_CTL_WANTED)
   1446  1.35.12.2        ad 		cv_broadcast(&sc->sc_cv);
   1447       1.10     itohy 	sc->sc_in_power_ctl = 0;
   1448       1.10     itohy }
   1449       1.10     itohy #endif /* not AUDIO_NO_POWER_CTL */
   1450