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ym.c revision 1.43
      1  1.43       mrg /*	$NetBSD: ym.c,v 1.43 2011/11/24 03:35:58 mrg Exp $	*/
      2   1.1  augustss 
      3  1.10     itohy /*-
      4  1.42  jmcneill  * Copyright (c) 1999-2002, 2008 The NetBSD Foundation, Inc.
      5  1.10     itohy  * All rights reserved.
      6  1.10     itohy  *
      7  1.10     itohy  * This code is derived from software contributed to The NetBSD Foundation
      8  1.10     itohy  * by ITOH Yasufumi.
      9  1.10     itohy  *
     10  1.10     itohy  * Redistribution and use in source and binary forms, with or without
     11  1.10     itohy  * modification, are permitted provided that the following conditions
     12  1.10     itohy  * are met:
     13  1.10     itohy  * 1. Redistributions of source code must retain the above copyright
     14  1.10     itohy  *    notice, this list of conditions and the following disclaimer.
     15  1.10     itohy  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.10     itohy  *    notice, this list of conditions and the following disclaimer in the
     17  1.10     itohy  *    documentation and/or other materials provided with the distribution.
     18  1.10     itohy  *
     19  1.10     itohy  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  1.10     itohy  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  1.10     itohy  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  1.10     itohy  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  1.10     itohy  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  1.10     itohy  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  1.10     itohy  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  1.10     itohy  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  1.10     itohy  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  1.10     itohy  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  1.10     itohy  * POSSIBILITY OF SUCH DAMAGE.
     30  1.10     itohy  */
     31   1.1  augustss 
     32   1.1  augustss /*
     33   1.1  augustss  * Copyright (c) 1998 Constantine Sapuntzakis. All rights reserved.
     34  1.10     itohy  *
     35   1.1  augustss  * Redistribution and use in source and binary forms, with or without
     36   1.1  augustss  * modification, are permitted provided that the following conditions
     37   1.1  augustss  * are met:
     38   1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     39   1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     40   1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     41   1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     42   1.1  augustss  *    documentation and/or other materials provided with the distribution.
     43   1.1  augustss  * 3. The name of the author may not be used to endorse or promote products
     44   1.1  augustss  *    derived from this software without specific prior written permission.
     45   1.1  augustss  *
     46   1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     47   1.1  augustss  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     48   1.1  augustss  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     49   1.1  augustss  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     50   1.1  augustss  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     51   1.1  augustss  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     52   1.1  augustss  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     53   1.1  augustss  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     54   1.1  augustss  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     55   1.1  augustss  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     56   1.1  augustss  */
     57   1.1  augustss 
     58   1.1  augustss /*
     59   1.1  augustss  *  Original code from OpenBSD.
     60   1.1  augustss  */
     61  1.19     lukem 
     62  1.19     lukem #include <sys/cdefs.h>
     63  1.43       mrg __KERNEL_RCSID(0, "$NetBSD: ym.c,v 1.43 2011/11/24 03:35:58 mrg Exp $");
     64   1.1  augustss 
     65  1.10     itohy #include "mpu_ym.h"
     66  1.10     itohy #include "opt_ym.h"
     67   1.1  augustss 
     68   1.1  augustss #include <sys/param.h>
     69   1.1  augustss #include <sys/systm.h>
     70   1.1  augustss #include <sys/errno.h>
     71   1.1  augustss #include <sys/device.h>
     72  1.10     itohy #include <sys/fcntl.h>
     73  1.10     itohy #include <sys/kernel.h>
     74  1.10     itohy #include <sys/proc.h>
     75   1.1  augustss 
     76  1.32        ad #include <sys/cpu.h>
     77  1.32        ad #include <sys/intr.h>
     78  1.32        ad #include <sys/bus.h>
     79   1.1  augustss 
     80   1.1  augustss #include <sys/audioio.h>
     81   1.1  augustss #include <dev/audio_if.h>
     82   1.1  augustss 
     83   1.1  augustss #include <dev/isa/isavar.h>
     84   1.1  augustss #include <dev/isa/isadmavar.h>
     85   1.1  augustss 
     86   1.1  augustss #include <dev/ic/ad1848reg.h>
     87   1.1  augustss #include <dev/isa/ad1848var.h>
     88  1.10     itohy #include <dev/ic/opl3sa3reg.h>
     89  1.10     itohy #include <dev/isa/wssreg.h>
     90  1.10     itohy #if NMPU_YM > 0
     91  1.10     itohy #include <dev/ic/mpuvar.h>
     92  1.10     itohy #endif
     93   1.1  augustss #include <dev/isa/ymvar.h>
     94  1.10     itohy #include <dev/isa/sbreg.h>
     95   1.1  augustss 
     96  1.10     itohy /* Power management mode. */
     97  1.10     itohy #ifndef YM_POWER_MODE
     98  1.10     itohy #define YM_POWER_MODE		YM_POWER_POWERSAVE
     99  1.10     itohy #endif
    100  1.10     itohy 
    101  1.10     itohy /* Time in second before power down the chip. */
    102  1.10     itohy #ifndef YM_POWER_OFF_SEC
    103  1.10     itohy #define YM_POWER_OFF_SEC	5
    104  1.10     itohy #endif
    105  1.10     itohy 
    106  1.12     itohy /* Default mixer settings. */
    107  1.11     itohy #ifndef YM_VOL_MASTER
    108  1.20     itohy #define YM_VOL_MASTER		208
    109  1.11     itohy #endif
    110  1.11     itohy 
    111  1.11     itohy #ifndef YM_VOL_DAC
    112  1.11     itohy #define YM_VOL_DAC		224
    113  1.11     itohy #endif
    114  1.11     itohy 
    115  1.11     itohy #ifndef YM_VOL_OPL3
    116  1.11     itohy #define YM_VOL_OPL3		184
    117  1.11     itohy #endif
    118  1.11     itohy 
    119  1.16     itohy /*
    120  1.20     itohy  * Default position of the equalizer.
    121  1.16     itohy  */
    122  1.20     itohy #ifndef YM_DEFAULT_TREBLE
    123  1.20     itohy #define YM_DEFAULT_TREBLE	YM_EQ_FLAT_OFFSET
    124  1.16     itohy #endif
    125  1.20     itohy #ifndef YM_DEFAULT_BASS
    126  1.20     itohy #define YM_DEFAULT_BASS		YM_EQ_FLAT_OFFSET
    127  1.15  augustss #endif
    128  1.15  augustss 
    129  1.10     itohy #ifdef __i386__		/* XXX */
    130  1.10     itohy # include "joy.h"
    131  1.10     itohy #else
    132  1.10     itohy # define NJOY	0
    133  1.10     itohy #endif
    134  1.10     itohy 
    135  1.10     itohy #ifdef AUDIO_DEBUG
    136  1.10     itohy #define DPRINTF(x)	if (ymdebug) printf x
    137  1.10     itohy int	ymdebug = 0;
    138  1.10     itohy #else
    139  1.10     itohy #define DPRINTF(x)
    140  1.10     itohy #endif
    141  1.41   tsutsui #define DVNAME(softc)	(device_xname((softc)->sc_ad1848.sc_ad1848.sc_dev))
    142   1.1  augustss 
    143  1.24      kent int	ym_getdev(void *, struct audio_device *);
    144  1.24      kent int	ym_mixer_set_port(void *, mixer_ctrl_t *);
    145  1.24      kent int	ym_mixer_get_port(void *, mixer_ctrl_t *);
    146  1.24      kent int	ym_query_devinfo(void *, mixer_devinfo_t *);
    147  1.24      kent int	ym_intr(void *);
    148  1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    149  1.24      kent static void ym_save_codec_regs(struct ym_softc *);
    150  1.24      kent static void ym_restore_codec_regs(struct ym_softc *);
    151  1.24      kent int	ym_codec_power_ctl(void *, int);
    152  1.24      kent static void ym_chip_powerdown(struct ym_softc *);
    153  1.24      kent static void ym_chip_powerup(struct ym_softc *, int);
    154  1.42  jmcneill static void	ym_powerdown_blocks(struct ym_softc *);
    155  1.42  jmcneill static void	ym_powerdown_callout(void *);
    156  1.24      kent void	ym_power_ctl(struct ym_softc *, int, int);
    157  1.24      kent #endif
    158  1.24      kent 
    159  1.24      kent static void ym_init(struct ym_softc *);
    160  1.24      kent static void ym_mute(struct ym_softc *, int, int);
    161  1.24      kent static void ym_set_master_gain(struct ym_softc *, struct ad1848_volume*);
    162  1.24      kent static void ym_hvol_to_master_gain(struct ym_softc *);
    163  1.24      kent static void ym_set_mic_gain(struct ym_softc *, int);
    164  1.24      kent static void ym_set_3d(struct ym_softc *, mixer_ctrl_t *,
    165  1.24      kent 	struct ad1848_volume *, int);
    166  1.39    dyoung static bool ym_suspend(device_t, const pmf_qual_t *);
    167  1.39    dyoung static bool ym_resume(device_t, const pmf_qual_t *);
    168   1.1  augustss 
    169   1.1  augustss 
    170  1.23      yamt const struct audio_hw_if ym_hw_if = {
    171   1.5        pk 	ad1848_isa_open,
    172   1.5        pk 	ad1848_isa_close,
    173   1.1  augustss 	NULL,
    174   1.1  augustss 	ad1848_query_encoding,
    175   1.1  augustss 	ad1848_set_params,
    176   1.8   mycroft 	ad1848_round_blocksize,
    177   1.1  augustss 	ad1848_commit_settings,
    178   1.8   mycroft 	NULL,
    179   1.8   mycroft 	NULL,
    180   1.8   mycroft 	NULL,
    181   1.8   mycroft 	NULL,
    182   1.9   mycroft 	ad1848_isa_halt_output,
    183   1.9   mycroft 	ad1848_isa_halt_input,
    184   1.1  augustss 	NULL,
    185   1.1  augustss 	ym_getdev,
    186   1.1  augustss 	NULL,
    187   1.1  augustss 	ym_mixer_set_port,
    188   1.1  augustss 	ym_mixer_get_port,
    189   1.1  augustss 	ym_query_devinfo,
    190   1.5        pk 	ad1848_isa_malloc,
    191   1.5        pk 	ad1848_isa_free,
    192   1.7   mycroft 	ad1848_isa_round_buffersize,
    193   1.5        pk 	ad1848_isa_mappage,
    194   1.5        pk 	ad1848_isa_get_props,
    195   1.8   mycroft 	ad1848_isa_trigger_output,
    196   1.8   mycroft 	ad1848_isa_trigger_input,
    197  1.18  augustss 	NULL,
    198  1.42  jmcneill 	ad1848_get_locks,
    199   1.1  augustss };
    200   1.1  augustss 
    201  1.27     perry static inline int ym_read(struct ym_softc *, int);
    202  1.27     perry static inline void ym_write(struct ym_softc *, int, int);
    203   1.1  augustss 
    204   1.1  augustss void
    205  1.24      kent ym_attach(struct ym_softc *sc)
    206   1.1  augustss {
    207  1.11     itohy 	static struct ad1848_volume vol_master = {YM_VOL_MASTER, YM_VOL_MASTER};
    208  1.11     itohy 	static struct ad1848_volume vol_dac    = {YM_VOL_DAC,    YM_VOL_DAC};
    209  1.11     itohy 	static struct ad1848_volume vol_opl3   = {YM_VOL_OPL3,   YM_VOL_OPL3};
    210  1.24      kent 	struct ad1848_softc *ac;
    211  1.15  augustss 	mixer_ctrl_t mctl;
    212  1.10     itohy 	struct audio_attach_args arg;
    213  1.10     itohy 
    214  1.24      kent 	ac = &sc->sc_ad1848.sc_ad1848;
    215  1.42  jmcneill 	callout_init(&sc->sc_powerdown_ch, CALLOUT_MPSAFE);
    216  1.42  jmcneill 	cv_init(&sc->sc_cv, "ym");
    217  1.43       mrg 	ad1848_init_locks(ac, IPL_AUDIO);
    218  1.14   thorpej 
    219  1.11     itohy 	/* Mute the output to reduce noise during initialization. */
    220  1.11     itohy 	ym_mute(sc, SA3_VOL_L, 1);
    221  1.11     itohy 	ym_mute(sc, SA3_VOL_R, 1);
    222  1.11     itohy 
    223  1.21     itohy 	sc->sc_version = ym_read(sc, SA3_MISC) & SA3_MISC_VER;
    224  1.21     itohy 	ac->chip_name = YM_IS_SA3(sc) ? "OPL3-SA3" : "OPL3-SA2";
    225  1.21     itohy 
    226   1.5        pk 	sc->sc_ad1848.sc_ih = isa_intr_establish(sc->sc_ic, sc->ym_irq,
    227  1.43       mrg 	    IST_EDGE, IPL_AUDIO, ym_intr, sc);
    228   1.1  augustss 
    229  1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    230  1.10     itohy 	sc->sc_ad1848.powerctl = ym_codec_power_ctl;
    231  1.10     itohy 	sc->sc_ad1848.powerarg = sc;
    232  1.10     itohy #endif
    233   1.6  augustss 	ad1848_isa_attach(&sc->sc_ad1848);
    234   1.2  augustss 	printf("\n");
    235   1.5        pk 	ac->parent = sc;
    236   1.2  augustss 
    237   1.2  augustss 	/* Establish chip in well known mode */
    238  1.11     itohy 	ym_set_master_gain(sc, &vol_master);
    239  1.10     itohy 	ym_set_mic_gain(sc, 0);
    240   1.2  augustss 	sc->master_mute = 0;
    241  1.10     itohy 
    242  1.11     itohy 	/* Override ad1848 settings. */
    243  1.11     itohy 	ad1848_set_channel_gain(ac, AD1848_DAC_CHANNEL, &vol_dac);
    244  1.11     itohy 	ad1848_set_channel_gain(ac, AD1848_AUX2_CHANNEL, &vol_opl3);
    245  1.15  augustss 
    246  1.13     itohy 	/*
    247  1.13     itohy 	 * Mute all external sources.  If you change this, you must
    248  1.13     itohy 	 * also change the initial value of sc->sc_external_sources
    249  1.13     itohy 	 * (currently 0 --- no external source is active).
    250  1.13     itohy 	 */
    251  1.20     itohy 	sc->mic_mute = 1;
    252  1.20     itohy 	ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
    253  1.13     itohy 	ad1848_mute_channel(ac, AD1848_AUX1_CHANNEL, MUTE_ALL);	/* CD */
    254  1.13     itohy 	ad1848_mute_channel(ac, AD1848_LINE_CHANNEL, MUTE_ALL);	/* line */
    255  1.13     itohy 	ac->mute[AD1848_AUX1_CHANNEL] = MUTE_ALL;
    256  1.13     itohy 	ac->mute[AD1848_LINE_CHANNEL] = MUTE_ALL;
    257  1.13     itohy 	/* speaker is muted by default */
    258  1.13     itohy 
    259  1.10     itohy 	/* We use only one IRQ (IRQ-A). */
    260  1.10     itohy 	ym_write(sc, SA3_IRQ_CONF, SA3_IRQ_CONF_MPU_A | SA3_IRQ_CONF_WSS_A);
    261  1.10     itohy 	ym_write(sc, SA3_HVOL_INTR_CNF, SA3_HVOL_INTR_CNF_A);
    262  1.10     itohy 
    263  1.10     itohy 	/* audio at ym attachment */
    264  1.40    nonaka 	sc->sc_audiodev = audio_attach_mi(&ym_hw_if, ac, ac->sc_dev);
    265  1.10     itohy 
    266  1.10     itohy 	/* opl at ym attachment */
    267  1.10     itohy 	if (sc->sc_opl_ioh) {
    268  1.10     itohy 		arg.type = AUDIODEV_TYPE_OPL;
    269  1.10     itohy 		arg.hwif = 0;
    270  1.10     itohy 		arg.hdl = 0;
    271  1.40    nonaka 		(void)config_found(ac->sc_dev, &arg, audioprint);
    272  1.10     itohy 	}
    273  1.10     itohy 
    274  1.10     itohy #if NMPU_YM > 0
    275  1.10     itohy 	/* mpu at ym attachment */
    276  1.10     itohy 	if (sc->sc_mpu_ioh) {
    277  1.10     itohy 		arg.type = AUDIODEV_TYPE_MPU;
    278  1.10     itohy 		arg.hwif = 0;
    279  1.10     itohy 		arg.hdl = 0;
    280  1.40    nonaka 		sc->sc_mpudev = config_found(ac->sc_dev, &arg, audioprint);
    281  1.10     itohy 	}
    282  1.10     itohy #endif
    283  1.10     itohy 
    284  1.10     itohy 	/* This must be AFTER the attachment of sub-devices. */
    285  1.42  jmcneill 	mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
    286  1.10     itohy 	ym_init(sc);
    287  1.10     itohy 
    288  1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    289  1.10     itohy 	/*
    290  1.10     itohy 	 * Initialize power control.
    291  1.10     itohy 	 */
    292  1.10     itohy 	sc->sc_pow_mode = YM_POWER_MODE;
    293  1.10     itohy 	sc->sc_pow_timeout = YM_POWER_OFF_SEC;
    294  1.10     itohy 
    295  1.10     itohy 	sc->sc_on_blocks = sc->sc_turning_off =
    296  1.24      kent 	    YM_POWER_CODEC_P | YM_POWER_CODEC_R |
    297  1.24      kent 	    YM_POWER_OPL3 | YM_POWER_MPU401 | YM_POWER_3D |
    298  1.24      kent 	    YM_POWER_CODEC_DA | YM_POWER_CODEC_AD | YM_POWER_OPL3_DA;
    299  1.10     itohy #if NJOY > 0
    300  1.11     itohy 	sc->sc_on_blocks |= YM_POWER_JOYSTICK;	/* prevents chip powerdown */
    301  1.10     itohy #endif
    302  1.10     itohy 	ym_powerdown_blocks(sc);
    303  1.42  jmcneill 	mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
    304   1.1  augustss 
    305  1.40    nonaka 	if (!pmf_device_register(ac->sc_dev, ym_suspend, ym_resume)) {
    306  1.40    nonaka 		aprint_error_dev(ac->sc_dev,
    307  1.36  christos 		    "cannot set power mgmt handler\n");
    308  1.36  christos 	}
    309  1.10     itohy #endif
    310  1.16     itohy 
    311  1.16     itohy 	/* Set tone control to the default position. */
    312  1.16     itohy 	mctl.un.value.num_channels = 1;
    313  1.20     itohy 	mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_TREBLE;
    314  1.16     itohy 	mctl.dev = YM_MASTER_TREBLE;
    315  1.16     itohy 	ym_mixer_set_port(sc, &mctl);
    316  1.20     itohy 	mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_BASS;
    317  1.16     itohy 	mctl.dev = YM_MASTER_BASS;
    318  1.16     itohy 	ym_mixer_set_port(sc, &mctl);
    319  1.20     itohy 
    320  1.20     itohy 	/* Unmute the output now if the chip is on. */
    321  1.20     itohy #ifndef AUDIO_NO_POWER_CTL
    322  1.20     itohy 	if (sc->sc_on_blocks & YM_POWER_ACTIVE)
    323  1.16     itohy #endif
    324  1.20     itohy 	{
    325  1.20     itohy 		ym_mute(sc, SA3_VOL_L, sc->master_mute);
    326  1.20     itohy 		ym_mute(sc, SA3_VOL_R, sc->master_mute);
    327  1.20     itohy 	}
    328   1.1  augustss }
    329   1.1  augustss 
    330  1.27     perry static inline int
    331  1.24      kent ym_read(struct ym_softc *sc, int reg)
    332   1.1  augustss {
    333  1.24      kent 
    334  1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
    335  1.24      kent 	    SA3_CTL_INDEX, (reg & 0xff));
    336  1.24      kent 	return bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_DATA);
    337   1.1  augustss }
    338   1.1  augustss 
    339  1.27     perry static inline void
    340  1.24      kent ym_write(struct ym_softc *sc, int reg, int data)
    341   1.1  augustss {
    342  1.24      kent 
    343  1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
    344  1.24      kent 	    SA3_CTL_INDEX, (reg & 0xff));
    345  1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
    346  1.24      kent 	    SA3_CTL_DATA, (data & 0xff));
    347   1.1  augustss }
    348   1.1  augustss 
    349  1.10     itohy static void
    350  1.24      kent ym_init(struct ym_softc *sc)
    351  1.10     itohy {
    352  1.24      kent 	uint8_t dpd, apd;
    353  1.10     itohy 
    354  1.42  jmcneill 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
    355  1.42  jmcneill 
    356  1.10     itohy 	/* Mute SoundBlaster output if possible. */
    357  1.10     itohy 	if (sc->sc_sb_ioh) {
    358  1.10     itohy 		bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_ADDR,
    359  1.24      kent 		    SBP_MASTER_VOL);
    360  1.10     itohy 		bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_DATA,
    361  1.24      kent 		    0x00);
    362  1.10     itohy 	}
    363  1.10     itohy 
    364  1.21     itohy 	if (!YM_IS_SA3(sc)) {
    365  1.21     itohy 		/* OPL3-SA2 */
    366  1.21     itohy 		ym_write(sc, SA3_PWR_MNG, SA2_PWR_MNG_CLKO |
    367  1.21     itohy 		    (sc->sc_opl_ioh == 0 ? SA2_PWR_MNG_FMPS : 0));
    368  1.21     itohy 		return;
    369  1.21     itohy 	}
    370  1.21     itohy 
    371  1.21     itohy 	/* OPL3-SA3 */
    372  1.10     itohy 	/* Figure out which part can be power down. */
    373  1.10     itohy 	dpd = SA3_DPWRDWN_SB		/* we never use SB */
    374  1.10     itohy #if NMPU_YM > 0
    375  1.24      kent 	    | (sc->sc_mpu_ioh ? 0 : SA3_DPWRDWN_MPU)
    376  1.10     itohy #else
    377  1.24      kent 	    | SA3_DPWRDWN_MPU
    378  1.10     itohy #endif
    379  1.10     itohy #if NJOY == 0
    380  1.24      kent 	    | SA3_DPWRDWN_JOY
    381  1.10     itohy #endif
    382  1.24      kent 	    | SA3_DPWRDWN_PNP	/* ISA Plug and Play is done */
    383  1.24      kent 	    /*
    384  1.24      kent 	     * The master clock is for external wavetable synthesizer
    385  1.24      kent 	     * OPL4-ML (YMF704) or OPL4-ML2 (YMF721),
    386  1.24      kent 	     * and is currently unused.
    387  1.24      kent 	     */
    388  1.24      kent 	    | SA3_DPWRDWN_MCLKO;
    389  1.10     itohy 
    390  1.10     itohy 	apd = SA3_APWRDWN_SBDAC;	/* we never use SB */
    391  1.10     itohy 
    392  1.10     itohy 	/* Power down OPL3 if not attached. */
    393  1.10     itohy 	if (sc->sc_opl_ioh == 0) {
    394  1.10     itohy 		dpd |= SA3_DPWRDWN_FM;
    395  1.10     itohy 		apd |= SA3_APWRDWN_FMDAC;
    396  1.10     itohy 	}
    397  1.10     itohy 	/* CODEC is always attached. */
    398  1.10     itohy 
    399  1.10     itohy 	/* Power down unused digital parts. */
    400  1.10     itohy 	ym_write(sc, SA3_DPWRDWN, dpd);
    401  1.10     itohy 
    402  1.10     itohy 	/* Power down unused analog parts. */
    403  1.10     itohy 	ym_write(sc, SA3_APWRDWN, apd);
    404  1.10     itohy }
    405   1.1  augustss 
    406   1.1  augustss 
    407   1.1  augustss int
    408  1.24      kent ym_getdev(void *addr, struct audio_device *retp)
    409   1.1  augustss {
    410  1.24      kent 	struct ym_softc *sc;
    411  1.24      kent 	struct ad1848_softc *ac;
    412  1.10     itohy 
    413  1.24      kent 	sc = addr;
    414  1.24      kent 	ac = &sc->sc_ad1848.sc_ad1848;
    415  1.22    itojun 	strlcpy(retp->name, ac->chip_name, sizeof(retp->name));
    416  1.22    itojun 	snprintf(retp->version, sizeof(retp->version), "%d", sc->sc_version);
    417  1.22    itojun 	strlcpy(retp->config, "ym", sizeof(retp->config));
    418  1.10     itohy 
    419   1.2  augustss 	return 0;
    420   1.1  augustss }
    421   1.1  augustss 
    422   1.1  augustss 
    423   1.1  augustss static ad1848_devmap_t mappings[] = {
    424  1.10     itohy 	{ YM_DAC_LVL, AD1848_KIND_LVL, AD1848_DAC_CHANNEL },
    425   1.2  augustss 	{ YM_MIDI_LVL, AD1848_KIND_LVL, AD1848_AUX2_CHANNEL },
    426   1.2  augustss 	{ YM_CD_LVL, AD1848_KIND_LVL, AD1848_AUX1_CHANNEL },
    427   1.2  augustss 	{ YM_LINE_LVL, AD1848_KIND_LVL, AD1848_LINE_CHANNEL },
    428   1.2  augustss 	{ YM_SPEAKER_LVL, AD1848_KIND_LVL, AD1848_MONO_CHANNEL },
    429   1.2  augustss 	{ YM_MONITOR_LVL, AD1848_KIND_LVL, AD1848_MONITOR_CHANNEL },
    430  1.10     itohy 	{ YM_DAC_MUTE, AD1848_KIND_MUTE, AD1848_DAC_CHANNEL },
    431   1.2  augustss 	{ YM_MIDI_MUTE, AD1848_KIND_MUTE, AD1848_AUX2_CHANNEL },
    432   1.2  augustss 	{ YM_CD_MUTE, AD1848_KIND_MUTE, AD1848_AUX1_CHANNEL },
    433   1.2  augustss 	{ YM_LINE_MUTE, AD1848_KIND_MUTE, AD1848_LINE_CHANNEL },
    434   1.2  augustss 	{ YM_SPEAKER_MUTE, AD1848_KIND_MUTE, AD1848_MONO_CHANNEL },
    435   1.2  augustss 	{ YM_MONITOR_MUTE, AD1848_KIND_MUTE, AD1848_MONITOR_CHANNEL },
    436   1.2  augustss 	{ YM_REC_LVL, AD1848_KIND_RECORDGAIN, -1 },
    437   1.2  augustss 	{ YM_RECORD_SOURCE, AD1848_KIND_RECORDSOURCE, -1}
    438   1.1  augustss };
    439   1.1  augustss 
    440  1.10     itohy #define NUMMAP	(sizeof(mappings) / sizeof(mappings[0]))
    441   1.1  augustss 
    442   1.1  augustss 
    443   1.1  augustss static void
    444  1.24      kent ym_mute(struct ym_softc *sc, int left_reg, int mute)
    445   1.1  augustss {
    446  1.24      kent 	uint8_t reg;
    447   1.1  augustss 
    448  1.10     itohy 	reg = ym_read(sc, left_reg);
    449  1.10     itohy 	if (mute)
    450  1.10     itohy 		ym_write(sc, left_reg, reg | 0x80);
    451  1.10     itohy 	else
    452  1.10     itohy 		ym_write(sc, left_reg, reg & ~0x80);
    453   1.1  augustss }
    454   1.1  augustss 
    455   1.1  augustss 
    456   1.1  augustss static void
    457  1.24      kent ym_set_master_gain(struct ym_softc *sc, struct ad1848_volume *vol)
    458   1.1  augustss {
    459  1.21     itohy 	u_int atten;
    460  1.10     itohy 
    461   1.2  augustss 	sc->master_gain = *vol;
    462  1.10     itohy 
    463  1.10     itohy 	atten = ((AUDIO_MAX_GAIN - vol->left) * (SA3_VOL_MV + 1)) /
    464  1.10     itohy 		(AUDIO_MAX_GAIN + 1);
    465  1.10     itohy 
    466  1.10     itohy 	ym_write(sc, SA3_VOL_L, (ym_read(sc, SA3_VOL_L) & ~SA3_VOL_MV) | atten);
    467  1.10     itohy 
    468  1.10     itohy 	atten = ((AUDIO_MAX_GAIN - vol->right) * (SA3_VOL_MV + 1)) /
    469  1.10     itohy 		(AUDIO_MAX_GAIN + 1);
    470  1.10     itohy 
    471  1.10     itohy 	ym_write(sc, SA3_VOL_R, (ym_read(sc, SA3_VOL_R) & ~SA3_VOL_MV) | atten);
    472   1.1  augustss }
    473   1.1  augustss 
    474  1.21     itohy /*
    475  1.21     itohy  * Read current setting of master volume from hardware
    476  1.21     itohy  * and update the software value if changed.
    477  1.21     itohy  * [SA3] This function clears hardware volume interrupt.
    478  1.21     itohy  */
    479  1.21     itohy static void
    480  1.24      kent ym_hvol_to_master_gain(struct ym_softc *sc)
    481  1.21     itohy {
    482  1.21     itohy 	u_int prevval, val;
    483  1.24      kent 	int changed;
    484  1.21     itohy 
    485  1.24      kent 	changed = 0;
    486  1.21     itohy 	val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_L);
    487  1.21     itohy 	prevval = (sc->master_gain.left * (SA3_VOL_MV + 1)) /
    488  1.21     itohy 	    (AUDIO_MAX_GAIN + 1);
    489  1.21     itohy 	if (val != prevval) {
    490  1.21     itohy 		sc->master_gain.left =
    491  1.21     itohy 		    val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
    492  1.21     itohy 		changed = 1;
    493  1.21     itohy 	}
    494  1.21     itohy 
    495  1.21     itohy 	val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_R);
    496  1.21     itohy 	prevval = (sc->master_gain.right * (SA3_VOL_MV + 1)) /
    497  1.21     itohy 	    (AUDIO_MAX_GAIN + 1);
    498  1.21     itohy 	if (val != prevval) {
    499  1.21     itohy 		sc->master_gain.right =
    500  1.21     itohy 		    val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
    501  1.21     itohy 		changed = 1;
    502  1.21     itohy 	}
    503  1.21     itohy 
    504  1.21     itohy #if 0	/* XXX NOT YET */
    505  1.21     itohy 	/* Notify the change to async processes. */
    506  1.21     itohy 	if (changed && sc->sc_audiodev)
    507  1.21     itohy 		mixer_signal(sc->sc_audiodev);
    508  1.21     itohy #endif
    509  1.21     itohy }
    510  1.21     itohy 
    511   1.1  augustss static void
    512  1.24      kent ym_set_mic_gain(struct ym_softc *sc, int vol)
    513   1.1  augustss {
    514  1.10     itohy 	u_int atten;
    515  1.10     itohy 
    516  1.10     itohy 	sc->mic_gain = vol;
    517  1.10     itohy 
    518  1.10     itohy 	atten = ((AUDIO_MAX_GAIN - vol) * (SA3_MIC_MCV + 1)) /
    519  1.10     itohy 		(AUDIO_MAX_GAIN + 1);
    520  1.10     itohy 
    521  1.10     itohy 	ym_write(sc, SA3_MIC_VOL,
    522  1.10     itohy 		 (ym_read(sc, SA3_MIC_VOL) & ~SA3_MIC_MCV) | atten);
    523  1.10     itohy }
    524   1.1  augustss 
    525  1.10     itohy static void
    526  1.24      kent ym_set_3d(struct ym_softc *sc, mixer_ctrl_t *cp,
    527  1.24      kent     struct ad1848_volume *val, int reg)
    528  1.10     itohy {
    529  1.24      kent 	uint8_t l, r, e;
    530   1.1  augustss 
    531  1.42  jmcneill 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
    532  1.42  jmcneill 
    533  1.10     itohy 	ad1848_to_vol(cp, val);
    534   1.1  augustss 
    535  1.20     itohy 	l = val->left;
    536  1.20     itohy 	r = val->right;
    537  1.20     itohy 	if (reg != SA3_3D_WIDE) {
    538  1.20     itohy 		/* flat on center */
    539  1.20     itohy 		l = YM_EQ_EXPAND_VALUE(l);
    540  1.20     itohy 		r = YM_EQ_EXPAND_VALUE(r);
    541  1.20     itohy 	}
    542  1.20     itohy 
    543  1.20     itohy 	e = (l * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
    544  1.24      kent 	    (AUDIO_MAX_GAIN + 1) << SA3_3D_LSHIFT |
    545  1.20     itohy 	    (r * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
    546  1.24      kent 	    (AUDIO_MAX_GAIN + 1) << SA3_3D_RSHIFT;
    547  1.10     itohy 
    548  1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    549  1.10     itohy 	/* turn wide stereo on if necessary */
    550  1.10     itohy 	if (e)
    551  1.10     itohy 		ym_power_ctl(sc, YM_POWER_3D, 1);
    552  1.10     itohy #endif
    553  1.10     itohy 
    554  1.10     itohy 	ym_write(sc, reg, e);
    555  1.10     itohy 
    556  1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    557  1.10     itohy 	/* turn wide stereo off if necessary */
    558  1.10     itohy 	if (YM_EQ_OFF(&sc->sc_treble) && YM_EQ_OFF(&sc->sc_bass) &&
    559  1.20     itohy 	    YM_WIDE_OFF(&sc->sc_wide))
    560  1.10     itohy 		ym_power_ctl(sc, YM_POWER_3D, 0);
    561  1.10     itohy #endif
    562   1.1  augustss }
    563   1.1  augustss 
    564   1.1  augustss int
    565  1.24      kent ym_mixer_set_port(void *addr, mixer_ctrl_t *cp)
    566   1.1  augustss {
    567  1.24      kent 	struct ad1848_softc *ac;
    568  1.24      kent 	struct ym_softc *sc;
    569   1.2  augustss 	struct ad1848_volume vol;
    570  1.24      kent 	int error;
    571  1.24      kent 	uint8_t extsources;
    572   1.1  augustss 
    573  1.24      kent 	ac = addr;
    574  1.24      kent 	sc = ac->parent;
    575  1.24      kent 	error = 0;
    576  1.10     itohy 	DPRINTF(("%s: ym_mixer_set_port: dev 0x%x, type 0x%x, 0x%x (%d; %d, %d)\n",
    577  1.10     itohy 		DVNAME(sc), cp->dev, cp->type, cp->un.ord,
    578  1.10     itohy 		cp->un.value.num_channels, cp->un.value.level[0],
    579  1.10     itohy 		cp->un.value.level[1]));
    580  1.10     itohy 
    581  1.21     itohy 	/* SA2 doesn't have equalizer */
    582  1.21     itohy 	if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
    583  1.21     itohy 		return ENXIO;
    584  1.21     itohy 
    585  1.42  jmcneill 	mutex_spin_enter(&ac->sc_intr_lock);
    586  1.42  jmcneill 
    587  1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    588  1.10     itohy 	/* Power-up chip */
    589  1.10     itohy 	ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
    590  1.10     itohy #endif
    591   1.1  augustss 
    592   1.2  augustss 	switch (cp->dev) {
    593   1.2  augustss 	case YM_OUTPUT_LVL:
    594   1.2  augustss 		ad1848_to_vol(cp, &vol);
    595   1.2  augustss 		ym_set_master_gain(sc, &vol);
    596  1.10     itohy 		goto out;
    597   1.2  augustss 
    598   1.2  augustss 	case YM_OUTPUT_MUTE:
    599   1.2  augustss 		sc->master_mute = (cp->un.ord != 0);
    600  1.10     itohy 		ym_mute(sc, SA3_VOL_L, sc->master_mute);
    601  1.10     itohy 		ym_mute(sc, SA3_VOL_R, sc->master_mute);
    602  1.10     itohy 		goto out;
    603   1.2  augustss 
    604   1.2  augustss 	case YM_MIC_LVL:
    605   1.2  augustss 		if (cp->un.value.num_channels != 1)
    606   1.2  augustss 			error = EINVAL;
    607  1.10     itohy 		else
    608  1.10     itohy 			ym_set_mic_gain(sc,
    609  1.24      kent 			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
    610  1.10     itohy 		goto out;
    611  1.10     itohy 
    612  1.10     itohy 	case YM_MASTER_EQMODE:
    613  1.10     itohy 		sc->sc_eqmode = cp->un.ord & SA3_SYS_CTL_YMODE;
    614  1.10     itohy 		ym_write(sc, SA3_SYS_CTL, (ym_read(sc, SA3_SYS_CTL) &
    615  1.24      kent 			     ~SA3_SYS_CTL_YMODE) | sc->sc_eqmode);
    616  1.10     itohy 		goto out;
    617  1.10     itohy 
    618  1.10     itohy 	case YM_MASTER_TREBLE:
    619  1.10     itohy 		ym_set_3d(sc, cp, &sc->sc_treble, SA3_3D_TREBLE);
    620  1.10     itohy 		goto out;
    621  1.10     itohy 
    622  1.10     itohy 	case YM_MASTER_BASS:
    623  1.10     itohy 		ym_set_3d(sc, cp, &sc->sc_bass, SA3_3D_BASS);
    624  1.10     itohy 		goto out;
    625  1.10     itohy 
    626  1.10     itohy 	case YM_MASTER_WIDE:
    627  1.10     itohy 		ym_set_3d(sc, cp, &sc->sc_wide, SA3_3D_WIDE);
    628  1.10     itohy 		goto out;
    629  1.10     itohy 
    630  1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    631  1.10     itohy 	case YM_PWR_MODE:
    632  1.10     itohy 		if ((unsigned) cp->un.ord > YM_POWER_NOSAVE)
    633  1.10     itohy 			error = EINVAL;
    634  1.10     itohy 		else
    635  1.10     itohy 			sc->sc_pow_mode = cp->un.ord;
    636  1.10     itohy 		goto out;
    637  1.10     itohy 
    638  1.10     itohy 	case YM_PWR_TIMEOUT:
    639  1.10     itohy 		if (cp->un.value.num_channels != 1)
    640  1.10     itohy 			error = EINVAL;
    641  1.10     itohy 		else
    642  1.10     itohy 			sc->sc_pow_timeout =
    643  1.24      kent 			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
    644  1.10     itohy 		goto out;
    645  1.10     itohy 
    646  1.10     itohy 	/*
    647  1.13     itohy 	 * Needs power-up to hear external sources.
    648  1.13     itohy 	 */
    649  1.13     itohy 	case YM_CD_MUTE:
    650  1.13     itohy 	case YM_LINE_MUTE:
    651  1.13     itohy 	case YM_SPEAKER_MUTE:
    652  1.20     itohy 	case YM_MIC_MUTE:
    653  1.13     itohy 		extsources = YM_MIXER_TO_XS(cp->dev);
    654  1.13     itohy 		if (cp->un.ord) {
    655  1.13     itohy 			if ((sc->sc_external_sources &= ~extsources) == 0) {
    656  1.13     itohy 				/*
    657  1.13     itohy 				 * All the external sources are muted
    658  1.13     itohy 				 *  --- no need to keep the chip on.
    659  1.13     itohy 				 */
    660  1.13     itohy 				ym_power_ctl(sc, YM_POWER_EXT_SRC, 0);
    661  1.13     itohy 				DPRINTF(("%s: ym_mixer_set_port: off for ext\n",
    662  1.13     itohy 					DVNAME(sc)));
    663  1.13     itohy 			}
    664  1.13     itohy 		} else {
    665  1.13     itohy 			/* mute off - power-up the chip */
    666  1.13     itohy 			sc->sc_external_sources |= extsources;
    667  1.13     itohy 			ym_power_ctl(sc, YM_POWER_EXT_SRC, 1);
    668  1.13     itohy 			DPRINTF(("%s: ym_mixer_set_port: on for ext\n",
    669  1.13     itohy 				DVNAME(sc)));
    670  1.13     itohy 		}
    671  1.13     itohy 		break;	/* fall to ad1848_mixer_set_port() */
    672  1.13     itohy 
    673  1.13     itohy 	/*
    674  1.10     itohy 	 * Power on/off the playback part for monitoring.
    675  1.10     itohy 	 */
    676  1.10     itohy 	case YM_MONITOR_MUTE:
    677  1.10     itohy 		if ((ac->open_mode & (FREAD | FWRITE)) == FREAD)
    678  1.10     itohy 			ym_power_ctl(sc, YM_POWER_CODEC_P | YM_POWER_CODEC_DA,
    679  1.24      kent 			    cp->un.ord == 0);
    680  1.10     itohy 		break;	/* fall to ad1848_mixer_set_port() */
    681  1.10     itohy #endif
    682  1.10     itohy 	}
    683  1.10     itohy 
    684  1.10     itohy 	error = ad1848_mixer_set_port(ac, mappings, NUMMAP, cp);
    685  1.10     itohy 
    686  1.10     itohy 	if (error != ENXIO)
    687  1.10     itohy 		goto out;
    688  1.10     itohy 
    689  1.10     itohy 	error = 0;
    690   1.2  augustss 
    691  1.10     itohy 	switch (cp->dev) {
    692   1.2  augustss 	case YM_MIC_MUTE:
    693   1.2  augustss 		sc->mic_mute = (cp->un.ord != 0);
    694  1.10     itohy 		ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
    695   1.2  augustss 		break;
    696   1.2  augustss 
    697   1.2  augustss 	default:
    698  1.10     itohy 		error = ENXIO;
    699  1.10     itohy 		break;
    700   1.2  augustss 	}
    701  1.10     itohy 
    702  1.10     itohy out:
    703  1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    704  1.10     itohy 	/* Power-down chip */
    705  1.10     itohy 	ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
    706  1.10     itohy #endif
    707  1.42  jmcneill 	mutex_spin_exit(&ac->sc_intr_lock);
    708  1.10     itohy 
    709  1.24      kent 	return error;
    710   1.1  augustss }
    711   1.1  augustss 
    712   1.1  augustss int
    713  1.24      kent ym_mixer_get_port(void *addr, mixer_ctrl_t *cp)
    714   1.1  augustss {
    715  1.24      kent 	struct ad1848_softc *ac;
    716  1.24      kent 	struct ym_softc *sc;
    717  1.10     itohy 	int error;
    718   1.1  augustss 
    719  1.24      kent 	ac = addr;
    720  1.24      kent 	sc = ac->parent;
    721  1.21     itohy 	/* SA2 doesn't have equalizer */
    722  1.21     itohy 	if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
    723  1.21     itohy 		return ENXIO;
    724  1.21     itohy 
    725   1.2  augustss 	switch (cp->dev) {
    726   1.2  augustss 	case YM_OUTPUT_LVL:
    727  1.21     itohy 		if (!YM_IS_SA3(sc)) {
    728  1.21     itohy 			/*
    729  1.21     itohy 			 * SA2 doesn't have hardware volume interrupt.
    730  1.21     itohy 			 * Read current value and update every time.
    731  1.21     itohy 			 */
    732  1.42  jmcneill 			mutex_spin_enter(&ac->sc_intr_lock);
    733  1.21     itohy #ifndef AUDIO_NO_POWER_CTL
    734  1.21     itohy 			/* Power-up chip */
    735  1.21     itohy 			ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
    736  1.21     itohy #endif
    737  1.21     itohy 			ym_hvol_to_master_gain(sc);
    738  1.21     itohy #ifndef AUDIO_NO_POWER_CTL
    739  1.21     itohy 			/* Power-down chip */
    740  1.21     itohy 			ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
    741  1.21     itohy #endif
    742  1.42  jmcneill 			mutex_spin_exit(&ac->sc_intr_lock);
    743  1.21     itohy 		}
    744   1.2  augustss 		ad1848_from_vol(cp, &sc->master_gain);
    745  1.10     itohy 		return 0;
    746  1.10     itohy 
    747   1.2  augustss 	case YM_OUTPUT_MUTE:
    748   1.2  augustss 		cp->un.ord = sc->master_mute;
    749  1.10     itohy 		return 0;
    750  1.10     itohy 
    751   1.2  augustss 	case YM_MIC_LVL:
    752   1.2  augustss 		if (cp->un.value.num_channels != 1)
    753  1.10     itohy 			return EINVAL;
    754  1.10     itohy 		cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->mic_gain;
    755  1.10     itohy 		return 0;
    756  1.10     itohy 
    757  1.10     itohy 	case YM_MASTER_EQMODE:
    758  1.10     itohy 		cp->un.ord = sc->sc_eqmode;
    759  1.10     itohy 		return 0;
    760  1.10     itohy 
    761  1.10     itohy 	case YM_MASTER_TREBLE:
    762  1.10     itohy 		ad1848_from_vol(cp, &sc->sc_treble);
    763  1.10     itohy 		return 0;
    764  1.10     itohy 
    765  1.10     itohy 	case YM_MASTER_BASS:
    766  1.10     itohy 		ad1848_from_vol(cp, &sc->sc_bass);
    767  1.10     itohy 		return 0;
    768  1.10     itohy 
    769  1.10     itohy 	case YM_MASTER_WIDE:
    770  1.10     itohy 		ad1848_from_vol(cp, &sc->sc_wide);
    771  1.10     itohy 		return 0;
    772  1.10     itohy 
    773  1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    774  1.10     itohy 	case YM_PWR_MODE:
    775  1.10     itohy 		cp->un.ord = sc->sc_pow_mode;
    776  1.10     itohy 		return 0;
    777  1.10     itohy 
    778  1.10     itohy 	case YM_PWR_TIMEOUT:
    779  1.10     itohy 		if (cp->un.value.num_channels != 1)
    780  1.10     itohy 			return EINVAL;
    781  1.10     itohy 		cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_pow_timeout;
    782  1.10     itohy 		return 0;
    783  1.10     itohy #endif
    784  1.10     itohy 	}
    785  1.10     itohy 
    786  1.10     itohy 	error = ad1848_mixer_get_port(ac, mappings, NUMMAP, cp);
    787  1.10     itohy 
    788  1.10     itohy 	if (error != ENXIO)
    789  1.24      kent 		return error;
    790  1.10     itohy 
    791  1.10     itohy 	error = 0;
    792  1.10     itohy 
    793  1.10     itohy 	switch (cp->dev) {
    794   1.2  augustss 	case YM_MIC_MUTE:
    795   1.2  augustss 		cp->un.ord = sc->mic_mute;
    796   1.2  augustss 		break;
    797  1.10     itohy 
    798   1.2  augustss 	default:
    799   1.2  augustss 		error = ENXIO;
    800   1.2  augustss 		break;
    801   1.2  augustss 	}
    802  1.10     itohy 
    803  1.24      kent 	return error;
    804   1.1  augustss }
    805   1.1  augustss 
    806  1.25  christos static const char *mixer_classes[] = {
    807  1.10     itohy 	AudioCinputs, AudioCrecord, AudioCoutputs, AudioCmonitor,
    808  1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    809  1.21     itohy 	AudioCpower,
    810  1.10     itohy #endif
    811  1.21     itohy 	AudioCequalization
    812  1.10     itohy };
    813   1.1  augustss 
    814   1.1  augustss int
    815  1.24      kent ym_query_devinfo(void *addr, mixer_devinfo_t *dip)
    816   1.1  augustss {
    817  1.25  christos 	static const char *mixer_port_names[] = {
    818  1.10     itohy 		AudioNdac, AudioNmidi, AudioNcd, AudioNline, AudioNspeaker,
    819  1.10     itohy 		AudioNmicrophone, AudioNmonitor
    820  1.10     itohy 	};
    821  1.24      kent 	struct ad1848_softc *ac;
    822  1.24      kent 	struct ym_softc *sc;
    823  1.21     itohy 
    824  1.24      kent 	ac = addr;
    825  1.24      kent 	sc = ac->parent;
    826  1.21     itohy 	/* SA2 doesn't have equalizer */
    827  1.21     itohy 	if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(dip->index))
    828  1.21     itohy 		return ENXIO;
    829   1.1  augustss 
    830   1.2  augustss 	dip->next = dip->prev = AUDIO_MIXER_LAST;
    831  1.10     itohy 
    832   1.2  augustss 	switch(dip->index) {
    833  1.21     itohy 	case YM_INPUT_CLASS:
    834   1.2  augustss 	case YM_OUTPUT_CLASS:
    835   1.2  augustss 	case YM_MONITOR_CLASS:
    836   1.2  augustss 	case YM_RECORD_CLASS:
    837  1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    838  1.10     itohy 	case YM_PWR_CLASS:
    839  1.10     itohy #endif
    840  1.21     itohy 	case YM_EQ_CLASS:
    841   1.2  augustss 		dip->type = AUDIO_MIXER_CLASS;
    842   1.2  augustss 		dip->mixer_class = dip->index;
    843  1.10     itohy 		strcpy(dip->label.name,
    844   1.2  augustss 		       mixer_classes[dip->index - YM_INPUT_CLASS]);
    845   1.2  augustss 		break;
    846  1.10     itohy 
    847  1.10     itohy 	case YM_DAC_LVL:
    848   1.2  augustss 	case YM_MIDI_LVL:
    849   1.2  augustss 	case YM_CD_LVL:
    850  1.10     itohy 	case YM_LINE_LVL:
    851   1.2  augustss 	case YM_SPEAKER_LVL:
    852   1.2  augustss 	case YM_MIC_LVL:
    853   1.2  augustss 	case YM_MONITOR_LVL:
    854   1.2  augustss 		dip->type = AUDIO_MIXER_VALUE;
    855   1.2  augustss 		if (dip->index == YM_MONITOR_LVL)
    856   1.2  augustss 			dip->mixer_class = YM_MONITOR_CLASS;
    857   1.2  augustss 		else
    858   1.2  augustss 			dip->mixer_class = YM_INPUT_CLASS;
    859  1.10     itohy 
    860   1.2  augustss 		dip->next = dip->index + 7;
    861  1.10     itohy 
    862   1.2  augustss 		strcpy(dip->label.name,
    863  1.10     itohy 		       mixer_port_names[dip->index - YM_DAC_LVL]);
    864  1.10     itohy 
    865   1.2  augustss 		if (dip->index == YM_SPEAKER_LVL ||
    866   1.2  augustss 		    dip->index == YM_MIC_LVL)
    867   1.2  augustss 			dip->un.v.num_channels = 1;
    868   1.2  augustss 		else
    869   1.2  augustss 			dip->un.v.num_channels = 2;
    870  1.10     itohy 
    871  1.20     itohy 		if (dip->index == YM_SPEAKER_LVL)
    872  1.20     itohy 			dip->un.v.delta = 1 << (8 - 4 /* valid bits */);
    873  1.20     itohy 		else if (dip->index == YM_DAC_LVL ||
    874  1.20     itohy 		    dip->index == YM_MONITOR_LVL)
    875  1.20     itohy 			dip->un.v.delta = 1 << (8 - 6 /* valid bits */);
    876  1.20     itohy 		else
    877  1.20     itohy 			dip->un.v.delta = 1 << (8 - 5 /* valid bits */);
    878  1.20     itohy 
    879   1.2  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
    880   1.2  augustss 		break;
    881  1.10     itohy 
    882  1.10     itohy 	case YM_DAC_MUTE:
    883   1.2  augustss 	case YM_MIDI_MUTE:
    884   1.2  augustss 	case YM_CD_MUTE:
    885   1.2  augustss 	case YM_LINE_MUTE:
    886   1.2  augustss 	case YM_SPEAKER_MUTE:
    887   1.2  augustss 	case YM_MIC_MUTE:
    888   1.2  augustss 	case YM_MONITOR_MUTE:
    889   1.2  augustss 		if (dip->index == YM_MONITOR_MUTE)
    890   1.2  augustss 			dip->mixer_class = YM_MONITOR_CLASS;
    891   1.2  augustss 		else
    892   1.2  augustss 			dip->mixer_class = YM_INPUT_CLASS;
    893   1.2  augustss 		dip->type = AUDIO_MIXER_ENUM;
    894   1.2  augustss 		dip->prev = dip->index - 7;
    895   1.2  augustss 	mute:
    896   1.2  augustss 		strcpy(dip->label.name, AudioNmute);
    897   1.2  augustss 		dip->un.e.num_mem = 2;
    898   1.2  augustss 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
    899   1.2  augustss 		dip->un.e.member[0].ord = 0;
    900   1.2  augustss 		strcpy(dip->un.e.member[1].label.name, AudioNon);
    901   1.2  augustss 		dip->un.e.member[1].ord = 1;
    902   1.2  augustss 		break;
    903  1.10     itohy 
    904  1.10     itohy 
    905   1.2  augustss 	case YM_OUTPUT_LVL:
    906   1.2  augustss 		dip->type = AUDIO_MIXER_VALUE;
    907   1.2  augustss 		dip->mixer_class = YM_OUTPUT_CLASS;
    908   1.2  augustss 		dip->next = YM_OUTPUT_MUTE;
    909   1.2  augustss 		strcpy(dip->label.name, AudioNmaster);
    910   1.2  augustss 		dip->un.v.num_channels = 2;
    911  1.20     itohy 		dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1);
    912   1.2  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
    913   1.2  augustss 		break;
    914  1.10     itohy 
    915   1.2  augustss 	case YM_OUTPUT_MUTE:
    916   1.2  augustss 		dip->mixer_class = YM_OUTPUT_CLASS;
    917   1.2  augustss 		dip->type = AUDIO_MIXER_ENUM;
    918   1.2  augustss 		dip->prev = YM_OUTPUT_LVL;
    919   1.2  augustss 		goto mute;
    920  1.10     itohy 
    921  1.10     itohy 
    922   1.2  augustss 	case YM_REC_LVL:	/* record level */
    923   1.2  augustss 		dip->type = AUDIO_MIXER_VALUE;
    924   1.2  augustss 		dip->mixer_class = YM_RECORD_CLASS;
    925   1.2  augustss 		dip->next = YM_RECORD_SOURCE;
    926   1.2  augustss 		strcpy(dip->label.name, AudioNrecord);
    927   1.2  augustss 		dip->un.v.num_channels = 2;
    928  1.20     itohy 		dip->un.v.delta = 1 << (8 - 4 /* valid bits */);
    929   1.2  augustss 		strcpy(dip->un.v.units.name, AudioNvolume);
    930   1.2  augustss 		break;
    931  1.10     itohy 
    932   1.2  augustss 	case YM_RECORD_SOURCE:
    933   1.2  augustss 		dip->mixer_class = YM_RECORD_CLASS;
    934   1.2  augustss 		dip->type = AUDIO_MIXER_ENUM;
    935   1.2  augustss 		dip->prev = YM_REC_LVL;
    936   1.2  augustss 		strcpy(dip->label.name, AudioNsource);
    937   1.2  augustss 		dip->un.e.num_mem = 4;
    938   1.2  augustss 		strcpy(dip->un.e.member[0].label.name, AudioNmicrophone);
    939   1.2  augustss 		dip->un.e.member[0].ord = MIC_IN_PORT;
    940   1.2  augustss 		strcpy(dip->un.e.member[1].label.name, AudioNline);
    941   1.2  augustss 		dip->un.e.member[1].ord = LINE_IN_PORT;
    942   1.2  augustss 		strcpy(dip->un.e.member[2].label.name, AudioNdac);
    943   1.2  augustss 		dip->un.e.member[2].ord = DAC_IN_PORT;
    944   1.2  augustss 		strcpy(dip->un.e.member[3].label.name, AudioNcd);
    945   1.2  augustss 		dip->un.e.member[3].ord = AUX1_IN_PORT;
    946   1.2  augustss 		break;
    947  1.10     itohy 
    948  1.10     itohy 
    949  1.10     itohy 	case YM_MASTER_EQMODE:
    950  1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    951  1.10     itohy 		dip->mixer_class = YM_EQ_CLASS;
    952  1.10     itohy 		strcpy(dip->label.name, AudioNmode);
    953  1.10     itohy 		strcpy(dip->un.v.units.name, AudioNmode);
    954  1.10     itohy 		dip->un.e.num_mem = 4;
    955  1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNdesktop);
    956  1.10     itohy 		dip->un.e.member[0].ord = SA3_SYS_CTL_YMODE0;
    957  1.10     itohy 		strcpy(dip->un.e.member[1].label.name, AudioNlaptop);
    958  1.10     itohy 		dip->un.e.member[1].ord = SA3_SYS_CTL_YMODE1;
    959  1.10     itohy 		strcpy(dip->un.e.member[2].label.name, AudioNsubnote);
    960  1.10     itohy 		dip->un.e.member[2].ord = SA3_SYS_CTL_YMODE2;
    961  1.10     itohy 		strcpy(dip->un.e.member[3].label.name, AudioNhifi);
    962  1.10     itohy 		dip->un.e.member[3].ord = SA3_SYS_CTL_YMODE3;
    963  1.10     itohy 		break;
    964  1.10     itohy 
    965  1.10     itohy 	case YM_MASTER_TREBLE:
    966  1.10     itohy 		dip->type = AUDIO_MIXER_VALUE;
    967  1.10     itohy 		dip->mixer_class = YM_EQ_CLASS;
    968  1.10     itohy 		strcpy(dip->label.name, AudioNtreble);
    969  1.10     itohy 		dip->un.v.num_channels = 2;
    970  1.20     itohy 		dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1)
    971  1.20     itohy 		    >> YM_EQ_REDUCE_BIT;
    972  1.10     itohy 		strcpy(dip->un.v.units.name, AudioNtreble);
    973  1.10     itohy 		break;
    974  1.10     itohy 
    975  1.10     itohy 	case YM_MASTER_BASS:
    976  1.10     itohy 		dip->type = AUDIO_MIXER_VALUE;
    977  1.10     itohy 		dip->mixer_class = YM_EQ_CLASS;
    978  1.10     itohy 		strcpy(dip->label.name, AudioNbass);
    979  1.10     itohy 		dip->un.v.num_channels = 2;
    980  1.20     itohy 		dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1)
    981  1.20     itohy 		    >> YM_EQ_REDUCE_BIT;
    982  1.10     itohy 		strcpy(dip->un.v.units.name, AudioNbass);
    983  1.10     itohy 		break;
    984  1.10     itohy 
    985  1.10     itohy 	case YM_MASTER_WIDE:
    986  1.10     itohy 		dip->type = AUDIO_MIXER_VALUE;
    987  1.10     itohy 		dip->mixer_class = YM_EQ_CLASS;
    988  1.10     itohy 		strcpy(dip->label.name, AudioNsurround);
    989  1.10     itohy 		dip->un.v.num_channels = 2;
    990  1.20     itohy 		dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1);
    991  1.10     itohy 		strcpy(dip->un.v.units.name, AudioNsurround);
    992  1.10     itohy 		break;
    993  1.10     itohy 
    994  1.10     itohy 
    995  1.10     itohy #ifndef AUDIO_NO_POWER_CTL
    996  1.10     itohy 	case YM_PWR_MODE:
    997  1.10     itohy 		dip->type = AUDIO_MIXER_ENUM;
    998  1.10     itohy 		dip->mixer_class = YM_PWR_CLASS;
    999  1.10     itohy 		dip->next = YM_PWR_TIMEOUT;
   1000  1.13     itohy 		strcpy(dip->label.name, AudioNsave);
   1001  1.10     itohy 		dip->un.e.num_mem = 3;
   1002  1.10     itohy 		strcpy(dip->un.e.member[0].label.name, AudioNpowerdown);
   1003  1.10     itohy 		dip->un.e.member[0].ord = YM_POWER_POWERDOWN;
   1004  1.10     itohy 		strcpy(dip->un.e.member[1].label.name, AudioNpowersave);
   1005  1.10     itohy 		dip->un.e.member[1].ord = YM_POWER_POWERSAVE;
   1006  1.10     itohy 		strcpy(dip->un.e.member[2].label.name, AudioNnosave);
   1007  1.10     itohy 		dip->un.e.member[2].ord = YM_POWER_NOSAVE;
   1008  1.10     itohy 		break;
   1009  1.10     itohy 
   1010  1.10     itohy 	case YM_PWR_TIMEOUT:
   1011  1.10     itohy 		dip->type = AUDIO_MIXER_VALUE;
   1012  1.10     itohy 		dip->mixer_class = YM_PWR_CLASS;
   1013  1.10     itohy 		dip->prev = YM_PWR_MODE;
   1014  1.10     itohy 		strcpy(dip->label.name, AudioNtimeout);
   1015  1.10     itohy 		dip->un.v.num_channels = 1;
   1016  1.10     itohy 		strcpy(dip->un.v.units.name, AudioNtimeout);
   1017  1.10     itohy 		break;
   1018  1.10     itohy #endif /* not AUDIO_NO_POWER_CTL */
   1019  1.10     itohy 
   1020   1.2  augustss 	default:
   1021   1.2  augustss 		return ENXIO;
   1022   1.2  augustss 		/*NOTREACHED*/
   1023   1.2  augustss 	}
   1024  1.10     itohy 
   1025  1.10     itohy 	return 0;
   1026  1.10     itohy }
   1027  1.10     itohy 
   1028  1.10     itohy int
   1029  1.24      kent ym_intr(void *arg)
   1030  1.10     itohy {
   1031  1.33   xtraeme 	struct ym_softc *sc = arg;
   1032  1.33   xtraeme #if NMPU_YM > 0
   1033  1.33   xtraeme 	struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev);
   1034  1.33   xtraeme #endif
   1035  1.10     itohy 	u_int8_t ist;
   1036  1.10     itohy 	int processed;
   1037  1.10     itohy 
   1038  1.42  jmcneill 	mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1039  1.42  jmcneill 
   1040  1.10     itohy 	/* OPL3 timer is currently unused. */
   1041  1.10     itohy 	if (((ist = ym_read(sc, SA3_IRQA_STAT)) &
   1042  1.10     itohy 	     ~(SA3_IRQ_STAT_SB|SA3_IRQ_STAT_OPL3)) == 0) {
   1043  1.10     itohy 		DPRINTF(("%s: ym_intr: spurious interrupt\n", DVNAME(sc)));
   1044  1.42  jmcneill 		mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1045  1.10     itohy 		return 0;
   1046  1.10     itohy 	}
   1047  1.10     itohy 
   1048  1.10     itohy 	/* Process pending interrupts. */
   1049  1.10     itohy 	do {
   1050  1.10     itohy 		processed = 0;
   1051  1.10     itohy 		/*
   1052  1.10     itohy 		 * CODEC interrupts.
   1053  1.10     itohy 		 */
   1054  1.10     itohy 		if (ist & (SA3_IRQ_STAT_TI|SA3_IRQ_STAT_CI|SA3_IRQ_STAT_PI)) {
   1055  1.10     itohy 			ad1848_isa_intr(&sc->sc_ad1848);
   1056  1.10     itohy 			processed = 1;
   1057  1.10     itohy 		}
   1058  1.10     itohy #if NMPU_YM > 0
   1059  1.10     itohy 		/*
   1060  1.10     itohy 		 * MPU401 interrupt.
   1061  1.10     itohy 		 */
   1062  1.10     itohy 		if (ist & SA3_IRQ_STAT_MPU) {
   1063  1.33   xtraeme 			mpu_intr(sc_mpu);
   1064  1.10     itohy 			processed = 1;
   1065  1.10     itohy 		}
   1066  1.10     itohy #endif
   1067  1.10     itohy 		/*
   1068  1.21     itohy 		 * Hardware volume interrupt (SA3 only).
   1069  1.10     itohy 		 * Recalculate master volume from the hardware setting.
   1070  1.10     itohy 		 */
   1071  1.21     itohy 		if ((ist & SA3_IRQ_STAT_MV) && YM_IS_SA3(sc)) {
   1072  1.21     itohy 			ym_hvol_to_master_gain(sc);
   1073  1.10     itohy 			processed = 1;
   1074  1.10     itohy 		}
   1075  1.10     itohy 	} while (processed && (ist = ym_read(sc, SA3_IRQA_STAT)));
   1076  1.10     itohy 
   1077  1.42  jmcneill 	mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1078  1.10     itohy 	return 1;
   1079  1.10     itohy }
   1080  1.10     itohy 
   1081  1.10     itohy 
   1082  1.10     itohy #ifndef AUDIO_NO_POWER_CTL
   1083  1.10     itohy static void
   1084  1.24      kent ym_save_codec_regs(struct ym_softc *sc)
   1085  1.10     itohy {
   1086  1.24      kent 	struct ad1848_softc *ac;
   1087  1.10     itohy 	int i;
   1088  1.10     itohy 
   1089  1.10     itohy 	DPRINTF(("%s: ym_save_codec_regs\n", DVNAME(sc)));
   1090  1.24      kent 	ac = &sc->sc_ad1848.sc_ad1848;
   1091  1.10     itohy 	for (i = 0; i <= 0x1f; i++)
   1092  1.10     itohy 		sc->sc_codec_scan[i] = ad_read(ac, i);
   1093  1.10     itohy }
   1094  1.10     itohy 
   1095  1.10     itohy static void
   1096  1.24      kent ym_restore_codec_regs(struct ym_softc *sc)
   1097  1.10     itohy {
   1098  1.24      kent 	struct ad1848_softc *ac;
   1099  1.10     itohy 	int i, t;
   1100  1.10     itohy 
   1101  1.10     itohy 	DPRINTF(("%s: ym_restore_codec_regs\n", DVNAME(sc)));
   1102  1.24      kent 	ac = &sc->sc_ad1848.sc_ad1848;
   1103  1.10     itohy 	for (i = 0; i <= 0x1f; i++) {
   1104  1.10     itohy 		/*
   1105  1.10     itohy 		 * Wait til the chip becomes ready.
   1106  1.10     itohy 		 * This is required after suspend/resume.
   1107  1.10     itohy 		 */
   1108  1.10     itohy 		for (t = 0;
   1109  1.10     itohy 		    t < 100000 && ADREAD(ac, AD1848_IADDR) & SP_IN_INIT; t++)
   1110  1.10     itohy 			;
   1111  1.10     itohy #ifdef AUDIO_DEBUG
   1112  1.10     itohy 		if (t)
   1113  1.10     itohy 			DPRINTF(("%s: ym_restore_codec_regs: reg %d, t %d\n",
   1114  1.10     itohy 				 DVNAME(sc), i, t));
   1115  1.10     itohy #endif
   1116  1.10     itohy 		ad_write(ac, i, sc->sc_codec_scan[i]);
   1117  1.10     itohy 	}
   1118  1.10     itohy }
   1119  1.10     itohy 
   1120  1.10     itohy /*
   1121  1.10     itohy  * Save and restore the state on suspending / resumning.
   1122  1.10     itohy  *
   1123  1.10     itohy  * XXX This is not complete.
   1124  1.10     itohy  * Currently only the parameters, such as output gain, are restored.
   1125  1.10     itohy  * DMA state should also be restored.  FIXME.
   1126  1.10     itohy  */
   1127  1.36  christos static bool
   1128  1.39    dyoung ym_suspend(device_t self, const pmf_qual_t *qual)
   1129  1.10     itohy {
   1130  1.36  christos 	struct ym_softc *sc = device_private(self);
   1131  1.10     itohy 
   1132  1.36  christos 	DPRINTF(("%s: ym_power_hook: suspend\n", DVNAME(sc)));
   1133  1.10     itohy 
   1134  1.42  jmcneill 	mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1135  1.10     itohy 
   1136  1.36  christos 	/*
   1137  1.36  christos 	 * suspending...
   1138  1.36  christos 	 */
   1139  1.42  jmcneill 	callout_halt(&sc->sc_powerdown_ch,
   1140  1.42  jmcneill 	    &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1141  1.36  christos 	if (sc->sc_turning_off)
   1142  1.36  christos 		ym_powerdown_blocks(sc);
   1143  1.10     itohy 
   1144  1.36  christos 	/*
   1145  1.36  christos 	 * Save CODEC registers.
   1146  1.36  christos 	 * Note that the registers read incorrect
   1147  1.36  christos 	 * if the CODEC part is in power-down mode.
   1148  1.36  christos 	 */
   1149  1.36  christos 	if (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL)
   1150  1.36  christos 		ym_save_codec_regs(sc);
   1151  1.10     itohy 
   1152  1.36  christos 	/*
   1153  1.36  christos 	 * Save OPL3-SA3 control registers and power-down the chip.
   1154  1.36  christos 	 * Note that the registers read incorrect
   1155  1.36  christos 	 * if the chip is in global power-down mode.
   1156  1.36  christos 	 */
   1157  1.36  christos 	sc->sc_sa3_scan[SA3_PWR_MNG] = ym_read(sc, SA3_PWR_MNG);
   1158  1.36  christos 	if (sc->sc_on_blocks)
   1159  1.36  christos 		ym_chip_powerdown(sc);
   1160  1.42  jmcneill 	mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1161  1.36  christos 	return true;
   1162  1.37  christos }
   1163  1.17  takemura 
   1164  1.36  christos static bool
   1165  1.39    dyoung ym_resume(device_t self, const pmf_qual_t *qual)
   1166  1.36  christos {
   1167  1.36  christos 	struct ym_softc *sc = device_private(self);
   1168  1.36  christos 	int i, xmax;
   1169  1.10     itohy 
   1170  1.36  christos 	DPRINTF(("%s: ym_power_hook: resume\n", DVNAME(sc)));
   1171  1.10     itohy 
   1172  1.42  jmcneill 	mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1173  1.36  christos 	/*
   1174  1.36  christos 	 * resuming...
   1175  1.36  christos 	 */
   1176  1.36  christos 	ym_chip_powerup(sc, 1);
   1177  1.36  christos 	ym_init(sc);		/* power-on CODEC */
   1178  1.10     itohy 
   1179  1.36  christos 	/* Restore control registers. */
   1180  1.36  christos 	xmax = YM_IS_SA3(sc)? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
   1181  1.36  christos 	for (i = SA3_PWR_MNG + 1; i <= xmax; i++) {
   1182  1.36  christos 		if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA ||
   1183  1.36  christos 		    i == SA3_DPWRDWN)
   1184  1.36  christos 			continue;
   1185  1.36  christos 		ym_write(sc, i, sc->sc_sa3_scan[i]);
   1186  1.10     itohy 	}
   1187  1.36  christos 
   1188  1.36  christos 	/* Restore CODEC registers (including mixer). */
   1189  1.36  christos 	ym_restore_codec_regs(sc);
   1190  1.36  christos 
   1191  1.36  christos 	/* Restore global/digital power-down state. */
   1192  1.36  christos 	ym_write(sc, SA3_PWR_MNG, sc->sc_sa3_scan[SA3_PWR_MNG]);
   1193  1.36  christos 	if (YM_IS_SA3(sc))
   1194  1.36  christos 		ym_write(sc, SA3_DPWRDWN, sc->sc_sa3_scan[SA3_DPWRDWN]);
   1195  1.42  jmcneill 	mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1196  1.36  christos 	return true;
   1197  1.10     itohy }
   1198  1.10     itohy 
   1199  1.10     itohy int
   1200  1.24      kent ym_codec_power_ctl(void *arg, int flags)
   1201  1.10     itohy {
   1202  1.24      kent 	struct ym_softc *sc;
   1203  1.24      kent 	struct ad1848_softc *ac;
   1204  1.10     itohy 	int parts;
   1205  1.10     itohy 
   1206  1.24      kent 	sc = arg;
   1207  1.24      kent 	ac = &sc->sc_ad1848.sc_ad1848;
   1208  1.10     itohy 	DPRINTF(("%s: ym_codec_power_ctl: flags = 0x%x\n", DVNAME(sc), flags));
   1209  1.42  jmcneill 	KASSERT(mutex_owned(&ac->sc_intr_lock));
   1210  1.10     itohy 
   1211  1.10     itohy 	if (flags != 0) {
   1212  1.10     itohy 		parts = 0;
   1213  1.10     itohy 		if (flags & FREAD) {
   1214  1.10     itohy 			parts |= YM_POWER_CODEC_R | YM_POWER_CODEC_AD;
   1215  1.10     itohy 			if (ac->mute[AD1848_MONITOR_CHANNEL] == 0)
   1216  1.10     itohy 				parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
   1217  1.10     itohy 		}
   1218  1.10     itohy 		if (flags & FWRITE)
   1219  1.10     itohy 			parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
   1220  1.10     itohy 	} else
   1221  1.10     itohy 		parts = YM_POWER_CODEC_P | YM_POWER_CODEC_R |
   1222  1.10     itohy 			YM_POWER_CODEC_DA | YM_POWER_CODEC_AD;
   1223  1.10     itohy 
   1224  1.10     itohy 	ym_power_ctl(sc, parts, flags);
   1225  1.10     itohy 
   1226   1.2  augustss 	return 0;
   1227   1.1  augustss }
   1228  1.10     itohy 
   1229  1.10     itohy /*
   1230  1.10     itohy  * Enter Power Save mode or Global Power Down mode.
   1231  1.10     itohy  * Total dissipation becomes 5mA and 10uA (typ.) respective.
   1232  1.10     itohy  */
   1233  1.10     itohy static void
   1234  1.24      kent ym_chip_powerdown(struct ym_softc *sc)
   1235  1.10     itohy {
   1236  1.25  christos 	int i, xmax;
   1237  1.10     itohy 
   1238  1.10     itohy 	DPRINTF(("%s: ym_chip_powerdown\n", DVNAME(sc)));
   1239  1.42  jmcneill 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
   1240  1.10     itohy 
   1241  1.25  christos 	xmax = YM_IS_SA3(sc) ? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
   1242  1.21     itohy 
   1243  1.10     itohy 	/* Save control registers. */
   1244  1.25  christos 	for (i = SA3_PWR_MNG + 1; i <= xmax; i++) {
   1245  1.10     itohy 		if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA)
   1246  1.10     itohy 			continue;
   1247  1.10     itohy 		sc->sc_sa3_scan[i] = ym_read(sc, i);
   1248  1.10     itohy 	}
   1249  1.10     itohy 	ym_write(sc, SA3_PWR_MNG,
   1250  1.10     itohy 		 (sc->sc_pow_mode == YM_POWER_POWERDOWN ?
   1251  1.10     itohy 			SA3_PWR_MNG_PDN : SA3_PWR_MNG_PSV) | SA3_PWR_MNG_PDX);
   1252  1.10     itohy }
   1253  1.10     itohy 
   1254  1.10     itohy /*
   1255  1.10     itohy  * Power up from Power Save / Global Power Down Mode.
   1256  1.10     itohy  */
   1257  1.10     itohy static void
   1258  1.24      kent ym_chip_powerup(struct ym_softc *sc, int nosleep)
   1259  1.10     itohy {
   1260  1.24      kent 	uint8_t pw;
   1261  1.10     itohy 
   1262  1.10     itohy 	DPRINTF(("%s: ym_chip_powerup\n", DVNAME(sc)));
   1263  1.42  jmcneill 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
   1264  1.10     itohy 
   1265  1.10     itohy 	pw = ym_read(sc, SA3_PWR_MNG);
   1266  1.10     itohy 
   1267  1.10     itohy 	if ((pw & (SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN | SA3_PWR_MNG_PDX)) == 0)
   1268  1.10     itohy 		return;		/* already on */
   1269  1.10     itohy 
   1270  1.10     itohy 	pw &= ~SA3_PWR_MNG_PDX;
   1271  1.10     itohy 	ym_write(sc, SA3_PWR_MNG, pw);
   1272  1.10     itohy 
   1273  1.10     itohy 	/* wait 100 ms */
   1274  1.10     itohy 	if (nosleep)
   1275  1.10     itohy 		delay(100000);
   1276  1.10     itohy 	else
   1277  1.42  jmcneill 		kpause("ym_pu1", false, hz / 10,
   1278  1.42  jmcneill 		    &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1279  1.10     itohy 
   1280  1.10     itohy 	pw &= ~(SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN);
   1281  1.10     itohy 	ym_write(sc, SA3_PWR_MNG, pw);
   1282  1.10     itohy 
   1283  1.10     itohy 	/* wait 70 ms */
   1284  1.10     itohy 	if (nosleep)
   1285  1.10     itohy 		delay(70000);
   1286  1.10     itohy 	else
   1287  1.42  jmcneill 		kpause("ym_pu1", false, hz / 10,
   1288  1.42  jmcneill 		    &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1289  1.10     itohy 
   1290  1.10     itohy 	/* The chip is muted automatically --- unmute it now. */
   1291  1.10     itohy 	ym_mute(sc, SA3_VOL_L, sc->master_mute);
   1292  1.10     itohy 	ym_mute(sc, SA3_VOL_R, sc->master_mute);
   1293  1.10     itohy }
   1294  1.10     itohy 
   1295  1.14   thorpej /* callout handler for power-down */
   1296  1.42  jmcneill static void
   1297  1.42  jmcneill ym_powerdown_callout(void *arg)
   1298  1.10     itohy {
   1299  1.24      kent 	struct ym_softc *sc;
   1300  1.42  jmcneill 
   1301  1.42  jmcneill 	sc = arg;
   1302  1.42  jmcneill 
   1303  1.42  jmcneill 	mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1304  1.42  jmcneill 	if ((sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) == 0) {
   1305  1.42  jmcneill 		ym_powerdown_blocks(sc);
   1306  1.42  jmcneill 	}
   1307  1.42  jmcneill 	mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1308  1.42  jmcneill }
   1309  1.42  jmcneill 
   1310  1.42  jmcneill static void
   1311  1.42  jmcneill ym_powerdown_blocks(struct ym_softc *sc)
   1312  1.42  jmcneill {
   1313  1.24      kent 	uint16_t parts;
   1314  1.24      kent 	uint16_t on_blocks;
   1315  1.24      kent 	uint8_t sv;
   1316  1.10     itohy 
   1317  1.24      kent 	on_blocks = sc->sc_on_blocks;
   1318  1.10     itohy 	DPRINTF(("%s: ym_powerdown_blocks: turning_off 0x%x\n",
   1319  1.10     itohy 		DVNAME(sc), sc->sc_turning_off));
   1320  1.42  jmcneill 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
   1321  1.10     itohy 
   1322  1.10     itohy 	on_blocks = sc->sc_on_blocks;
   1323  1.10     itohy 
   1324  1.10     itohy 	/* Be sure not to change the state of the chip.  Save it first. */
   1325  1.10     itohy 	sv =  bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX);
   1326  1.10     itohy 
   1327  1.10     itohy 	parts = sc->sc_turning_off;
   1328  1.10     itohy 
   1329  1.10     itohy 	if (on_blocks & ~parts & YM_POWER_CODEC_CTL)
   1330  1.10     itohy 		parts &= ~(YM_POWER_CODEC_P | YM_POWER_CODEC_R);
   1331  1.10     itohy 	if (parts & YM_POWER_CODEC_CTL) {
   1332  1.10     itohy 		if ((on_blocks & YM_POWER_CODEC_P) == 0)
   1333  1.10     itohy 			parts |= YM_POWER_CODEC_P;
   1334  1.10     itohy 		if ((on_blocks & YM_POWER_CODEC_R) == 0)
   1335  1.10     itohy 			parts |= YM_POWER_CODEC_R;
   1336  1.10     itohy 	}
   1337  1.13     itohy 	parts &= ~YM_POWER_CODEC_PSEUDO;
   1338  1.10     itohy 
   1339  1.10     itohy 	/* If CODEC is being off, save the state. */
   1340  1.10     itohy 	if ((sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) &&
   1341  1.10     itohy 	    (sc->sc_on_blocks & ~sc->sc_turning_off &
   1342  1.10     itohy 				YM_POWER_CODEC_DIGITAL) == 0)
   1343  1.10     itohy 		ym_save_codec_regs(sc);
   1344  1.10     itohy 
   1345  1.21     itohy 	if (YM_IS_SA3(sc)) {
   1346  1.21     itohy 		/* OPL3-SA3 */
   1347  1.21     itohy 		ym_write(sc, SA3_DPWRDWN,
   1348  1.21     itohy 		    ym_read(sc, SA3_DPWRDWN) | (u_int8_t) parts);
   1349  1.21     itohy 		ym_write(sc, SA3_APWRDWN,
   1350  1.21     itohy 		    ym_read(sc, SA3_APWRDWN) | (parts >> 8));
   1351  1.21     itohy 	} else {
   1352  1.21     itohy 		/* OPL3-SA2 (only OPL3 can be off partially) */
   1353  1.21     itohy 		if (parts & YM_POWER_OPL3)
   1354  1.21     itohy 			ym_write(sc, SA3_PWR_MNG,
   1355  1.21     itohy 			    ym_read(sc, SA3_PWR_MNG) | SA2_PWR_MNG_FMPS);
   1356  1.21     itohy 	}
   1357  1.10     itohy 
   1358  1.10     itohy 	if (((sc->sc_on_blocks &= ~sc->sc_turning_off) & YM_POWER_ACTIVE) == 0)
   1359  1.10     itohy 		ym_chip_powerdown(sc);
   1360  1.10     itohy 
   1361  1.10     itohy 	sc->sc_turning_off = 0;
   1362  1.10     itohy 
   1363  1.10     itohy 	/* Restore the state of the chip. */
   1364  1.10     itohy 	bus_space_write_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX, sv);
   1365  1.10     itohy }
   1366  1.10     itohy 
   1367  1.10     itohy /*
   1368  1.10     itohy  * Power control entry point.
   1369  1.10     itohy  */
   1370  1.10     itohy void
   1371  1.24      kent ym_power_ctl(struct ym_softc *sc, int parts, int onoff)
   1372  1.10     itohy {
   1373  1.10     itohy 	int need_restore_codec;
   1374  1.10     itohy 
   1375  1.42  jmcneill 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
   1376  1.42  jmcneill 
   1377  1.10     itohy 	DPRINTF(("%s: ym_power_ctl: parts = 0x%x, %s\n",
   1378  1.10     itohy 		DVNAME(sc), parts, onoff ? "on" : "off"));
   1379  1.10     itohy 
   1380  1.10     itohy 	/* This function may sleep --- needs locking. */
   1381  1.10     itohy 	while (sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) {
   1382  1.10     itohy 		sc->sc_in_power_ctl |= YM_POWER_CTL_WANTED;
   1383  1.10     itohy 		DPRINTF(("%s: ym_power_ctl: sleeping\n", DVNAME(sc)));
   1384  1.42  jmcneill 		cv_wait(&sc->sc_cv, &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1385  1.10     itohy 		DPRINTF(("%s: ym_power_ctl: awaken\n", DVNAME(sc)));
   1386  1.10     itohy 	}
   1387  1.10     itohy 	sc->sc_in_power_ctl |= YM_POWER_CTL_INUSE;
   1388  1.10     itohy 
   1389  1.10     itohy 	/* If ON requested to parts which are scheduled to OFF, cancel it. */
   1390  1.10     itohy 	if (onoff && sc->sc_turning_off && (sc->sc_turning_off &= ~parts) == 0)
   1391  1.42  jmcneill 		callout_halt(&sc->sc_powerdown_ch,
   1392  1.42  jmcneill 		    &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1393  1.10     itohy 
   1394  1.10     itohy 	if (!onoff && sc->sc_turning_off)
   1395  1.10     itohy 		parts &= ~sc->sc_turning_off;
   1396  1.10     itohy 
   1397  1.10     itohy 	/* Discard bits which are currently {on,off}. */
   1398  1.10     itohy 	parts &= onoff ? ~sc->sc_on_blocks : sc->sc_on_blocks;
   1399  1.10     itohy 
   1400  1.10     itohy 	/* Cancel previous timeout if needed. */
   1401  1.10     itohy 	if (parts != 0 && sc->sc_turning_off)
   1402  1.42  jmcneill 		callout_halt(&sc->sc_powerdown_ch,
   1403  1.42  jmcneill 		    &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1404  1.10     itohy 
   1405  1.10     itohy 	if (parts == 0)
   1406  1.10     itohy 		goto unlock;		/* no work to do */
   1407  1.10     itohy 
   1408  1.10     itohy 	if (onoff) {
   1409  1.10     itohy 		/* Turning on is done immediately. */
   1410  1.10     itohy 
   1411  1.10     itohy 		/* If the chip is off, turn it on. */
   1412  1.10     itohy 		if ((sc->sc_on_blocks & YM_POWER_ACTIVE) == 0)
   1413  1.10     itohy 			ym_chip_powerup(sc, 0);
   1414  1.10     itohy 
   1415  1.10     itohy 		need_restore_codec = (parts & YM_POWER_CODEC_DIGITAL) &&
   1416  1.10     itohy 		    (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) == 0;
   1417  1.10     itohy 
   1418  1.10     itohy 		sc->sc_on_blocks |= parts;
   1419  1.10     itohy 		if (parts & YM_POWER_CODEC_CTL)
   1420  1.10     itohy 			parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_R;
   1421  1.10     itohy 
   1422  1.21     itohy 		if (YM_IS_SA3(sc)) {
   1423  1.21     itohy 			/* OPL3-SA3 */
   1424  1.21     itohy 			ym_write(sc, SA3_DPWRDWN,
   1425  1.21     itohy 			    ym_read(sc, SA3_DPWRDWN) & (u_int8_t)~parts);
   1426  1.21     itohy 			ym_write(sc, SA3_APWRDWN,
   1427  1.21     itohy 			    ym_read(sc, SA3_APWRDWN) & ~(parts >> 8));
   1428  1.21     itohy 		} else {
   1429  1.21     itohy 			/* OPL3-SA2 (only OPL3 can be off partially) */
   1430  1.21     itohy 			if (parts & YM_POWER_OPL3)
   1431  1.21     itohy 				ym_write(sc, SA3_PWR_MNG,
   1432  1.21     itohy 				    ym_read(sc, SA3_PWR_MNG)
   1433  1.21     itohy 					& ~SA2_PWR_MNG_FMPS);
   1434  1.21     itohy 		}
   1435  1.10     itohy 		if (need_restore_codec)
   1436  1.10     itohy 			ym_restore_codec_regs(sc);
   1437  1.10     itohy 	} else {
   1438  1.10     itohy 		/* Turning off is delayed. */
   1439  1.10     itohy 		sc->sc_turning_off |= parts;
   1440  1.10     itohy 	}
   1441  1.10     itohy 
   1442  1.10     itohy 	/* Schedule turning off. */
   1443  1.10     itohy 	if (sc->sc_pow_mode != YM_POWER_NOSAVE && sc->sc_turning_off)
   1444  1.14   thorpej 		callout_reset(&sc->sc_powerdown_ch, hz * sc->sc_pow_timeout,
   1445  1.42  jmcneill 		    ym_powerdown_callout, sc);
   1446  1.10     itohy 
   1447  1.10     itohy unlock:
   1448  1.10     itohy 	if (sc->sc_in_power_ctl & YM_POWER_CTL_WANTED)
   1449  1.42  jmcneill 		cv_broadcast(&sc->sc_cv);
   1450  1.10     itohy 	sc->sc_in_power_ctl = 0;
   1451  1.10     itohy }
   1452  1.10     itohy #endif /* not AUDIO_NO_POWER_CTL */
   1453