ym.c revision 1.48.2.1 1 1.48.2.1 thorpej /* $NetBSD: ym.c,v 1.48.2.1 2021/05/13 00:47:30 thorpej Exp $ */
2 1.1 augustss
3 1.10 itohy /*-
4 1.42 jmcneill * Copyright (c) 1999-2002, 2008 The NetBSD Foundation, Inc.
5 1.10 itohy * All rights reserved.
6 1.10 itohy *
7 1.10 itohy * This code is derived from software contributed to The NetBSD Foundation
8 1.10 itohy * by ITOH Yasufumi.
9 1.10 itohy *
10 1.10 itohy * Redistribution and use in source and binary forms, with or without
11 1.10 itohy * modification, are permitted provided that the following conditions
12 1.10 itohy * are met:
13 1.10 itohy * 1. Redistributions of source code must retain the above copyright
14 1.10 itohy * notice, this list of conditions and the following disclaimer.
15 1.10 itohy * 2. Redistributions in binary form must reproduce the above copyright
16 1.10 itohy * notice, this list of conditions and the following disclaimer in the
17 1.10 itohy * documentation and/or other materials provided with the distribution.
18 1.10 itohy *
19 1.10 itohy * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.10 itohy * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.10 itohy * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.10 itohy * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.10 itohy * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.10 itohy * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.10 itohy * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.10 itohy * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.10 itohy * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.10 itohy * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.10 itohy * POSSIBILITY OF SUCH DAMAGE.
30 1.10 itohy */
31 1.1 augustss
32 1.1 augustss /*
33 1.1 augustss * Copyright (c) 1998 Constantine Sapuntzakis. All rights reserved.
34 1.10 itohy *
35 1.1 augustss * Redistribution and use in source and binary forms, with or without
36 1.1 augustss * modification, are permitted provided that the following conditions
37 1.1 augustss * are met:
38 1.1 augustss * 1. Redistributions of source code must retain the above copyright
39 1.1 augustss * notice, this list of conditions and the following disclaimer.
40 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
41 1.1 augustss * notice, this list of conditions and the following disclaimer in the
42 1.1 augustss * documentation and/or other materials provided with the distribution.
43 1.1 augustss * 3. The name of the author may not be used to endorse or promote products
44 1.1 augustss * derived from this software without specific prior written permission.
45 1.1 augustss *
46 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
47 1.1 augustss * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
48 1.1 augustss * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
49 1.1 augustss * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
50 1.1 augustss * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
51 1.1 augustss * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
52 1.1 augustss * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
53 1.1 augustss * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
54 1.1 augustss * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
55 1.1 augustss * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56 1.1 augustss */
57 1.1 augustss
58 1.1 augustss /*
59 1.1 augustss * Original code from OpenBSD.
60 1.1 augustss */
61 1.19 lukem
62 1.19 lukem #include <sys/cdefs.h>
63 1.48.2.1 thorpej __KERNEL_RCSID(0, "$NetBSD: ym.c,v 1.48.2.1 2021/05/13 00:47:30 thorpej Exp $");
64 1.1 augustss
65 1.10 itohy #include "mpu_ym.h"
66 1.10 itohy #include "opt_ym.h"
67 1.1 augustss
68 1.1 augustss #include <sys/param.h>
69 1.1 augustss #include <sys/systm.h>
70 1.1 augustss #include <sys/errno.h>
71 1.1 augustss #include <sys/device.h>
72 1.10 itohy #include <sys/fcntl.h>
73 1.10 itohy #include <sys/kernel.h>
74 1.10 itohy #include <sys/proc.h>
75 1.1 augustss
76 1.32 ad #include <sys/cpu.h>
77 1.32 ad #include <sys/intr.h>
78 1.32 ad #include <sys/bus.h>
79 1.1 augustss
80 1.1 augustss #include <sys/audioio.h>
81 1.46 isaki #include <dev/audio/audio_if.h>
82 1.1 augustss
83 1.1 augustss #include <dev/isa/isavar.h>
84 1.1 augustss #include <dev/isa/isadmavar.h>
85 1.1 augustss
86 1.1 augustss #include <dev/ic/ad1848reg.h>
87 1.1 augustss #include <dev/isa/ad1848var.h>
88 1.10 itohy #include <dev/ic/opl3sa3reg.h>
89 1.10 itohy #include <dev/isa/wssreg.h>
90 1.10 itohy #if NMPU_YM > 0
91 1.10 itohy #include <dev/ic/mpuvar.h>
92 1.10 itohy #endif
93 1.1 augustss #include <dev/isa/ymvar.h>
94 1.10 itohy #include <dev/isa/sbreg.h>
95 1.1 augustss
96 1.10 itohy /* Power management mode. */
97 1.10 itohy #ifndef YM_POWER_MODE
98 1.10 itohy #define YM_POWER_MODE YM_POWER_POWERSAVE
99 1.10 itohy #endif
100 1.10 itohy
101 1.10 itohy /* Time in second before power down the chip. */
102 1.10 itohy #ifndef YM_POWER_OFF_SEC
103 1.10 itohy #define YM_POWER_OFF_SEC 5
104 1.10 itohy #endif
105 1.10 itohy
106 1.12 itohy /* Default mixer settings. */
107 1.11 itohy #ifndef YM_VOL_MASTER
108 1.20 itohy #define YM_VOL_MASTER 208
109 1.11 itohy #endif
110 1.11 itohy
111 1.11 itohy #ifndef YM_VOL_DAC
112 1.11 itohy #define YM_VOL_DAC 224
113 1.11 itohy #endif
114 1.11 itohy
115 1.11 itohy #ifndef YM_VOL_OPL3
116 1.11 itohy #define YM_VOL_OPL3 184
117 1.11 itohy #endif
118 1.11 itohy
119 1.16 itohy /*
120 1.20 itohy * Default position of the equalizer.
121 1.16 itohy */
122 1.20 itohy #ifndef YM_DEFAULT_TREBLE
123 1.20 itohy #define YM_DEFAULT_TREBLE YM_EQ_FLAT_OFFSET
124 1.16 itohy #endif
125 1.20 itohy #ifndef YM_DEFAULT_BASS
126 1.20 itohy #define YM_DEFAULT_BASS YM_EQ_FLAT_OFFSET
127 1.15 augustss #endif
128 1.15 augustss
129 1.10 itohy #ifdef __i386__ /* XXX */
130 1.10 itohy # include "joy.h"
131 1.10 itohy #else
132 1.10 itohy # define NJOY 0
133 1.10 itohy #endif
134 1.10 itohy
135 1.10 itohy #ifdef AUDIO_DEBUG
136 1.10 itohy #define DPRINTF(x) if (ymdebug) printf x
137 1.10 itohy int ymdebug = 0;
138 1.10 itohy #else
139 1.10 itohy #define DPRINTF(x)
140 1.10 itohy #endif
141 1.41 tsutsui #define DVNAME(softc) (device_xname((softc)->sc_ad1848.sc_ad1848.sc_dev))
142 1.1 augustss
143 1.24 kent int ym_getdev(void *, struct audio_device *);
144 1.24 kent int ym_mixer_set_port(void *, mixer_ctrl_t *);
145 1.24 kent int ym_mixer_get_port(void *, mixer_ctrl_t *);
146 1.24 kent int ym_query_devinfo(void *, mixer_devinfo_t *);
147 1.24 kent int ym_intr(void *);
148 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
149 1.24 kent static void ym_save_codec_regs(struct ym_softc *);
150 1.24 kent static void ym_restore_codec_regs(struct ym_softc *);
151 1.24 kent int ym_codec_power_ctl(void *, int);
152 1.24 kent static void ym_chip_powerdown(struct ym_softc *);
153 1.24 kent static void ym_chip_powerup(struct ym_softc *, int);
154 1.42 jmcneill static void ym_powerdown_blocks(struct ym_softc *);
155 1.42 jmcneill static void ym_powerdown_callout(void *);
156 1.24 kent void ym_power_ctl(struct ym_softc *, int, int);
157 1.24 kent #endif
158 1.24 kent
159 1.24 kent static void ym_init(struct ym_softc *);
160 1.24 kent static void ym_mute(struct ym_softc *, int, int);
161 1.24 kent static void ym_set_master_gain(struct ym_softc *, struct ad1848_volume*);
162 1.24 kent static void ym_hvol_to_master_gain(struct ym_softc *);
163 1.24 kent static void ym_set_mic_gain(struct ym_softc *, int);
164 1.24 kent static void ym_set_3d(struct ym_softc *, mixer_ctrl_t *,
165 1.24 kent struct ad1848_volume *, int);
166 1.39 dyoung static bool ym_suspend(device_t, const pmf_qual_t *);
167 1.39 dyoung static bool ym_resume(device_t, const pmf_qual_t *);
168 1.1 augustss
169 1.1 augustss
170 1.23 yamt const struct audio_hw_if ym_hw_if = {
171 1.45 isaki .open = ad1848_isa_open,
172 1.45 isaki .close = ad1848_isa_close,
173 1.46 isaki .query_format = ad1848_query_format,
174 1.46 isaki .set_format = ad1848_set_format,
175 1.45 isaki .commit_settings = ad1848_commit_settings,
176 1.45 isaki .halt_output = ad1848_isa_halt_output,
177 1.45 isaki .halt_input = ad1848_isa_halt_input,
178 1.45 isaki .getdev = ym_getdev,
179 1.45 isaki .set_port = ym_mixer_set_port,
180 1.45 isaki .get_port = ym_mixer_get_port,
181 1.45 isaki .query_devinfo = ym_query_devinfo,
182 1.45 isaki .allocm = ad1848_isa_malloc,
183 1.45 isaki .freem = ad1848_isa_free,
184 1.45 isaki .round_buffersize = ad1848_isa_round_buffersize,
185 1.45 isaki .get_props = ad1848_isa_get_props,
186 1.45 isaki .trigger_output = ad1848_isa_trigger_output,
187 1.45 isaki .trigger_input = ad1848_isa_trigger_input,
188 1.45 isaki .get_locks = ad1848_get_locks,
189 1.1 augustss };
190 1.1 augustss
191 1.27 perry static inline int ym_read(struct ym_softc *, int);
192 1.27 perry static inline void ym_write(struct ym_softc *, int, int);
193 1.1 augustss
194 1.1 augustss void
195 1.24 kent ym_attach(struct ym_softc *sc)
196 1.1 augustss {
197 1.11 itohy static struct ad1848_volume vol_master = {YM_VOL_MASTER, YM_VOL_MASTER};
198 1.11 itohy static struct ad1848_volume vol_dac = {YM_VOL_DAC, YM_VOL_DAC};
199 1.11 itohy static struct ad1848_volume vol_opl3 = {YM_VOL_OPL3, YM_VOL_OPL3};
200 1.24 kent struct ad1848_softc *ac;
201 1.15 augustss mixer_ctrl_t mctl;
202 1.10 itohy struct audio_attach_args arg;
203 1.10 itohy
204 1.24 kent ac = &sc->sc_ad1848.sc_ad1848;
205 1.42 jmcneill callout_init(&sc->sc_powerdown_ch, CALLOUT_MPSAFE);
206 1.42 jmcneill cv_init(&sc->sc_cv, "ym");
207 1.43 mrg ad1848_init_locks(ac, IPL_AUDIO);
208 1.14 thorpej
209 1.11 itohy /* Mute the output to reduce noise during initialization. */
210 1.11 itohy ym_mute(sc, SA3_VOL_L, 1);
211 1.11 itohy ym_mute(sc, SA3_VOL_R, 1);
212 1.11 itohy
213 1.21 itohy sc->sc_version = ym_read(sc, SA3_MISC) & SA3_MISC_VER;
214 1.21 itohy ac->chip_name = YM_IS_SA3(sc) ? "OPL3-SA3" : "OPL3-SA2";
215 1.21 itohy
216 1.5 pk sc->sc_ad1848.sc_ih = isa_intr_establish(sc->sc_ic, sc->ym_irq,
217 1.43 mrg IST_EDGE, IPL_AUDIO, ym_intr, sc);
218 1.1 augustss
219 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
220 1.10 itohy sc->sc_ad1848.powerctl = ym_codec_power_ctl;
221 1.10 itohy sc->sc_ad1848.powerarg = sc;
222 1.10 itohy #endif
223 1.6 augustss ad1848_isa_attach(&sc->sc_ad1848);
224 1.2 augustss printf("\n");
225 1.5 pk ac->parent = sc;
226 1.2 augustss
227 1.2 augustss /* Establish chip in well known mode */
228 1.11 itohy ym_set_master_gain(sc, &vol_master);
229 1.10 itohy ym_set_mic_gain(sc, 0);
230 1.2 augustss sc->master_mute = 0;
231 1.10 itohy
232 1.11 itohy /* Override ad1848 settings. */
233 1.11 itohy ad1848_set_channel_gain(ac, AD1848_DAC_CHANNEL, &vol_dac);
234 1.11 itohy ad1848_set_channel_gain(ac, AD1848_AUX2_CHANNEL, &vol_opl3);
235 1.15 augustss
236 1.13 itohy /*
237 1.13 itohy * Mute all external sources. If you change this, you must
238 1.13 itohy * also change the initial value of sc->sc_external_sources
239 1.13 itohy * (currently 0 --- no external source is active).
240 1.13 itohy */
241 1.20 itohy sc->mic_mute = 1;
242 1.20 itohy ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
243 1.13 itohy ad1848_mute_channel(ac, AD1848_AUX1_CHANNEL, MUTE_ALL); /* CD */
244 1.13 itohy ad1848_mute_channel(ac, AD1848_LINE_CHANNEL, MUTE_ALL); /* line */
245 1.13 itohy ac->mute[AD1848_AUX1_CHANNEL] = MUTE_ALL;
246 1.13 itohy ac->mute[AD1848_LINE_CHANNEL] = MUTE_ALL;
247 1.13 itohy /* speaker is muted by default */
248 1.13 itohy
249 1.10 itohy /* We use only one IRQ (IRQ-A). */
250 1.10 itohy ym_write(sc, SA3_IRQ_CONF, SA3_IRQ_CONF_MPU_A | SA3_IRQ_CONF_WSS_A);
251 1.10 itohy ym_write(sc, SA3_HVOL_INTR_CNF, SA3_HVOL_INTR_CNF_A);
252 1.10 itohy
253 1.10 itohy /* audio at ym attachment */
254 1.40 nonaka sc->sc_audiodev = audio_attach_mi(&ym_hw_if, ac, ac->sc_dev);
255 1.10 itohy
256 1.10 itohy /* opl at ym attachment */
257 1.10 itohy if (sc->sc_opl_ioh) {
258 1.10 itohy arg.type = AUDIODEV_TYPE_OPL;
259 1.10 itohy arg.hwif = 0;
260 1.10 itohy arg.hdl = 0;
261 1.48.2.1 thorpej (void)config_found(ac->sc_dev, &arg, audioprint,
262 1.48.2.1 thorpej CFARG_IATTR, "ym",
263 1.48.2.1 thorpej CFARG_EOL);
264 1.10 itohy }
265 1.10 itohy
266 1.10 itohy #if NMPU_YM > 0
267 1.10 itohy /* mpu at ym attachment */
268 1.10 itohy if (sc->sc_mpu_ioh) {
269 1.10 itohy arg.type = AUDIODEV_TYPE_MPU;
270 1.10 itohy arg.hwif = 0;
271 1.10 itohy arg.hdl = 0;
272 1.48 thorpej sc->sc_mpudev = config_found(ac->sc_dev, &arg, audioprint,
273 1.48.2.1 thorpej CFARG_IATTR, "ym",
274 1.48 thorpej CFARG_EOL);
275 1.10 itohy }
276 1.10 itohy #endif
277 1.10 itohy
278 1.10 itohy /* This must be AFTER the attachment of sub-devices. */
279 1.42 jmcneill mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
280 1.10 itohy ym_init(sc);
281 1.10 itohy
282 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
283 1.10 itohy /*
284 1.10 itohy * Initialize power control.
285 1.10 itohy */
286 1.10 itohy sc->sc_pow_mode = YM_POWER_MODE;
287 1.10 itohy sc->sc_pow_timeout = YM_POWER_OFF_SEC;
288 1.10 itohy
289 1.10 itohy sc->sc_on_blocks = sc->sc_turning_off =
290 1.24 kent YM_POWER_CODEC_P | YM_POWER_CODEC_R |
291 1.24 kent YM_POWER_OPL3 | YM_POWER_MPU401 | YM_POWER_3D |
292 1.24 kent YM_POWER_CODEC_DA | YM_POWER_CODEC_AD | YM_POWER_OPL3_DA;
293 1.10 itohy #if NJOY > 0
294 1.11 itohy sc->sc_on_blocks |= YM_POWER_JOYSTICK; /* prevents chip powerdown */
295 1.10 itohy #endif
296 1.10 itohy ym_powerdown_blocks(sc);
297 1.42 jmcneill mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
298 1.1 augustss
299 1.40 nonaka if (!pmf_device_register(ac->sc_dev, ym_suspend, ym_resume)) {
300 1.40 nonaka aprint_error_dev(ac->sc_dev,
301 1.36 christos "cannot set power mgmt handler\n");
302 1.36 christos }
303 1.10 itohy #endif
304 1.16 itohy
305 1.16 itohy /* Set tone control to the default position. */
306 1.16 itohy mctl.un.value.num_channels = 1;
307 1.20 itohy mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_TREBLE;
308 1.16 itohy mctl.dev = YM_MASTER_TREBLE;
309 1.16 itohy ym_mixer_set_port(sc, &mctl);
310 1.20 itohy mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_BASS;
311 1.16 itohy mctl.dev = YM_MASTER_BASS;
312 1.16 itohy ym_mixer_set_port(sc, &mctl);
313 1.20 itohy
314 1.20 itohy /* Unmute the output now if the chip is on. */
315 1.20 itohy #ifndef AUDIO_NO_POWER_CTL
316 1.20 itohy if (sc->sc_on_blocks & YM_POWER_ACTIVE)
317 1.16 itohy #endif
318 1.20 itohy {
319 1.20 itohy ym_mute(sc, SA3_VOL_L, sc->master_mute);
320 1.20 itohy ym_mute(sc, SA3_VOL_R, sc->master_mute);
321 1.20 itohy }
322 1.1 augustss }
323 1.1 augustss
324 1.27 perry static inline int
325 1.24 kent ym_read(struct ym_softc *sc, int reg)
326 1.1 augustss {
327 1.24 kent
328 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
329 1.24 kent SA3_CTL_INDEX, (reg & 0xff));
330 1.24 kent return bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_DATA);
331 1.1 augustss }
332 1.1 augustss
333 1.27 perry static inline void
334 1.24 kent ym_write(struct ym_softc *sc, int reg, int data)
335 1.1 augustss {
336 1.24 kent
337 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
338 1.24 kent SA3_CTL_INDEX, (reg & 0xff));
339 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
340 1.24 kent SA3_CTL_DATA, (data & 0xff));
341 1.1 augustss }
342 1.1 augustss
343 1.10 itohy static void
344 1.24 kent ym_init(struct ym_softc *sc)
345 1.10 itohy {
346 1.24 kent uint8_t dpd, apd;
347 1.10 itohy
348 1.42 jmcneill KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
349 1.42 jmcneill
350 1.10 itohy /* Mute SoundBlaster output if possible. */
351 1.10 itohy if (sc->sc_sb_ioh) {
352 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_ADDR,
353 1.24 kent SBP_MASTER_VOL);
354 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_DATA,
355 1.24 kent 0x00);
356 1.10 itohy }
357 1.10 itohy
358 1.21 itohy if (!YM_IS_SA3(sc)) {
359 1.21 itohy /* OPL3-SA2 */
360 1.21 itohy ym_write(sc, SA3_PWR_MNG, SA2_PWR_MNG_CLKO |
361 1.21 itohy (sc->sc_opl_ioh == 0 ? SA2_PWR_MNG_FMPS : 0));
362 1.21 itohy return;
363 1.21 itohy }
364 1.21 itohy
365 1.21 itohy /* OPL3-SA3 */
366 1.10 itohy /* Figure out which part can be power down. */
367 1.10 itohy dpd = SA3_DPWRDWN_SB /* we never use SB */
368 1.10 itohy #if NMPU_YM > 0
369 1.24 kent | (sc->sc_mpu_ioh ? 0 : SA3_DPWRDWN_MPU)
370 1.10 itohy #else
371 1.24 kent | SA3_DPWRDWN_MPU
372 1.10 itohy #endif
373 1.10 itohy #if NJOY == 0
374 1.24 kent | SA3_DPWRDWN_JOY
375 1.10 itohy #endif
376 1.24 kent | SA3_DPWRDWN_PNP /* ISA Plug and Play is done */
377 1.24 kent /*
378 1.24 kent * The master clock is for external wavetable synthesizer
379 1.24 kent * OPL4-ML (YMF704) or OPL4-ML2 (YMF721),
380 1.24 kent * and is currently unused.
381 1.24 kent */
382 1.24 kent | SA3_DPWRDWN_MCLKO;
383 1.10 itohy
384 1.10 itohy apd = SA3_APWRDWN_SBDAC; /* we never use SB */
385 1.10 itohy
386 1.10 itohy /* Power down OPL3 if not attached. */
387 1.10 itohy if (sc->sc_opl_ioh == 0) {
388 1.10 itohy dpd |= SA3_DPWRDWN_FM;
389 1.10 itohy apd |= SA3_APWRDWN_FMDAC;
390 1.10 itohy }
391 1.10 itohy /* CODEC is always attached. */
392 1.10 itohy
393 1.10 itohy /* Power down unused digital parts. */
394 1.10 itohy ym_write(sc, SA3_DPWRDWN, dpd);
395 1.10 itohy
396 1.10 itohy /* Power down unused analog parts. */
397 1.10 itohy ym_write(sc, SA3_APWRDWN, apd);
398 1.10 itohy }
399 1.1 augustss
400 1.1 augustss
401 1.1 augustss int
402 1.24 kent ym_getdev(void *addr, struct audio_device *retp)
403 1.1 augustss {
404 1.24 kent struct ym_softc *sc;
405 1.24 kent struct ad1848_softc *ac;
406 1.10 itohy
407 1.24 kent sc = addr;
408 1.24 kent ac = &sc->sc_ad1848.sc_ad1848;
409 1.22 itojun strlcpy(retp->name, ac->chip_name, sizeof(retp->name));
410 1.22 itojun snprintf(retp->version, sizeof(retp->version), "%d", sc->sc_version);
411 1.22 itojun strlcpy(retp->config, "ym", sizeof(retp->config));
412 1.10 itohy
413 1.2 augustss return 0;
414 1.1 augustss }
415 1.1 augustss
416 1.1 augustss
417 1.1 augustss static ad1848_devmap_t mappings[] = {
418 1.10 itohy { YM_DAC_LVL, AD1848_KIND_LVL, AD1848_DAC_CHANNEL },
419 1.2 augustss { YM_MIDI_LVL, AD1848_KIND_LVL, AD1848_AUX2_CHANNEL },
420 1.2 augustss { YM_CD_LVL, AD1848_KIND_LVL, AD1848_AUX1_CHANNEL },
421 1.2 augustss { YM_LINE_LVL, AD1848_KIND_LVL, AD1848_LINE_CHANNEL },
422 1.2 augustss { YM_SPEAKER_LVL, AD1848_KIND_LVL, AD1848_MONO_CHANNEL },
423 1.2 augustss { YM_MONITOR_LVL, AD1848_KIND_LVL, AD1848_MONITOR_CHANNEL },
424 1.10 itohy { YM_DAC_MUTE, AD1848_KIND_MUTE, AD1848_DAC_CHANNEL },
425 1.2 augustss { YM_MIDI_MUTE, AD1848_KIND_MUTE, AD1848_AUX2_CHANNEL },
426 1.2 augustss { YM_CD_MUTE, AD1848_KIND_MUTE, AD1848_AUX1_CHANNEL },
427 1.2 augustss { YM_LINE_MUTE, AD1848_KIND_MUTE, AD1848_LINE_CHANNEL },
428 1.2 augustss { YM_SPEAKER_MUTE, AD1848_KIND_MUTE, AD1848_MONO_CHANNEL },
429 1.2 augustss { YM_MONITOR_MUTE, AD1848_KIND_MUTE, AD1848_MONITOR_CHANNEL },
430 1.2 augustss { YM_REC_LVL, AD1848_KIND_RECORDGAIN, -1 },
431 1.2 augustss { YM_RECORD_SOURCE, AD1848_KIND_RECORDSOURCE, -1}
432 1.1 augustss };
433 1.1 augustss
434 1.10 itohy #define NUMMAP (sizeof(mappings) / sizeof(mappings[0]))
435 1.1 augustss
436 1.1 augustss
437 1.1 augustss static void
438 1.24 kent ym_mute(struct ym_softc *sc, int left_reg, int mute)
439 1.1 augustss {
440 1.24 kent uint8_t reg;
441 1.1 augustss
442 1.10 itohy reg = ym_read(sc, left_reg);
443 1.10 itohy if (mute)
444 1.10 itohy ym_write(sc, left_reg, reg | 0x80);
445 1.10 itohy else
446 1.10 itohy ym_write(sc, left_reg, reg & ~0x80);
447 1.1 augustss }
448 1.1 augustss
449 1.1 augustss
450 1.1 augustss static void
451 1.24 kent ym_set_master_gain(struct ym_softc *sc, struct ad1848_volume *vol)
452 1.1 augustss {
453 1.21 itohy u_int atten;
454 1.10 itohy
455 1.2 augustss sc->master_gain = *vol;
456 1.10 itohy
457 1.10 itohy atten = ((AUDIO_MAX_GAIN - vol->left) * (SA3_VOL_MV + 1)) /
458 1.10 itohy (AUDIO_MAX_GAIN + 1);
459 1.10 itohy
460 1.10 itohy ym_write(sc, SA3_VOL_L, (ym_read(sc, SA3_VOL_L) & ~SA3_VOL_MV) | atten);
461 1.10 itohy
462 1.10 itohy atten = ((AUDIO_MAX_GAIN - vol->right) * (SA3_VOL_MV + 1)) /
463 1.10 itohy (AUDIO_MAX_GAIN + 1);
464 1.10 itohy
465 1.10 itohy ym_write(sc, SA3_VOL_R, (ym_read(sc, SA3_VOL_R) & ~SA3_VOL_MV) | atten);
466 1.1 augustss }
467 1.1 augustss
468 1.21 itohy /*
469 1.21 itohy * Read current setting of master volume from hardware
470 1.21 itohy * and update the software value if changed.
471 1.21 itohy * [SA3] This function clears hardware volume interrupt.
472 1.21 itohy */
473 1.21 itohy static void
474 1.24 kent ym_hvol_to_master_gain(struct ym_softc *sc)
475 1.21 itohy {
476 1.21 itohy u_int prevval, val;
477 1.24 kent int changed;
478 1.21 itohy
479 1.24 kent changed = 0;
480 1.21 itohy val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_L);
481 1.21 itohy prevval = (sc->master_gain.left * (SA3_VOL_MV + 1)) /
482 1.21 itohy (AUDIO_MAX_GAIN + 1);
483 1.21 itohy if (val != prevval) {
484 1.21 itohy sc->master_gain.left =
485 1.21 itohy val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
486 1.21 itohy changed = 1;
487 1.21 itohy }
488 1.21 itohy
489 1.21 itohy val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_R);
490 1.21 itohy prevval = (sc->master_gain.right * (SA3_VOL_MV + 1)) /
491 1.21 itohy (AUDIO_MAX_GAIN + 1);
492 1.21 itohy if (val != prevval) {
493 1.21 itohy sc->master_gain.right =
494 1.21 itohy val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
495 1.21 itohy changed = 1;
496 1.21 itohy }
497 1.21 itohy
498 1.21 itohy #if 0 /* XXX NOT YET */
499 1.21 itohy /* Notify the change to async processes. */
500 1.21 itohy if (changed && sc->sc_audiodev)
501 1.21 itohy mixer_signal(sc->sc_audiodev);
502 1.44 christos #else
503 1.44 christos __USE(changed);
504 1.21 itohy #endif
505 1.21 itohy }
506 1.21 itohy
507 1.1 augustss static void
508 1.24 kent ym_set_mic_gain(struct ym_softc *sc, int vol)
509 1.1 augustss {
510 1.10 itohy u_int atten;
511 1.10 itohy
512 1.10 itohy sc->mic_gain = vol;
513 1.10 itohy
514 1.10 itohy atten = ((AUDIO_MAX_GAIN - vol) * (SA3_MIC_MCV + 1)) /
515 1.10 itohy (AUDIO_MAX_GAIN + 1);
516 1.10 itohy
517 1.10 itohy ym_write(sc, SA3_MIC_VOL,
518 1.10 itohy (ym_read(sc, SA3_MIC_VOL) & ~SA3_MIC_MCV) | atten);
519 1.10 itohy }
520 1.1 augustss
521 1.10 itohy static void
522 1.24 kent ym_set_3d(struct ym_softc *sc, mixer_ctrl_t *cp,
523 1.24 kent struct ad1848_volume *val, int reg)
524 1.10 itohy {
525 1.24 kent uint8_t l, r, e;
526 1.1 augustss
527 1.42 jmcneill KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
528 1.42 jmcneill
529 1.10 itohy ad1848_to_vol(cp, val);
530 1.1 augustss
531 1.20 itohy l = val->left;
532 1.20 itohy r = val->right;
533 1.20 itohy if (reg != SA3_3D_WIDE) {
534 1.20 itohy /* flat on center */
535 1.20 itohy l = YM_EQ_EXPAND_VALUE(l);
536 1.20 itohy r = YM_EQ_EXPAND_VALUE(r);
537 1.20 itohy }
538 1.20 itohy
539 1.20 itohy e = (l * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
540 1.24 kent (AUDIO_MAX_GAIN + 1) << SA3_3D_LSHIFT |
541 1.20 itohy (r * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
542 1.24 kent (AUDIO_MAX_GAIN + 1) << SA3_3D_RSHIFT;
543 1.10 itohy
544 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
545 1.10 itohy /* turn wide stereo on if necessary */
546 1.10 itohy if (e)
547 1.10 itohy ym_power_ctl(sc, YM_POWER_3D, 1);
548 1.10 itohy #endif
549 1.10 itohy
550 1.10 itohy ym_write(sc, reg, e);
551 1.10 itohy
552 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
553 1.10 itohy /* turn wide stereo off if necessary */
554 1.10 itohy if (YM_EQ_OFF(&sc->sc_treble) && YM_EQ_OFF(&sc->sc_bass) &&
555 1.20 itohy YM_WIDE_OFF(&sc->sc_wide))
556 1.10 itohy ym_power_ctl(sc, YM_POWER_3D, 0);
557 1.10 itohy #endif
558 1.1 augustss }
559 1.1 augustss
560 1.1 augustss int
561 1.24 kent ym_mixer_set_port(void *addr, mixer_ctrl_t *cp)
562 1.1 augustss {
563 1.24 kent struct ad1848_softc *ac;
564 1.24 kent struct ym_softc *sc;
565 1.2 augustss struct ad1848_volume vol;
566 1.24 kent int error;
567 1.24 kent uint8_t extsources;
568 1.1 augustss
569 1.24 kent ac = addr;
570 1.24 kent sc = ac->parent;
571 1.24 kent error = 0;
572 1.10 itohy DPRINTF(("%s: ym_mixer_set_port: dev 0x%x, type 0x%x, 0x%x (%d; %d, %d)\n",
573 1.10 itohy DVNAME(sc), cp->dev, cp->type, cp->un.ord,
574 1.10 itohy cp->un.value.num_channels, cp->un.value.level[0],
575 1.10 itohy cp->un.value.level[1]));
576 1.10 itohy
577 1.21 itohy /* SA2 doesn't have equalizer */
578 1.21 itohy if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
579 1.21 itohy return ENXIO;
580 1.21 itohy
581 1.42 jmcneill mutex_spin_enter(&ac->sc_intr_lock);
582 1.42 jmcneill
583 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
584 1.10 itohy /* Power-up chip */
585 1.10 itohy ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
586 1.10 itohy #endif
587 1.1 augustss
588 1.2 augustss switch (cp->dev) {
589 1.2 augustss case YM_OUTPUT_LVL:
590 1.2 augustss ad1848_to_vol(cp, &vol);
591 1.2 augustss ym_set_master_gain(sc, &vol);
592 1.10 itohy goto out;
593 1.2 augustss
594 1.2 augustss case YM_OUTPUT_MUTE:
595 1.2 augustss sc->master_mute = (cp->un.ord != 0);
596 1.10 itohy ym_mute(sc, SA3_VOL_L, sc->master_mute);
597 1.10 itohy ym_mute(sc, SA3_VOL_R, sc->master_mute);
598 1.10 itohy goto out;
599 1.2 augustss
600 1.2 augustss case YM_MIC_LVL:
601 1.2 augustss if (cp->un.value.num_channels != 1)
602 1.2 augustss error = EINVAL;
603 1.10 itohy else
604 1.10 itohy ym_set_mic_gain(sc,
605 1.24 kent cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
606 1.10 itohy goto out;
607 1.10 itohy
608 1.10 itohy case YM_MASTER_EQMODE:
609 1.10 itohy sc->sc_eqmode = cp->un.ord & SA3_SYS_CTL_YMODE;
610 1.10 itohy ym_write(sc, SA3_SYS_CTL, (ym_read(sc, SA3_SYS_CTL) &
611 1.24 kent ~SA3_SYS_CTL_YMODE) | sc->sc_eqmode);
612 1.10 itohy goto out;
613 1.10 itohy
614 1.10 itohy case YM_MASTER_TREBLE:
615 1.10 itohy ym_set_3d(sc, cp, &sc->sc_treble, SA3_3D_TREBLE);
616 1.10 itohy goto out;
617 1.10 itohy
618 1.10 itohy case YM_MASTER_BASS:
619 1.10 itohy ym_set_3d(sc, cp, &sc->sc_bass, SA3_3D_BASS);
620 1.10 itohy goto out;
621 1.10 itohy
622 1.10 itohy case YM_MASTER_WIDE:
623 1.10 itohy ym_set_3d(sc, cp, &sc->sc_wide, SA3_3D_WIDE);
624 1.10 itohy goto out;
625 1.10 itohy
626 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
627 1.10 itohy case YM_PWR_MODE:
628 1.10 itohy if ((unsigned) cp->un.ord > YM_POWER_NOSAVE)
629 1.10 itohy error = EINVAL;
630 1.10 itohy else
631 1.10 itohy sc->sc_pow_mode = cp->un.ord;
632 1.10 itohy goto out;
633 1.10 itohy
634 1.10 itohy case YM_PWR_TIMEOUT:
635 1.10 itohy if (cp->un.value.num_channels != 1)
636 1.10 itohy error = EINVAL;
637 1.10 itohy else
638 1.10 itohy sc->sc_pow_timeout =
639 1.24 kent cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
640 1.10 itohy goto out;
641 1.10 itohy
642 1.10 itohy /*
643 1.13 itohy * Needs power-up to hear external sources.
644 1.13 itohy */
645 1.13 itohy case YM_CD_MUTE:
646 1.13 itohy case YM_LINE_MUTE:
647 1.13 itohy case YM_SPEAKER_MUTE:
648 1.20 itohy case YM_MIC_MUTE:
649 1.13 itohy extsources = YM_MIXER_TO_XS(cp->dev);
650 1.13 itohy if (cp->un.ord) {
651 1.13 itohy if ((sc->sc_external_sources &= ~extsources) == 0) {
652 1.13 itohy /*
653 1.13 itohy * All the external sources are muted
654 1.13 itohy * --- no need to keep the chip on.
655 1.13 itohy */
656 1.13 itohy ym_power_ctl(sc, YM_POWER_EXT_SRC, 0);
657 1.13 itohy DPRINTF(("%s: ym_mixer_set_port: off for ext\n",
658 1.13 itohy DVNAME(sc)));
659 1.13 itohy }
660 1.13 itohy } else {
661 1.13 itohy /* mute off - power-up the chip */
662 1.13 itohy sc->sc_external_sources |= extsources;
663 1.13 itohy ym_power_ctl(sc, YM_POWER_EXT_SRC, 1);
664 1.13 itohy DPRINTF(("%s: ym_mixer_set_port: on for ext\n",
665 1.13 itohy DVNAME(sc)));
666 1.13 itohy }
667 1.13 itohy break; /* fall to ad1848_mixer_set_port() */
668 1.13 itohy
669 1.13 itohy /*
670 1.10 itohy * Power on/off the playback part for monitoring.
671 1.10 itohy */
672 1.10 itohy case YM_MONITOR_MUTE:
673 1.10 itohy if ((ac->open_mode & (FREAD | FWRITE)) == FREAD)
674 1.10 itohy ym_power_ctl(sc, YM_POWER_CODEC_P | YM_POWER_CODEC_DA,
675 1.24 kent cp->un.ord == 0);
676 1.10 itohy break; /* fall to ad1848_mixer_set_port() */
677 1.10 itohy #endif
678 1.10 itohy }
679 1.10 itohy
680 1.10 itohy error = ad1848_mixer_set_port(ac, mappings, NUMMAP, cp);
681 1.10 itohy
682 1.10 itohy if (error != ENXIO)
683 1.10 itohy goto out;
684 1.10 itohy
685 1.10 itohy error = 0;
686 1.2 augustss
687 1.10 itohy switch (cp->dev) {
688 1.2 augustss case YM_MIC_MUTE:
689 1.2 augustss sc->mic_mute = (cp->un.ord != 0);
690 1.10 itohy ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
691 1.2 augustss break;
692 1.2 augustss
693 1.2 augustss default:
694 1.10 itohy error = ENXIO;
695 1.10 itohy break;
696 1.2 augustss }
697 1.10 itohy
698 1.10 itohy out:
699 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
700 1.10 itohy /* Power-down chip */
701 1.10 itohy ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
702 1.10 itohy #endif
703 1.42 jmcneill mutex_spin_exit(&ac->sc_intr_lock);
704 1.10 itohy
705 1.24 kent return error;
706 1.1 augustss }
707 1.1 augustss
708 1.1 augustss int
709 1.24 kent ym_mixer_get_port(void *addr, mixer_ctrl_t *cp)
710 1.1 augustss {
711 1.24 kent struct ad1848_softc *ac;
712 1.24 kent struct ym_softc *sc;
713 1.10 itohy int error;
714 1.1 augustss
715 1.24 kent ac = addr;
716 1.24 kent sc = ac->parent;
717 1.21 itohy /* SA2 doesn't have equalizer */
718 1.21 itohy if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
719 1.21 itohy return ENXIO;
720 1.21 itohy
721 1.2 augustss switch (cp->dev) {
722 1.2 augustss case YM_OUTPUT_LVL:
723 1.21 itohy if (!YM_IS_SA3(sc)) {
724 1.21 itohy /*
725 1.21 itohy * SA2 doesn't have hardware volume interrupt.
726 1.21 itohy * Read current value and update every time.
727 1.21 itohy */
728 1.42 jmcneill mutex_spin_enter(&ac->sc_intr_lock);
729 1.21 itohy #ifndef AUDIO_NO_POWER_CTL
730 1.21 itohy /* Power-up chip */
731 1.21 itohy ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
732 1.21 itohy #endif
733 1.21 itohy ym_hvol_to_master_gain(sc);
734 1.21 itohy #ifndef AUDIO_NO_POWER_CTL
735 1.21 itohy /* Power-down chip */
736 1.21 itohy ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
737 1.21 itohy #endif
738 1.42 jmcneill mutex_spin_exit(&ac->sc_intr_lock);
739 1.21 itohy }
740 1.2 augustss ad1848_from_vol(cp, &sc->master_gain);
741 1.10 itohy return 0;
742 1.10 itohy
743 1.2 augustss case YM_OUTPUT_MUTE:
744 1.2 augustss cp->un.ord = sc->master_mute;
745 1.10 itohy return 0;
746 1.10 itohy
747 1.2 augustss case YM_MIC_LVL:
748 1.2 augustss if (cp->un.value.num_channels != 1)
749 1.10 itohy return EINVAL;
750 1.10 itohy cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->mic_gain;
751 1.10 itohy return 0;
752 1.10 itohy
753 1.10 itohy case YM_MASTER_EQMODE:
754 1.10 itohy cp->un.ord = sc->sc_eqmode;
755 1.10 itohy return 0;
756 1.10 itohy
757 1.10 itohy case YM_MASTER_TREBLE:
758 1.10 itohy ad1848_from_vol(cp, &sc->sc_treble);
759 1.10 itohy return 0;
760 1.10 itohy
761 1.10 itohy case YM_MASTER_BASS:
762 1.10 itohy ad1848_from_vol(cp, &sc->sc_bass);
763 1.10 itohy return 0;
764 1.10 itohy
765 1.10 itohy case YM_MASTER_WIDE:
766 1.10 itohy ad1848_from_vol(cp, &sc->sc_wide);
767 1.10 itohy return 0;
768 1.10 itohy
769 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
770 1.10 itohy case YM_PWR_MODE:
771 1.10 itohy cp->un.ord = sc->sc_pow_mode;
772 1.10 itohy return 0;
773 1.10 itohy
774 1.10 itohy case YM_PWR_TIMEOUT:
775 1.10 itohy if (cp->un.value.num_channels != 1)
776 1.10 itohy return EINVAL;
777 1.10 itohy cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_pow_timeout;
778 1.10 itohy return 0;
779 1.10 itohy #endif
780 1.10 itohy }
781 1.10 itohy
782 1.10 itohy error = ad1848_mixer_get_port(ac, mappings, NUMMAP, cp);
783 1.10 itohy
784 1.10 itohy if (error != ENXIO)
785 1.24 kent return error;
786 1.10 itohy
787 1.10 itohy error = 0;
788 1.10 itohy
789 1.10 itohy switch (cp->dev) {
790 1.2 augustss case YM_MIC_MUTE:
791 1.2 augustss cp->un.ord = sc->mic_mute;
792 1.2 augustss break;
793 1.10 itohy
794 1.2 augustss default:
795 1.2 augustss error = ENXIO;
796 1.2 augustss break;
797 1.2 augustss }
798 1.10 itohy
799 1.24 kent return error;
800 1.1 augustss }
801 1.1 augustss
802 1.25 christos static const char *mixer_classes[] = {
803 1.10 itohy AudioCinputs, AudioCrecord, AudioCoutputs, AudioCmonitor,
804 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
805 1.21 itohy AudioCpower,
806 1.10 itohy #endif
807 1.21 itohy AudioCequalization
808 1.10 itohy };
809 1.1 augustss
810 1.1 augustss int
811 1.24 kent ym_query_devinfo(void *addr, mixer_devinfo_t *dip)
812 1.1 augustss {
813 1.25 christos static const char *mixer_port_names[] = {
814 1.10 itohy AudioNdac, AudioNmidi, AudioNcd, AudioNline, AudioNspeaker,
815 1.10 itohy AudioNmicrophone, AudioNmonitor
816 1.10 itohy };
817 1.24 kent struct ad1848_softc *ac;
818 1.24 kent struct ym_softc *sc;
819 1.21 itohy
820 1.24 kent ac = addr;
821 1.24 kent sc = ac->parent;
822 1.21 itohy /* SA2 doesn't have equalizer */
823 1.21 itohy if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(dip->index))
824 1.21 itohy return ENXIO;
825 1.1 augustss
826 1.2 augustss dip->next = dip->prev = AUDIO_MIXER_LAST;
827 1.10 itohy
828 1.2 augustss switch(dip->index) {
829 1.21 itohy case YM_INPUT_CLASS:
830 1.2 augustss case YM_OUTPUT_CLASS:
831 1.2 augustss case YM_MONITOR_CLASS:
832 1.2 augustss case YM_RECORD_CLASS:
833 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
834 1.10 itohy case YM_PWR_CLASS:
835 1.10 itohy #endif
836 1.21 itohy case YM_EQ_CLASS:
837 1.2 augustss dip->type = AUDIO_MIXER_CLASS;
838 1.2 augustss dip->mixer_class = dip->index;
839 1.10 itohy strcpy(dip->label.name,
840 1.2 augustss mixer_classes[dip->index - YM_INPUT_CLASS]);
841 1.2 augustss break;
842 1.10 itohy
843 1.10 itohy case YM_DAC_LVL:
844 1.2 augustss case YM_MIDI_LVL:
845 1.2 augustss case YM_CD_LVL:
846 1.10 itohy case YM_LINE_LVL:
847 1.2 augustss case YM_SPEAKER_LVL:
848 1.2 augustss case YM_MIC_LVL:
849 1.2 augustss case YM_MONITOR_LVL:
850 1.2 augustss dip->type = AUDIO_MIXER_VALUE;
851 1.2 augustss if (dip->index == YM_MONITOR_LVL)
852 1.2 augustss dip->mixer_class = YM_MONITOR_CLASS;
853 1.2 augustss else
854 1.2 augustss dip->mixer_class = YM_INPUT_CLASS;
855 1.10 itohy
856 1.2 augustss dip->next = dip->index + 7;
857 1.10 itohy
858 1.2 augustss strcpy(dip->label.name,
859 1.10 itohy mixer_port_names[dip->index - YM_DAC_LVL]);
860 1.10 itohy
861 1.2 augustss if (dip->index == YM_SPEAKER_LVL ||
862 1.2 augustss dip->index == YM_MIC_LVL)
863 1.2 augustss dip->un.v.num_channels = 1;
864 1.2 augustss else
865 1.2 augustss dip->un.v.num_channels = 2;
866 1.10 itohy
867 1.20 itohy if (dip->index == YM_SPEAKER_LVL)
868 1.20 itohy dip->un.v.delta = 1 << (8 - 4 /* valid bits */);
869 1.20 itohy else if (dip->index == YM_DAC_LVL ||
870 1.20 itohy dip->index == YM_MONITOR_LVL)
871 1.20 itohy dip->un.v.delta = 1 << (8 - 6 /* valid bits */);
872 1.20 itohy else
873 1.20 itohy dip->un.v.delta = 1 << (8 - 5 /* valid bits */);
874 1.20 itohy
875 1.2 augustss strcpy(dip->un.v.units.name, AudioNvolume);
876 1.2 augustss break;
877 1.10 itohy
878 1.10 itohy case YM_DAC_MUTE:
879 1.2 augustss case YM_MIDI_MUTE:
880 1.2 augustss case YM_CD_MUTE:
881 1.2 augustss case YM_LINE_MUTE:
882 1.2 augustss case YM_SPEAKER_MUTE:
883 1.2 augustss case YM_MIC_MUTE:
884 1.2 augustss case YM_MONITOR_MUTE:
885 1.2 augustss if (dip->index == YM_MONITOR_MUTE)
886 1.2 augustss dip->mixer_class = YM_MONITOR_CLASS;
887 1.2 augustss else
888 1.2 augustss dip->mixer_class = YM_INPUT_CLASS;
889 1.2 augustss dip->type = AUDIO_MIXER_ENUM;
890 1.2 augustss dip->prev = dip->index - 7;
891 1.2 augustss mute:
892 1.2 augustss strcpy(dip->label.name, AudioNmute);
893 1.2 augustss dip->un.e.num_mem = 2;
894 1.2 augustss strcpy(dip->un.e.member[0].label.name, AudioNoff);
895 1.2 augustss dip->un.e.member[0].ord = 0;
896 1.2 augustss strcpy(dip->un.e.member[1].label.name, AudioNon);
897 1.2 augustss dip->un.e.member[1].ord = 1;
898 1.2 augustss break;
899 1.10 itohy
900 1.10 itohy
901 1.2 augustss case YM_OUTPUT_LVL:
902 1.2 augustss dip->type = AUDIO_MIXER_VALUE;
903 1.2 augustss dip->mixer_class = YM_OUTPUT_CLASS;
904 1.2 augustss dip->next = YM_OUTPUT_MUTE;
905 1.2 augustss strcpy(dip->label.name, AudioNmaster);
906 1.2 augustss dip->un.v.num_channels = 2;
907 1.20 itohy dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1);
908 1.2 augustss strcpy(dip->un.v.units.name, AudioNvolume);
909 1.2 augustss break;
910 1.10 itohy
911 1.2 augustss case YM_OUTPUT_MUTE:
912 1.2 augustss dip->mixer_class = YM_OUTPUT_CLASS;
913 1.2 augustss dip->type = AUDIO_MIXER_ENUM;
914 1.2 augustss dip->prev = YM_OUTPUT_LVL;
915 1.2 augustss goto mute;
916 1.10 itohy
917 1.10 itohy
918 1.2 augustss case YM_REC_LVL: /* record level */
919 1.2 augustss dip->type = AUDIO_MIXER_VALUE;
920 1.2 augustss dip->mixer_class = YM_RECORD_CLASS;
921 1.2 augustss dip->next = YM_RECORD_SOURCE;
922 1.2 augustss strcpy(dip->label.name, AudioNrecord);
923 1.2 augustss dip->un.v.num_channels = 2;
924 1.20 itohy dip->un.v.delta = 1 << (8 - 4 /* valid bits */);
925 1.2 augustss strcpy(dip->un.v.units.name, AudioNvolume);
926 1.2 augustss break;
927 1.10 itohy
928 1.2 augustss case YM_RECORD_SOURCE:
929 1.2 augustss dip->mixer_class = YM_RECORD_CLASS;
930 1.2 augustss dip->type = AUDIO_MIXER_ENUM;
931 1.2 augustss dip->prev = YM_REC_LVL;
932 1.2 augustss strcpy(dip->label.name, AudioNsource);
933 1.2 augustss dip->un.e.num_mem = 4;
934 1.2 augustss strcpy(dip->un.e.member[0].label.name, AudioNmicrophone);
935 1.2 augustss dip->un.e.member[0].ord = MIC_IN_PORT;
936 1.2 augustss strcpy(dip->un.e.member[1].label.name, AudioNline);
937 1.2 augustss dip->un.e.member[1].ord = LINE_IN_PORT;
938 1.2 augustss strcpy(dip->un.e.member[2].label.name, AudioNdac);
939 1.2 augustss dip->un.e.member[2].ord = DAC_IN_PORT;
940 1.2 augustss strcpy(dip->un.e.member[3].label.name, AudioNcd);
941 1.2 augustss dip->un.e.member[3].ord = AUX1_IN_PORT;
942 1.2 augustss break;
943 1.10 itohy
944 1.10 itohy
945 1.10 itohy case YM_MASTER_EQMODE:
946 1.10 itohy dip->type = AUDIO_MIXER_ENUM;
947 1.10 itohy dip->mixer_class = YM_EQ_CLASS;
948 1.10 itohy strcpy(dip->label.name, AudioNmode);
949 1.10 itohy strcpy(dip->un.v.units.name, AudioNmode);
950 1.10 itohy dip->un.e.num_mem = 4;
951 1.10 itohy strcpy(dip->un.e.member[0].label.name, AudioNdesktop);
952 1.10 itohy dip->un.e.member[0].ord = SA3_SYS_CTL_YMODE0;
953 1.10 itohy strcpy(dip->un.e.member[1].label.name, AudioNlaptop);
954 1.10 itohy dip->un.e.member[1].ord = SA3_SYS_CTL_YMODE1;
955 1.10 itohy strcpy(dip->un.e.member[2].label.name, AudioNsubnote);
956 1.10 itohy dip->un.e.member[2].ord = SA3_SYS_CTL_YMODE2;
957 1.10 itohy strcpy(dip->un.e.member[3].label.name, AudioNhifi);
958 1.10 itohy dip->un.e.member[3].ord = SA3_SYS_CTL_YMODE3;
959 1.10 itohy break;
960 1.10 itohy
961 1.10 itohy case YM_MASTER_TREBLE:
962 1.10 itohy dip->type = AUDIO_MIXER_VALUE;
963 1.10 itohy dip->mixer_class = YM_EQ_CLASS;
964 1.10 itohy strcpy(dip->label.name, AudioNtreble);
965 1.10 itohy dip->un.v.num_channels = 2;
966 1.20 itohy dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1)
967 1.20 itohy >> YM_EQ_REDUCE_BIT;
968 1.10 itohy strcpy(dip->un.v.units.name, AudioNtreble);
969 1.10 itohy break;
970 1.10 itohy
971 1.10 itohy case YM_MASTER_BASS:
972 1.10 itohy dip->type = AUDIO_MIXER_VALUE;
973 1.10 itohy dip->mixer_class = YM_EQ_CLASS;
974 1.10 itohy strcpy(dip->label.name, AudioNbass);
975 1.10 itohy dip->un.v.num_channels = 2;
976 1.20 itohy dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1)
977 1.20 itohy >> YM_EQ_REDUCE_BIT;
978 1.10 itohy strcpy(dip->un.v.units.name, AudioNbass);
979 1.10 itohy break;
980 1.10 itohy
981 1.10 itohy case YM_MASTER_WIDE:
982 1.10 itohy dip->type = AUDIO_MIXER_VALUE;
983 1.10 itohy dip->mixer_class = YM_EQ_CLASS;
984 1.10 itohy strcpy(dip->label.name, AudioNsurround);
985 1.10 itohy dip->un.v.num_channels = 2;
986 1.20 itohy dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1);
987 1.10 itohy strcpy(dip->un.v.units.name, AudioNsurround);
988 1.10 itohy break;
989 1.10 itohy
990 1.10 itohy
991 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
992 1.10 itohy case YM_PWR_MODE:
993 1.10 itohy dip->type = AUDIO_MIXER_ENUM;
994 1.10 itohy dip->mixer_class = YM_PWR_CLASS;
995 1.10 itohy dip->next = YM_PWR_TIMEOUT;
996 1.13 itohy strcpy(dip->label.name, AudioNsave);
997 1.10 itohy dip->un.e.num_mem = 3;
998 1.10 itohy strcpy(dip->un.e.member[0].label.name, AudioNpowerdown);
999 1.10 itohy dip->un.e.member[0].ord = YM_POWER_POWERDOWN;
1000 1.10 itohy strcpy(dip->un.e.member[1].label.name, AudioNpowersave);
1001 1.10 itohy dip->un.e.member[1].ord = YM_POWER_POWERSAVE;
1002 1.10 itohy strcpy(dip->un.e.member[2].label.name, AudioNnosave);
1003 1.10 itohy dip->un.e.member[2].ord = YM_POWER_NOSAVE;
1004 1.10 itohy break;
1005 1.10 itohy
1006 1.10 itohy case YM_PWR_TIMEOUT:
1007 1.10 itohy dip->type = AUDIO_MIXER_VALUE;
1008 1.10 itohy dip->mixer_class = YM_PWR_CLASS;
1009 1.10 itohy dip->prev = YM_PWR_MODE;
1010 1.10 itohy strcpy(dip->label.name, AudioNtimeout);
1011 1.10 itohy dip->un.v.num_channels = 1;
1012 1.10 itohy strcpy(dip->un.v.units.name, AudioNtimeout);
1013 1.10 itohy break;
1014 1.10 itohy #endif /* not AUDIO_NO_POWER_CTL */
1015 1.10 itohy
1016 1.2 augustss default:
1017 1.2 augustss return ENXIO;
1018 1.2 augustss /*NOTREACHED*/
1019 1.2 augustss }
1020 1.10 itohy
1021 1.10 itohy return 0;
1022 1.10 itohy }
1023 1.10 itohy
1024 1.10 itohy int
1025 1.24 kent ym_intr(void *arg)
1026 1.10 itohy {
1027 1.33 xtraeme struct ym_softc *sc = arg;
1028 1.33 xtraeme #if NMPU_YM > 0
1029 1.33 xtraeme struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev);
1030 1.33 xtraeme #endif
1031 1.10 itohy u_int8_t ist;
1032 1.10 itohy int processed;
1033 1.10 itohy
1034 1.42 jmcneill mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1035 1.42 jmcneill
1036 1.10 itohy /* OPL3 timer is currently unused. */
1037 1.10 itohy if (((ist = ym_read(sc, SA3_IRQA_STAT)) &
1038 1.10 itohy ~(SA3_IRQ_STAT_SB|SA3_IRQ_STAT_OPL3)) == 0) {
1039 1.10 itohy DPRINTF(("%s: ym_intr: spurious interrupt\n", DVNAME(sc)));
1040 1.42 jmcneill mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1041 1.10 itohy return 0;
1042 1.10 itohy }
1043 1.10 itohy
1044 1.10 itohy /* Process pending interrupts. */
1045 1.10 itohy do {
1046 1.10 itohy processed = 0;
1047 1.10 itohy /*
1048 1.10 itohy * CODEC interrupts.
1049 1.10 itohy */
1050 1.10 itohy if (ist & (SA3_IRQ_STAT_TI|SA3_IRQ_STAT_CI|SA3_IRQ_STAT_PI)) {
1051 1.10 itohy ad1848_isa_intr(&sc->sc_ad1848);
1052 1.10 itohy processed = 1;
1053 1.10 itohy }
1054 1.10 itohy #if NMPU_YM > 0
1055 1.10 itohy /*
1056 1.10 itohy * MPU401 interrupt.
1057 1.10 itohy */
1058 1.10 itohy if (ist & SA3_IRQ_STAT_MPU) {
1059 1.33 xtraeme mpu_intr(sc_mpu);
1060 1.10 itohy processed = 1;
1061 1.10 itohy }
1062 1.10 itohy #endif
1063 1.10 itohy /*
1064 1.21 itohy * Hardware volume interrupt (SA3 only).
1065 1.10 itohy * Recalculate master volume from the hardware setting.
1066 1.10 itohy */
1067 1.21 itohy if ((ist & SA3_IRQ_STAT_MV) && YM_IS_SA3(sc)) {
1068 1.21 itohy ym_hvol_to_master_gain(sc);
1069 1.10 itohy processed = 1;
1070 1.10 itohy }
1071 1.10 itohy } while (processed && (ist = ym_read(sc, SA3_IRQA_STAT)));
1072 1.10 itohy
1073 1.42 jmcneill mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1074 1.10 itohy return 1;
1075 1.10 itohy }
1076 1.10 itohy
1077 1.10 itohy
1078 1.10 itohy #ifndef AUDIO_NO_POWER_CTL
1079 1.10 itohy static void
1080 1.24 kent ym_save_codec_regs(struct ym_softc *sc)
1081 1.10 itohy {
1082 1.24 kent struct ad1848_softc *ac;
1083 1.10 itohy int i;
1084 1.10 itohy
1085 1.10 itohy DPRINTF(("%s: ym_save_codec_regs\n", DVNAME(sc)));
1086 1.24 kent ac = &sc->sc_ad1848.sc_ad1848;
1087 1.10 itohy for (i = 0; i <= 0x1f; i++)
1088 1.10 itohy sc->sc_codec_scan[i] = ad_read(ac, i);
1089 1.10 itohy }
1090 1.10 itohy
1091 1.10 itohy static void
1092 1.24 kent ym_restore_codec_regs(struct ym_softc *sc)
1093 1.10 itohy {
1094 1.24 kent struct ad1848_softc *ac;
1095 1.10 itohy int i, t;
1096 1.10 itohy
1097 1.10 itohy DPRINTF(("%s: ym_restore_codec_regs\n", DVNAME(sc)));
1098 1.24 kent ac = &sc->sc_ad1848.sc_ad1848;
1099 1.10 itohy for (i = 0; i <= 0x1f; i++) {
1100 1.10 itohy /*
1101 1.10 itohy * Wait til the chip becomes ready.
1102 1.10 itohy * This is required after suspend/resume.
1103 1.10 itohy */
1104 1.10 itohy for (t = 0;
1105 1.10 itohy t < 100000 && ADREAD(ac, AD1848_IADDR) & SP_IN_INIT; t++)
1106 1.10 itohy ;
1107 1.10 itohy #ifdef AUDIO_DEBUG
1108 1.10 itohy if (t)
1109 1.10 itohy DPRINTF(("%s: ym_restore_codec_regs: reg %d, t %d\n",
1110 1.10 itohy DVNAME(sc), i, t));
1111 1.10 itohy #endif
1112 1.10 itohy ad_write(ac, i, sc->sc_codec_scan[i]);
1113 1.10 itohy }
1114 1.10 itohy }
1115 1.10 itohy
1116 1.10 itohy /*
1117 1.10 itohy * Save and restore the state on suspending / resumning.
1118 1.10 itohy *
1119 1.10 itohy * XXX This is not complete.
1120 1.10 itohy * Currently only the parameters, such as output gain, are restored.
1121 1.10 itohy * DMA state should also be restored. FIXME.
1122 1.10 itohy */
1123 1.36 christos static bool
1124 1.39 dyoung ym_suspend(device_t self, const pmf_qual_t *qual)
1125 1.10 itohy {
1126 1.36 christos struct ym_softc *sc = device_private(self);
1127 1.10 itohy
1128 1.36 christos DPRINTF(("%s: ym_power_hook: suspend\n", DVNAME(sc)));
1129 1.10 itohy
1130 1.42 jmcneill mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1131 1.10 itohy
1132 1.36 christos /*
1133 1.36 christos * suspending...
1134 1.36 christos */
1135 1.42 jmcneill callout_halt(&sc->sc_powerdown_ch,
1136 1.42 jmcneill &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1137 1.36 christos if (sc->sc_turning_off)
1138 1.36 christos ym_powerdown_blocks(sc);
1139 1.10 itohy
1140 1.36 christos /*
1141 1.36 christos * Save CODEC registers.
1142 1.36 christos * Note that the registers read incorrect
1143 1.36 christos * if the CODEC part is in power-down mode.
1144 1.36 christos */
1145 1.36 christos if (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL)
1146 1.36 christos ym_save_codec_regs(sc);
1147 1.10 itohy
1148 1.36 christos /*
1149 1.36 christos * Save OPL3-SA3 control registers and power-down the chip.
1150 1.36 christos * Note that the registers read incorrect
1151 1.36 christos * if the chip is in global power-down mode.
1152 1.36 christos */
1153 1.36 christos sc->sc_sa3_scan[SA3_PWR_MNG] = ym_read(sc, SA3_PWR_MNG);
1154 1.36 christos if (sc->sc_on_blocks)
1155 1.36 christos ym_chip_powerdown(sc);
1156 1.42 jmcneill mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1157 1.36 christos return true;
1158 1.37 christos }
1159 1.17 takemura
1160 1.36 christos static bool
1161 1.39 dyoung ym_resume(device_t self, const pmf_qual_t *qual)
1162 1.36 christos {
1163 1.36 christos struct ym_softc *sc = device_private(self);
1164 1.36 christos int i, xmax;
1165 1.10 itohy
1166 1.36 christos DPRINTF(("%s: ym_power_hook: resume\n", DVNAME(sc)));
1167 1.10 itohy
1168 1.42 jmcneill mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1169 1.36 christos /*
1170 1.36 christos * resuming...
1171 1.36 christos */
1172 1.36 christos ym_chip_powerup(sc, 1);
1173 1.36 christos ym_init(sc); /* power-on CODEC */
1174 1.10 itohy
1175 1.36 christos /* Restore control registers. */
1176 1.36 christos xmax = YM_IS_SA3(sc)? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
1177 1.36 christos for (i = SA3_PWR_MNG + 1; i <= xmax; i++) {
1178 1.36 christos if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA ||
1179 1.36 christos i == SA3_DPWRDWN)
1180 1.36 christos continue;
1181 1.36 christos ym_write(sc, i, sc->sc_sa3_scan[i]);
1182 1.10 itohy }
1183 1.36 christos
1184 1.36 christos /* Restore CODEC registers (including mixer). */
1185 1.36 christos ym_restore_codec_regs(sc);
1186 1.36 christos
1187 1.36 christos /* Restore global/digital power-down state. */
1188 1.36 christos ym_write(sc, SA3_PWR_MNG, sc->sc_sa3_scan[SA3_PWR_MNG]);
1189 1.36 christos if (YM_IS_SA3(sc))
1190 1.36 christos ym_write(sc, SA3_DPWRDWN, sc->sc_sa3_scan[SA3_DPWRDWN]);
1191 1.42 jmcneill mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1192 1.36 christos return true;
1193 1.10 itohy }
1194 1.10 itohy
1195 1.10 itohy int
1196 1.24 kent ym_codec_power_ctl(void *arg, int flags)
1197 1.10 itohy {
1198 1.24 kent struct ym_softc *sc;
1199 1.24 kent struct ad1848_softc *ac;
1200 1.10 itohy int parts;
1201 1.10 itohy
1202 1.24 kent sc = arg;
1203 1.24 kent ac = &sc->sc_ad1848.sc_ad1848;
1204 1.10 itohy DPRINTF(("%s: ym_codec_power_ctl: flags = 0x%x\n", DVNAME(sc), flags));
1205 1.42 jmcneill KASSERT(mutex_owned(&ac->sc_intr_lock));
1206 1.10 itohy
1207 1.10 itohy if (flags != 0) {
1208 1.10 itohy parts = 0;
1209 1.10 itohy if (flags & FREAD) {
1210 1.10 itohy parts |= YM_POWER_CODEC_R | YM_POWER_CODEC_AD;
1211 1.10 itohy if (ac->mute[AD1848_MONITOR_CHANNEL] == 0)
1212 1.10 itohy parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
1213 1.10 itohy }
1214 1.10 itohy if (flags & FWRITE)
1215 1.10 itohy parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
1216 1.10 itohy } else
1217 1.10 itohy parts = YM_POWER_CODEC_P | YM_POWER_CODEC_R |
1218 1.10 itohy YM_POWER_CODEC_DA | YM_POWER_CODEC_AD;
1219 1.10 itohy
1220 1.10 itohy ym_power_ctl(sc, parts, flags);
1221 1.10 itohy
1222 1.2 augustss return 0;
1223 1.1 augustss }
1224 1.10 itohy
1225 1.10 itohy /*
1226 1.10 itohy * Enter Power Save mode or Global Power Down mode.
1227 1.10 itohy * Total dissipation becomes 5mA and 10uA (typ.) respective.
1228 1.10 itohy */
1229 1.10 itohy static void
1230 1.24 kent ym_chip_powerdown(struct ym_softc *sc)
1231 1.10 itohy {
1232 1.25 christos int i, xmax;
1233 1.10 itohy
1234 1.10 itohy DPRINTF(("%s: ym_chip_powerdown\n", DVNAME(sc)));
1235 1.42 jmcneill KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
1236 1.10 itohy
1237 1.25 christos xmax = YM_IS_SA3(sc) ? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
1238 1.21 itohy
1239 1.10 itohy /* Save control registers. */
1240 1.25 christos for (i = SA3_PWR_MNG + 1; i <= xmax; i++) {
1241 1.10 itohy if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA)
1242 1.10 itohy continue;
1243 1.10 itohy sc->sc_sa3_scan[i] = ym_read(sc, i);
1244 1.10 itohy }
1245 1.10 itohy ym_write(sc, SA3_PWR_MNG,
1246 1.10 itohy (sc->sc_pow_mode == YM_POWER_POWERDOWN ?
1247 1.10 itohy SA3_PWR_MNG_PDN : SA3_PWR_MNG_PSV) | SA3_PWR_MNG_PDX);
1248 1.10 itohy }
1249 1.10 itohy
1250 1.10 itohy /*
1251 1.10 itohy * Power up from Power Save / Global Power Down Mode.
1252 1.10 itohy */
1253 1.10 itohy static void
1254 1.24 kent ym_chip_powerup(struct ym_softc *sc, int nosleep)
1255 1.10 itohy {
1256 1.24 kent uint8_t pw;
1257 1.10 itohy
1258 1.10 itohy DPRINTF(("%s: ym_chip_powerup\n", DVNAME(sc)));
1259 1.42 jmcneill KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
1260 1.10 itohy
1261 1.10 itohy pw = ym_read(sc, SA3_PWR_MNG);
1262 1.10 itohy
1263 1.10 itohy if ((pw & (SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN | SA3_PWR_MNG_PDX)) == 0)
1264 1.10 itohy return; /* already on */
1265 1.10 itohy
1266 1.10 itohy pw &= ~SA3_PWR_MNG_PDX;
1267 1.10 itohy ym_write(sc, SA3_PWR_MNG, pw);
1268 1.10 itohy
1269 1.10 itohy /* wait 100 ms */
1270 1.10 itohy if (nosleep)
1271 1.10 itohy delay(100000);
1272 1.10 itohy else
1273 1.42 jmcneill kpause("ym_pu1", false, hz / 10,
1274 1.42 jmcneill &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1275 1.10 itohy
1276 1.10 itohy pw &= ~(SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN);
1277 1.10 itohy ym_write(sc, SA3_PWR_MNG, pw);
1278 1.10 itohy
1279 1.10 itohy /* wait 70 ms */
1280 1.10 itohy if (nosleep)
1281 1.10 itohy delay(70000);
1282 1.10 itohy else
1283 1.42 jmcneill kpause("ym_pu1", false, hz / 10,
1284 1.42 jmcneill &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1285 1.10 itohy
1286 1.10 itohy /* The chip is muted automatically --- unmute it now. */
1287 1.10 itohy ym_mute(sc, SA3_VOL_L, sc->master_mute);
1288 1.10 itohy ym_mute(sc, SA3_VOL_R, sc->master_mute);
1289 1.10 itohy }
1290 1.10 itohy
1291 1.14 thorpej /* callout handler for power-down */
1292 1.42 jmcneill static void
1293 1.42 jmcneill ym_powerdown_callout(void *arg)
1294 1.10 itohy {
1295 1.24 kent struct ym_softc *sc;
1296 1.42 jmcneill
1297 1.42 jmcneill sc = arg;
1298 1.42 jmcneill
1299 1.42 jmcneill mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1300 1.42 jmcneill if ((sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) == 0) {
1301 1.42 jmcneill ym_powerdown_blocks(sc);
1302 1.42 jmcneill }
1303 1.42 jmcneill mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1304 1.42 jmcneill }
1305 1.42 jmcneill
1306 1.42 jmcneill static void
1307 1.42 jmcneill ym_powerdown_blocks(struct ym_softc *sc)
1308 1.42 jmcneill {
1309 1.24 kent uint16_t parts;
1310 1.24 kent uint16_t on_blocks;
1311 1.24 kent uint8_t sv;
1312 1.10 itohy
1313 1.24 kent on_blocks = sc->sc_on_blocks;
1314 1.10 itohy DPRINTF(("%s: ym_powerdown_blocks: turning_off 0x%x\n",
1315 1.10 itohy DVNAME(sc), sc->sc_turning_off));
1316 1.42 jmcneill KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
1317 1.10 itohy
1318 1.10 itohy on_blocks = sc->sc_on_blocks;
1319 1.10 itohy
1320 1.10 itohy /* Be sure not to change the state of the chip. Save it first. */
1321 1.10 itohy sv = bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX);
1322 1.10 itohy
1323 1.10 itohy parts = sc->sc_turning_off;
1324 1.10 itohy
1325 1.10 itohy if (on_blocks & ~parts & YM_POWER_CODEC_CTL)
1326 1.10 itohy parts &= ~(YM_POWER_CODEC_P | YM_POWER_CODEC_R);
1327 1.10 itohy if (parts & YM_POWER_CODEC_CTL) {
1328 1.10 itohy if ((on_blocks & YM_POWER_CODEC_P) == 0)
1329 1.10 itohy parts |= YM_POWER_CODEC_P;
1330 1.10 itohy if ((on_blocks & YM_POWER_CODEC_R) == 0)
1331 1.10 itohy parts |= YM_POWER_CODEC_R;
1332 1.10 itohy }
1333 1.13 itohy parts &= ~YM_POWER_CODEC_PSEUDO;
1334 1.10 itohy
1335 1.10 itohy /* If CODEC is being off, save the state. */
1336 1.10 itohy if ((sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) &&
1337 1.10 itohy (sc->sc_on_blocks & ~sc->sc_turning_off &
1338 1.10 itohy YM_POWER_CODEC_DIGITAL) == 0)
1339 1.10 itohy ym_save_codec_regs(sc);
1340 1.10 itohy
1341 1.21 itohy if (YM_IS_SA3(sc)) {
1342 1.21 itohy /* OPL3-SA3 */
1343 1.21 itohy ym_write(sc, SA3_DPWRDWN,
1344 1.21 itohy ym_read(sc, SA3_DPWRDWN) | (u_int8_t) parts);
1345 1.21 itohy ym_write(sc, SA3_APWRDWN,
1346 1.21 itohy ym_read(sc, SA3_APWRDWN) | (parts >> 8));
1347 1.21 itohy } else {
1348 1.21 itohy /* OPL3-SA2 (only OPL3 can be off partially) */
1349 1.21 itohy if (parts & YM_POWER_OPL3)
1350 1.21 itohy ym_write(sc, SA3_PWR_MNG,
1351 1.21 itohy ym_read(sc, SA3_PWR_MNG) | SA2_PWR_MNG_FMPS);
1352 1.21 itohy }
1353 1.10 itohy
1354 1.10 itohy if (((sc->sc_on_blocks &= ~sc->sc_turning_off) & YM_POWER_ACTIVE) == 0)
1355 1.10 itohy ym_chip_powerdown(sc);
1356 1.10 itohy
1357 1.10 itohy sc->sc_turning_off = 0;
1358 1.10 itohy
1359 1.10 itohy /* Restore the state of the chip. */
1360 1.10 itohy bus_space_write_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX, sv);
1361 1.10 itohy }
1362 1.10 itohy
1363 1.10 itohy /*
1364 1.10 itohy * Power control entry point.
1365 1.10 itohy */
1366 1.10 itohy void
1367 1.24 kent ym_power_ctl(struct ym_softc *sc, int parts, int onoff)
1368 1.10 itohy {
1369 1.10 itohy int need_restore_codec;
1370 1.10 itohy
1371 1.42 jmcneill KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
1372 1.42 jmcneill
1373 1.10 itohy DPRINTF(("%s: ym_power_ctl: parts = 0x%x, %s\n",
1374 1.10 itohy DVNAME(sc), parts, onoff ? "on" : "off"));
1375 1.10 itohy
1376 1.10 itohy /* This function may sleep --- needs locking. */
1377 1.10 itohy while (sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) {
1378 1.10 itohy sc->sc_in_power_ctl |= YM_POWER_CTL_WANTED;
1379 1.10 itohy DPRINTF(("%s: ym_power_ctl: sleeping\n", DVNAME(sc)));
1380 1.42 jmcneill cv_wait(&sc->sc_cv, &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1381 1.10 itohy DPRINTF(("%s: ym_power_ctl: awaken\n", DVNAME(sc)));
1382 1.10 itohy }
1383 1.10 itohy sc->sc_in_power_ctl |= YM_POWER_CTL_INUSE;
1384 1.10 itohy
1385 1.10 itohy /* If ON requested to parts which are scheduled to OFF, cancel it. */
1386 1.10 itohy if (onoff && sc->sc_turning_off && (sc->sc_turning_off &= ~parts) == 0)
1387 1.42 jmcneill callout_halt(&sc->sc_powerdown_ch,
1388 1.42 jmcneill &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1389 1.10 itohy
1390 1.10 itohy if (!onoff && sc->sc_turning_off)
1391 1.10 itohy parts &= ~sc->sc_turning_off;
1392 1.10 itohy
1393 1.10 itohy /* Discard bits which are currently {on,off}. */
1394 1.10 itohy parts &= onoff ? ~sc->sc_on_blocks : sc->sc_on_blocks;
1395 1.10 itohy
1396 1.10 itohy /* Cancel previous timeout if needed. */
1397 1.10 itohy if (parts != 0 && sc->sc_turning_off)
1398 1.42 jmcneill callout_halt(&sc->sc_powerdown_ch,
1399 1.42 jmcneill &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1400 1.10 itohy
1401 1.10 itohy if (parts == 0)
1402 1.10 itohy goto unlock; /* no work to do */
1403 1.10 itohy
1404 1.10 itohy if (onoff) {
1405 1.10 itohy /* Turning on is done immediately. */
1406 1.10 itohy
1407 1.10 itohy /* If the chip is off, turn it on. */
1408 1.10 itohy if ((sc->sc_on_blocks & YM_POWER_ACTIVE) == 0)
1409 1.10 itohy ym_chip_powerup(sc, 0);
1410 1.10 itohy
1411 1.10 itohy need_restore_codec = (parts & YM_POWER_CODEC_DIGITAL) &&
1412 1.10 itohy (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) == 0;
1413 1.10 itohy
1414 1.10 itohy sc->sc_on_blocks |= parts;
1415 1.10 itohy if (parts & YM_POWER_CODEC_CTL)
1416 1.10 itohy parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_R;
1417 1.10 itohy
1418 1.21 itohy if (YM_IS_SA3(sc)) {
1419 1.21 itohy /* OPL3-SA3 */
1420 1.21 itohy ym_write(sc, SA3_DPWRDWN,
1421 1.21 itohy ym_read(sc, SA3_DPWRDWN) & (u_int8_t)~parts);
1422 1.21 itohy ym_write(sc, SA3_APWRDWN,
1423 1.21 itohy ym_read(sc, SA3_APWRDWN) & ~(parts >> 8));
1424 1.21 itohy } else {
1425 1.21 itohy /* OPL3-SA2 (only OPL3 can be off partially) */
1426 1.21 itohy if (parts & YM_POWER_OPL3)
1427 1.21 itohy ym_write(sc, SA3_PWR_MNG,
1428 1.21 itohy ym_read(sc, SA3_PWR_MNG)
1429 1.21 itohy & ~SA2_PWR_MNG_FMPS);
1430 1.21 itohy }
1431 1.10 itohy if (need_restore_codec)
1432 1.10 itohy ym_restore_codec_regs(sc);
1433 1.10 itohy } else {
1434 1.10 itohy /* Turning off is delayed. */
1435 1.10 itohy sc->sc_turning_off |= parts;
1436 1.10 itohy }
1437 1.10 itohy
1438 1.10 itohy /* Schedule turning off. */
1439 1.10 itohy if (sc->sc_pow_mode != YM_POWER_NOSAVE && sc->sc_turning_off)
1440 1.14 thorpej callout_reset(&sc->sc_powerdown_ch, hz * sc->sc_pow_timeout,
1441 1.42 jmcneill ym_powerdown_callout, sc);
1442 1.10 itohy
1443 1.10 itohy unlock:
1444 1.10 itohy if (sc->sc_in_power_ctl & YM_POWER_CTL_WANTED)
1445 1.42 jmcneill cv_broadcast(&sc->sc_cv);
1446 1.10 itohy sc->sc_in_power_ctl = 0;
1447 1.10 itohy }
1448 1.10 itohy #endif /* not AUDIO_NO_POWER_CTL */
1449