ym.c revision 1.30.4.1 1 /* $NetBSD: ym.c,v 1.30.4.1 2007/02/27 14:16:12 ad Exp $ */
2
3 /*-
4 * Copyright (c) 1999-2002, 2007 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by ITOH Yasufumi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Copyright (c) 1998 Constantine Sapuntzakis. All rights reserved.
41 *
42 * Redistribution and use in source and binary forms, with or without
43 * modification, are permitted provided that the following conditions
44 * are met:
45 * 1. Redistributions of source code must retain the above copyright
46 * notice, this list of conditions and the following disclaimer.
47 * 2. Redistributions in binary form must reproduce the above copyright
48 * notice, this list of conditions and the following disclaimer in the
49 * documentation and/or other materials provided with the distribution.
50 * 3. The name of the author may not be used to endorse or promote products
51 * derived from this software without specific prior written permission.
52 *
53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
54 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
55 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
56 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
57 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
58 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
62 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 */
64
65 /*
66 * Original code from OpenBSD.
67 */
68
69 #include <sys/cdefs.h>
70 __KERNEL_RCSID(0, "$NetBSD: ym.c,v 1.30.4.1 2007/02/27 14:16:12 ad Exp $");
71
72 #include "mpu_ym.h"
73 #include "opt_ym.h"
74
75 #include <sys/param.h>
76 #include <sys/systm.h>
77 #include <sys/errno.h>
78 #include <sys/device.h>
79 #include <sys/fcntl.h>
80 #include <sys/kernel.h>
81 #include <sys/proc.h>
82
83 #include <machine/cpu.h>
84 #include <machine/intr.h>
85 #include <machine/bus.h>
86
87 #include <sys/audioio.h>
88 #include <dev/audio_if.h>
89
90 #include <dev/isa/isavar.h>
91 #include <dev/isa/isadmavar.h>
92
93 #include <dev/ic/ad1848reg.h>
94 #include <dev/isa/ad1848var.h>
95 #include <dev/ic/opl3sa3reg.h>
96 #include <dev/isa/wssreg.h>
97 #if NMPU_YM > 0
98 #include <dev/ic/mpuvar.h>
99 #endif
100 #include <dev/isa/ymvar.h>
101 #include <dev/isa/sbreg.h>
102
103 /* Power management mode. */
104 #ifndef YM_POWER_MODE
105 #define YM_POWER_MODE YM_POWER_POWERSAVE
106 #endif
107
108 /* Time in second before power down the chip. */
109 #ifndef YM_POWER_OFF_SEC
110 #define YM_POWER_OFF_SEC 5
111 #endif
112
113 /* Default mixer settings. */
114 #ifndef YM_VOL_MASTER
115 #define YM_VOL_MASTER 208
116 #endif
117
118 #ifndef YM_VOL_DAC
119 #define YM_VOL_DAC 224
120 #endif
121
122 #ifndef YM_VOL_OPL3
123 #define YM_VOL_OPL3 184
124 #endif
125
126 /*
127 * Default position of the equalizer.
128 */
129 #ifndef YM_DEFAULT_TREBLE
130 #define YM_DEFAULT_TREBLE YM_EQ_FLAT_OFFSET
131 #endif
132 #ifndef YM_DEFAULT_BASS
133 #define YM_DEFAULT_BASS YM_EQ_FLAT_OFFSET
134 #endif
135
136 #ifdef __i386__ /* XXX */
137 # include "joy.h"
138 #else
139 # define NJOY 0
140 #endif
141
142 #ifdef AUDIO_DEBUG
143 #define DPRINTF(x) if (ymdebug) printf x
144 int ymdebug = 0;
145 #else
146 #define DPRINTF(x)
147 #endif
148 #define DVNAME(softc) ((softc)->sc_ad1848.sc_ad1848.sc_dev.dv_xname)
149
150 int ym_getdev(void *, struct audio_device *);
151 int ym_mixer_set_port(void *, mixer_ctrl_t *);
152 int ym_mixer_get_port(void *, mixer_ctrl_t *);
153 int ym_query_devinfo(void *, mixer_devinfo_t *);
154 int ym_intr(void *);
155 #ifndef AUDIO_NO_POWER_CTL
156 static void ym_save_codec_regs(struct ym_softc *);
157 static void ym_restore_codec_regs(struct ym_softc *);
158 void ym_power_hook(int, void *);
159 int ym_codec_power_ctl(void *, int);
160 static void ym_chip_powerdown(struct ym_softc *);
161 static void ym_chip_powerup(struct ym_softc *, int);
162 void ym_powerdown_blocks(void *);
163 void ym_power_ctl(struct ym_softc *, int, int);
164 #endif
165
166 static void ym_init(struct ym_softc *);
167 static void ym_mute(struct ym_softc *, int, int);
168 static void ym_set_master_gain(struct ym_softc *, struct ad1848_volume*);
169 static void ym_hvol_to_master_gain(struct ym_softc *);
170 static void ym_set_mic_gain(struct ym_softc *, int);
171 static void ym_set_3d(struct ym_softc *, mixer_ctrl_t *,
172 struct ad1848_volume *, int);
173
174
175 const struct audio_hw_if ym_hw_if = {
176 ad1848_isa_open,
177 ad1848_isa_close,
178 NULL,
179 ad1848_query_encoding,
180 ad1848_set_params,
181 ad1848_round_blocksize,
182 ad1848_commit_settings,
183 NULL,
184 NULL,
185 NULL,
186 NULL,
187 ad1848_isa_halt_output,
188 ad1848_isa_halt_input,
189 NULL,
190 ym_getdev,
191 NULL,
192 ym_mixer_set_port,
193 ym_mixer_get_port,
194 ym_query_devinfo,
195 ad1848_isa_malloc,
196 ad1848_isa_free,
197 ad1848_isa_round_buffersize,
198 ad1848_isa_mappage,
199 ad1848_isa_get_props,
200 ad1848_isa_trigger_output,
201 ad1848_isa_trigger_input,
202 NULL,
203 NULL, /* powerstate */
204 ad1848_get_locks,
205 };
206
207 static inline int ym_read(struct ym_softc *, int);
208 static inline void ym_write(struct ym_softc *, int, int);
209
210 void
211 ym_attach(struct ym_softc *sc)
212 {
213 static struct ad1848_volume vol_master = {YM_VOL_MASTER, YM_VOL_MASTER};
214 static struct ad1848_volume vol_dac = {YM_VOL_DAC, YM_VOL_DAC};
215 static struct ad1848_volume vol_opl3 = {YM_VOL_OPL3, YM_VOL_OPL3};
216 struct ad1848_softc *ac;
217 mixer_ctrl_t mctl;
218 struct audio_attach_args arg;
219
220 ac = &sc->sc_ad1848.sc_ad1848;
221
222 mutex_init(&ac->sc_lock, MUTEX_DRIVER, IPL_NONE);
223 mutex_init(&ac->sc_intr_lock, MUTEX_DRIVER, IPL_AUDIO);
224 callout_init(&sc->sc_powerdown_ch);
225
226 /* Mute the output to reduce noise during initialization. */
227 ym_mute(sc, SA3_VOL_L, 1);
228 ym_mute(sc, SA3_VOL_R, 1);
229
230 sc->sc_version = ym_read(sc, SA3_MISC) & SA3_MISC_VER;
231 ac->chip_name = YM_IS_SA3(sc) ? "OPL3-SA3" : "OPL3-SA2";
232
233 sc->sc_ad1848.sc_ih = isa_intr_establish(sc->sc_ic, sc->ym_irq,
234 IST_EDGE, IPL_AUDIO, ym_intr, sc);
235
236 #ifndef AUDIO_NO_POWER_CTL
237 sc->sc_ad1848.powerctl = ym_codec_power_ctl;
238 sc->sc_ad1848.powerarg = sc;
239 #endif
240 ad1848_isa_attach(&sc->sc_ad1848);
241 printf("\n");
242 ac->parent = sc;
243
244 /* Establish chip in well known mode */
245 ym_set_master_gain(sc, &vol_master);
246 ym_set_mic_gain(sc, 0);
247 sc->master_mute = 0;
248
249 /* Override ad1848 settings. */
250 ad1848_set_channel_gain(ac, AD1848_DAC_CHANNEL, &vol_dac);
251 ad1848_set_channel_gain(ac, AD1848_AUX2_CHANNEL, &vol_opl3);
252
253 /*
254 * Mute all external sources. If you change this, you must
255 * also change the initial value of sc->sc_external_sources
256 * (currently 0 --- no external source is active).
257 */
258 sc->mic_mute = 1;
259 ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
260 ad1848_mute_channel(ac, AD1848_AUX1_CHANNEL, MUTE_ALL); /* CD */
261 ad1848_mute_channel(ac, AD1848_LINE_CHANNEL, MUTE_ALL); /* line */
262 ac->mute[AD1848_AUX1_CHANNEL] = MUTE_ALL;
263 ac->mute[AD1848_LINE_CHANNEL] = MUTE_ALL;
264 /* speaker is muted by default */
265
266 /* We use only one IRQ (IRQ-A). */
267 ym_write(sc, SA3_IRQ_CONF, SA3_IRQ_CONF_MPU_A | SA3_IRQ_CONF_WSS_A);
268 ym_write(sc, SA3_HVOL_INTR_CNF, SA3_HVOL_INTR_CNF_A);
269
270 /* audio at ym attachment */
271 sc->sc_audiodev = audio_attach_mi(&ym_hw_if, ac, &ac->sc_dev);
272
273 /* opl at ym attachment */
274 if (sc->sc_opl_ioh) {
275 arg.type = AUDIODEV_TYPE_OPL;
276 arg.hwif = 0;
277 arg.hdl = 0;
278 (void)config_found(&ac->sc_dev, &arg, audioprint);
279 }
280
281 #if NMPU_YM > 0
282 /* mpu at ym attachment */
283 if (sc->sc_mpu_ioh) {
284 arg.type = AUDIODEV_TYPE_MPU;
285 arg.hwif = 0;
286 arg.hdl = 0;
287 sc->sc_mpudev = config_found(&ac->sc_dev, &arg, audioprint);
288 }
289 #endif
290
291 /* This must be AFTER the attachment of sub-devices. */
292 ym_init(sc);
293
294 #ifndef AUDIO_NO_POWER_CTL
295 /*
296 * Initialize power control.
297 */
298 sc->sc_pow_mode = YM_POWER_MODE;
299 sc->sc_pow_timeout = YM_POWER_OFF_SEC;
300
301 sc->sc_on_blocks = sc->sc_turning_off =
302 YM_POWER_CODEC_P | YM_POWER_CODEC_R |
303 YM_POWER_OPL3 | YM_POWER_MPU401 | YM_POWER_3D |
304 YM_POWER_CODEC_DA | YM_POWER_CODEC_AD | YM_POWER_OPL3_DA;
305 #if NJOY > 0
306 sc->sc_on_blocks |= YM_POWER_JOYSTICK; /* prevents chip powerdown */
307 #endif
308 ym_powerdown_blocks(sc);
309
310 powerhook_establish(DVNAME(sc), ym_power_hook, sc);
311 #endif
312
313 /* Set tone control to the default position. */
314 mctl.un.value.num_channels = 1;
315 mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_TREBLE;
316 mctl.dev = YM_MASTER_TREBLE;
317 ym_mixer_set_port(sc, &mctl);
318 mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_BASS;
319 mctl.dev = YM_MASTER_BASS;
320 ym_mixer_set_port(sc, &mctl);
321
322 /* Unmute the output now if the chip is on. */
323 #ifndef AUDIO_NO_POWER_CTL
324 if (sc->sc_on_blocks & YM_POWER_ACTIVE)
325 #endif
326 {
327 ym_mute(sc, SA3_VOL_L, sc->master_mute);
328 ym_mute(sc, SA3_VOL_R, sc->master_mute);
329 }
330 }
331
332 static inline int
333 ym_read(struct ym_softc *sc, int reg)
334 {
335
336 bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
337 SA3_CTL_INDEX, (reg & 0xff));
338 return bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_DATA);
339 }
340
341 static inline void
342 ym_write(struct ym_softc *sc, int reg, int data)
343 {
344
345 bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
346 SA3_CTL_INDEX, (reg & 0xff));
347 bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
348 SA3_CTL_DATA, (data & 0xff));
349 }
350
351 static void
352 ym_init(struct ym_softc *sc)
353 {
354 uint8_t dpd, apd;
355
356 /* Mute SoundBlaster output if possible. */
357 if (sc->sc_sb_ioh) {
358 bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_ADDR,
359 SBP_MASTER_VOL);
360 bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_DATA,
361 0x00);
362 }
363
364 if (!YM_IS_SA3(sc)) {
365 /* OPL3-SA2 */
366 ym_write(sc, SA3_PWR_MNG, SA2_PWR_MNG_CLKO |
367 (sc->sc_opl_ioh == 0 ? SA2_PWR_MNG_FMPS : 0));
368 return;
369 }
370
371 /* OPL3-SA3 */
372 /* Figure out which part can be power down. */
373 dpd = SA3_DPWRDWN_SB /* we never use SB */
374 #if NMPU_YM > 0
375 | (sc->sc_mpu_ioh ? 0 : SA3_DPWRDWN_MPU)
376 #else
377 | SA3_DPWRDWN_MPU
378 #endif
379 #if NJOY == 0
380 | SA3_DPWRDWN_JOY
381 #endif
382 | SA3_DPWRDWN_PNP /* ISA Plug and Play is done */
383 /*
384 * The master clock is for external wavetable synthesizer
385 * OPL4-ML (YMF704) or OPL4-ML2 (YMF721),
386 * and is currently unused.
387 */
388 | SA3_DPWRDWN_MCLKO;
389
390 apd = SA3_APWRDWN_SBDAC; /* we never use SB */
391
392 /* Power down OPL3 if not attached. */
393 if (sc->sc_opl_ioh == 0) {
394 dpd |= SA3_DPWRDWN_FM;
395 apd |= SA3_APWRDWN_FMDAC;
396 }
397 /* CODEC is always attached. */
398
399 /* Power down unused digital parts. */
400 ym_write(sc, SA3_DPWRDWN, dpd);
401
402 /* Power down unused analog parts. */
403 ym_write(sc, SA3_APWRDWN, apd);
404 }
405
406
407 int
408 ym_getdev(void *addr, struct audio_device *retp)
409 {
410 struct ym_softc *sc;
411 struct ad1848_softc *ac;
412
413 sc = addr;
414 ac = &sc->sc_ad1848.sc_ad1848;
415 strlcpy(retp->name, ac->chip_name, sizeof(retp->name));
416 snprintf(retp->version, sizeof(retp->version), "%d", sc->sc_version);
417 strlcpy(retp->config, "ym", sizeof(retp->config));
418
419 return 0;
420 }
421
422
423 static ad1848_devmap_t mappings[] = {
424 { YM_DAC_LVL, AD1848_KIND_LVL, AD1848_DAC_CHANNEL },
425 { YM_MIDI_LVL, AD1848_KIND_LVL, AD1848_AUX2_CHANNEL },
426 { YM_CD_LVL, AD1848_KIND_LVL, AD1848_AUX1_CHANNEL },
427 { YM_LINE_LVL, AD1848_KIND_LVL, AD1848_LINE_CHANNEL },
428 { YM_SPEAKER_LVL, AD1848_KIND_LVL, AD1848_MONO_CHANNEL },
429 { YM_MONITOR_LVL, AD1848_KIND_LVL, AD1848_MONITOR_CHANNEL },
430 { YM_DAC_MUTE, AD1848_KIND_MUTE, AD1848_DAC_CHANNEL },
431 { YM_MIDI_MUTE, AD1848_KIND_MUTE, AD1848_AUX2_CHANNEL },
432 { YM_CD_MUTE, AD1848_KIND_MUTE, AD1848_AUX1_CHANNEL },
433 { YM_LINE_MUTE, AD1848_KIND_MUTE, AD1848_LINE_CHANNEL },
434 { YM_SPEAKER_MUTE, AD1848_KIND_MUTE, AD1848_MONO_CHANNEL },
435 { YM_MONITOR_MUTE, AD1848_KIND_MUTE, AD1848_MONITOR_CHANNEL },
436 { YM_REC_LVL, AD1848_KIND_RECORDGAIN, -1 },
437 { YM_RECORD_SOURCE, AD1848_KIND_RECORDSOURCE, -1}
438 };
439
440 #define NUMMAP (sizeof(mappings) / sizeof(mappings[0]))
441
442
443 static void
444 ym_mute(struct ym_softc *sc, int left_reg, int mute)
445 {
446 uint8_t reg;
447
448 reg = ym_read(sc, left_reg);
449 if (mute)
450 ym_write(sc, left_reg, reg | 0x80);
451 else
452 ym_write(sc, left_reg, reg & ~0x80);
453 }
454
455
456 static void
457 ym_set_master_gain(struct ym_softc *sc, struct ad1848_volume *vol)
458 {
459 u_int atten;
460
461 sc->master_gain = *vol;
462
463 atten = ((AUDIO_MAX_GAIN - vol->left) * (SA3_VOL_MV + 1)) /
464 (AUDIO_MAX_GAIN + 1);
465
466 ym_write(sc, SA3_VOL_L, (ym_read(sc, SA3_VOL_L) & ~SA3_VOL_MV) | atten);
467
468 atten = ((AUDIO_MAX_GAIN - vol->right) * (SA3_VOL_MV + 1)) /
469 (AUDIO_MAX_GAIN + 1);
470
471 ym_write(sc, SA3_VOL_R, (ym_read(sc, SA3_VOL_R) & ~SA3_VOL_MV) | atten);
472 }
473
474 /*
475 * Read current setting of master volume from hardware
476 * and update the software value if changed.
477 * [SA3] This function clears hardware volume interrupt.
478 */
479 static void
480 ym_hvol_to_master_gain(struct ym_softc *sc)
481 {
482 u_int prevval, val;
483 int changed;
484
485 changed = 0;
486 val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_L);
487 prevval = (sc->master_gain.left * (SA3_VOL_MV + 1)) /
488 (AUDIO_MAX_GAIN + 1);
489 if (val != prevval) {
490 sc->master_gain.left =
491 val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
492 changed = 1;
493 }
494
495 val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_R);
496 prevval = (sc->master_gain.right * (SA3_VOL_MV + 1)) /
497 (AUDIO_MAX_GAIN + 1);
498 if (val != prevval) {
499 sc->master_gain.right =
500 val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
501 changed = 1;
502 }
503
504 #if 0 /* XXX NOT YET */
505 /* Notify the change to async processes. */
506 if (changed && sc->sc_audiodev)
507 mixer_signal(sc->sc_audiodev);
508 #endif
509 }
510
511 static void
512 ym_set_mic_gain(struct ym_softc *sc, int vol)
513 {
514 u_int atten;
515
516 sc->mic_gain = vol;
517
518 atten = ((AUDIO_MAX_GAIN - vol) * (SA3_MIC_MCV + 1)) /
519 (AUDIO_MAX_GAIN + 1);
520
521 ym_write(sc, SA3_MIC_VOL,
522 (ym_read(sc, SA3_MIC_VOL) & ~SA3_MIC_MCV) | atten);
523 }
524
525 static void
526 ym_set_3d(struct ym_softc *sc, mixer_ctrl_t *cp,
527 struct ad1848_volume *val, int reg)
528 {
529 uint8_t l, r, e;
530
531 ad1848_to_vol(cp, val);
532
533 l = val->left;
534 r = val->right;
535 if (reg != SA3_3D_WIDE) {
536 /* flat on center */
537 l = YM_EQ_EXPAND_VALUE(l);
538 r = YM_EQ_EXPAND_VALUE(r);
539 }
540
541 e = (l * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
542 (AUDIO_MAX_GAIN + 1) << SA3_3D_LSHIFT |
543 (r * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
544 (AUDIO_MAX_GAIN + 1) << SA3_3D_RSHIFT;
545
546 #ifndef AUDIO_NO_POWER_CTL
547 /* turn wide stereo on if necessary */
548 if (e)
549 ym_power_ctl(sc, YM_POWER_3D, 1);
550 #endif
551
552 ym_write(sc, reg, e);
553
554 #ifndef AUDIO_NO_POWER_CTL
555 /* turn wide stereo off if necessary */
556 if (YM_EQ_OFF(&sc->sc_treble) && YM_EQ_OFF(&sc->sc_bass) &&
557 YM_WIDE_OFF(&sc->sc_wide))
558 ym_power_ctl(sc, YM_POWER_3D, 0);
559 #endif
560 }
561
562 int
563 ym_mixer_set_port(void *addr, mixer_ctrl_t *cp)
564 {
565 struct ad1848_softc *ac;
566 struct ym_softc *sc;
567 struct ad1848_volume vol;
568 int error;
569 uint8_t extsources;
570
571 ac = addr;
572 sc = ac->parent;
573 error = 0;
574 DPRINTF(("%s: ym_mixer_set_port: dev 0x%x, type 0x%x, 0x%x (%d; %d, %d)\n",
575 DVNAME(sc), cp->dev, cp->type, cp->un.ord,
576 cp->un.value.num_channels, cp->un.value.level[0],
577 cp->un.value.level[1]));
578
579 /* SA2 doesn't have equalizer */
580 if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
581 return ENXIO;
582
583 #ifndef AUDIO_NO_POWER_CTL
584 /* Power-up chip */
585 ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
586 #endif
587
588 switch (cp->dev) {
589 case YM_OUTPUT_LVL:
590 ad1848_to_vol(cp, &vol);
591 ym_set_master_gain(sc, &vol);
592 goto out;
593
594 case YM_OUTPUT_MUTE:
595 sc->master_mute = (cp->un.ord != 0);
596 ym_mute(sc, SA3_VOL_L, sc->master_mute);
597 ym_mute(sc, SA3_VOL_R, sc->master_mute);
598 goto out;
599
600 case YM_MIC_LVL:
601 if (cp->un.value.num_channels != 1)
602 error = EINVAL;
603 else
604 ym_set_mic_gain(sc,
605 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
606 goto out;
607
608 case YM_MASTER_EQMODE:
609 sc->sc_eqmode = cp->un.ord & SA3_SYS_CTL_YMODE;
610 ym_write(sc, SA3_SYS_CTL, (ym_read(sc, SA3_SYS_CTL) &
611 ~SA3_SYS_CTL_YMODE) | sc->sc_eqmode);
612 goto out;
613
614 case YM_MASTER_TREBLE:
615 ym_set_3d(sc, cp, &sc->sc_treble, SA3_3D_TREBLE);
616 goto out;
617
618 case YM_MASTER_BASS:
619 ym_set_3d(sc, cp, &sc->sc_bass, SA3_3D_BASS);
620 goto out;
621
622 case YM_MASTER_WIDE:
623 ym_set_3d(sc, cp, &sc->sc_wide, SA3_3D_WIDE);
624 goto out;
625
626 #ifndef AUDIO_NO_POWER_CTL
627 case YM_PWR_MODE:
628 if ((unsigned) cp->un.ord > YM_POWER_NOSAVE)
629 error = EINVAL;
630 else
631 sc->sc_pow_mode = cp->un.ord;
632 goto out;
633
634 case YM_PWR_TIMEOUT:
635 if (cp->un.value.num_channels != 1)
636 error = EINVAL;
637 else
638 sc->sc_pow_timeout =
639 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
640 goto out;
641
642 /*
643 * Needs power-up to hear external sources.
644 */
645 case YM_CD_MUTE:
646 case YM_LINE_MUTE:
647 case YM_SPEAKER_MUTE:
648 case YM_MIC_MUTE:
649 extsources = YM_MIXER_TO_XS(cp->dev);
650 if (cp->un.ord) {
651 if ((sc->sc_external_sources &= ~extsources) == 0) {
652 /*
653 * All the external sources are muted
654 * --- no need to keep the chip on.
655 */
656 ym_power_ctl(sc, YM_POWER_EXT_SRC, 0);
657 DPRINTF(("%s: ym_mixer_set_port: off for ext\n",
658 DVNAME(sc)));
659 }
660 } else {
661 /* mute off - power-up the chip */
662 sc->sc_external_sources |= extsources;
663 ym_power_ctl(sc, YM_POWER_EXT_SRC, 1);
664 DPRINTF(("%s: ym_mixer_set_port: on for ext\n",
665 DVNAME(sc)));
666 }
667 break; /* fall to ad1848_mixer_set_port() */
668
669 /*
670 * Power on/off the playback part for monitoring.
671 */
672 case YM_MONITOR_MUTE:
673 if ((ac->open_mode & (FREAD | FWRITE)) == FREAD)
674 ym_power_ctl(sc, YM_POWER_CODEC_P | YM_POWER_CODEC_DA,
675 cp->un.ord == 0);
676 break; /* fall to ad1848_mixer_set_port() */
677 #endif
678 }
679
680 error = ad1848_mixer_set_port(ac, mappings, NUMMAP, cp);
681
682 if (error != ENXIO)
683 goto out;
684
685 error = 0;
686
687 switch (cp->dev) {
688 case YM_MIC_MUTE:
689 sc->mic_mute = (cp->un.ord != 0);
690 ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
691 break;
692
693 default:
694 error = ENXIO;
695 break;
696 }
697
698 out:
699 #ifndef AUDIO_NO_POWER_CTL
700 /* Power-down chip */
701 ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
702 #endif
703
704 return error;
705 }
706
707 int
708 ym_mixer_get_port(void *addr, mixer_ctrl_t *cp)
709 {
710 struct ad1848_softc *ac;
711 struct ym_softc *sc;
712 int error;
713
714 ac = addr;
715 sc = ac->parent;
716 /* SA2 doesn't have equalizer */
717 if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
718 return ENXIO;
719
720 switch (cp->dev) {
721 case YM_OUTPUT_LVL:
722 if (!YM_IS_SA3(sc)) {
723 /*
724 * SA2 doesn't have hardware volume interrupt.
725 * Read current value and update every time.
726 */
727 #ifndef AUDIO_NO_POWER_CTL
728 /* Power-up chip */
729 ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
730 #endif
731 ym_hvol_to_master_gain(sc);
732 #ifndef AUDIO_NO_POWER_CTL
733 /* Power-down chip */
734 ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
735 #endif
736 }
737 ad1848_from_vol(cp, &sc->master_gain);
738 return 0;
739
740 case YM_OUTPUT_MUTE:
741 cp->un.ord = sc->master_mute;
742 return 0;
743
744 case YM_MIC_LVL:
745 if (cp->un.value.num_channels != 1)
746 return EINVAL;
747 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->mic_gain;
748 return 0;
749
750 case YM_MASTER_EQMODE:
751 cp->un.ord = sc->sc_eqmode;
752 return 0;
753
754 case YM_MASTER_TREBLE:
755 ad1848_from_vol(cp, &sc->sc_treble);
756 return 0;
757
758 case YM_MASTER_BASS:
759 ad1848_from_vol(cp, &sc->sc_bass);
760 return 0;
761
762 case YM_MASTER_WIDE:
763 ad1848_from_vol(cp, &sc->sc_wide);
764 return 0;
765
766 #ifndef AUDIO_NO_POWER_CTL
767 case YM_PWR_MODE:
768 cp->un.ord = sc->sc_pow_mode;
769 return 0;
770
771 case YM_PWR_TIMEOUT:
772 if (cp->un.value.num_channels != 1)
773 return EINVAL;
774 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_pow_timeout;
775 return 0;
776 #endif
777 }
778
779 error = ad1848_mixer_get_port(ac, mappings, NUMMAP, cp);
780
781 if (error != ENXIO)
782 return error;
783
784 error = 0;
785
786 switch (cp->dev) {
787 case YM_MIC_MUTE:
788 cp->un.ord = sc->mic_mute;
789 break;
790
791 default:
792 error = ENXIO;
793 break;
794 }
795
796 return error;
797 }
798
799 static const char *mixer_classes[] = {
800 AudioCinputs, AudioCrecord, AudioCoutputs, AudioCmonitor,
801 #ifndef AUDIO_NO_POWER_CTL
802 AudioCpower,
803 #endif
804 AudioCequalization
805 };
806
807 int
808 ym_query_devinfo(void *addr, mixer_devinfo_t *dip)
809 {
810 static const char *mixer_port_names[] = {
811 AudioNdac, AudioNmidi, AudioNcd, AudioNline, AudioNspeaker,
812 AudioNmicrophone, AudioNmonitor
813 };
814 struct ad1848_softc *ac;
815 struct ym_softc *sc;
816
817 ac = addr;
818 sc = ac->parent;
819 /* SA2 doesn't have equalizer */
820 if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(dip->index))
821 return ENXIO;
822
823 dip->next = dip->prev = AUDIO_MIXER_LAST;
824
825 switch(dip->index) {
826 case YM_INPUT_CLASS:
827 case YM_OUTPUT_CLASS:
828 case YM_MONITOR_CLASS:
829 case YM_RECORD_CLASS:
830 #ifndef AUDIO_NO_POWER_CTL
831 case YM_PWR_CLASS:
832 #endif
833 case YM_EQ_CLASS:
834 dip->type = AUDIO_MIXER_CLASS;
835 dip->mixer_class = dip->index;
836 strcpy(dip->label.name,
837 mixer_classes[dip->index - YM_INPUT_CLASS]);
838 break;
839
840 case YM_DAC_LVL:
841 case YM_MIDI_LVL:
842 case YM_CD_LVL:
843 case YM_LINE_LVL:
844 case YM_SPEAKER_LVL:
845 case YM_MIC_LVL:
846 case YM_MONITOR_LVL:
847 dip->type = AUDIO_MIXER_VALUE;
848 if (dip->index == YM_MONITOR_LVL)
849 dip->mixer_class = YM_MONITOR_CLASS;
850 else
851 dip->mixer_class = YM_INPUT_CLASS;
852
853 dip->next = dip->index + 7;
854
855 strcpy(dip->label.name,
856 mixer_port_names[dip->index - YM_DAC_LVL]);
857
858 if (dip->index == YM_SPEAKER_LVL ||
859 dip->index == YM_MIC_LVL)
860 dip->un.v.num_channels = 1;
861 else
862 dip->un.v.num_channels = 2;
863
864 if (dip->index == YM_SPEAKER_LVL)
865 dip->un.v.delta = 1 << (8 - 4 /* valid bits */);
866 else if (dip->index == YM_DAC_LVL ||
867 dip->index == YM_MONITOR_LVL)
868 dip->un.v.delta = 1 << (8 - 6 /* valid bits */);
869 else
870 dip->un.v.delta = 1 << (8 - 5 /* valid bits */);
871
872 strcpy(dip->un.v.units.name, AudioNvolume);
873 break;
874
875 case YM_DAC_MUTE:
876 case YM_MIDI_MUTE:
877 case YM_CD_MUTE:
878 case YM_LINE_MUTE:
879 case YM_SPEAKER_MUTE:
880 case YM_MIC_MUTE:
881 case YM_MONITOR_MUTE:
882 if (dip->index == YM_MONITOR_MUTE)
883 dip->mixer_class = YM_MONITOR_CLASS;
884 else
885 dip->mixer_class = YM_INPUT_CLASS;
886 dip->type = AUDIO_MIXER_ENUM;
887 dip->prev = dip->index - 7;
888 mute:
889 strcpy(dip->label.name, AudioNmute);
890 dip->un.e.num_mem = 2;
891 strcpy(dip->un.e.member[0].label.name, AudioNoff);
892 dip->un.e.member[0].ord = 0;
893 strcpy(dip->un.e.member[1].label.name, AudioNon);
894 dip->un.e.member[1].ord = 1;
895 break;
896
897
898 case YM_OUTPUT_LVL:
899 dip->type = AUDIO_MIXER_VALUE;
900 dip->mixer_class = YM_OUTPUT_CLASS;
901 dip->next = YM_OUTPUT_MUTE;
902 strcpy(dip->label.name, AudioNmaster);
903 dip->un.v.num_channels = 2;
904 dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1);
905 strcpy(dip->un.v.units.name, AudioNvolume);
906 break;
907
908 case YM_OUTPUT_MUTE:
909 dip->mixer_class = YM_OUTPUT_CLASS;
910 dip->type = AUDIO_MIXER_ENUM;
911 dip->prev = YM_OUTPUT_LVL;
912 goto mute;
913
914
915 case YM_REC_LVL: /* record level */
916 dip->type = AUDIO_MIXER_VALUE;
917 dip->mixer_class = YM_RECORD_CLASS;
918 dip->next = YM_RECORD_SOURCE;
919 strcpy(dip->label.name, AudioNrecord);
920 dip->un.v.num_channels = 2;
921 dip->un.v.delta = 1 << (8 - 4 /* valid bits */);
922 strcpy(dip->un.v.units.name, AudioNvolume);
923 break;
924
925 case YM_RECORD_SOURCE:
926 dip->mixer_class = YM_RECORD_CLASS;
927 dip->type = AUDIO_MIXER_ENUM;
928 dip->prev = YM_REC_LVL;
929 strcpy(dip->label.name, AudioNsource);
930 dip->un.e.num_mem = 4;
931 strcpy(dip->un.e.member[0].label.name, AudioNmicrophone);
932 dip->un.e.member[0].ord = MIC_IN_PORT;
933 strcpy(dip->un.e.member[1].label.name, AudioNline);
934 dip->un.e.member[1].ord = LINE_IN_PORT;
935 strcpy(dip->un.e.member[2].label.name, AudioNdac);
936 dip->un.e.member[2].ord = DAC_IN_PORT;
937 strcpy(dip->un.e.member[3].label.name, AudioNcd);
938 dip->un.e.member[3].ord = AUX1_IN_PORT;
939 break;
940
941
942 case YM_MASTER_EQMODE:
943 dip->type = AUDIO_MIXER_ENUM;
944 dip->mixer_class = YM_EQ_CLASS;
945 strcpy(dip->label.name, AudioNmode);
946 strcpy(dip->un.v.units.name, AudioNmode);
947 dip->un.e.num_mem = 4;
948 strcpy(dip->un.e.member[0].label.name, AudioNdesktop);
949 dip->un.e.member[0].ord = SA3_SYS_CTL_YMODE0;
950 strcpy(dip->un.e.member[1].label.name, AudioNlaptop);
951 dip->un.e.member[1].ord = SA3_SYS_CTL_YMODE1;
952 strcpy(dip->un.e.member[2].label.name, AudioNsubnote);
953 dip->un.e.member[2].ord = SA3_SYS_CTL_YMODE2;
954 strcpy(dip->un.e.member[3].label.name, AudioNhifi);
955 dip->un.e.member[3].ord = SA3_SYS_CTL_YMODE3;
956 break;
957
958 case YM_MASTER_TREBLE:
959 dip->type = AUDIO_MIXER_VALUE;
960 dip->mixer_class = YM_EQ_CLASS;
961 strcpy(dip->label.name, AudioNtreble);
962 dip->un.v.num_channels = 2;
963 dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1)
964 >> YM_EQ_REDUCE_BIT;
965 strcpy(dip->un.v.units.name, AudioNtreble);
966 break;
967
968 case YM_MASTER_BASS:
969 dip->type = AUDIO_MIXER_VALUE;
970 dip->mixer_class = YM_EQ_CLASS;
971 strcpy(dip->label.name, AudioNbass);
972 dip->un.v.num_channels = 2;
973 dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1)
974 >> YM_EQ_REDUCE_BIT;
975 strcpy(dip->un.v.units.name, AudioNbass);
976 break;
977
978 case YM_MASTER_WIDE:
979 dip->type = AUDIO_MIXER_VALUE;
980 dip->mixer_class = YM_EQ_CLASS;
981 strcpy(dip->label.name, AudioNsurround);
982 dip->un.v.num_channels = 2;
983 dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1);
984 strcpy(dip->un.v.units.name, AudioNsurround);
985 break;
986
987
988 #ifndef AUDIO_NO_POWER_CTL
989 case YM_PWR_MODE:
990 dip->type = AUDIO_MIXER_ENUM;
991 dip->mixer_class = YM_PWR_CLASS;
992 dip->next = YM_PWR_TIMEOUT;
993 strcpy(dip->label.name, AudioNsave);
994 dip->un.e.num_mem = 3;
995 strcpy(dip->un.e.member[0].label.name, AudioNpowerdown);
996 dip->un.e.member[0].ord = YM_POWER_POWERDOWN;
997 strcpy(dip->un.e.member[1].label.name, AudioNpowersave);
998 dip->un.e.member[1].ord = YM_POWER_POWERSAVE;
999 strcpy(dip->un.e.member[2].label.name, AudioNnosave);
1000 dip->un.e.member[2].ord = YM_POWER_NOSAVE;
1001 break;
1002
1003 case YM_PWR_TIMEOUT:
1004 dip->type = AUDIO_MIXER_VALUE;
1005 dip->mixer_class = YM_PWR_CLASS;
1006 dip->prev = YM_PWR_MODE;
1007 strcpy(dip->label.name, AudioNtimeout);
1008 dip->un.v.num_channels = 1;
1009 strcpy(dip->un.v.units.name, AudioNtimeout);
1010 break;
1011 #endif /* not AUDIO_NO_POWER_CTL */
1012
1013 default:
1014 return ENXIO;
1015 /*NOTREACHED*/
1016 }
1017
1018 return 0;
1019 }
1020
1021 int
1022 ym_intr(void *arg)
1023 {
1024 struct ym_softc *sc;
1025 u_int8_t ist;
1026 int processed;
1027
1028 sc = arg;
1029
1030 mutex_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1031
1032 /* OPL3 timer is currently unused. */
1033 if (((ist = ym_read(sc, SA3_IRQA_STAT)) &
1034 ~(SA3_IRQ_STAT_SB|SA3_IRQ_STAT_OPL3)) == 0) {
1035 DPRINTF(("%s: ym_intr: spurious interrupt\n", DVNAME(sc)));
1036 mutex_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1037 return 0;
1038 }
1039
1040 /* Process pending interrupts. */
1041 do {
1042 processed = 0;
1043 /*
1044 * CODEC interrupts.
1045 */
1046 if (ist & (SA3_IRQ_STAT_TI|SA3_IRQ_STAT_CI|SA3_IRQ_STAT_PI)) {
1047 ad1848_isa_intr(&sc->sc_ad1848);
1048 processed = 1;
1049 }
1050 #if NMPU_YM > 0
1051 /*
1052 * MPU401 interrupt.
1053 */
1054 if (ist & SA3_IRQ_STAT_MPU) {
1055 mpu_intr(sc->sc_mpudev);
1056 processed = 1;
1057 }
1058 #endif
1059 /*
1060 * Hardware volume interrupt (SA3 only).
1061 * Recalculate master volume from the hardware setting.
1062 */
1063 if ((ist & SA3_IRQ_STAT_MV) && YM_IS_SA3(sc)) {
1064 ym_hvol_to_master_gain(sc);
1065 processed = 1;
1066 }
1067 } while (processed && (ist = ym_read(sc, SA3_IRQA_STAT)));
1068
1069 mutex_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1070 return 1;
1071 }
1072
1073
1074 #ifndef AUDIO_NO_POWER_CTL
1075 static void
1076 ym_save_codec_regs(struct ym_softc *sc)
1077 {
1078 struct ad1848_softc *ac;
1079 int i;
1080
1081 DPRINTF(("%s: ym_save_codec_regs\n", DVNAME(sc)));
1082 ac = &sc->sc_ad1848.sc_ad1848;
1083 for (i = 0; i <= 0x1f; i++)
1084 sc->sc_codec_scan[i] = ad_read(ac, i);
1085 }
1086
1087 static void
1088 ym_restore_codec_regs(struct ym_softc *sc)
1089 {
1090 struct ad1848_softc *ac;
1091 int i, t;
1092
1093 DPRINTF(("%s: ym_restore_codec_regs\n", DVNAME(sc)));
1094 ac = &sc->sc_ad1848.sc_ad1848;
1095 for (i = 0; i <= 0x1f; i++) {
1096 /*
1097 * Wait til the chip becomes ready.
1098 * This is required after suspend/resume.
1099 */
1100 for (t = 0;
1101 t < 100000 && ADREAD(ac, AD1848_IADDR) & SP_IN_INIT; t++)
1102 ;
1103 #ifdef AUDIO_DEBUG
1104 if (t)
1105 DPRINTF(("%s: ym_restore_codec_regs: reg %d, t %d\n",
1106 DVNAME(sc), i, t));
1107 #endif
1108 ad_write(ac, i, sc->sc_codec_scan[i]);
1109 }
1110 }
1111
1112 /*
1113 * Save and restore the state on suspending / resumning.
1114 *
1115 * XXX This is not complete.
1116 * Currently only the parameters, such as output gain, are restored.
1117 * DMA state should also be restored. FIXME.
1118 */
1119 void
1120 ym_power_hook(int why, void *v)
1121 {
1122 struct ym_softc *sc;
1123 int i, xmax;
1124
1125 sc = v;
1126 DPRINTF(("%s: ym_power_hook: why = %d\n", DVNAME(sc), why));
1127
1128 mutex_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1129
1130 switch (why) {
1131 case PWR_SUSPEND:
1132 case PWR_STANDBY:
1133 /*
1134 * suspending...
1135 */
1136 callout_stop(&sc->sc_powerdown_ch);
1137 if (sc->sc_turning_off)
1138 ym_powerdown_blocks(sc);
1139
1140 /*
1141 * Save CODEC registers.
1142 * Note that the registers read incorrect
1143 * if the CODEC part is in power-down mode.
1144 */
1145 if (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL)
1146 ym_save_codec_regs(sc);
1147
1148 /*
1149 * Save OPL3-SA3 control registers and power-down the chip.
1150 * Note that the registers read incorrect
1151 * if the chip is in global power-down mode.
1152 */
1153 sc->sc_sa3_scan[SA3_PWR_MNG] = ym_read(sc, SA3_PWR_MNG);
1154 if (sc->sc_on_blocks)
1155 ym_chip_powerdown(sc);
1156 break;
1157
1158 case PWR_RESUME:
1159 /*
1160 * resuming...
1161 */
1162 ym_chip_powerup(sc, 1);
1163 ym_init(sc); /* power-on CODEC */
1164
1165 /* Restore control registers. */
1166 xmax = YM_IS_SA3(sc)? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
1167 for (i = SA3_PWR_MNG + 1; i <= xmax; i++) {
1168 if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA ||
1169 i == SA3_DPWRDWN)
1170 continue;
1171 ym_write(sc, i, sc->sc_sa3_scan[i]);
1172 }
1173
1174 /* Restore CODEC registers (including mixer). */
1175 ym_restore_codec_regs(sc);
1176
1177 /* Restore global/digital power-down state. */
1178 ym_write(sc, SA3_PWR_MNG, sc->sc_sa3_scan[SA3_PWR_MNG]);
1179 if (YM_IS_SA3(sc))
1180 ym_write(sc, SA3_DPWRDWN, sc->sc_sa3_scan[SA3_DPWRDWN]);
1181 break;
1182 case PWR_SOFTSUSPEND:
1183 case PWR_SOFTSTANDBY:
1184 case PWR_SOFTRESUME:
1185 break;
1186 }
1187 mutex_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1188 }
1189
1190 int
1191 ym_codec_power_ctl(void *arg, int flags)
1192 {
1193 struct ym_softc *sc;
1194 struct ad1848_softc *ac;
1195 int parts;
1196
1197 sc = arg;
1198 ac = &sc->sc_ad1848.sc_ad1848;
1199 DPRINTF(("%s: ym_codec_power_ctl: flags = 0x%x\n", DVNAME(sc), flags));
1200
1201 if (flags != 0) {
1202 parts = 0;
1203 if (flags & FREAD) {
1204 parts |= YM_POWER_CODEC_R | YM_POWER_CODEC_AD;
1205 if (ac->mute[AD1848_MONITOR_CHANNEL] == 0)
1206 parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
1207 }
1208 if (flags & FWRITE)
1209 parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
1210 } else
1211 parts = YM_POWER_CODEC_P | YM_POWER_CODEC_R |
1212 YM_POWER_CODEC_DA | YM_POWER_CODEC_AD;
1213
1214 ym_power_ctl(sc, parts, flags);
1215
1216 return 0;
1217 }
1218
1219 /*
1220 * Enter Power Save mode or Global Power Down mode.
1221 * Total dissipation becomes 5mA and 10uA (typ.) respective.
1222 *
1223 * This must be called at splaudio().
1224 */
1225 static void
1226 ym_chip_powerdown(struct ym_softc *sc)
1227 {
1228 int i, xmax;
1229
1230 DPRINTF(("%s: ym_chip_powerdown\n", DVNAME(sc)));
1231
1232 xmax = YM_IS_SA3(sc) ? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
1233
1234 /* Save control registers. */
1235 for (i = SA3_PWR_MNG + 1; i <= xmax; i++) {
1236 if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA)
1237 continue;
1238 sc->sc_sa3_scan[i] = ym_read(sc, i);
1239 }
1240 ym_write(sc, SA3_PWR_MNG,
1241 (sc->sc_pow_mode == YM_POWER_POWERDOWN ?
1242 SA3_PWR_MNG_PDN : SA3_PWR_MNG_PSV) | SA3_PWR_MNG_PDX);
1243 }
1244
1245 /*
1246 * Power up from Power Save / Global Power Down Mode.
1247 *
1248 * We assume no ym interrupt shall occur, since the chip is
1249 * in power-down mode (or should be blocked by splaudio()).
1250 */
1251 static void
1252 ym_chip_powerup(struct ym_softc *sc, int nosleep)
1253 {
1254 int wchan;
1255 uint8_t pw;
1256
1257 DPRINTF(("%s: ym_chip_powerup\n", DVNAME(sc)));
1258
1259 pw = ym_read(sc, SA3_PWR_MNG);
1260
1261 if ((pw & (SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN | SA3_PWR_MNG_PDX)) == 0)
1262 return; /* already on */
1263
1264 pw &= ~SA3_PWR_MNG_PDX;
1265 ym_write(sc, SA3_PWR_MNG, pw);
1266
1267 /* wait 100 ms */
1268 if (nosleep)
1269 delay(100000);
1270 else
1271 tsleep(&wchan, PWAIT, "ym_pu1", hz / 10);
1272
1273 pw &= ~(SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN);
1274 ym_write(sc, SA3_PWR_MNG, pw);
1275
1276 /* wait 70 ms */
1277 if (nosleep)
1278 delay(70000);
1279 else
1280 tsleep(&wchan, PWAIT, "ym_pu2", hz / 14);
1281
1282 /* The chip is muted automatically --- unmute it now. */
1283 ym_mute(sc, SA3_VOL_L, sc->master_mute);
1284 ym_mute(sc, SA3_VOL_R, sc->master_mute);
1285 }
1286
1287 /* callout handler for power-down */
1288 void
1289 ym_powerdown_blocks(void *arg)
1290 {
1291 struct ym_softc *sc;
1292 uint16_t parts;
1293 uint16_t on_blocks;
1294 uint8_t sv;
1295
1296 sc = arg;
1297 on_blocks = sc->sc_on_blocks;
1298 DPRINTF(("%s: ym_powerdown_blocks: turning_off 0x%x\n",
1299 DVNAME(sc), sc->sc_turning_off));
1300
1301 mutex_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1302
1303 on_blocks = sc->sc_on_blocks;
1304
1305 /* Be sure not to change the state of the chip. Save it first. */
1306 sv = bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX);
1307
1308 parts = sc->sc_turning_off;
1309
1310 if (on_blocks & ~parts & YM_POWER_CODEC_CTL)
1311 parts &= ~(YM_POWER_CODEC_P | YM_POWER_CODEC_R);
1312 if (parts & YM_POWER_CODEC_CTL) {
1313 if ((on_blocks & YM_POWER_CODEC_P) == 0)
1314 parts |= YM_POWER_CODEC_P;
1315 if ((on_blocks & YM_POWER_CODEC_R) == 0)
1316 parts |= YM_POWER_CODEC_R;
1317 }
1318 parts &= ~YM_POWER_CODEC_PSEUDO;
1319
1320 /* If CODEC is being off, save the state. */
1321 if ((sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) &&
1322 (sc->sc_on_blocks & ~sc->sc_turning_off &
1323 YM_POWER_CODEC_DIGITAL) == 0)
1324 ym_save_codec_regs(sc);
1325
1326 if (YM_IS_SA3(sc)) {
1327 /* OPL3-SA3 */
1328 ym_write(sc, SA3_DPWRDWN,
1329 ym_read(sc, SA3_DPWRDWN) | (u_int8_t) parts);
1330 ym_write(sc, SA3_APWRDWN,
1331 ym_read(sc, SA3_APWRDWN) | (parts >> 8));
1332 } else {
1333 /* OPL3-SA2 (only OPL3 can be off partially) */
1334 if (parts & YM_POWER_OPL3)
1335 ym_write(sc, SA3_PWR_MNG,
1336 ym_read(sc, SA3_PWR_MNG) | SA2_PWR_MNG_FMPS);
1337 }
1338
1339 if (((sc->sc_on_blocks &= ~sc->sc_turning_off) & YM_POWER_ACTIVE) == 0)
1340 ym_chip_powerdown(sc);
1341
1342 sc->sc_turning_off = 0;
1343
1344 /* Restore the state of the chip. */
1345 bus_space_write_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX, sv);
1346
1347 mutex_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1348 }
1349
1350 /*
1351 * Power control entry point.
1352 */
1353 void
1354 ym_power_ctl(struct ym_softc *sc, int parts, int onoff)
1355 {
1356 int need_restore_codec;
1357
1358 DPRINTF(("%s: ym_power_ctl: parts = 0x%x, %s\n",
1359 DVNAME(sc), parts, onoff ? "on" : "off"));
1360
1361 #ifdef DIAGNOSTIC
1362 if (curproc == NULL)
1363 panic("ym_power_ctl: no curproc");
1364 #endif
1365 /* This function may sleep --- needs locking. */
1366 while (sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) {
1367 sc->sc_in_power_ctl |= YM_POWER_CTL_WANTED;
1368 DPRINTF(("%s: ym_power_ctl: sleeping\n", DVNAME(sc)));
1369 tsleep(&sc->sc_in_power_ctl, PWAIT, "ym_pc", 0);
1370 DPRINTF(("%s: ym_power_ctl: awaken\n", DVNAME(sc)));
1371 }
1372 sc->sc_in_power_ctl |= YM_POWER_CTL_INUSE;
1373
1374 /* Defeat softclock interrupts. */
1375 mutex_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1376
1377 /* If ON requested to parts which are scheduled to OFF, cancel it. */
1378 if (onoff && sc->sc_turning_off && (sc->sc_turning_off &= ~parts) == 0)
1379 callout_stop(&sc->sc_powerdown_ch);
1380
1381 if (!onoff && sc->sc_turning_off)
1382 parts &= ~sc->sc_turning_off;
1383
1384 /* Discard bits which are currently {on,off}. */
1385 parts &= onoff ? ~sc->sc_on_blocks : sc->sc_on_blocks;
1386
1387 /* Cancel previous timeout if needed. */
1388 if (parts != 0 && sc->sc_turning_off)
1389 callout_stop(&sc->sc_powerdown_ch);
1390
1391 mutex_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1392
1393 if (parts == 0)
1394 goto unlock; /* no work to do */
1395
1396 if (onoff) {
1397 /* Turning on is done immediately. */
1398
1399 /* If the chip is off, turn it on. */
1400 if ((sc->sc_on_blocks & YM_POWER_ACTIVE) == 0)
1401 ym_chip_powerup(sc, 0);
1402
1403 need_restore_codec = (parts & YM_POWER_CODEC_DIGITAL) &&
1404 (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) == 0;
1405
1406 sc->sc_on_blocks |= parts;
1407 if (parts & YM_POWER_CODEC_CTL)
1408 parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_R;
1409
1410 mutex_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1411
1412 if (YM_IS_SA3(sc)) {
1413 /* OPL3-SA3 */
1414 ym_write(sc, SA3_DPWRDWN,
1415 ym_read(sc, SA3_DPWRDWN) & (u_int8_t)~parts);
1416 ym_write(sc, SA3_APWRDWN,
1417 ym_read(sc, SA3_APWRDWN) & ~(parts >> 8));
1418 } else {
1419 /* OPL3-SA2 (only OPL3 can be off partially) */
1420 if (parts & YM_POWER_OPL3)
1421 ym_write(sc, SA3_PWR_MNG,
1422 ym_read(sc, SA3_PWR_MNG)
1423 & ~SA2_PWR_MNG_FMPS);
1424 }
1425 if (need_restore_codec)
1426 ym_restore_codec_regs(sc);
1427
1428 mutex_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1429 } else {
1430 /* Turning off is delayed. */
1431 sc->sc_turning_off |= parts;
1432 }
1433
1434 /* Schedule turning off. */
1435 if (sc->sc_pow_mode != YM_POWER_NOSAVE && sc->sc_turning_off)
1436 callout_reset(&sc->sc_powerdown_ch, hz * sc->sc_pow_timeout,
1437 ym_powerdown_blocks, sc);
1438
1439 unlock:
1440 if (sc->sc_in_power_ctl & YM_POWER_CTL_WANTED)
1441 wakeup(&sc->sc_in_power_ctl);
1442 sc->sc_in_power_ctl = 0;
1443 }
1444 #endif /* not AUDIO_NO_POWER_CTL */
1445