ym.c revision 1.35.12.2 1 /* $NetBSD: ym.c,v 1.35.12.2 2008/12/12 23:06:57 ad Exp $ */
2
3 /*-
4 * Copyright (c) 1999-2002, 2008 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by ITOH Yasufumi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /*
33 * Copyright (c) 1998 Constantine Sapuntzakis. All rights reserved.
34 *
35 * Redistribution and use in source and binary forms, with or without
36 * modification, are permitted provided that the following conditions
37 * are met:
38 * 1. Redistributions of source code must retain the above copyright
39 * notice, this list of conditions and the following disclaimer.
40 * 2. Redistributions in binary form must reproduce the above copyright
41 * notice, this list of conditions and the following disclaimer in the
42 * documentation and/or other materials provided with the distribution.
43 * 3. The name of the author may not be used to endorse or promote products
44 * derived from this software without specific prior written permission.
45 *
46 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
47 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
48 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
49 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
50 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
51 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
52 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
53 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
54 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
55 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56 */
57
58 /*
59 * Original code from OpenBSD.
60 */
61
62 #include <sys/cdefs.h>
63 __KERNEL_RCSID(0, "$NetBSD: ym.c,v 1.35.12.2 2008/12/12 23:06:57 ad Exp $");
64
65 #include "mpu_ym.h"
66 #include "opt_ym.h"
67
68 #include <sys/param.h>
69 #include <sys/systm.h>
70 #include <sys/errno.h>
71 #include <sys/device.h>
72 #include <sys/fcntl.h>
73 #include <sys/kernel.h>
74 #include <sys/proc.h>
75
76 #include <sys/cpu.h>
77 #include <sys/intr.h>
78 #include <sys/bus.h>
79
80 #include <sys/audioio.h>
81 #include <dev/audio_if.h>
82
83 #include <dev/isa/isavar.h>
84 #include <dev/isa/isadmavar.h>
85
86 #include <dev/ic/ad1848reg.h>
87 #include <dev/isa/ad1848var.h>
88 #include <dev/ic/opl3sa3reg.h>
89 #include <dev/isa/wssreg.h>
90 #if NMPU_YM > 0
91 #include <dev/ic/mpuvar.h>
92 #endif
93 #include <dev/isa/ymvar.h>
94 #include <dev/isa/sbreg.h>
95
96 /* Power management mode. */
97 #ifndef YM_POWER_MODE
98 #define YM_POWER_MODE YM_POWER_POWERSAVE
99 #endif
100
101 /* Time in second before power down the chip. */
102 #ifndef YM_POWER_OFF_SEC
103 #define YM_POWER_OFF_SEC 5
104 #endif
105
106 /* Default mixer settings. */
107 #ifndef YM_VOL_MASTER
108 #define YM_VOL_MASTER 208
109 #endif
110
111 #ifndef YM_VOL_DAC
112 #define YM_VOL_DAC 224
113 #endif
114
115 #ifndef YM_VOL_OPL3
116 #define YM_VOL_OPL3 184
117 #endif
118
119 /*
120 * Default position of the equalizer.
121 */
122 #ifndef YM_DEFAULT_TREBLE
123 #define YM_DEFAULT_TREBLE YM_EQ_FLAT_OFFSET
124 #endif
125 #ifndef YM_DEFAULT_BASS
126 #define YM_DEFAULT_BASS YM_EQ_FLAT_OFFSET
127 #endif
128
129 #ifdef __i386__ /* XXX */
130 # include "joy.h"
131 #else
132 # define NJOY 0
133 #endif
134
135 #ifdef AUDIO_DEBUG
136 #define DPRINTF(x) if (ymdebug) printf x
137 int ymdebug = 0;
138 #else
139 #define DPRINTF(x)
140 #endif
141 #define DVNAME(softc) (device_xname(&(softc)->sc_ad1848.sc_ad1848.sc_dev))
142
143 int ym_getdev(void *, struct audio_device *);
144 int ym_mixer_set_port(void *, mixer_ctrl_t *);
145 int ym_mixer_get_port(void *, mixer_ctrl_t *);
146 int ym_query_devinfo(void *, mixer_devinfo_t *);
147 int ym_intr(void *);
148 #ifndef AUDIO_NO_POWER_CTL
149 static void ym_save_codec_regs(struct ym_softc *);
150 static void ym_restore_codec_regs(struct ym_softc *);
151 void ym_power_hook(int, void *);
152 int ym_codec_power_ctl(void *, int);
153 static void ym_chip_powerdown(struct ym_softc *);
154 static void ym_chip_powerup(struct ym_softc *, int);
155 static void ym_powerdown_blocks(struct ym_softc *);
156 static void ym_powerdown_callout(void *);
157 void ym_power_ctl(struct ym_softc *, int, int);
158 #endif
159
160 static void ym_init(struct ym_softc *);
161 static void ym_mute(struct ym_softc *, int, int);
162 static void ym_set_master_gain(struct ym_softc *, struct ad1848_volume*);
163 static void ym_hvol_to_master_gain(struct ym_softc *);
164 static void ym_set_mic_gain(struct ym_softc *, int);
165 static void ym_set_3d(struct ym_softc *, mixer_ctrl_t *,
166 struct ad1848_volume *, int);
167
168
169 const struct audio_hw_if ym_hw_if = {
170 ad1848_isa_open,
171 ad1848_isa_close,
172 NULL,
173 ad1848_query_encoding,
174 ad1848_set_params,
175 ad1848_round_blocksize,
176 ad1848_commit_settings,
177 NULL,
178 NULL,
179 NULL,
180 NULL,
181 ad1848_isa_halt_output,
182 ad1848_isa_halt_input,
183 NULL,
184 ym_getdev,
185 NULL,
186 ym_mixer_set_port,
187 ym_mixer_get_port,
188 ym_query_devinfo,
189 ad1848_isa_malloc,
190 ad1848_isa_free,
191 ad1848_isa_round_buffersize,
192 ad1848_isa_mappage,
193 ad1848_isa_get_props,
194 ad1848_isa_trigger_output,
195 ad1848_isa_trigger_input,
196 NULL,
197 NULL, /* powerstate */
198 ad1848_get_locks,
199 };
200
201 static inline int ym_read(struct ym_softc *, int);
202 static inline void ym_write(struct ym_softc *, int, int);
203
204 void
205 ym_attach(struct ym_softc *sc)
206 {
207 static struct ad1848_volume vol_master = {YM_VOL_MASTER, YM_VOL_MASTER};
208 static struct ad1848_volume vol_dac = {YM_VOL_DAC, YM_VOL_DAC};
209 static struct ad1848_volume vol_opl3 = {YM_VOL_OPL3, YM_VOL_OPL3};
210 struct ad1848_softc *ac;
211 mixer_ctrl_t mctl;
212 struct audio_attach_args arg;
213
214 ac = &sc->sc_ad1848.sc_ad1848;
215 callout_init(&sc->sc_powerdown_ch, CALLOUT_MPSAFE);
216 cv_init(&sc->sc_cv, "ym");
217 ad1848_init_locks(ac, IPL_SCHED);
218
219 /* Mute the output to reduce noise during initialization. */
220 ym_mute(sc, SA3_VOL_L, 1);
221 ym_mute(sc, SA3_VOL_R, 1);
222
223 sc->sc_version = ym_read(sc, SA3_MISC) & SA3_MISC_VER;
224 ac->chip_name = YM_IS_SA3(sc) ? "OPL3-SA3" : "OPL3-SA2";
225
226 sc->sc_ad1848.sc_ih = isa_intr_establish(sc->sc_ic, sc->ym_irq,
227 IST_EDGE, IPL_SCHED, ym_intr, sc);
228
229 #ifndef AUDIO_NO_POWER_CTL
230 sc->sc_ad1848.powerctl = ym_codec_power_ctl;
231 sc->sc_ad1848.powerarg = sc;
232 #endif
233 ad1848_isa_attach(&sc->sc_ad1848);
234 printf("\n");
235 ac->parent = sc;
236
237 /* Establish chip in well known mode */
238 ym_set_master_gain(sc, &vol_master);
239 ym_set_mic_gain(sc, 0);
240 sc->master_mute = 0;
241
242 /* Override ad1848 settings. */
243 ad1848_set_channel_gain(ac, AD1848_DAC_CHANNEL, &vol_dac);
244 ad1848_set_channel_gain(ac, AD1848_AUX2_CHANNEL, &vol_opl3);
245
246 /*
247 * Mute all external sources. If you change this, you must
248 * also change the initial value of sc->sc_external_sources
249 * (currently 0 --- no external source is active).
250 */
251 sc->mic_mute = 1;
252 ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
253 ad1848_mute_channel(ac, AD1848_AUX1_CHANNEL, MUTE_ALL); /* CD */
254 ad1848_mute_channel(ac, AD1848_LINE_CHANNEL, MUTE_ALL); /* line */
255 ac->mute[AD1848_AUX1_CHANNEL] = MUTE_ALL;
256 ac->mute[AD1848_LINE_CHANNEL] = MUTE_ALL;
257 /* speaker is muted by default */
258
259 /* We use only one IRQ (IRQ-A). */
260 ym_write(sc, SA3_IRQ_CONF, SA3_IRQ_CONF_MPU_A | SA3_IRQ_CONF_WSS_A);
261 ym_write(sc, SA3_HVOL_INTR_CNF, SA3_HVOL_INTR_CNF_A);
262
263 /* audio at ym attachment */
264 sc->sc_audiodev = audio_attach_mi(&ym_hw_if, ac, &ac->sc_dev);
265
266 /* opl at ym attachment */
267 if (sc->sc_opl_ioh) {
268 arg.type = AUDIODEV_TYPE_OPL;
269 arg.hwif = 0;
270 arg.hdl = 0;
271 (void)config_found(&ac->sc_dev, &arg, audioprint);
272 }
273
274 #if NMPU_YM > 0
275 /* mpu at ym attachment */
276 if (sc->sc_mpu_ioh) {
277 arg.type = AUDIODEV_TYPE_MPU;
278 arg.hwif = 0;
279 arg.hdl = 0;
280 sc->sc_mpudev = config_found(&ac->sc_dev, &arg, audioprint);
281 }
282 #endif
283
284 /* This must be AFTER the attachment of sub-devices. */
285 mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
286 ym_init(sc);
287
288 #ifndef AUDIO_NO_POWER_CTL
289 /*
290 * Initialize power control.
291 */
292 sc->sc_pow_mode = YM_POWER_MODE;
293 sc->sc_pow_timeout = YM_POWER_OFF_SEC;
294
295 sc->sc_on_blocks = sc->sc_turning_off =
296 YM_POWER_CODEC_P | YM_POWER_CODEC_R |
297 YM_POWER_OPL3 | YM_POWER_MPU401 | YM_POWER_3D |
298 YM_POWER_CODEC_DA | YM_POWER_CODEC_AD | YM_POWER_OPL3_DA;
299 #if NJOY > 0
300 sc->sc_on_blocks |= YM_POWER_JOYSTICK; /* prevents chip powerdown */
301 #endif
302 ym_powerdown_blocks(sc);
303 mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
304
305 powerhook_establish(DVNAME(sc), ym_power_hook, sc);
306 #endif
307
308 /* Set tone control to the default position. */
309 mctl.un.value.num_channels = 1;
310 mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_TREBLE;
311 mctl.dev = YM_MASTER_TREBLE;
312 ym_mixer_set_port(sc, &mctl);
313 mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_BASS;
314 mctl.dev = YM_MASTER_BASS;
315 ym_mixer_set_port(sc, &mctl);
316
317 /* Unmute the output now if the chip is on. */
318 #ifndef AUDIO_NO_POWER_CTL
319 if (sc->sc_on_blocks & YM_POWER_ACTIVE)
320 #endif
321 {
322 ym_mute(sc, SA3_VOL_L, sc->master_mute);
323 ym_mute(sc, SA3_VOL_R, sc->master_mute);
324 }
325 }
326
327 static inline int
328 ym_read(struct ym_softc *sc, int reg)
329 {
330
331 bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
332 SA3_CTL_INDEX, (reg & 0xff));
333 return bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_DATA);
334 }
335
336 static inline void
337 ym_write(struct ym_softc *sc, int reg, int data)
338 {
339
340 bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
341 SA3_CTL_INDEX, (reg & 0xff));
342 bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
343 SA3_CTL_DATA, (data & 0xff));
344 }
345
346 static void
347 ym_init(struct ym_softc *sc)
348 {
349 uint8_t dpd, apd;
350
351 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
352
353 /* Mute SoundBlaster output if possible. */
354 if (sc->sc_sb_ioh) {
355 bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_ADDR,
356 SBP_MASTER_VOL);
357 bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_DATA,
358 0x00);
359 }
360
361 if (!YM_IS_SA3(sc)) {
362 /* OPL3-SA2 */
363 ym_write(sc, SA3_PWR_MNG, SA2_PWR_MNG_CLKO |
364 (sc->sc_opl_ioh == 0 ? SA2_PWR_MNG_FMPS : 0));
365 return;
366 }
367
368 /* OPL3-SA3 */
369 /* Figure out which part can be power down. */
370 dpd = SA3_DPWRDWN_SB /* we never use SB */
371 #if NMPU_YM > 0
372 | (sc->sc_mpu_ioh ? 0 : SA3_DPWRDWN_MPU)
373 #else
374 | SA3_DPWRDWN_MPU
375 #endif
376 #if NJOY == 0
377 | SA3_DPWRDWN_JOY
378 #endif
379 | SA3_DPWRDWN_PNP /* ISA Plug and Play is done */
380 /*
381 * The master clock is for external wavetable synthesizer
382 * OPL4-ML (YMF704) or OPL4-ML2 (YMF721),
383 * and is currently unused.
384 */
385 | SA3_DPWRDWN_MCLKO;
386
387 apd = SA3_APWRDWN_SBDAC; /* we never use SB */
388
389 /* Power down OPL3 if not attached. */
390 if (sc->sc_opl_ioh == 0) {
391 dpd |= SA3_DPWRDWN_FM;
392 apd |= SA3_APWRDWN_FMDAC;
393 }
394 /* CODEC is always attached. */
395
396 /* Power down unused digital parts. */
397 ym_write(sc, SA3_DPWRDWN, dpd);
398
399 /* Power down unused analog parts. */
400 ym_write(sc, SA3_APWRDWN, apd);
401 }
402
403
404 int
405 ym_getdev(void *addr, struct audio_device *retp)
406 {
407 struct ym_softc *sc;
408 struct ad1848_softc *ac;
409
410 sc = addr;
411 ac = &sc->sc_ad1848.sc_ad1848;
412 strlcpy(retp->name, ac->chip_name, sizeof(retp->name));
413 snprintf(retp->version, sizeof(retp->version), "%d", sc->sc_version);
414 strlcpy(retp->config, "ym", sizeof(retp->config));
415
416 return 0;
417 }
418
419
420 static ad1848_devmap_t mappings[] = {
421 { YM_DAC_LVL, AD1848_KIND_LVL, AD1848_DAC_CHANNEL },
422 { YM_MIDI_LVL, AD1848_KIND_LVL, AD1848_AUX2_CHANNEL },
423 { YM_CD_LVL, AD1848_KIND_LVL, AD1848_AUX1_CHANNEL },
424 { YM_LINE_LVL, AD1848_KIND_LVL, AD1848_LINE_CHANNEL },
425 { YM_SPEAKER_LVL, AD1848_KIND_LVL, AD1848_MONO_CHANNEL },
426 { YM_MONITOR_LVL, AD1848_KIND_LVL, AD1848_MONITOR_CHANNEL },
427 { YM_DAC_MUTE, AD1848_KIND_MUTE, AD1848_DAC_CHANNEL },
428 { YM_MIDI_MUTE, AD1848_KIND_MUTE, AD1848_AUX2_CHANNEL },
429 { YM_CD_MUTE, AD1848_KIND_MUTE, AD1848_AUX1_CHANNEL },
430 { YM_LINE_MUTE, AD1848_KIND_MUTE, AD1848_LINE_CHANNEL },
431 { YM_SPEAKER_MUTE, AD1848_KIND_MUTE, AD1848_MONO_CHANNEL },
432 { YM_MONITOR_MUTE, AD1848_KIND_MUTE, AD1848_MONITOR_CHANNEL },
433 { YM_REC_LVL, AD1848_KIND_RECORDGAIN, -1 },
434 { YM_RECORD_SOURCE, AD1848_KIND_RECORDSOURCE, -1}
435 };
436
437 #define NUMMAP (sizeof(mappings) / sizeof(mappings[0]))
438
439
440 static void
441 ym_mute(struct ym_softc *sc, int left_reg, int mute)
442 {
443 uint8_t reg;
444
445 reg = ym_read(sc, left_reg);
446 if (mute)
447 ym_write(sc, left_reg, reg | 0x80);
448 else
449 ym_write(sc, left_reg, reg & ~0x80);
450 }
451
452
453 static void
454 ym_set_master_gain(struct ym_softc *sc, struct ad1848_volume *vol)
455 {
456 u_int atten;
457
458 sc->master_gain = *vol;
459
460 atten = ((AUDIO_MAX_GAIN - vol->left) * (SA3_VOL_MV + 1)) /
461 (AUDIO_MAX_GAIN + 1);
462
463 ym_write(sc, SA3_VOL_L, (ym_read(sc, SA3_VOL_L) & ~SA3_VOL_MV) | atten);
464
465 atten = ((AUDIO_MAX_GAIN - vol->right) * (SA3_VOL_MV + 1)) /
466 (AUDIO_MAX_GAIN + 1);
467
468 ym_write(sc, SA3_VOL_R, (ym_read(sc, SA3_VOL_R) & ~SA3_VOL_MV) | atten);
469 }
470
471 /*
472 * Read current setting of master volume from hardware
473 * and update the software value if changed.
474 * [SA3] This function clears hardware volume interrupt.
475 */
476 static void
477 ym_hvol_to_master_gain(struct ym_softc *sc)
478 {
479 u_int prevval, val;
480 int changed;
481
482 changed = 0;
483 val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_L);
484 prevval = (sc->master_gain.left * (SA3_VOL_MV + 1)) /
485 (AUDIO_MAX_GAIN + 1);
486 if (val != prevval) {
487 sc->master_gain.left =
488 val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
489 changed = 1;
490 }
491
492 val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_R);
493 prevval = (sc->master_gain.right * (SA3_VOL_MV + 1)) /
494 (AUDIO_MAX_GAIN + 1);
495 if (val != prevval) {
496 sc->master_gain.right =
497 val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
498 changed = 1;
499 }
500
501 #if 0 /* XXX NOT YET */
502 /* Notify the change to async processes. */
503 if (changed && sc->sc_audiodev)
504 mixer_signal(sc->sc_audiodev);
505 #endif
506 }
507
508 static void
509 ym_set_mic_gain(struct ym_softc *sc, int vol)
510 {
511 u_int atten;
512
513 sc->mic_gain = vol;
514
515 atten = ((AUDIO_MAX_GAIN - vol) * (SA3_MIC_MCV + 1)) /
516 (AUDIO_MAX_GAIN + 1);
517
518 ym_write(sc, SA3_MIC_VOL,
519 (ym_read(sc, SA3_MIC_VOL) & ~SA3_MIC_MCV) | atten);
520 }
521
522 static void
523 ym_set_3d(struct ym_softc *sc, mixer_ctrl_t *cp,
524 struct ad1848_volume *val, int reg)
525 {
526 uint8_t l, r, e;
527
528 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
529
530 ad1848_to_vol(cp, val);
531
532 l = val->left;
533 r = val->right;
534 if (reg != SA3_3D_WIDE) {
535 /* flat on center */
536 l = YM_EQ_EXPAND_VALUE(l);
537 r = YM_EQ_EXPAND_VALUE(r);
538 }
539
540 e = (l * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
541 (AUDIO_MAX_GAIN + 1) << SA3_3D_LSHIFT |
542 (r * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
543 (AUDIO_MAX_GAIN + 1) << SA3_3D_RSHIFT;
544
545 #ifndef AUDIO_NO_POWER_CTL
546 /* turn wide stereo on if necessary */
547 if (e)
548 ym_power_ctl(sc, YM_POWER_3D, 1);
549 #endif
550
551 ym_write(sc, reg, e);
552
553 #ifndef AUDIO_NO_POWER_CTL
554 /* turn wide stereo off if necessary */
555 if (YM_EQ_OFF(&sc->sc_treble) && YM_EQ_OFF(&sc->sc_bass) &&
556 YM_WIDE_OFF(&sc->sc_wide))
557 ym_power_ctl(sc, YM_POWER_3D, 0);
558 #endif
559 }
560
561 int
562 ym_mixer_set_port(void *addr, mixer_ctrl_t *cp)
563 {
564 struct ad1848_softc *ac;
565 struct ym_softc *sc;
566 struct ad1848_volume vol;
567 int error;
568 uint8_t extsources;
569
570 ac = addr;
571 sc = ac->parent;
572 error = 0;
573 DPRINTF(("%s: ym_mixer_set_port: dev 0x%x, type 0x%x, 0x%x (%d; %d, %d)\n",
574 DVNAME(sc), cp->dev, cp->type, cp->un.ord,
575 cp->un.value.num_channels, cp->un.value.level[0],
576 cp->un.value.level[1]));
577
578 /* SA2 doesn't have equalizer */
579 if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
580 return ENXIO;
581
582 mutex_spin_enter(&ac->sc_intr_lock);
583
584 #ifndef AUDIO_NO_POWER_CTL
585 /* Power-up chip */
586 ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
587 #endif
588
589 switch (cp->dev) {
590 case YM_OUTPUT_LVL:
591 ad1848_to_vol(cp, &vol);
592 ym_set_master_gain(sc, &vol);
593 goto out;
594
595 case YM_OUTPUT_MUTE:
596 sc->master_mute = (cp->un.ord != 0);
597 ym_mute(sc, SA3_VOL_L, sc->master_mute);
598 ym_mute(sc, SA3_VOL_R, sc->master_mute);
599 goto out;
600
601 case YM_MIC_LVL:
602 if (cp->un.value.num_channels != 1)
603 error = EINVAL;
604 else
605 ym_set_mic_gain(sc,
606 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
607 goto out;
608
609 case YM_MASTER_EQMODE:
610 sc->sc_eqmode = cp->un.ord & SA3_SYS_CTL_YMODE;
611 ym_write(sc, SA3_SYS_CTL, (ym_read(sc, SA3_SYS_CTL) &
612 ~SA3_SYS_CTL_YMODE) | sc->sc_eqmode);
613 goto out;
614
615 case YM_MASTER_TREBLE:
616 ym_set_3d(sc, cp, &sc->sc_treble, SA3_3D_TREBLE);
617 goto out;
618
619 case YM_MASTER_BASS:
620 ym_set_3d(sc, cp, &sc->sc_bass, SA3_3D_BASS);
621 goto out;
622
623 case YM_MASTER_WIDE:
624 ym_set_3d(sc, cp, &sc->sc_wide, SA3_3D_WIDE);
625 goto out;
626
627 #ifndef AUDIO_NO_POWER_CTL
628 case YM_PWR_MODE:
629 if ((unsigned) cp->un.ord > YM_POWER_NOSAVE)
630 error = EINVAL;
631 else
632 sc->sc_pow_mode = cp->un.ord;
633 goto out;
634
635 case YM_PWR_TIMEOUT:
636 if (cp->un.value.num_channels != 1)
637 error = EINVAL;
638 else
639 sc->sc_pow_timeout =
640 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
641 goto out;
642
643 /*
644 * Needs power-up to hear external sources.
645 */
646 case YM_CD_MUTE:
647 case YM_LINE_MUTE:
648 case YM_SPEAKER_MUTE:
649 case YM_MIC_MUTE:
650 extsources = YM_MIXER_TO_XS(cp->dev);
651 if (cp->un.ord) {
652 if ((sc->sc_external_sources &= ~extsources) == 0) {
653 /*
654 * All the external sources are muted
655 * --- no need to keep the chip on.
656 */
657 ym_power_ctl(sc, YM_POWER_EXT_SRC, 0);
658 DPRINTF(("%s: ym_mixer_set_port: off for ext\n",
659 DVNAME(sc)));
660 }
661 } else {
662 /* mute off - power-up the chip */
663 sc->sc_external_sources |= extsources;
664 ym_power_ctl(sc, YM_POWER_EXT_SRC, 1);
665 DPRINTF(("%s: ym_mixer_set_port: on for ext\n",
666 DVNAME(sc)));
667 }
668 break; /* fall to ad1848_mixer_set_port() */
669
670 /*
671 * Power on/off the playback part for monitoring.
672 */
673 case YM_MONITOR_MUTE:
674 if ((ac->open_mode & (FREAD | FWRITE)) == FREAD)
675 ym_power_ctl(sc, YM_POWER_CODEC_P | YM_POWER_CODEC_DA,
676 cp->un.ord == 0);
677 break; /* fall to ad1848_mixer_set_port() */
678 #endif
679 }
680
681 error = ad1848_mixer_set_port(ac, mappings, NUMMAP, cp);
682
683 if (error != ENXIO)
684 goto out;
685
686 error = 0;
687
688 switch (cp->dev) {
689 case YM_MIC_MUTE:
690 sc->mic_mute = (cp->un.ord != 0);
691 ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
692 break;
693
694 default:
695 error = ENXIO;
696 break;
697 }
698
699 out:
700 #ifndef AUDIO_NO_POWER_CTL
701 /* Power-down chip */
702 ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
703 #endif
704 mutex_spin_exit(&ac->sc_intr_lock);
705
706 return error;
707 }
708
709 int
710 ym_mixer_get_port(void *addr, mixer_ctrl_t *cp)
711 {
712 struct ad1848_softc *ac;
713 struct ym_softc *sc;
714 int error;
715
716 ac = addr;
717 sc = ac->parent;
718 /* SA2 doesn't have equalizer */
719 if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
720 return ENXIO;
721
722 switch (cp->dev) {
723 case YM_OUTPUT_LVL:
724 if (!YM_IS_SA3(sc)) {
725 /*
726 * SA2 doesn't have hardware volume interrupt.
727 * Read current value and update every time.
728 */
729 mutex_spin_enter(&ac->sc_intr_lock);
730 #ifndef AUDIO_NO_POWER_CTL
731 /* Power-up chip */
732 ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
733 #endif
734 ym_hvol_to_master_gain(sc);
735 #ifndef AUDIO_NO_POWER_CTL
736 /* Power-down chip */
737 ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
738 #endif
739 mutex_spin_exit(&ac->sc_intr_lock);
740 }
741 ad1848_from_vol(cp, &sc->master_gain);
742 return 0;
743
744 case YM_OUTPUT_MUTE:
745 cp->un.ord = sc->master_mute;
746 return 0;
747
748 case YM_MIC_LVL:
749 if (cp->un.value.num_channels != 1)
750 return EINVAL;
751 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->mic_gain;
752 return 0;
753
754 case YM_MASTER_EQMODE:
755 cp->un.ord = sc->sc_eqmode;
756 return 0;
757
758 case YM_MASTER_TREBLE:
759 ad1848_from_vol(cp, &sc->sc_treble);
760 return 0;
761
762 case YM_MASTER_BASS:
763 ad1848_from_vol(cp, &sc->sc_bass);
764 return 0;
765
766 case YM_MASTER_WIDE:
767 ad1848_from_vol(cp, &sc->sc_wide);
768 return 0;
769
770 #ifndef AUDIO_NO_POWER_CTL
771 case YM_PWR_MODE:
772 cp->un.ord = sc->sc_pow_mode;
773 return 0;
774
775 case YM_PWR_TIMEOUT:
776 if (cp->un.value.num_channels != 1)
777 return EINVAL;
778 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_pow_timeout;
779 return 0;
780 #endif
781 }
782
783 error = ad1848_mixer_get_port(ac, mappings, NUMMAP, cp);
784
785 if (error != ENXIO)
786 return error;
787
788 error = 0;
789
790 switch (cp->dev) {
791 case YM_MIC_MUTE:
792 cp->un.ord = sc->mic_mute;
793 break;
794
795 default:
796 error = ENXIO;
797 break;
798 }
799
800 return error;
801 }
802
803 static const char *mixer_classes[] = {
804 AudioCinputs, AudioCrecord, AudioCoutputs, AudioCmonitor,
805 #ifndef AUDIO_NO_POWER_CTL
806 AudioCpower,
807 #endif
808 AudioCequalization
809 };
810
811 int
812 ym_query_devinfo(void *addr, mixer_devinfo_t *dip)
813 {
814 static const char *mixer_port_names[] = {
815 AudioNdac, AudioNmidi, AudioNcd, AudioNline, AudioNspeaker,
816 AudioNmicrophone, AudioNmonitor
817 };
818 struct ad1848_softc *ac;
819 struct ym_softc *sc;
820
821 ac = addr;
822 sc = ac->parent;
823 /* SA2 doesn't have equalizer */
824 if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(dip->index))
825 return ENXIO;
826
827 dip->next = dip->prev = AUDIO_MIXER_LAST;
828
829 switch(dip->index) {
830 case YM_INPUT_CLASS:
831 case YM_OUTPUT_CLASS:
832 case YM_MONITOR_CLASS:
833 case YM_RECORD_CLASS:
834 #ifndef AUDIO_NO_POWER_CTL
835 case YM_PWR_CLASS:
836 #endif
837 case YM_EQ_CLASS:
838 dip->type = AUDIO_MIXER_CLASS;
839 dip->mixer_class = dip->index;
840 strcpy(dip->label.name,
841 mixer_classes[dip->index - YM_INPUT_CLASS]);
842 break;
843
844 case YM_DAC_LVL:
845 case YM_MIDI_LVL:
846 case YM_CD_LVL:
847 case YM_LINE_LVL:
848 case YM_SPEAKER_LVL:
849 case YM_MIC_LVL:
850 case YM_MONITOR_LVL:
851 dip->type = AUDIO_MIXER_VALUE;
852 if (dip->index == YM_MONITOR_LVL)
853 dip->mixer_class = YM_MONITOR_CLASS;
854 else
855 dip->mixer_class = YM_INPUT_CLASS;
856
857 dip->next = dip->index + 7;
858
859 strcpy(dip->label.name,
860 mixer_port_names[dip->index - YM_DAC_LVL]);
861
862 if (dip->index == YM_SPEAKER_LVL ||
863 dip->index == YM_MIC_LVL)
864 dip->un.v.num_channels = 1;
865 else
866 dip->un.v.num_channels = 2;
867
868 if (dip->index == YM_SPEAKER_LVL)
869 dip->un.v.delta = 1 << (8 - 4 /* valid bits */);
870 else if (dip->index == YM_DAC_LVL ||
871 dip->index == YM_MONITOR_LVL)
872 dip->un.v.delta = 1 << (8 - 6 /* valid bits */);
873 else
874 dip->un.v.delta = 1 << (8 - 5 /* valid bits */);
875
876 strcpy(dip->un.v.units.name, AudioNvolume);
877 break;
878
879 case YM_DAC_MUTE:
880 case YM_MIDI_MUTE:
881 case YM_CD_MUTE:
882 case YM_LINE_MUTE:
883 case YM_SPEAKER_MUTE:
884 case YM_MIC_MUTE:
885 case YM_MONITOR_MUTE:
886 if (dip->index == YM_MONITOR_MUTE)
887 dip->mixer_class = YM_MONITOR_CLASS;
888 else
889 dip->mixer_class = YM_INPUT_CLASS;
890 dip->type = AUDIO_MIXER_ENUM;
891 dip->prev = dip->index - 7;
892 mute:
893 strcpy(dip->label.name, AudioNmute);
894 dip->un.e.num_mem = 2;
895 strcpy(dip->un.e.member[0].label.name, AudioNoff);
896 dip->un.e.member[0].ord = 0;
897 strcpy(dip->un.e.member[1].label.name, AudioNon);
898 dip->un.e.member[1].ord = 1;
899 break;
900
901
902 case YM_OUTPUT_LVL:
903 dip->type = AUDIO_MIXER_VALUE;
904 dip->mixer_class = YM_OUTPUT_CLASS;
905 dip->next = YM_OUTPUT_MUTE;
906 strcpy(dip->label.name, AudioNmaster);
907 dip->un.v.num_channels = 2;
908 dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1);
909 strcpy(dip->un.v.units.name, AudioNvolume);
910 break;
911
912 case YM_OUTPUT_MUTE:
913 dip->mixer_class = YM_OUTPUT_CLASS;
914 dip->type = AUDIO_MIXER_ENUM;
915 dip->prev = YM_OUTPUT_LVL;
916 goto mute;
917
918
919 case YM_REC_LVL: /* record level */
920 dip->type = AUDIO_MIXER_VALUE;
921 dip->mixer_class = YM_RECORD_CLASS;
922 dip->next = YM_RECORD_SOURCE;
923 strcpy(dip->label.name, AudioNrecord);
924 dip->un.v.num_channels = 2;
925 dip->un.v.delta = 1 << (8 - 4 /* valid bits */);
926 strcpy(dip->un.v.units.name, AudioNvolume);
927 break;
928
929 case YM_RECORD_SOURCE:
930 dip->mixer_class = YM_RECORD_CLASS;
931 dip->type = AUDIO_MIXER_ENUM;
932 dip->prev = YM_REC_LVL;
933 strcpy(dip->label.name, AudioNsource);
934 dip->un.e.num_mem = 4;
935 strcpy(dip->un.e.member[0].label.name, AudioNmicrophone);
936 dip->un.e.member[0].ord = MIC_IN_PORT;
937 strcpy(dip->un.e.member[1].label.name, AudioNline);
938 dip->un.e.member[1].ord = LINE_IN_PORT;
939 strcpy(dip->un.e.member[2].label.name, AudioNdac);
940 dip->un.e.member[2].ord = DAC_IN_PORT;
941 strcpy(dip->un.e.member[3].label.name, AudioNcd);
942 dip->un.e.member[3].ord = AUX1_IN_PORT;
943 break;
944
945
946 case YM_MASTER_EQMODE:
947 dip->type = AUDIO_MIXER_ENUM;
948 dip->mixer_class = YM_EQ_CLASS;
949 strcpy(dip->label.name, AudioNmode);
950 strcpy(dip->un.v.units.name, AudioNmode);
951 dip->un.e.num_mem = 4;
952 strcpy(dip->un.e.member[0].label.name, AudioNdesktop);
953 dip->un.e.member[0].ord = SA3_SYS_CTL_YMODE0;
954 strcpy(dip->un.e.member[1].label.name, AudioNlaptop);
955 dip->un.e.member[1].ord = SA3_SYS_CTL_YMODE1;
956 strcpy(dip->un.e.member[2].label.name, AudioNsubnote);
957 dip->un.e.member[2].ord = SA3_SYS_CTL_YMODE2;
958 strcpy(dip->un.e.member[3].label.name, AudioNhifi);
959 dip->un.e.member[3].ord = SA3_SYS_CTL_YMODE3;
960 break;
961
962 case YM_MASTER_TREBLE:
963 dip->type = AUDIO_MIXER_VALUE;
964 dip->mixer_class = YM_EQ_CLASS;
965 strcpy(dip->label.name, AudioNtreble);
966 dip->un.v.num_channels = 2;
967 dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1)
968 >> YM_EQ_REDUCE_BIT;
969 strcpy(dip->un.v.units.name, AudioNtreble);
970 break;
971
972 case YM_MASTER_BASS:
973 dip->type = AUDIO_MIXER_VALUE;
974 dip->mixer_class = YM_EQ_CLASS;
975 strcpy(dip->label.name, AudioNbass);
976 dip->un.v.num_channels = 2;
977 dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1)
978 >> YM_EQ_REDUCE_BIT;
979 strcpy(dip->un.v.units.name, AudioNbass);
980 break;
981
982 case YM_MASTER_WIDE:
983 dip->type = AUDIO_MIXER_VALUE;
984 dip->mixer_class = YM_EQ_CLASS;
985 strcpy(dip->label.name, AudioNsurround);
986 dip->un.v.num_channels = 2;
987 dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1);
988 strcpy(dip->un.v.units.name, AudioNsurround);
989 break;
990
991
992 #ifndef AUDIO_NO_POWER_CTL
993 case YM_PWR_MODE:
994 dip->type = AUDIO_MIXER_ENUM;
995 dip->mixer_class = YM_PWR_CLASS;
996 dip->next = YM_PWR_TIMEOUT;
997 strcpy(dip->label.name, AudioNsave);
998 dip->un.e.num_mem = 3;
999 strcpy(dip->un.e.member[0].label.name, AudioNpowerdown);
1000 dip->un.e.member[0].ord = YM_POWER_POWERDOWN;
1001 strcpy(dip->un.e.member[1].label.name, AudioNpowersave);
1002 dip->un.e.member[1].ord = YM_POWER_POWERSAVE;
1003 strcpy(dip->un.e.member[2].label.name, AudioNnosave);
1004 dip->un.e.member[2].ord = YM_POWER_NOSAVE;
1005 break;
1006
1007 case YM_PWR_TIMEOUT:
1008 dip->type = AUDIO_MIXER_VALUE;
1009 dip->mixer_class = YM_PWR_CLASS;
1010 dip->prev = YM_PWR_MODE;
1011 strcpy(dip->label.name, AudioNtimeout);
1012 dip->un.v.num_channels = 1;
1013 strcpy(dip->un.v.units.name, AudioNtimeout);
1014 break;
1015 #endif /* not AUDIO_NO_POWER_CTL */
1016
1017 default:
1018 return ENXIO;
1019 /*NOTREACHED*/
1020 }
1021
1022 return 0;
1023 }
1024
1025 int
1026 ym_intr(void *arg)
1027 {
1028 struct ym_softc *sc = arg;
1029 #if NMPU_YM > 0
1030 struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev);
1031 #endif
1032 u_int8_t ist;
1033 int processed;
1034
1035 mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1036
1037 /* OPL3 timer is currently unused. */
1038 if (((ist = ym_read(sc, SA3_IRQA_STAT)) &
1039 ~(SA3_IRQ_STAT_SB|SA3_IRQ_STAT_OPL3)) == 0) {
1040 DPRINTF(("%s: ym_intr: spurious interrupt\n", DVNAME(sc)));
1041 mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1042 return 0;
1043 }
1044
1045 /* Process pending interrupts. */
1046 do {
1047 processed = 0;
1048 /*
1049 * CODEC interrupts.
1050 */
1051 if (ist & (SA3_IRQ_STAT_TI|SA3_IRQ_STAT_CI|SA3_IRQ_STAT_PI)) {
1052 ad1848_isa_intr(&sc->sc_ad1848);
1053 processed = 1;
1054 }
1055 #if NMPU_YM > 0
1056 /*
1057 * MPU401 interrupt.
1058 */
1059 if (ist & SA3_IRQ_STAT_MPU) {
1060 mpu_intr(sc_mpu);
1061 processed = 1;
1062 }
1063 #endif
1064 /*
1065 * Hardware volume interrupt (SA3 only).
1066 * Recalculate master volume from the hardware setting.
1067 */
1068 if ((ist & SA3_IRQ_STAT_MV) && YM_IS_SA3(sc)) {
1069 ym_hvol_to_master_gain(sc);
1070 processed = 1;
1071 }
1072 } while (processed && (ist = ym_read(sc, SA3_IRQA_STAT)));
1073
1074 mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1075 return 1;
1076 }
1077
1078
1079 #ifndef AUDIO_NO_POWER_CTL
1080 static void
1081 ym_save_codec_regs(struct ym_softc *sc)
1082 {
1083 struct ad1848_softc *ac;
1084 int i;
1085
1086 DPRINTF(("%s: ym_save_codec_regs\n", DVNAME(sc)));
1087 ac = &sc->sc_ad1848.sc_ad1848;
1088 for (i = 0; i <= 0x1f; i++)
1089 sc->sc_codec_scan[i] = ad_read(ac, i);
1090 }
1091
1092 static void
1093 ym_restore_codec_regs(struct ym_softc *sc)
1094 {
1095 struct ad1848_softc *ac;
1096 int i, t;
1097
1098 DPRINTF(("%s: ym_restore_codec_regs\n", DVNAME(sc)));
1099 ac = &sc->sc_ad1848.sc_ad1848;
1100 for (i = 0; i <= 0x1f; i++) {
1101 /*
1102 * Wait til the chip becomes ready.
1103 * This is required after suspend/resume.
1104 */
1105 for (t = 0;
1106 t < 100000 && ADREAD(ac, AD1848_IADDR) & SP_IN_INIT; t++)
1107 ;
1108 #ifdef AUDIO_DEBUG
1109 if (t)
1110 DPRINTF(("%s: ym_restore_codec_regs: reg %d, t %d\n",
1111 DVNAME(sc), i, t));
1112 #endif
1113 ad_write(ac, i, sc->sc_codec_scan[i]);
1114 }
1115 }
1116
1117 /*
1118 * Save and restore the state on suspending / resumning.
1119 *
1120 * XXX This is not complete.
1121 * Currently only the parameters, such as output gain, are restored.
1122 * DMA state should also be restored. FIXME.
1123 */
1124 void
1125 ym_power_hook(int why, void *v)
1126 {
1127 struct ym_softc *sc;
1128 int i, xmax;
1129
1130 sc = v;
1131 DPRINTF(("%s: ym_power_hook: why = %d\n", DVNAME(sc), why));
1132
1133 mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1134
1135 switch (why) {
1136 case PWR_SUSPEND:
1137 case PWR_STANDBY:
1138 /*
1139 * suspending...
1140 */
1141 callout_halt(&sc->sc_powerdown_ch,
1142 &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1143 if (sc->sc_turning_off)
1144 ym_powerdown_blocks(sc);
1145
1146 /*
1147 * Save CODEC registers.
1148 * Note that the registers read incorrect
1149 * if the CODEC part is in power-down mode.
1150 */
1151 if (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL)
1152 ym_save_codec_regs(sc);
1153
1154 /*
1155 * Save OPL3-SA3 control registers and power-down the chip.
1156 * Note that the registers read incorrect
1157 * if the chip is in global power-down mode.
1158 */
1159 sc->sc_sa3_scan[SA3_PWR_MNG] = ym_read(sc, SA3_PWR_MNG);
1160 if (sc->sc_on_blocks)
1161 ym_chip_powerdown(sc);
1162 break;
1163
1164 case PWR_RESUME:
1165 /*
1166 * resuming...
1167 */
1168 ym_chip_powerup(sc, 1);
1169 ym_init(sc); /* power-on CODEC */
1170
1171 /* Restore control registers. */
1172 xmax = YM_IS_SA3(sc)? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
1173 for (i = SA3_PWR_MNG + 1; i <= xmax; i++) {
1174 if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA ||
1175 i == SA3_DPWRDWN)
1176 continue;
1177 ym_write(sc, i, sc->sc_sa3_scan[i]);
1178 }
1179
1180 /* Restore CODEC registers (including mixer). */
1181 ym_restore_codec_regs(sc);
1182
1183 /* Restore global/digital power-down state. */
1184 ym_write(sc, SA3_PWR_MNG, sc->sc_sa3_scan[SA3_PWR_MNG]);
1185 if (YM_IS_SA3(sc))
1186 ym_write(sc, SA3_DPWRDWN, sc->sc_sa3_scan[SA3_DPWRDWN]);
1187 break;
1188 case PWR_SOFTSUSPEND:
1189 case PWR_SOFTSTANDBY:
1190 case PWR_SOFTRESUME:
1191 break;
1192 }
1193 mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1194 }
1195
1196 int
1197 ym_codec_power_ctl(void *arg, int flags)
1198 {
1199 struct ym_softc *sc;
1200 struct ad1848_softc *ac;
1201 int parts;
1202
1203 sc = arg;
1204 ac = &sc->sc_ad1848.sc_ad1848;
1205 DPRINTF(("%s: ym_codec_power_ctl: flags = 0x%x\n", DVNAME(sc), flags));
1206 KASSERT(mutex_owned(&ac->sc_intr_lock));
1207
1208 if (flags != 0) {
1209 parts = 0;
1210 if (flags & FREAD) {
1211 parts |= YM_POWER_CODEC_R | YM_POWER_CODEC_AD;
1212 if (ac->mute[AD1848_MONITOR_CHANNEL] == 0)
1213 parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
1214 }
1215 if (flags & FWRITE)
1216 parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
1217 } else
1218 parts = YM_POWER_CODEC_P | YM_POWER_CODEC_R |
1219 YM_POWER_CODEC_DA | YM_POWER_CODEC_AD;
1220
1221 ym_power_ctl(sc, parts, flags);
1222
1223 return 0;
1224 }
1225
1226 /*
1227 * Enter Power Save mode or Global Power Down mode.
1228 * Total dissipation becomes 5mA and 10uA (typ.) respective.
1229 */
1230 static void
1231 ym_chip_powerdown(struct ym_softc *sc)
1232 {
1233 int i, xmax;
1234
1235 DPRINTF(("%s: ym_chip_powerdown\n", DVNAME(sc)));
1236 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
1237
1238 xmax = YM_IS_SA3(sc) ? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
1239
1240 /* Save control registers. */
1241 for (i = SA3_PWR_MNG + 1; i <= xmax; i++) {
1242 if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA)
1243 continue;
1244 sc->sc_sa3_scan[i] = ym_read(sc, i);
1245 }
1246 ym_write(sc, SA3_PWR_MNG,
1247 (sc->sc_pow_mode == YM_POWER_POWERDOWN ?
1248 SA3_PWR_MNG_PDN : SA3_PWR_MNG_PSV) | SA3_PWR_MNG_PDX);
1249 }
1250
1251 /*
1252 * Power up from Power Save / Global Power Down Mode.
1253 */
1254 static void
1255 ym_chip_powerup(struct ym_softc *sc, int nosleep)
1256 {
1257 uint8_t pw;
1258
1259 DPRINTF(("%s: ym_chip_powerup\n", DVNAME(sc)));
1260 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
1261
1262 pw = ym_read(sc, SA3_PWR_MNG);
1263
1264 if ((pw & (SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN | SA3_PWR_MNG_PDX)) == 0)
1265 return; /* already on */
1266
1267 pw &= ~SA3_PWR_MNG_PDX;
1268 ym_write(sc, SA3_PWR_MNG, pw);
1269
1270 /* wait 100 ms */
1271 if (nosleep)
1272 delay(100000);
1273 else
1274 kpause("ym_pu1", false, hz / 10,
1275 &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1276
1277 pw &= ~(SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN);
1278 ym_write(sc, SA3_PWR_MNG, pw);
1279
1280 /* wait 70 ms */
1281 if (nosleep)
1282 delay(70000);
1283 else
1284 kpause("ym_pu1", false, hz / 10,
1285 &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1286
1287 /* The chip is muted automatically --- unmute it now. */
1288 ym_mute(sc, SA3_VOL_L, sc->master_mute);
1289 ym_mute(sc, SA3_VOL_R, sc->master_mute);
1290 }
1291
1292 /* callout handler for power-down */
1293 static void
1294 ym_powerdown_callout(void *arg)
1295 {
1296 struct ym_softc *sc;
1297
1298 sc = arg;
1299
1300 mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1301 if ((sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) == 0) {
1302 ym_powerdown_blocks(sc);
1303 }
1304 mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1305 }
1306
1307 static void
1308 ym_powerdown_blocks(struct ym_softc *sc)
1309 {
1310 uint16_t parts;
1311 uint16_t on_blocks;
1312 uint8_t sv;
1313
1314 on_blocks = sc->sc_on_blocks;
1315 DPRINTF(("%s: ym_powerdown_blocks: turning_off 0x%x\n",
1316 DVNAME(sc), sc->sc_turning_off));
1317 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
1318
1319 on_blocks = sc->sc_on_blocks;
1320
1321 /* Be sure not to change the state of the chip. Save it first. */
1322 sv = bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX);
1323
1324 parts = sc->sc_turning_off;
1325
1326 if (on_blocks & ~parts & YM_POWER_CODEC_CTL)
1327 parts &= ~(YM_POWER_CODEC_P | YM_POWER_CODEC_R);
1328 if (parts & YM_POWER_CODEC_CTL) {
1329 if ((on_blocks & YM_POWER_CODEC_P) == 0)
1330 parts |= YM_POWER_CODEC_P;
1331 if ((on_blocks & YM_POWER_CODEC_R) == 0)
1332 parts |= YM_POWER_CODEC_R;
1333 }
1334 parts &= ~YM_POWER_CODEC_PSEUDO;
1335
1336 /* If CODEC is being off, save the state. */
1337 if ((sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) &&
1338 (sc->sc_on_blocks & ~sc->sc_turning_off &
1339 YM_POWER_CODEC_DIGITAL) == 0)
1340 ym_save_codec_regs(sc);
1341
1342 if (YM_IS_SA3(sc)) {
1343 /* OPL3-SA3 */
1344 ym_write(sc, SA3_DPWRDWN,
1345 ym_read(sc, SA3_DPWRDWN) | (u_int8_t) parts);
1346 ym_write(sc, SA3_APWRDWN,
1347 ym_read(sc, SA3_APWRDWN) | (parts >> 8));
1348 } else {
1349 /* OPL3-SA2 (only OPL3 can be off partially) */
1350 if (parts & YM_POWER_OPL3)
1351 ym_write(sc, SA3_PWR_MNG,
1352 ym_read(sc, SA3_PWR_MNG) | SA2_PWR_MNG_FMPS);
1353 }
1354
1355 if (((sc->sc_on_blocks &= ~sc->sc_turning_off) & YM_POWER_ACTIVE) == 0)
1356 ym_chip_powerdown(sc);
1357
1358 sc->sc_turning_off = 0;
1359
1360 /* Restore the state of the chip. */
1361 bus_space_write_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX, sv);
1362 }
1363
1364 /*
1365 * Power control entry point.
1366 */
1367 void
1368 ym_power_ctl(struct ym_softc *sc, int parts, int onoff)
1369 {
1370 int need_restore_codec;
1371
1372 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
1373
1374 DPRINTF(("%s: ym_power_ctl: parts = 0x%x, %s\n",
1375 DVNAME(sc), parts, onoff ? "on" : "off"));
1376
1377 /* This function may sleep --- needs locking. */
1378 while (sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) {
1379 sc->sc_in_power_ctl |= YM_POWER_CTL_WANTED;
1380 DPRINTF(("%s: ym_power_ctl: sleeping\n", DVNAME(sc)));
1381 cv_wait(&sc->sc_cv, &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1382 DPRINTF(("%s: ym_power_ctl: awaken\n", DVNAME(sc)));
1383 }
1384 sc->sc_in_power_ctl |= YM_POWER_CTL_INUSE;
1385
1386 /* If ON requested to parts which are scheduled to OFF, cancel it. */
1387 if (onoff && sc->sc_turning_off && (sc->sc_turning_off &= ~parts) == 0)
1388 callout_halt(&sc->sc_powerdown_ch,
1389 &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1390
1391 if (!onoff && sc->sc_turning_off)
1392 parts &= ~sc->sc_turning_off;
1393
1394 /* Discard bits which are currently {on,off}. */
1395 parts &= onoff ? ~sc->sc_on_blocks : sc->sc_on_blocks;
1396
1397 /* Cancel previous timeout if needed. */
1398 if (parts != 0 && sc->sc_turning_off)
1399 callout_halt(&sc->sc_powerdown_ch,
1400 &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1401
1402 if (parts == 0)
1403 goto unlock; /* no work to do */
1404
1405 if (onoff) {
1406 /* Turning on is done immediately. */
1407
1408 /* If the chip is off, turn it on. */
1409 if ((sc->sc_on_blocks & YM_POWER_ACTIVE) == 0)
1410 ym_chip_powerup(sc, 0);
1411
1412 need_restore_codec = (parts & YM_POWER_CODEC_DIGITAL) &&
1413 (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) == 0;
1414
1415 sc->sc_on_blocks |= parts;
1416 if (parts & YM_POWER_CODEC_CTL)
1417 parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_R;
1418
1419 if (YM_IS_SA3(sc)) {
1420 /* OPL3-SA3 */
1421 ym_write(sc, SA3_DPWRDWN,
1422 ym_read(sc, SA3_DPWRDWN) & (u_int8_t)~parts);
1423 ym_write(sc, SA3_APWRDWN,
1424 ym_read(sc, SA3_APWRDWN) & ~(parts >> 8));
1425 } else {
1426 /* OPL3-SA2 (only OPL3 can be off partially) */
1427 if (parts & YM_POWER_OPL3)
1428 ym_write(sc, SA3_PWR_MNG,
1429 ym_read(sc, SA3_PWR_MNG)
1430 & ~SA2_PWR_MNG_FMPS);
1431 }
1432 if (need_restore_codec)
1433 ym_restore_codec_regs(sc);
1434 } else {
1435 /* Turning off is delayed. */
1436 sc->sc_turning_off |= parts;
1437 }
1438
1439 /* Schedule turning off. */
1440 if (sc->sc_pow_mode != YM_POWER_NOSAVE && sc->sc_turning_off)
1441 callout_reset(&sc->sc_powerdown_ch, hz * sc->sc_pow_timeout,
1442 ym_powerdown_callout, sc);
1443
1444 unlock:
1445 if (sc->sc_in_power_ctl & YM_POWER_CTL_WANTED)
1446 cv_broadcast(&sc->sc_cv);
1447 sc->sc_in_power_ctl = 0;
1448 }
1449 #endif /* not AUDIO_NO_POWER_CTL */
1450