ym.c revision 1.41.4.1
1 /* $NetBSD: ym.c,v 1.41.4.1 2011/11/19 21:49:39 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 1999-2002, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by ITOH Yasufumi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Copyright (c) 1998 Constantine Sapuntzakis. All rights reserved. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 1. Redistributions of source code must retain the above copyright 39 * notice, this list of conditions and the following disclaimer. 40 * 2. Redistributions in binary form must reproduce the above copyright 41 * notice, this list of conditions and the following disclaimer in the 42 * documentation and/or other materials provided with the distribution. 43 * 3. The name of the author may not be used to endorse or promote products 44 * derived from this software without specific prior written permission. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 47 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 48 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 49 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 50 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 51 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 52 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 53 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 54 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 55 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 56 */ 57 58 /* 59 * Original code from OpenBSD. 60 */ 61 62 #include <sys/cdefs.h> 63 __KERNEL_RCSID(0, "$NetBSD: ym.c,v 1.41.4.1 2011/11/19 21:49:39 jmcneill Exp $"); 64 65 #include "mpu_ym.h" 66 #include "opt_ym.h" 67 68 #include <sys/param.h> 69 #include <sys/systm.h> 70 #include <sys/errno.h> 71 #include <sys/device.h> 72 #include <sys/fcntl.h> 73 #include <sys/kernel.h> 74 #include <sys/proc.h> 75 76 #include <sys/cpu.h> 77 #include <sys/intr.h> 78 #include <sys/bus.h> 79 80 #include <sys/audioio.h> 81 #include <dev/audio_if.h> 82 83 #include <dev/isa/isavar.h> 84 #include <dev/isa/isadmavar.h> 85 86 #include <dev/ic/ad1848reg.h> 87 #include <dev/isa/ad1848var.h> 88 #include <dev/ic/opl3sa3reg.h> 89 #include <dev/isa/wssreg.h> 90 #if NMPU_YM > 0 91 #include <dev/ic/mpuvar.h> 92 #endif 93 #include <dev/isa/ymvar.h> 94 #include <dev/isa/sbreg.h> 95 96 /* Power management mode. */ 97 #ifndef YM_POWER_MODE 98 #define YM_POWER_MODE YM_POWER_POWERSAVE 99 #endif 100 101 /* Time in second before power down the chip. */ 102 #ifndef YM_POWER_OFF_SEC 103 #define YM_POWER_OFF_SEC 5 104 #endif 105 106 /* Default mixer settings. */ 107 #ifndef YM_VOL_MASTER 108 #define YM_VOL_MASTER 208 109 #endif 110 111 #ifndef YM_VOL_DAC 112 #define YM_VOL_DAC 224 113 #endif 114 115 #ifndef YM_VOL_OPL3 116 #define YM_VOL_OPL3 184 117 #endif 118 119 /* 120 * Default position of the equalizer. 121 */ 122 #ifndef YM_DEFAULT_TREBLE 123 #define YM_DEFAULT_TREBLE YM_EQ_FLAT_OFFSET 124 #endif 125 #ifndef YM_DEFAULT_BASS 126 #define YM_DEFAULT_BASS YM_EQ_FLAT_OFFSET 127 #endif 128 129 #ifdef __i386__ /* XXX */ 130 # include "joy.h" 131 #else 132 # define NJOY 0 133 #endif 134 135 #ifdef AUDIO_DEBUG 136 #define DPRINTF(x) if (ymdebug) printf x 137 int ymdebug = 0; 138 #else 139 #define DPRINTF(x) 140 #endif 141 #define DVNAME(softc) (device_xname((softc)->sc_ad1848.sc_ad1848.sc_dev)) 142 143 int ym_getdev(void *, struct audio_device *); 144 int ym_mixer_set_port(void *, mixer_ctrl_t *); 145 int ym_mixer_get_port(void *, mixer_ctrl_t *); 146 int ym_query_devinfo(void *, mixer_devinfo_t *); 147 int ym_intr(void *); 148 #ifndef AUDIO_NO_POWER_CTL 149 static void ym_save_codec_regs(struct ym_softc *); 150 static void ym_restore_codec_regs(struct ym_softc *); 151 int ym_codec_power_ctl(void *, int); 152 static void ym_chip_powerdown(struct ym_softc *); 153 static void ym_chip_powerup(struct ym_softc *, int); 154 static void ym_powerdown_blocks(struct ym_softc *); 155 static void ym_powerdown_callout(void *); 156 void ym_power_ctl(struct ym_softc *, int, int); 157 #endif 158 159 static void ym_init(struct ym_softc *); 160 static void ym_mute(struct ym_softc *, int, int); 161 static void ym_set_master_gain(struct ym_softc *, struct ad1848_volume*); 162 static void ym_hvol_to_master_gain(struct ym_softc *); 163 static void ym_set_mic_gain(struct ym_softc *, int); 164 static void ym_set_3d(struct ym_softc *, mixer_ctrl_t *, 165 struct ad1848_volume *, int); 166 static bool ym_suspend(device_t, const pmf_qual_t *); 167 static bool ym_resume(device_t, const pmf_qual_t *); 168 169 170 const struct audio_hw_if ym_hw_if = { 171 ad1848_isa_open, 172 ad1848_isa_close, 173 NULL, 174 ad1848_query_encoding, 175 ad1848_set_params, 176 ad1848_round_blocksize, 177 ad1848_commit_settings, 178 NULL, 179 NULL, 180 NULL, 181 NULL, 182 ad1848_isa_halt_output, 183 ad1848_isa_halt_input, 184 NULL, 185 ym_getdev, 186 NULL, 187 ym_mixer_set_port, 188 ym_mixer_get_port, 189 ym_query_devinfo, 190 ad1848_isa_malloc, 191 ad1848_isa_free, 192 ad1848_isa_round_buffersize, 193 ad1848_isa_mappage, 194 ad1848_isa_get_props, 195 ad1848_isa_trigger_output, 196 ad1848_isa_trigger_input, 197 NULL, 198 NULL, /* powerstate */ 199 ad1848_get_locks, 200 }; 201 202 static inline int ym_read(struct ym_softc *, int); 203 static inline void ym_write(struct ym_softc *, int, int); 204 205 void 206 ym_attach(struct ym_softc *sc) 207 { 208 static struct ad1848_volume vol_master = {YM_VOL_MASTER, YM_VOL_MASTER}; 209 static struct ad1848_volume vol_dac = {YM_VOL_DAC, YM_VOL_DAC}; 210 static struct ad1848_volume vol_opl3 = {YM_VOL_OPL3, YM_VOL_OPL3}; 211 struct ad1848_softc *ac; 212 mixer_ctrl_t mctl; 213 struct audio_attach_args arg; 214 215 ac = &sc->sc_ad1848.sc_ad1848; 216 callout_init(&sc->sc_powerdown_ch, CALLOUT_MPSAFE); 217 cv_init(&sc->sc_cv, "ym"); 218 ad1848_init_locks(ac, IPL_SCHED); 219 220 /* Mute the output to reduce noise during initialization. */ 221 ym_mute(sc, SA3_VOL_L, 1); 222 ym_mute(sc, SA3_VOL_R, 1); 223 224 sc->sc_version = ym_read(sc, SA3_MISC) & SA3_MISC_VER; 225 ac->chip_name = YM_IS_SA3(sc) ? "OPL3-SA3" : "OPL3-SA2"; 226 227 sc->sc_ad1848.sc_ih = isa_intr_establish(sc->sc_ic, sc->ym_irq, 228 IST_EDGE, IPL_SCHED, ym_intr, sc); 229 230 #ifndef AUDIO_NO_POWER_CTL 231 sc->sc_ad1848.powerctl = ym_codec_power_ctl; 232 sc->sc_ad1848.powerarg = sc; 233 #endif 234 ad1848_isa_attach(&sc->sc_ad1848); 235 printf("\n"); 236 ac->parent = sc; 237 238 /* Establish chip in well known mode */ 239 ym_set_master_gain(sc, &vol_master); 240 ym_set_mic_gain(sc, 0); 241 sc->master_mute = 0; 242 243 /* Override ad1848 settings. */ 244 ad1848_set_channel_gain(ac, AD1848_DAC_CHANNEL, &vol_dac); 245 ad1848_set_channel_gain(ac, AD1848_AUX2_CHANNEL, &vol_opl3); 246 247 /* 248 * Mute all external sources. If you change this, you must 249 * also change the initial value of sc->sc_external_sources 250 * (currently 0 --- no external source is active). 251 */ 252 sc->mic_mute = 1; 253 ym_mute(sc, SA3_MIC_VOL, sc->mic_mute); 254 ad1848_mute_channel(ac, AD1848_AUX1_CHANNEL, MUTE_ALL); /* CD */ 255 ad1848_mute_channel(ac, AD1848_LINE_CHANNEL, MUTE_ALL); /* line */ 256 ac->mute[AD1848_AUX1_CHANNEL] = MUTE_ALL; 257 ac->mute[AD1848_LINE_CHANNEL] = MUTE_ALL; 258 /* speaker is muted by default */ 259 260 /* We use only one IRQ (IRQ-A). */ 261 ym_write(sc, SA3_IRQ_CONF, SA3_IRQ_CONF_MPU_A | SA3_IRQ_CONF_WSS_A); 262 ym_write(sc, SA3_HVOL_INTR_CNF, SA3_HVOL_INTR_CNF_A); 263 264 /* audio at ym attachment */ 265 sc->sc_audiodev = audio_attach_mi(&ym_hw_if, ac, ac->sc_dev); 266 267 /* opl at ym attachment */ 268 if (sc->sc_opl_ioh) { 269 arg.type = AUDIODEV_TYPE_OPL; 270 arg.hwif = 0; 271 arg.hdl = 0; 272 (void)config_found(ac->sc_dev, &arg, audioprint); 273 } 274 275 #if NMPU_YM > 0 276 /* mpu at ym attachment */ 277 if (sc->sc_mpu_ioh) { 278 arg.type = AUDIODEV_TYPE_MPU; 279 arg.hwif = 0; 280 arg.hdl = 0; 281 sc->sc_mpudev = config_found(ac->sc_dev, &arg, audioprint); 282 } 283 #endif 284 285 /* This must be AFTER the attachment of sub-devices. */ 286 mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock); 287 ym_init(sc); 288 289 #ifndef AUDIO_NO_POWER_CTL 290 /* 291 * Initialize power control. 292 */ 293 sc->sc_pow_mode = YM_POWER_MODE; 294 sc->sc_pow_timeout = YM_POWER_OFF_SEC; 295 296 sc->sc_on_blocks = sc->sc_turning_off = 297 YM_POWER_CODEC_P | YM_POWER_CODEC_R | 298 YM_POWER_OPL3 | YM_POWER_MPU401 | YM_POWER_3D | 299 YM_POWER_CODEC_DA | YM_POWER_CODEC_AD | YM_POWER_OPL3_DA; 300 #if NJOY > 0 301 sc->sc_on_blocks |= YM_POWER_JOYSTICK; /* prevents chip powerdown */ 302 #endif 303 ym_powerdown_blocks(sc); 304 mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock); 305 306 if (!pmf_device_register(ac->sc_dev, ym_suspend, ym_resume)) { 307 aprint_error_dev(ac->sc_dev, 308 "cannot set power mgmt handler\n"); 309 } 310 #endif 311 312 /* Set tone control to the default position. */ 313 mctl.un.value.num_channels = 1; 314 mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_TREBLE; 315 mctl.dev = YM_MASTER_TREBLE; 316 ym_mixer_set_port(sc, &mctl); 317 mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_BASS; 318 mctl.dev = YM_MASTER_BASS; 319 ym_mixer_set_port(sc, &mctl); 320 321 /* Unmute the output now if the chip is on. */ 322 #ifndef AUDIO_NO_POWER_CTL 323 if (sc->sc_on_blocks & YM_POWER_ACTIVE) 324 #endif 325 { 326 ym_mute(sc, SA3_VOL_L, sc->master_mute); 327 ym_mute(sc, SA3_VOL_R, sc->master_mute); 328 } 329 } 330 331 static inline int 332 ym_read(struct ym_softc *sc, int reg) 333 { 334 335 bus_space_write_1(sc->sc_iot, sc->sc_controlioh, 336 SA3_CTL_INDEX, (reg & 0xff)); 337 return bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_DATA); 338 } 339 340 static inline void 341 ym_write(struct ym_softc *sc, int reg, int data) 342 { 343 344 bus_space_write_1(sc->sc_iot, sc->sc_controlioh, 345 SA3_CTL_INDEX, (reg & 0xff)); 346 bus_space_write_1(sc->sc_iot, sc->sc_controlioh, 347 SA3_CTL_DATA, (data & 0xff)); 348 } 349 350 static void 351 ym_init(struct ym_softc *sc) 352 { 353 uint8_t dpd, apd; 354 355 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock)); 356 357 /* Mute SoundBlaster output if possible. */ 358 if (sc->sc_sb_ioh) { 359 bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_ADDR, 360 SBP_MASTER_VOL); 361 bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_DATA, 362 0x00); 363 } 364 365 if (!YM_IS_SA3(sc)) { 366 /* OPL3-SA2 */ 367 ym_write(sc, SA3_PWR_MNG, SA2_PWR_MNG_CLKO | 368 (sc->sc_opl_ioh == 0 ? SA2_PWR_MNG_FMPS : 0)); 369 return; 370 } 371 372 /* OPL3-SA3 */ 373 /* Figure out which part can be power down. */ 374 dpd = SA3_DPWRDWN_SB /* we never use SB */ 375 #if NMPU_YM > 0 376 | (sc->sc_mpu_ioh ? 0 : SA3_DPWRDWN_MPU) 377 #else 378 | SA3_DPWRDWN_MPU 379 #endif 380 #if NJOY == 0 381 | SA3_DPWRDWN_JOY 382 #endif 383 | SA3_DPWRDWN_PNP /* ISA Plug and Play is done */ 384 /* 385 * The master clock is for external wavetable synthesizer 386 * OPL4-ML (YMF704) or OPL4-ML2 (YMF721), 387 * and is currently unused. 388 */ 389 | SA3_DPWRDWN_MCLKO; 390 391 apd = SA3_APWRDWN_SBDAC; /* we never use SB */ 392 393 /* Power down OPL3 if not attached. */ 394 if (sc->sc_opl_ioh == 0) { 395 dpd |= SA3_DPWRDWN_FM; 396 apd |= SA3_APWRDWN_FMDAC; 397 } 398 /* CODEC is always attached. */ 399 400 /* Power down unused digital parts. */ 401 ym_write(sc, SA3_DPWRDWN, dpd); 402 403 /* Power down unused analog parts. */ 404 ym_write(sc, SA3_APWRDWN, apd); 405 } 406 407 408 int 409 ym_getdev(void *addr, struct audio_device *retp) 410 { 411 struct ym_softc *sc; 412 struct ad1848_softc *ac; 413 414 sc = addr; 415 ac = &sc->sc_ad1848.sc_ad1848; 416 strlcpy(retp->name, ac->chip_name, sizeof(retp->name)); 417 snprintf(retp->version, sizeof(retp->version), "%d", sc->sc_version); 418 strlcpy(retp->config, "ym", sizeof(retp->config)); 419 420 return 0; 421 } 422 423 424 static ad1848_devmap_t mappings[] = { 425 { YM_DAC_LVL, AD1848_KIND_LVL, AD1848_DAC_CHANNEL }, 426 { YM_MIDI_LVL, AD1848_KIND_LVL, AD1848_AUX2_CHANNEL }, 427 { YM_CD_LVL, AD1848_KIND_LVL, AD1848_AUX1_CHANNEL }, 428 { YM_LINE_LVL, AD1848_KIND_LVL, AD1848_LINE_CHANNEL }, 429 { YM_SPEAKER_LVL, AD1848_KIND_LVL, AD1848_MONO_CHANNEL }, 430 { YM_MONITOR_LVL, AD1848_KIND_LVL, AD1848_MONITOR_CHANNEL }, 431 { YM_DAC_MUTE, AD1848_KIND_MUTE, AD1848_DAC_CHANNEL }, 432 { YM_MIDI_MUTE, AD1848_KIND_MUTE, AD1848_AUX2_CHANNEL }, 433 { YM_CD_MUTE, AD1848_KIND_MUTE, AD1848_AUX1_CHANNEL }, 434 { YM_LINE_MUTE, AD1848_KIND_MUTE, AD1848_LINE_CHANNEL }, 435 { YM_SPEAKER_MUTE, AD1848_KIND_MUTE, AD1848_MONO_CHANNEL }, 436 { YM_MONITOR_MUTE, AD1848_KIND_MUTE, AD1848_MONITOR_CHANNEL }, 437 { YM_REC_LVL, AD1848_KIND_RECORDGAIN, -1 }, 438 { YM_RECORD_SOURCE, AD1848_KIND_RECORDSOURCE, -1} 439 }; 440 441 #define NUMMAP (sizeof(mappings) / sizeof(mappings[0])) 442 443 444 static void 445 ym_mute(struct ym_softc *sc, int left_reg, int mute) 446 { 447 uint8_t reg; 448 449 reg = ym_read(sc, left_reg); 450 if (mute) 451 ym_write(sc, left_reg, reg | 0x80); 452 else 453 ym_write(sc, left_reg, reg & ~0x80); 454 } 455 456 457 static void 458 ym_set_master_gain(struct ym_softc *sc, struct ad1848_volume *vol) 459 { 460 u_int atten; 461 462 sc->master_gain = *vol; 463 464 atten = ((AUDIO_MAX_GAIN - vol->left) * (SA3_VOL_MV + 1)) / 465 (AUDIO_MAX_GAIN + 1); 466 467 ym_write(sc, SA3_VOL_L, (ym_read(sc, SA3_VOL_L) & ~SA3_VOL_MV) | atten); 468 469 atten = ((AUDIO_MAX_GAIN - vol->right) * (SA3_VOL_MV + 1)) / 470 (AUDIO_MAX_GAIN + 1); 471 472 ym_write(sc, SA3_VOL_R, (ym_read(sc, SA3_VOL_R) & ~SA3_VOL_MV) | atten); 473 } 474 475 /* 476 * Read current setting of master volume from hardware 477 * and update the software value if changed. 478 * [SA3] This function clears hardware volume interrupt. 479 */ 480 static void 481 ym_hvol_to_master_gain(struct ym_softc *sc) 482 { 483 u_int prevval, val; 484 int changed; 485 486 changed = 0; 487 val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_L); 488 prevval = (sc->master_gain.left * (SA3_VOL_MV + 1)) / 489 (AUDIO_MAX_GAIN + 1); 490 if (val != prevval) { 491 sc->master_gain.left = 492 val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1)); 493 changed = 1; 494 } 495 496 val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_R); 497 prevval = (sc->master_gain.right * (SA3_VOL_MV + 1)) / 498 (AUDIO_MAX_GAIN + 1); 499 if (val != prevval) { 500 sc->master_gain.right = 501 val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1)); 502 changed = 1; 503 } 504 505 #if 0 /* XXX NOT YET */ 506 /* Notify the change to async processes. */ 507 if (changed && sc->sc_audiodev) 508 mixer_signal(sc->sc_audiodev); 509 #endif 510 } 511 512 static void 513 ym_set_mic_gain(struct ym_softc *sc, int vol) 514 { 515 u_int atten; 516 517 sc->mic_gain = vol; 518 519 atten = ((AUDIO_MAX_GAIN - vol) * (SA3_MIC_MCV + 1)) / 520 (AUDIO_MAX_GAIN + 1); 521 522 ym_write(sc, SA3_MIC_VOL, 523 (ym_read(sc, SA3_MIC_VOL) & ~SA3_MIC_MCV) | atten); 524 } 525 526 static void 527 ym_set_3d(struct ym_softc *sc, mixer_ctrl_t *cp, 528 struct ad1848_volume *val, int reg) 529 { 530 uint8_t l, r, e; 531 532 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock)); 533 534 ad1848_to_vol(cp, val); 535 536 l = val->left; 537 r = val->right; 538 if (reg != SA3_3D_WIDE) { 539 /* flat on center */ 540 l = YM_EQ_EXPAND_VALUE(l); 541 r = YM_EQ_EXPAND_VALUE(r); 542 } 543 544 e = (l * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) / 545 (AUDIO_MAX_GAIN + 1) << SA3_3D_LSHIFT | 546 (r * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) / 547 (AUDIO_MAX_GAIN + 1) << SA3_3D_RSHIFT; 548 549 #ifndef AUDIO_NO_POWER_CTL 550 /* turn wide stereo on if necessary */ 551 if (e) 552 ym_power_ctl(sc, YM_POWER_3D, 1); 553 #endif 554 555 ym_write(sc, reg, e); 556 557 #ifndef AUDIO_NO_POWER_CTL 558 /* turn wide stereo off if necessary */ 559 if (YM_EQ_OFF(&sc->sc_treble) && YM_EQ_OFF(&sc->sc_bass) && 560 YM_WIDE_OFF(&sc->sc_wide)) 561 ym_power_ctl(sc, YM_POWER_3D, 0); 562 #endif 563 } 564 565 int 566 ym_mixer_set_port(void *addr, mixer_ctrl_t *cp) 567 { 568 struct ad1848_softc *ac; 569 struct ym_softc *sc; 570 struct ad1848_volume vol; 571 int error; 572 uint8_t extsources; 573 574 ac = addr; 575 sc = ac->parent; 576 error = 0; 577 DPRINTF(("%s: ym_mixer_set_port: dev 0x%x, type 0x%x, 0x%x (%d; %d, %d)\n", 578 DVNAME(sc), cp->dev, cp->type, cp->un.ord, 579 cp->un.value.num_channels, cp->un.value.level[0], 580 cp->un.value.level[1])); 581 582 /* SA2 doesn't have equalizer */ 583 if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev)) 584 return ENXIO; 585 586 mutex_spin_enter(&ac->sc_intr_lock); 587 588 #ifndef AUDIO_NO_POWER_CTL 589 /* Power-up chip */ 590 ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1); 591 #endif 592 593 switch (cp->dev) { 594 case YM_OUTPUT_LVL: 595 ad1848_to_vol(cp, &vol); 596 ym_set_master_gain(sc, &vol); 597 goto out; 598 599 case YM_OUTPUT_MUTE: 600 sc->master_mute = (cp->un.ord != 0); 601 ym_mute(sc, SA3_VOL_L, sc->master_mute); 602 ym_mute(sc, SA3_VOL_R, sc->master_mute); 603 goto out; 604 605 case YM_MIC_LVL: 606 if (cp->un.value.num_channels != 1) 607 error = EINVAL; 608 else 609 ym_set_mic_gain(sc, 610 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]); 611 goto out; 612 613 case YM_MASTER_EQMODE: 614 sc->sc_eqmode = cp->un.ord & SA3_SYS_CTL_YMODE; 615 ym_write(sc, SA3_SYS_CTL, (ym_read(sc, SA3_SYS_CTL) & 616 ~SA3_SYS_CTL_YMODE) | sc->sc_eqmode); 617 goto out; 618 619 case YM_MASTER_TREBLE: 620 ym_set_3d(sc, cp, &sc->sc_treble, SA3_3D_TREBLE); 621 goto out; 622 623 case YM_MASTER_BASS: 624 ym_set_3d(sc, cp, &sc->sc_bass, SA3_3D_BASS); 625 goto out; 626 627 case YM_MASTER_WIDE: 628 ym_set_3d(sc, cp, &sc->sc_wide, SA3_3D_WIDE); 629 goto out; 630 631 #ifndef AUDIO_NO_POWER_CTL 632 case YM_PWR_MODE: 633 if ((unsigned) cp->un.ord > YM_POWER_NOSAVE) 634 error = EINVAL; 635 else 636 sc->sc_pow_mode = cp->un.ord; 637 goto out; 638 639 case YM_PWR_TIMEOUT: 640 if (cp->un.value.num_channels != 1) 641 error = EINVAL; 642 else 643 sc->sc_pow_timeout = 644 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 645 goto out; 646 647 /* 648 * Needs power-up to hear external sources. 649 */ 650 case YM_CD_MUTE: 651 case YM_LINE_MUTE: 652 case YM_SPEAKER_MUTE: 653 case YM_MIC_MUTE: 654 extsources = YM_MIXER_TO_XS(cp->dev); 655 if (cp->un.ord) { 656 if ((sc->sc_external_sources &= ~extsources) == 0) { 657 /* 658 * All the external sources are muted 659 * --- no need to keep the chip on. 660 */ 661 ym_power_ctl(sc, YM_POWER_EXT_SRC, 0); 662 DPRINTF(("%s: ym_mixer_set_port: off for ext\n", 663 DVNAME(sc))); 664 } 665 } else { 666 /* mute off - power-up the chip */ 667 sc->sc_external_sources |= extsources; 668 ym_power_ctl(sc, YM_POWER_EXT_SRC, 1); 669 DPRINTF(("%s: ym_mixer_set_port: on for ext\n", 670 DVNAME(sc))); 671 } 672 break; /* fall to ad1848_mixer_set_port() */ 673 674 /* 675 * Power on/off the playback part for monitoring. 676 */ 677 case YM_MONITOR_MUTE: 678 if ((ac->open_mode & (FREAD | FWRITE)) == FREAD) 679 ym_power_ctl(sc, YM_POWER_CODEC_P | YM_POWER_CODEC_DA, 680 cp->un.ord == 0); 681 break; /* fall to ad1848_mixer_set_port() */ 682 #endif 683 } 684 685 error = ad1848_mixer_set_port(ac, mappings, NUMMAP, cp); 686 687 if (error != ENXIO) 688 goto out; 689 690 error = 0; 691 692 switch (cp->dev) { 693 case YM_MIC_MUTE: 694 sc->mic_mute = (cp->un.ord != 0); 695 ym_mute(sc, SA3_MIC_VOL, sc->mic_mute); 696 break; 697 698 default: 699 error = ENXIO; 700 break; 701 } 702 703 out: 704 #ifndef AUDIO_NO_POWER_CTL 705 /* Power-down chip */ 706 ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0); 707 #endif 708 mutex_spin_exit(&ac->sc_intr_lock); 709 710 return error; 711 } 712 713 int 714 ym_mixer_get_port(void *addr, mixer_ctrl_t *cp) 715 { 716 struct ad1848_softc *ac; 717 struct ym_softc *sc; 718 int error; 719 720 ac = addr; 721 sc = ac->parent; 722 /* SA2 doesn't have equalizer */ 723 if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev)) 724 return ENXIO; 725 726 switch (cp->dev) { 727 case YM_OUTPUT_LVL: 728 if (!YM_IS_SA3(sc)) { 729 /* 730 * SA2 doesn't have hardware volume interrupt. 731 * Read current value and update every time. 732 */ 733 mutex_spin_enter(&ac->sc_intr_lock); 734 #ifndef AUDIO_NO_POWER_CTL 735 /* Power-up chip */ 736 ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1); 737 #endif 738 ym_hvol_to_master_gain(sc); 739 #ifndef AUDIO_NO_POWER_CTL 740 /* Power-down chip */ 741 ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0); 742 #endif 743 mutex_spin_exit(&ac->sc_intr_lock); 744 } 745 ad1848_from_vol(cp, &sc->master_gain); 746 return 0; 747 748 case YM_OUTPUT_MUTE: 749 cp->un.ord = sc->master_mute; 750 return 0; 751 752 case YM_MIC_LVL: 753 if (cp->un.value.num_channels != 1) 754 return EINVAL; 755 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->mic_gain; 756 return 0; 757 758 case YM_MASTER_EQMODE: 759 cp->un.ord = sc->sc_eqmode; 760 return 0; 761 762 case YM_MASTER_TREBLE: 763 ad1848_from_vol(cp, &sc->sc_treble); 764 return 0; 765 766 case YM_MASTER_BASS: 767 ad1848_from_vol(cp, &sc->sc_bass); 768 return 0; 769 770 case YM_MASTER_WIDE: 771 ad1848_from_vol(cp, &sc->sc_wide); 772 return 0; 773 774 #ifndef AUDIO_NO_POWER_CTL 775 case YM_PWR_MODE: 776 cp->un.ord = sc->sc_pow_mode; 777 return 0; 778 779 case YM_PWR_TIMEOUT: 780 if (cp->un.value.num_channels != 1) 781 return EINVAL; 782 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_pow_timeout; 783 return 0; 784 #endif 785 } 786 787 error = ad1848_mixer_get_port(ac, mappings, NUMMAP, cp); 788 789 if (error != ENXIO) 790 return error; 791 792 error = 0; 793 794 switch (cp->dev) { 795 case YM_MIC_MUTE: 796 cp->un.ord = sc->mic_mute; 797 break; 798 799 default: 800 error = ENXIO; 801 break; 802 } 803 804 return error; 805 } 806 807 static const char *mixer_classes[] = { 808 AudioCinputs, AudioCrecord, AudioCoutputs, AudioCmonitor, 809 #ifndef AUDIO_NO_POWER_CTL 810 AudioCpower, 811 #endif 812 AudioCequalization 813 }; 814 815 int 816 ym_query_devinfo(void *addr, mixer_devinfo_t *dip) 817 { 818 static const char *mixer_port_names[] = { 819 AudioNdac, AudioNmidi, AudioNcd, AudioNline, AudioNspeaker, 820 AudioNmicrophone, AudioNmonitor 821 }; 822 struct ad1848_softc *ac; 823 struct ym_softc *sc; 824 825 ac = addr; 826 sc = ac->parent; 827 /* SA2 doesn't have equalizer */ 828 if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(dip->index)) 829 return ENXIO; 830 831 dip->next = dip->prev = AUDIO_MIXER_LAST; 832 833 switch(dip->index) { 834 case YM_INPUT_CLASS: 835 case YM_OUTPUT_CLASS: 836 case YM_MONITOR_CLASS: 837 case YM_RECORD_CLASS: 838 #ifndef AUDIO_NO_POWER_CTL 839 case YM_PWR_CLASS: 840 #endif 841 case YM_EQ_CLASS: 842 dip->type = AUDIO_MIXER_CLASS; 843 dip->mixer_class = dip->index; 844 strcpy(dip->label.name, 845 mixer_classes[dip->index - YM_INPUT_CLASS]); 846 break; 847 848 case YM_DAC_LVL: 849 case YM_MIDI_LVL: 850 case YM_CD_LVL: 851 case YM_LINE_LVL: 852 case YM_SPEAKER_LVL: 853 case YM_MIC_LVL: 854 case YM_MONITOR_LVL: 855 dip->type = AUDIO_MIXER_VALUE; 856 if (dip->index == YM_MONITOR_LVL) 857 dip->mixer_class = YM_MONITOR_CLASS; 858 else 859 dip->mixer_class = YM_INPUT_CLASS; 860 861 dip->next = dip->index + 7; 862 863 strcpy(dip->label.name, 864 mixer_port_names[dip->index - YM_DAC_LVL]); 865 866 if (dip->index == YM_SPEAKER_LVL || 867 dip->index == YM_MIC_LVL) 868 dip->un.v.num_channels = 1; 869 else 870 dip->un.v.num_channels = 2; 871 872 if (dip->index == YM_SPEAKER_LVL) 873 dip->un.v.delta = 1 << (8 - 4 /* valid bits */); 874 else if (dip->index == YM_DAC_LVL || 875 dip->index == YM_MONITOR_LVL) 876 dip->un.v.delta = 1 << (8 - 6 /* valid bits */); 877 else 878 dip->un.v.delta = 1 << (8 - 5 /* valid bits */); 879 880 strcpy(dip->un.v.units.name, AudioNvolume); 881 break; 882 883 case YM_DAC_MUTE: 884 case YM_MIDI_MUTE: 885 case YM_CD_MUTE: 886 case YM_LINE_MUTE: 887 case YM_SPEAKER_MUTE: 888 case YM_MIC_MUTE: 889 case YM_MONITOR_MUTE: 890 if (dip->index == YM_MONITOR_MUTE) 891 dip->mixer_class = YM_MONITOR_CLASS; 892 else 893 dip->mixer_class = YM_INPUT_CLASS; 894 dip->type = AUDIO_MIXER_ENUM; 895 dip->prev = dip->index - 7; 896 mute: 897 strcpy(dip->label.name, AudioNmute); 898 dip->un.e.num_mem = 2; 899 strcpy(dip->un.e.member[0].label.name, AudioNoff); 900 dip->un.e.member[0].ord = 0; 901 strcpy(dip->un.e.member[1].label.name, AudioNon); 902 dip->un.e.member[1].ord = 1; 903 break; 904 905 906 case YM_OUTPUT_LVL: 907 dip->type = AUDIO_MIXER_VALUE; 908 dip->mixer_class = YM_OUTPUT_CLASS; 909 dip->next = YM_OUTPUT_MUTE; 910 strcpy(dip->label.name, AudioNmaster); 911 dip->un.v.num_channels = 2; 912 dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1); 913 strcpy(dip->un.v.units.name, AudioNvolume); 914 break; 915 916 case YM_OUTPUT_MUTE: 917 dip->mixer_class = YM_OUTPUT_CLASS; 918 dip->type = AUDIO_MIXER_ENUM; 919 dip->prev = YM_OUTPUT_LVL; 920 goto mute; 921 922 923 case YM_REC_LVL: /* record level */ 924 dip->type = AUDIO_MIXER_VALUE; 925 dip->mixer_class = YM_RECORD_CLASS; 926 dip->next = YM_RECORD_SOURCE; 927 strcpy(dip->label.name, AudioNrecord); 928 dip->un.v.num_channels = 2; 929 dip->un.v.delta = 1 << (8 - 4 /* valid bits */); 930 strcpy(dip->un.v.units.name, AudioNvolume); 931 break; 932 933 case YM_RECORD_SOURCE: 934 dip->mixer_class = YM_RECORD_CLASS; 935 dip->type = AUDIO_MIXER_ENUM; 936 dip->prev = YM_REC_LVL; 937 strcpy(dip->label.name, AudioNsource); 938 dip->un.e.num_mem = 4; 939 strcpy(dip->un.e.member[0].label.name, AudioNmicrophone); 940 dip->un.e.member[0].ord = MIC_IN_PORT; 941 strcpy(dip->un.e.member[1].label.name, AudioNline); 942 dip->un.e.member[1].ord = LINE_IN_PORT; 943 strcpy(dip->un.e.member[2].label.name, AudioNdac); 944 dip->un.e.member[2].ord = DAC_IN_PORT; 945 strcpy(dip->un.e.member[3].label.name, AudioNcd); 946 dip->un.e.member[3].ord = AUX1_IN_PORT; 947 break; 948 949 950 case YM_MASTER_EQMODE: 951 dip->type = AUDIO_MIXER_ENUM; 952 dip->mixer_class = YM_EQ_CLASS; 953 strcpy(dip->label.name, AudioNmode); 954 strcpy(dip->un.v.units.name, AudioNmode); 955 dip->un.e.num_mem = 4; 956 strcpy(dip->un.e.member[0].label.name, AudioNdesktop); 957 dip->un.e.member[0].ord = SA3_SYS_CTL_YMODE0; 958 strcpy(dip->un.e.member[1].label.name, AudioNlaptop); 959 dip->un.e.member[1].ord = SA3_SYS_CTL_YMODE1; 960 strcpy(dip->un.e.member[2].label.name, AudioNsubnote); 961 dip->un.e.member[2].ord = SA3_SYS_CTL_YMODE2; 962 strcpy(dip->un.e.member[3].label.name, AudioNhifi); 963 dip->un.e.member[3].ord = SA3_SYS_CTL_YMODE3; 964 break; 965 966 case YM_MASTER_TREBLE: 967 dip->type = AUDIO_MIXER_VALUE; 968 dip->mixer_class = YM_EQ_CLASS; 969 strcpy(dip->label.name, AudioNtreble); 970 dip->un.v.num_channels = 2; 971 dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1) 972 >> YM_EQ_REDUCE_BIT; 973 strcpy(dip->un.v.units.name, AudioNtreble); 974 break; 975 976 case YM_MASTER_BASS: 977 dip->type = AUDIO_MIXER_VALUE; 978 dip->mixer_class = YM_EQ_CLASS; 979 strcpy(dip->label.name, AudioNbass); 980 dip->un.v.num_channels = 2; 981 dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1) 982 >> YM_EQ_REDUCE_BIT; 983 strcpy(dip->un.v.units.name, AudioNbass); 984 break; 985 986 case YM_MASTER_WIDE: 987 dip->type = AUDIO_MIXER_VALUE; 988 dip->mixer_class = YM_EQ_CLASS; 989 strcpy(dip->label.name, AudioNsurround); 990 dip->un.v.num_channels = 2; 991 dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1); 992 strcpy(dip->un.v.units.name, AudioNsurround); 993 break; 994 995 996 #ifndef AUDIO_NO_POWER_CTL 997 case YM_PWR_MODE: 998 dip->type = AUDIO_MIXER_ENUM; 999 dip->mixer_class = YM_PWR_CLASS; 1000 dip->next = YM_PWR_TIMEOUT; 1001 strcpy(dip->label.name, AudioNsave); 1002 dip->un.e.num_mem = 3; 1003 strcpy(dip->un.e.member[0].label.name, AudioNpowerdown); 1004 dip->un.e.member[0].ord = YM_POWER_POWERDOWN; 1005 strcpy(dip->un.e.member[1].label.name, AudioNpowersave); 1006 dip->un.e.member[1].ord = YM_POWER_POWERSAVE; 1007 strcpy(dip->un.e.member[2].label.name, AudioNnosave); 1008 dip->un.e.member[2].ord = YM_POWER_NOSAVE; 1009 break; 1010 1011 case YM_PWR_TIMEOUT: 1012 dip->type = AUDIO_MIXER_VALUE; 1013 dip->mixer_class = YM_PWR_CLASS; 1014 dip->prev = YM_PWR_MODE; 1015 strcpy(dip->label.name, AudioNtimeout); 1016 dip->un.v.num_channels = 1; 1017 strcpy(dip->un.v.units.name, AudioNtimeout); 1018 break; 1019 #endif /* not AUDIO_NO_POWER_CTL */ 1020 1021 default: 1022 return ENXIO; 1023 /*NOTREACHED*/ 1024 } 1025 1026 return 0; 1027 } 1028 1029 int 1030 ym_intr(void *arg) 1031 { 1032 struct ym_softc *sc = arg; 1033 #if NMPU_YM > 0 1034 struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev); 1035 #endif 1036 u_int8_t ist; 1037 int processed; 1038 1039 mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock); 1040 1041 /* OPL3 timer is currently unused. */ 1042 if (((ist = ym_read(sc, SA3_IRQA_STAT)) & 1043 ~(SA3_IRQ_STAT_SB|SA3_IRQ_STAT_OPL3)) == 0) { 1044 DPRINTF(("%s: ym_intr: spurious interrupt\n", DVNAME(sc))); 1045 mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock); 1046 return 0; 1047 } 1048 1049 /* Process pending interrupts. */ 1050 do { 1051 processed = 0; 1052 /* 1053 * CODEC interrupts. 1054 */ 1055 if (ist & (SA3_IRQ_STAT_TI|SA3_IRQ_STAT_CI|SA3_IRQ_STAT_PI)) { 1056 ad1848_isa_intr(&sc->sc_ad1848); 1057 processed = 1; 1058 } 1059 #if NMPU_YM > 0 1060 /* 1061 * MPU401 interrupt. 1062 */ 1063 if (ist & SA3_IRQ_STAT_MPU) { 1064 mpu_intr(sc_mpu); 1065 processed = 1; 1066 } 1067 #endif 1068 /* 1069 * Hardware volume interrupt (SA3 only). 1070 * Recalculate master volume from the hardware setting. 1071 */ 1072 if ((ist & SA3_IRQ_STAT_MV) && YM_IS_SA3(sc)) { 1073 ym_hvol_to_master_gain(sc); 1074 processed = 1; 1075 } 1076 } while (processed && (ist = ym_read(sc, SA3_IRQA_STAT))); 1077 1078 mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock); 1079 return 1; 1080 } 1081 1082 1083 #ifndef AUDIO_NO_POWER_CTL 1084 static void 1085 ym_save_codec_regs(struct ym_softc *sc) 1086 { 1087 struct ad1848_softc *ac; 1088 int i; 1089 1090 DPRINTF(("%s: ym_save_codec_regs\n", DVNAME(sc))); 1091 ac = &sc->sc_ad1848.sc_ad1848; 1092 for (i = 0; i <= 0x1f; i++) 1093 sc->sc_codec_scan[i] = ad_read(ac, i); 1094 } 1095 1096 static void 1097 ym_restore_codec_regs(struct ym_softc *sc) 1098 { 1099 struct ad1848_softc *ac; 1100 int i, t; 1101 1102 DPRINTF(("%s: ym_restore_codec_regs\n", DVNAME(sc))); 1103 ac = &sc->sc_ad1848.sc_ad1848; 1104 for (i = 0; i <= 0x1f; i++) { 1105 /* 1106 * Wait til the chip becomes ready. 1107 * This is required after suspend/resume. 1108 */ 1109 for (t = 0; 1110 t < 100000 && ADREAD(ac, AD1848_IADDR) & SP_IN_INIT; t++) 1111 ; 1112 #ifdef AUDIO_DEBUG 1113 if (t) 1114 DPRINTF(("%s: ym_restore_codec_regs: reg %d, t %d\n", 1115 DVNAME(sc), i, t)); 1116 #endif 1117 ad_write(ac, i, sc->sc_codec_scan[i]); 1118 } 1119 } 1120 1121 /* 1122 * Save and restore the state on suspending / resumning. 1123 * 1124 * XXX This is not complete. 1125 * Currently only the parameters, such as output gain, are restored. 1126 * DMA state should also be restored. FIXME. 1127 */ 1128 static bool 1129 ym_suspend(device_t self, const pmf_qual_t *qual) 1130 { 1131 struct ym_softc *sc = device_private(self); 1132 1133 DPRINTF(("%s: ym_power_hook: suspend\n", DVNAME(sc))); 1134 1135 mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock); 1136 1137 /* 1138 * suspending... 1139 */ 1140 callout_halt(&sc->sc_powerdown_ch, 1141 &sc->sc_ad1848.sc_ad1848.sc_intr_lock); 1142 if (sc->sc_turning_off) 1143 ym_powerdown_blocks(sc); 1144 1145 /* 1146 * Save CODEC registers. 1147 * Note that the registers read incorrect 1148 * if the CODEC part is in power-down mode. 1149 */ 1150 if (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) 1151 ym_save_codec_regs(sc); 1152 1153 /* 1154 * Save OPL3-SA3 control registers and power-down the chip. 1155 * Note that the registers read incorrect 1156 * if the chip is in global power-down mode. 1157 */ 1158 sc->sc_sa3_scan[SA3_PWR_MNG] = ym_read(sc, SA3_PWR_MNG); 1159 if (sc->sc_on_blocks) 1160 ym_chip_powerdown(sc); 1161 mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock); 1162 return true; 1163 } 1164 1165 static bool 1166 ym_resume(device_t self, const pmf_qual_t *qual) 1167 { 1168 struct ym_softc *sc = device_private(self); 1169 int i, xmax; 1170 1171 DPRINTF(("%s: ym_power_hook: resume\n", DVNAME(sc))); 1172 1173 mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock); 1174 /* 1175 * resuming... 1176 */ 1177 ym_chip_powerup(sc, 1); 1178 ym_init(sc); /* power-on CODEC */ 1179 1180 /* Restore control registers. */ 1181 xmax = YM_IS_SA3(sc)? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2; 1182 for (i = SA3_PWR_MNG + 1; i <= xmax; i++) { 1183 if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA || 1184 i == SA3_DPWRDWN) 1185 continue; 1186 ym_write(sc, i, sc->sc_sa3_scan[i]); 1187 } 1188 1189 /* Restore CODEC registers (including mixer). */ 1190 ym_restore_codec_regs(sc); 1191 1192 /* Restore global/digital power-down state. */ 1193 ym_write(sc, SA3_PWR_MNG, sc->sc_sa3_scan[SA3_PWR_MNG]); 1194 if (YM_IS_SA3(sc)) 1195 ym_write(sc, SA3_DPWRDWN, sc->sc_sa3_scan[SA3_DPWRDWN]); 1196 mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock); 1197 return true; 1198 } 1199 1200 int 1201 ym_codec_power_ctl(void *arg, int flags) 1202 { 1203 struct ym_softc *sc; 1204 struct ad1848_softc *ac; 1205 int parts; 1206 1207 sc = arg; 1208 ac = &sc->sc_ad1848.sc_ad1848; 1209 DPRINTF(("%s: ym_codec_power_ctl: flags = 0x%x\n", DVNAME(sc), flags)); 1210 KASSERT(mutex_owned(&ac->sc_intr_lock)); 1211 1212 if (flags != 0) { 1213 parts = 0; 1214 if (flags & FREAD) { 1215 parts |= YM_POWER_CODEC_R | YM_POWER_CODEC_AD; 1216 if (ac->mute[AD1848_MONITOR_CHANNEL] == 0) 1217 parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA; 1218 } 1219 if (flags & FWRITE) 1220 parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA; 1221 } else 1222 parts = YM_POWER_CODEC_P | YM_POWER_CODEC_R | 1223 YM_POWER_CODEC_DA | YM_POWER_CODEC_AD; 1224 1225 ym_power_ctl(sc, parts, flags); 1226 1227 return 0; 1228 } 1229 1230 /* 1231 * Enter Power Save mode or Global Power Down mode. 1232 * Total dissipation becomes 5mA and 10uA (typ.) respective. 1233 */ 1234 static void 1235 ym_chip_powerdown(struct ym_softc *sc) 1236 { 1237 int i, xmax; 1238 1239 DPRINTF(("%s: ym_chip_powerdown\n", DVNAME(sc))); 1240 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock)); 1241 1242 xmax = YM_IS_SA3(sc) ? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2; 1243 1244 /* Save control registers. */ 1245 for (i = SA3_PWR_MNG + 1; i <= xmax; i++) { 1246 if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA) 1247 continue; 1248 sc->sc_sa3_scan[i] = ym_read(sc, i); 1249 } 1250 ym_write(sc, SA3_PWR_MNG, 1251 (sc->sc_pow_mode == YM_POWER_POWERDOWN ? 1252 SA3_PWR_MNG_PDN : SA3_PWR_MNG_PSV) | SA3_PWR_MNG_PDX); 1253 } 1254 1255 /* 1256 * Power up from Power Save / Global Power Down Mode. 1257 */ 1258 static void 1259 ym_chip_powerup(struct ym_softc *sc, int nosleep) 1260 { 1261 uint8_t pw; 1262 1263 DPRINTF(("%s: ym_chip_powerup\n", DVNAME(sc))); 1264 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock)); 1265 1266 pw = ym_read(sc, SA3_PWR_MNG); 1267 1268 if ((pw & (SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN | SA3_PWR_MNG_PDX)) == 0) 1269 return; /* already on */ 1270 1271 pw &= ~SA3_PWR_MNG_PDX; 1272 ym_write(sc, SA3_PWR_MNG, pw); 1273 1274 /* wait 100 ms */ 1275 if (nosleep) 1276 delay(100000); 1277 else 1278 kpause("ym_pu1", false, hz / 10, 1279 &sc->sc_ad1848.sc_ad1848.sc_intr_lock); 1280 1281 pw &= ~(SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN); 1282 ym_write(sc, SA3_PWR_MNG, pw); 1283 1284 /* wait 70 ms */ 1285 if (nosleep) 1286 delay(70000); 1287 else 1288 kpause("ym_pu1", false, hz / 10, 1289 &sc->sc_ad1848.sc_ad1848.sc_intr_lock); 1290 1291 /* The chip is muted automatically --- unmute it now. */ 1292 ym_mute(sc, SA3_VOL_L, sc->master_mute); 1293 ym_mute(sc, SA3_VOL_R, sc->master_mute); 1294 } 1295 1296 /* callout handler for power-down */ 1297 static void 1298 ym_powerdown_callout(void *arg) 1299 { 1300 struct ym_softc *sc; 1301 1302 sc = arg; 1303 1304 mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock); 1305 if ((sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) == 0) { 1306 ym_powerdown_blocks(sc); 1307 } 1308 mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock); 1309 } 1310 1311 static void 1312 ym_powerdown_blocks(struct ym_softc *sc) 1313 { 1314 uint16_t parts; 1315 uint16_t on_blocks; 1316 uint8_t sv; 1317 1318 on_blocks = sc->sc_on_blocks; 1319 DPRINTF(("%s: ym_powerdown_blocks: turning_off 0x%x\n", 1320 DVNAME(sc), sc->sc_turning_off)); 1321 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock)); 1322 1323 on_blocks = sc->sc_on_blocks; 1324 1325 /* Be sure not to change the state of the chip. Save it first. */ 1326 sv = bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX); 1327 1328 parts = sc->sc_turning_off; 1329 1330 if (on_blocks & ~parts & YM_POWER_CODEC_CTL) 1331 parts &= ~(YM_POWER_CODEC_P | YM_POWER_CODEC_R); 1332 if (parts & YM_POWER_CODEC_CTL) { 1333 if ((on_blocks & YM_POWER_CODEC_P) == 0) 1334 parts |= YM_POWER_CODEC_P; 1335 if ((on_blocks & YM_POWER_CODEC_R) == 0) 1336 parts |= YM_POWER_CODEC_R; 1337 } 1338 parts &= ~YM_POWER_CODEC_PSEUDO; 1339 1340 /* If CODEC is being off, save the state. */ 1341 if ((sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) && 1342 (sc->sc_on_blocks & ~sc->sc_turning_off & 1343 YM_POWER_CODEC_DIGITAL) == 0) 1344 ym_save_codec_regs(sc); 1345 1346 if (YM_IS_SA3(sc)) { 1347 /* OPL3-SA3 */ 1348 ym_write(sc, SA3_DPWRDWN, 1349 ym_read(sc, SA3_DPWRDWN) | (u_int8_t) parts); 1350 ym_write(sc, SA3_APWRDWN, 1351 ym_read(sc, SA3_APWRDWN) | (parts >> 8)); 1352 } else { 1353 /* OPL3-SA2 (only OPL3 can be off partially) */ 1354 if (parts & YM_POWER_OPL3) 1355 ym_write(sc, SA3_PWR_MNG, 1356 ym_read(sc, SA3_PWR_MNG) | SA2_PWR_MNG_FMPS); 1357 } 1358 1359 if (((sc->sc_on_blocks &= ~sc->sc_turning_off) & YM_POWER_ACTIVE) == 0) 1360 ym_chip_powerdown(sc); 1361 1362 sc->sc_turning_off = 0; 1363 1364 /* Restore the state of the chip. */ 1365 bus_space_write_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX, sv); 1366 } 1367 1368 /* 1369 * Power control entry point. 1370 */ 1371 void 1372 ym_power_ctl(struct ym_softc *sc, int parts, int onoff) 1373 { 1374 int need_restore_codec; 1375 1376 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock)); 1377 1378 DPRINTF(("%s: ym_power_ctl: parts = 0x%x, %s\n", 1379 DVNAME(sc), parts, onoff ? "on" : "off")); 1380 1381 /* This function may sleep --- needs locking. */ 1382 while (sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) { 1383 sc->sc_in_power_ctl |= YM_POWER_CTL_WANTED; 1384 DPRINTF(("%s: ym_power_ctl: sleeping\n", DVNAME(sc))); 1385 cv_wait(&sc->sc_cv, &sc->sc_ad1848.sc_ad1848.sc_intr_lock); 1386 DPRINTF(("%s: ym_power_ctl: awaken\n", DVNAME(sc))); 1387 } 1388 sc->sc_in_power_ctl |= YM_POWER_CTL_INUSE; 1389 1390 /* If ON requested to parts which are scheduled to OFF, cancel it. */ 1391 if (onoff && sc->sc_turning_off && (sc->sc_turning_off &= ~parts) == 0) 1392 callout_halt(&sc->sc_powerdown_ch, 1393 &sc->sc_ad1848.sc_ad1848.sc_intr_lock); 1394 1395 if (!onoff && sc->sc_turning_off) 1396 parts &= ~sc->sc_turning_off; 1397 1398 /* Discard bits which are currently {on,off}. */ 1399 parts &= onoff ? ~sc->sc_on_blocks : sc->sc_on_blocks; 1400 1401 /* Cancel previous timeout if needed. */ 1402 if (parts != 0 && sc->sc_turning_off) 1403 callout_halt(&sc->sc_powerdown_ch, 1404 &sc->sc_ad1848.sc_ad1848.sc_intr_lock); 1405 1406 if (parts == 0) 1407 goto unlock; /* no work to do */ 1408 1409 if (onoff) { 1410 /* Turning on is done immediately. */ 1411 1412 /* If the chip is off, turn it on. */ 1413 if ((sc->sc_on_blocks & YM_POWER_ACTIVE) == 0) 1414 ym_chip_powerup(sc, 0); 1415 1416 need_restore_codec = (parts & YM_POWER_CODEC_DIGITAL) && 1417 (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) == 0; 1418 1419 sc->sc_on_blocks |= parts; 1420 if (parts & YM_POWER_CODEC_CTL) 1421 parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_R; 1422 1423 if (YM_IS_SA3(sc)) { 1424 /* OPL3-SA3 */ 1425 ym_write(sc, SA3_DPWRDWN, 1426 ym_read(sc, SA3_DPWRDWN) & (u_int8_t)~parts); 1427 ym_write(sc, SA3_APWRDWN, 1428 ym_read(sc, SA3_APWRDWN) & ~(parts >> 8)); 1429 } else { 1430 /* OPL3-SA2 (only OPL3 can be off partially) */ 1431 if (parts & YM_POWER_OPL3) 1432 ym_write(sc, SA3_PWR_MNG, 1433 ym_read(sc, SA3_PWR_MNG) 1434 & ~SA2_PWR_MNG_FMPS); 1435 } 1436 if (need_restore_codec) 1437 ym_restore_codec_regs(sc); 1438 } else { 1439 /* Turning off is delayed. */ 1440 sc->sc_turning_off |= parts; 1441 } 1442 1443 /* Schedule turning off. */ 1444 if (sc->sc_pow_mode != YM_POWER_NOSAVE && sc->sc_turning_off) 1445 callout_reset(&sc->sc_powerdown_ch, hz * sc->sc_pow_timeout, 1446 ym_powerdown_callout, sc); 1447 1448 unlock: 1449 if (sc->sc_in_power_ctl & YM_POWER_CTL_WANTED) 1450 cv_broadcast(&sc->sc_cv); 1451 sc->sc_in_power_ctl = 0; 1452 } 1453 #endif /* not AUDIO_NO_POWER_CTL */ 1454
Indexes created Thu Oct 02 14:10:14 GMT 2025