ym.c revision 1.43 1 /* $NetBSD: ym.c,v 1.43 2011/11/24 03:35:58 mrg Exp $ */
2
3 /*-
4 * Copyright (c) 1999-2002, 2008 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by ITOH Yasufumi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /*
33 * Copyright (c) 1998 Constantine Sapuntzakis. All rights reserved.
34 *
35 * Redistribution and use in source and binary forms, with or without
36 * modification, are permitted provided that the following conditions
37 * are met:
38 * 1. Redistributions of source code must retain the above copyright
39 * notice, this list of conditions and the following disclaimer.
40 * 2. Redistributions in binary form must reproduce the above copyright
41 * notice, this list of conditions and the following disclaimer in the
42 * documentation and/or other materials provided with the distribution.
43 * 3. The name of the author may not be used to endorse or promote products
44 * derived from this software without specific prior written permission.
45 *
46 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
47 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
48 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
49 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
50 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
51 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
52 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
53 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
54 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
55 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56 */
57
58 /*
59 * Original code from OpenBSD.
60 */
61
62 #include <sys/cdefs.h>
63 __KERNEL_RCSID(0, "$NetBSD: ym.c,v 1.43 2011/11/24 03:35:58 mrg Exp $");
64
65 #include "mpu_ym.h"
66 #include "opt_ym.h"
67
68 #include <sys/param.h>
69 #include <sys/systm.h>
70 #include <sys/errno.h>
71 #include <sys/device.h>
72 #include <sys/fcntl.h>
73 #include <sys/kernel.h>
74 #include <sys/proc.h>
75
76 #include <sys/cpu.h>
77 #include <sys/intr.h>
78 #include <sys/bus.h>
79
80 #include <sys/audioio.h>
81 #include <dev/audio_if.h>
82
83 #include <dev/isa/isavar.h>
84 #include <dev/isa/isadmavar.h>
85
86 #include <dev/ic/ad1848reg.h>
87 #include <dev/isa/ad1848var.h>
88 #include <dev/ic/opl3sa3reg.h>
89 #include <dev/isa/wssreg.h>
90 #if NMPU_YM > 0
91 #include <dev/ic/mpuvar.h>
92 #endif
93 #include <dev/isa/ymvar.h>
94 #include <dev/isa/sbreg.h>
95
96 /* Power management mode. */
97 #ifndef YM_POWER_MODE
98 #define YM_POWER_MODE YM_POWER_POWERSAVE
99 #endif
100
101 /* Time in second before power down the chip. */
102 #ifndef YM_POWER_OFF_SEC
103 #define YM_POWER_OFF_SEC 5
104 #endif
105
106 /* Default mixer settings. */
107 #ifndef YM_VOL_MASTER
108 #define YM_VOL_MASTER 208
109 #endif
110
111 #ifndef YM_VOL_DAC
112 #define YM_VOL_DAC 224
113 #endif
114
115 #ifndef YM_VOL_OPL3
116 #define YM_VOL_OPL3 184
117 #endif
118
119 /*
120 * Default position of the equalizer.
121 */
122 #ifndef YM_DEFAULT_TREBLE
123 #define YM_DEFAULT_TREBLE YM_EQ_FLAT_OFFSET
124 #endif
125 #ifndef YM_DEFAULT_BASS
126 #define YM_DEFAULT_BASS YM_EQ_FLAT_OFFSET
127 #endif
128
129 #ifdef __i386__ /* XXX */
130 # include "joy.h"
131 #else
132 # define NJOY 0
133 #endif
134
135 #ifdef AUDIO_DEBUG
136 #define DPRINTF(x) if (ymdebug) printf x
137 int ymdebug = 0;
138 #else
139 #define DPRINTF(x)
140 #endif
141 #define DVNAME(softc) (device_xname((softc)->sc_ad1848.sc_ad1848.sc_dev))
142
143 int ym_getdev(void *, struct audio_device *);
144 int ym_mixer_set_port(void *, mixer_ctrl_t *);
145 int ym_mixer_get_port(void *, mixer_ctrl_t *);
146 int ym_query_devinfo(void *, mixer_devinfo_t *);
147 int ym_intr(void *);
148 #ifndef AUDIO_NO_POWER_CTL
149 static void ym_save_codec_regs(struct ym_softc *);
150 static void ym_restore_codec_regs(struct ym_softc *);
151 int ym_codec_power_ctl(void *, int);
152 static void ym_chip_powerdown(struct ym_softc *);
153 static void ym_chip_powerup(struct ym_softc *, int);
154 static void ym_powerdown_blocks(struct ym_softc *);
155 static void ym_powerdown_callout(void *);
156 void ym_power_ctl(struct ym_softc *, int, int);
157 #endif
158
159 static void ym_init(struct ym_softc *);
160 static void ym_mute(struct ym_softc *, int, int);
161 static void ym_set_master_gain(struct ym_softc *, struct ad1848_volume*);
162 static void ym_hvol_to_master_gain(struct ym_softc *);
163 static void ym_set_mic_gain(struct ym_softc *, int);
164 static void ym_set_3d(struct ym_softc *, mixer_ctrl_t *,
165 struct ad1848_volume *, int);
166 static bool ym_suspend(device_t, const pmf_qual_t *);
167 static bool ym_resume(device_t, const pmf_qual_t *);
168
169
170 const struct audio_hw_if ym_hw_if = {
171 ad1848_isa_open,
172 ad1848_isa_close,
173 NULL,
174 ad1848_query_encoding,
175 ad1848_set_params,
176 ad1848_round_blocksize,
177 ad1848_commit_settings,
178 NULL,
179 NULL,
180 NULL,
181 NULL,
182 ad1848_isa_halt_output,
183 ad1848_isa_halt_input,
184 NULL,
185 ym_getdev,
186 NULL,
187 ym_mixer_set_port,
188 ym_mixer_get_port,
189 ym_query_devinfo,
190 ad1848_isa_malloc,
191 ad1848_isa_free,
192 ad1848_isa_round_buffersize,
193 ad1848_isa_mappage,
194 ad1848_isa_get_props,
195 ad1848_isa_trigger_output,
196 ad1848_isa_trigger_input,
197 NULL,
198 ad1848_get_locks,
199 };
200
201 static inline int ym_read(struct ym_softc *, int);
202 static inline void ym_write(struct ym_softc *, int, int);
203
204 void
205 ym_attach(struct ym_softc *sc)
206 {
207 static struct ad1848_volume vol_master = {YM_VOL_MASTER, YM_VOL_MASTER};
208 static struct ad1848_volume vol_dac = {YM_VOL_DAC, YM_VOL_DAC};
209 static struct ad1848_volume vol_opl3 = {YM_VOL_OPL3, YM_VOL_OPL3};
210 struct ad1848_softc *ac;
211 mixer_ctrl_t mctl;
212 struct audio_attach_args arg;
213
214 ac = &sc->sc_ad1848.sc_ad1848;
215 callout_init(&sc->sc_powerdown_ch, CALLOUT_MPSAFE);
216 cv_init(&sc->sc_cv, "ym");
217 ad1848_init_locks(ac, IPL_AUDIO);
218
219 /* Mute the output to reduce noise during initialization. */
220 ym_mute(sc, SA3_VOL_L, 1);
221 ym_mute(sc, SA3_VOL_R, 1);
222
223 sc->sc_version = ym_read(sc, SA3_MISC) & SA3_MISC_VER;
224 ac->chip_name = YM_IS_SA3(sc) ? "OPL3-SA3" : "OPL3-SA2";
225
226 sc->sc_ad1848.sc_ih = isa_intr_establish(sc->sc_ic, sc->ym_irq,
227 IST_EDGE, IPL_AUDIO, ym_intr, sc);
228
229 #ifndef AUDIO_NO_POWER_CTL
230 sc->sc_ad1848.powerctl = ym_codec_power_ctl;
231 sc->sc_ad1848.powerarg = sc;
232 #endif
233 ad1848_isa_attach(&sc->sc_ad1848);
234 printf("\n");
235 ac->parent = sc;
236
237 /* Establish chip in well known mode */
238 ym_set_master_gain(sc, &vol_master);
239 ym_set_mic_gain(sc, 0);
240 sc->master_mute = 0;
241
242 /* Override ad1848 settings. */
243 ad1848_set_channel_gain(ac, AD1848_DAC_CHANNEL, &vol_dac);
244 ad1848_set_channel_gain(ac, AD1848_AUX2_CHANNEL, &vol_opl3);
245
246 /*
247 * Mute all external sources. If you change this, you must
248 * also change the initial value of sc->sc_external_sources
249 * (currently 0 --- no external source is active).
250 */
251 sc->mic_mute = 1;
252 ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
253 ad1848_mute_channel(ac, AD1848_AUX1_CHANNEL, MUTE_ALL); /* CD */
254 ad1848_mute_channel(ac, AD1848_LINE_CHANNEL, MUTE_ALL); /* line */
255 ac->mute[AD1848_AUX1_CHANNEL] = MUTE_ALL;
256 ac->mute[AD1848_LINE_CHANNEL] = MUTE_ALL;
257 /* speaker is muted by default */
258
259 /* We use only one IRQ (IRQ-A). */
260 ym_write(sc, SA3_IRQ_CONF, SA3_IRQ_CONF_MPU_A | SA3_IRQ_CONF_WSS_A);
261 ym_write(sc, SA3_HVOL_INTR_CNF, SA3_HVOL_INTR_CNF_A);
262
263 /* audio at ym attachment */
264 sc->sc_audiodev = audio_attach_mi(&ym_hw_if, ac, ac->sc_dev);
265
266 /* opl at ym attachment */
267 if (sc->sc_opl_ioh) {
268 arg.type = AUDIODEV_TYPE_OPL;
269 arg.hwif = 0;
270 arg.hdl = 0;
271 (void)config_found(ac->sc_dev, &arg, audioprint);
272 }
273
274 #if NMPU_YM > 0
275 /* mpu at ym attachment */
276 if (sc->sc_mpu_ioh) {
277 arg.type = AUDIODEV_TYPE_MPU;
278 arg.hwif = 0;
279 arg.hdl = 0;
280 sc->sc_mpudev = config_found(ac->sc_dev, &arg, audioprint);
281 }
282 #endif
283
284 /* This must be AFTER the attachment of sub-devices. */
285 mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
286 ym_init(sc);
287
288 #ifndef AUDIO_NO_POWER_CTL
289 /*
290 * Initialize power control.
291 */
292 sc->sc_pow_mode = YM_POWER_MODE;
293 sc->sc_pow_timeout = YM_POWER_OFF_SEC;
294
295 sc->sc_on_blocks = sc->sc_turning_off =
296 YM_POWER_CODEC_P | YM_POWER_CODEC_R |
297 YM_POWER_OPL3 | YM_POWER_MPU401 | YM_POWER_3D |
298 YM_POWER_CODEC_DA | YM_POWER_CODEC_AD | YM_POWER_OPL3_DA;
299 #if NJOY > 0
300 sc->sc_on_blocks |= YM_POWER_JOYSTICK; /* prevents chip powerdown */
301 #endif
302 ym_powerdown_blocks(sc);
303 mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
304
305 if (!pmf_device_register(ac->sc_dev, ym_suspend, ym_resume)) {
306 aprint_error_dev(ac->sc_dev,
307 "cannot set power mgmt handler\n");
308 }
309 #endif
310
311 /* Set tone control to the default position. */
312 mctl.un.value.num_channels = 1;
313 mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_TREBLE;
314 mctl.dev = YM_MASTER_TREBLE;
315 ym_mixer_set_port(sc, &mctl);
316 mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_BASS;
317 mctl.dev = YM_MASTER_BASS;
318 ym_mixer_set_port(sc, &mctl);
319
320 /* Unmute the output now if the chip is on. */
321 #ifndef AUDIO_NO_POWER_CTL
322 if (sc->sc_on_blocks & YM_POWER_ACTIVE)
323 #endif
324 {
325 ym_mute(sc, SA3_VOL_L, sc->master_mute);
326 ym_mute(sc, SA3_VOL_R, sc->master_mute);
327 }
328 }
329
330 static inline int
331 ym_read(struct ym_softc *sc, int reg)
332 {
333
334 bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
335 SA3_CTL_INDEX, (reg & 0xff));
336 return bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_DATA);
337 }
338
339 static inline void
340 ym_write(struct ym_softc *sc, int reg, int data)
341 {
342
343 bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
344 SA3_CTL_INDEX, (reg & 0xff));
345 bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
346 SA3_CTL_DATA, (data & 0xff));
347 }
348
349 static void
350 ym_init(struct ym_softc *sc)
351 {
352 uint8_t dpd, apd;
353
354 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
355
356 /* Mute SoundBlaster output if possible. */
357 if (sc->sc_sb_ioh) {
358 bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_ADDR,
359 SBP_MASTER_VOL);
360 bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_DATA,
361 0x00);
362 }
363
364 if (!YM_IS_SA3(sc)) {
365 /* OPL3-SA2 */
366 ym_write(sc, SA3_PWR_MNG, SA2_PWR_MNG_CLKO |
367 (sc->sc_opl_ioh == 0 ? SA2_PWR_MNG_FMPS : 0));
368 return;
369 }
370
371 /* OPL3-SA3 */
372 /* Figure out which part can be power down. */
373 dpd = SA3_DPWRDWN_SB /* we never use SB */
374 #if NMPU_YM > 0
375 | (sc->sc_mpu_ioh ? 0 : SA3_DPWRDWN_MPU)
376 #else
377 | SA3_DPWRDWN_MPU
378 #endif
379 #if NJOY == 0
380 | SA3_DPWRDWN_JOY
381 #endif
382 | SA3_DPWRDWN_PNP /* ISA Plug and Play is done */
383 /*
384 * The master clock is for external wavetable synthesizer
385 * OPL4-ML (YMF704) or OPL4-ML2 (YMF721),
386 * and is currently unused.
387 */
388 | SA3_DPWRDWN_MCLKO;
389
390 apd = SA3_APWRDWN_SBDAC; /* we never use SB */
391
392 /* Power down OPL3 if not attached. */
393 if (sc->sc_opl_ioh == 0) {
394 dpd |= SA3_DPWRDWN_FM;
395 apd |= SA3_APWRDWN_FMDAC;
396 }
397 /* CODEC is always attached. */
398
399 /* Power down unused digital parts. */
400 ym_write(sc, SA3_DPWRDWN, dpd);
401
402 /* Power down unused analog parts. */
403 ym_write(sc, SA3_APWRDWN, apd);
404 }
405
406
407 int
408 ym_getdev(void *addr, struct audio_device *retp)
409 {
410 struct ym_softc *sc;
411 struct ad1848_softc *ac;
412
413 sc = addr;
414 ac = &sc->sc_ad1848.sc_ad1848;
415 strlcpy(retp->name, ac->chip_name, sizeof(retp->name));
416 snprintf(retp->version, sizeof(retp->version), "%d", sc->sc_version);
417 strlcpy(retp->config, "ym", sizeof(retp->config));
418
419 return 0;
420 }
421
422
423 static ad1848_devmap_t mappings[] = {
424 { YM_DAC_LVL, AD1848_KIND_LVL, AD1848_DAC_CHANNEL },
425 { YM_MIDI_LVL, AD1848_KIND_LVL, AD1848_AUX2_CHANNEL },
426 { YM_CD_LVL, AD1848_KIND_LVL, AD1848_AUX1_CHANNEL },
427 { YM_LINE_LVL, AD1848_KIND_LVL, AD1848_LINE_CHANNEL },
428 { YM_SPEAKER_LVL, AD1848_KIND_LVL, AD1848_MONO_CHANNEL },
429 { YM_MONITOR_LVL, AD1848_KIND_LVL, AD1848_MONITOR_CHANNEL },
430 { YM_DAC_MUTE, AD1848_KIND_MUTE, AD1848_DAC_CHANNEL },
431 { YM_MIDI_MUTE, AD1848_KIND_MUTE, AD1848_AUX2_CHANNEL },
432 { YM_CD_MUTE, AD1848_KIND_MUTE, AD1848_AUX1_CHANNEL },
433 { YM_LINE_MUTE, AD1848_KIND_MUTE, AD1848_LINE_CHANNEL },
434 { YM_SPEAKER_MUTE, AD1848_KIND_MUTE, AD1848_MONO_CHANNEL },
435 { YM_MONITOR_MUTE, AD1848_KIND_MUTE, AD1848_MONITOR_CHANNEL },
436 { YM_REC_LVL, AD1848_KIND_RECORDGAIN, -1 },
437 { YM_RECORD_SOURCE, AD1848_KIND_RECORDSOURCE, -1}
438 };
439
440 #define NUMMAP (sizeof(mappings) / sizeof(mappings[0]))
441
442
443 static void
444 ym_mute(struct ym_softc *sc, int left_reg, int mute)
445 {
446 uint8_t reg;
447
448 reg = ym_read(sc, left_reg);
449 if (mute)
450 ym_write(sc, left_reg, reg | 0x80);
451 else
452 ym_write(sc, left_reg, reg & ~0x80);
453 }
454
455
456 static void
457 ym_set_master_gain(struct ym_softc *sc, struct ad1848_volume *vol)
458 {
459 u_int atten;
460
461 sc->master_gain = *vol;
462
463 atten = ((AUDIO_MAX_GAIN - vol->left) * (SA3_VOL_MV + 1)) /
464 (AUDIO_MAX_GAIN + 1);
465
466 ym_write(sc, SA3_VOL_L, (ym_read(sc, SA3_VOL_L) & ~SA3_VOL_MV) | atten);
467
468 atten = ((AUDIO_MAX_GAIN - vol->right) * (SA3_VOL_MV + 1)) /
469 (AUDIO_MAX_GAIN + 1);
470
471 ym_write(sc, SA3_VOL_R, (ym_read(sc, SA3_VOL_R) & ~SA3_VOL_MV) | atten);
472 }
473
474 /*
475 * Read current setting of master volume from hardware
476 * and update the software value if changed.
477 * [SA3] This function clears hardware volume interrupt.
478 */
479 static void
480 ym_hvol_to_master_gain(struct ym_softc *sc)
481 {
482 u_int prevval, val;
483 int changed;
484
485 changed = 0;
486 val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_L);
487 prevval = (sc->master_gain.left * (SA3_VOL_MV + 1)) /
488 (AUDIO_MAX_GAIN + 1);
489 if (val != prevval) {
490 sc->master_gain.left =
491 val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
492 changed = 1;
493 }
494
495 val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_R);
496 prevval = (sc->master_gain.right * (SA3_VOL_MV + 1)) /
497 (AUDIO_MAX_GAIN + 1);
498 if (val != prevval) {
499 sc->master_gain.right =
500 val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
501 changed = 1;
502 }
503
504 #if 0 /* XXX NOT YET */
505 /* Notify the change to async processes. */
506 if (changed && sc->sc_audiodev)
507 mixer_signal(sc->sc_audiodev);
508 #endif
509 }
510
511 static void
512 ym_set_mic_gain(struct ym_softc *sc, int vol)
513 {
514 u_int atten;
515
516 sc->mic_gain = vol;
517
518 atten = ((AUDIO_MAX_GAIN - vol) * (SA3_MIC_MCV + 1)) /
519 (AUDIO_MAX_GAIN + 1);
520
521 ym_write(sc, SA3_MIC_VOL,
522 (ym_read(sc, SA3_MIC_VOL) & ~SA3_MIC_MCV) | atten);
523 }
524
525 static void
526 ym_set_3d(struct ym_softc *sc, mixer_ctrl_t *cp,
527 struct ad1848_volume *val, int reg)
528 {
529 uint8_t l, r, e;
530
531 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
532
533 ad1848_to_vol(cp, val);
534
535 l = val->left;
536 r = val->right;
537 if (reg != SA3_3D_WIDE) {
538 /* flat on center */
539 l = YM_EQ_EXPAND_VALUE(l);
540 r = YM_EQ_EXPAND_VALUE(r);
541 }
542
543 e = (l * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
544 (AUDIO_MAX_GAIN + 1) << SA3_3D_LSHIFT |
545 (r * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
546 (AUDIO_MAX_GAIN + 1) << SA3_3D_RSHIFT;
547
548 #ifndef AUDIO_NO_POWER_CTL
549 /* turn wide stereo on if necessary */
550 if (e)
551 ym_power_ctl(sc, YM_POWER_3D, 1);
552 #endif
553
554 ym_write(sc, reg, e);
555
556 #ifndef AUDIO_NO_POWER_CTL
557 /* turn wide stereo off if necessary */
558 if (YM_EQ_OFF(&sc->sc_treble) && YM_EQ_OFF(&sc->sc_bass) &&
559 YM_WIDE_OFF(&sc->sc_wide))
560 ym_power_ctl(sc, YM_POWER_3D, 0);
561 #endif
562 }
563
564 int
565 ym_mixer_set_port(void *addr, mixer_ctrl_t *cp)
566 {
567 struct ad1848_softc *ac;
568 struct ym_softc *sc;
569 struct ad1848_volume vol;
570 int error;
571 uint8_t extsources;
572
573 ac = addr;
574 sc = ac->parent;
575 error = 0;
576 DPRINTF(("%s: ym_mixer_set_port: dev 0x%x, type 0x%x, 0x%x (%d; %d, %d)\n",
577 DVNAME(sc), cp->dev, cp->type, cp->un.ord,
578 cp->un.value.num_channels, cp->un.value.level[0],
579 cp->un.value.level[1]));
580
581 /* SA2 doesn't have equalizer */
582 if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
583 return ENXIO;
584
585 mutex_spin_enter(&ac->sc_intr_lock);
586
587 #ifndef AUDIO_NO_POWER_CTL
588 /* Power-up chip */
589 ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
590 #endif
591
592 switch (cp->dev) {
593 case YM_OUTPUT_LVL:
594 ad1848_to_vol(cp, &vol);
595 ym_set_master_gain(sc, &vol);
596 goto out;
597
598 case YM_OUTPUT_MUTE:
599 sc->master_mute = (cp->un.ord != 0);
600 ym_mute(sc, SA3_VOL_L, sc->master_mute);
601 ym_mute(sc, SA3_VOL_R, sc->master_mute);
602 goto out;
603
604 case YM_MIC_LVL:
605 if (cp->un.value.num_channels != 1)
606 error = EINVAL;
607 else
608 ym_set_mic_gain(sc,
609 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
610 goto out;
611
612 case YM_MASTER_EQMODE:
613 sc->sc_eqmode = cp->un.ord & SA3_SYS_CTL_YMODE;
614 ym_write(sc, SA3_SYS_CTL, (ym_read(sc, SA3_SYS_CTL) &
615 ~SA3_SYS_CTL_YMODE) | sc->sc_eqmode);
616 goto out;
617
618 case YM_MASTER_TREBLE:
619 ym_set_3d(sc, cp, &sc->sc_treble, SA3_3D_TREBLE);
620 goto out;
621
622 case YM_MASTER_BASS:
623 ym_set_3d(sc, cp, &sc->sc_bass, SA3_3D_BASS);
624 goto out;
625
626 case YM_MASTER_WIDE:
627 ym_set_3d(sc, cp, &sc->sc_wide, SA3_3D_WIDE);
628 goto out;
629
630 #ifndef AUDIO_NO_POWER_CTL
631 case YM_PWR_MODE:
632 if ((unsigned) cp->un.ord > YM_POWER_NOSAVE)
633 error = EINVAL;
634 else
635 sc->sc_pow_mode = cp->un.ord;
636 goto out;
637
638 case YM_PWR_TIMEOUT:
639 if (cp->un.value.num_channels != 1)
640 error = EINVAL;
641 else
642 sc->sc_pow_timeout =
643 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
644 goto out;
645
646 /*
647 * Needs power-up to hear external sources.
648 */
649 case YM_CD_MUTE:
650 case YM_LINE_MUTE:
651 case YM_SPEAKER_MUTE:
652 case YM_MIC_MUTE:
653 extsources = YM_MIXER_TO_XS(cp->dev);
654 if (cp->un.ord) {
655 if ((sc->sc_external_sources &= ~extsources) == 0) {
656 /*
657 * All the external sources are muted
658 * --- no need to keep the chip on.
659 */
660 ym_power_ctl(sc, YM_POWER_EXT_SRC, 0);
661 DPRINTF(("%s: ym_mixer_set_port: off for ext\n",
662 DVNAME(sc)));
663 }
664 } else {
665 /* mute off - power-up the chip */
666 sc->sc_external_sources |= extsources;
667 ym_power_ctl(sc, YM_POWER_EXT_SRC, 1);
668 DPRINTF(("%s: ym_mixer_set_port: on for ext\n",
669 DVNAME(sc)));
670 }
671 break; /* fall to ad1848_mixer_set_port() */
672
673 /*
674 * Power on/off the playback part for monitoring.
675 */
676 case YM_MONITOR_MUTE:
677 if ((ac->open_mode & (FREAD | FWRITE)) == FREAD)
678 ym_power_ctl(sc, YM_POWER_CODEC_P | YM_POWER_CODEC_DA,
679 cp->un.ord == 0);
680 break; /* fall to ad1848_mixer_set_port() */
681 #endif
682 }
683
684 error = ad1848_mixer_set_port(ac, mappings, NUMMAP, cp);
685
686 if (error != ENXIO)
687 goto out;
688
689 error = 0;
690
691 switch (cp->dev) {
692 case YM_MIC_MUTE:
693 sc->mic_mute = (cp->un.ord != 0);
694 ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
695 break;
696
697 default:
698 error = ENXIO;
699 break;
700 }
701
702 out:
703 #ifndef AUDIO_NO_POWER_CTL
704 /* Power-down chip */
705 ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
706 #endif
707 mutex_spin_exit(&ac->sc_intr_lock);
708
709 return error;
710 }
711
712 int
713 ym_mixer_get_port(void *addr, mixer_ctrl_t *cp)
714 {
715 struct ad1848_softc *ac;
716 struct ym_softc *sc;
717 int error;
718
719 ac = addr;
720 sc = ac->parent;
721 /* SA2 doesn't have equalizer */
722 if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
723 return ENXIO;
724
725 switch (cp->dev) {
726 case YM_OUTPUT_LVL:
727 if (!YM_IS_SA3(sc)) {
728 /*
729 * SA2 doesn't have hardware volume interrupt.
730 * Read current value and update every time.
731 */
732 mutex_spin_enter(&ac->sc_intr_lock);
733 #ifndef AUDIO_NO_POWER_CTL
734 /* Power-up chip */
735 ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
736 #endif
737 ym_hvol_to_master_gain(sc);
738 #ifndef AUDIO_NO_POWER_CTL
739 /* Power-down chip */
740 ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
741 #endif
742 mutex_spin_exit(&ac->sc_intr_lock);
743 }
744 ad1848_from_vol(cp, &sc->master_gain);
745 return 0;
746
747 case YM_OUTPUT_MUTE:
748 cp->un.ord = sc->master_mute;
749 return 0;
750
751 case YM_MIC_LVL:
752 if (cp->un.value.num_channels != 1)
753 return EINVAL;
754 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->mic_gain;
755 return 0;
756
757 case YM_MASTER_EQMODE:
758 cp->un.ord = sc->sc_eqmode;
759 return 0;
760
761 case YM_MASTER_TREBLE:
762 ad1848_from_vol(cp, &sc->sc_treble);
763 return 0;
764
765 case YM_MASTER_BASS:
766 ad1848_from_vol(cp, &sc->sc_bass);
767 return 0;
768
769 case YM_MASTER_WIDE:
770 ad1848_from_vol(cp, &sc->sc_wide);
771 return 0;
772
773 #ifndef AUDIO_NO_POWER_CTL
774 case YM_PWR_MODE:
775 cp->un.ord = sc->sc_pow_mode;
776 return 0;
777
778 case YM_PWR_TIMEOUT:
779 if (cp->un.value.num_channels != 1)
780 return EINVAL;
781 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_pow_timeout;
782 return 0;
783 #endif
784 }
785
786 error = ad1848_mixer_get_port(ac, mappings, NUMMAP, cp);
787
788 if (error != ENXIO)
789 return error;
790
791 error = 0;
792
793 switch (cp->dev) {
794 case YM_MIC_MUTE:
795 cp->un.ord = sc->mic_mute;
796 break;
797
798 default:
799 error = ENXIO;
800 break;
801 }
802
803 return error;
804 }
805
806 static const char *mixer_classes[] = {
807 AudioCinputs, AudioCrecord, AudioCoutputs, AudioCmonitor,
808 #ifndef AUDIO_NO_POWER_CTL
809 AudioCpower,
810 #endif
811 AudioCequalization
812 };
813
814 int
815 ym_query_devinfo(void *addr, mixer_devinfo_t *dip)
816 {
817 static const char *mixer_port_names[] = {
818 AudioNdac, AudioNmidi, AudioNcd, AudioNline, AudioNspeaker,
819 AudioNmicrophone, AudioNmonitor
820 };
821 struct ad1848_softc *ac;
822 struct ym_softc *sc;
823
824 ac = addr;
825 sc = ac->parent;
826 /* SA2 doesn't have equalizer */
827 if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(dip->index))
828 return ENXIO;
829
830 dip->next = dip->prev = AUDIO_MIXER_LAST;
831
832 switch(dip->index) {
833 case YM_INPUT_CLASS:
834 case YM_OUTPUT_CLASS:
835 case YM_MONITOR_CLASS:
836 case YM_RECORD_CLASS:
837 #ifndef AUDIO_NO_POWER_CTL
838 case YM_PWR_CLASS:
839 #endif
840 case YM_EQ_CLASS:
841 dip->type = AUDIO_MIXER_CLASS;
842 dip->mixer_class = dip->index;
843 strcpy(dip->label.name,
844 mixer_classes[dip->index - YM_INPUT_CLASS]);
845 break;
846
847 case YM_DAC_LVL:
848 case YM_MIDI_LVL:
849 case YM_CD_LVL:
850 case YM_LINE_LVL:
851 case YM_SPEAKER_LVL:
852 case YM_MIC_LVL:
853 case YM_MONITOR_LVL:
854 dip->type = AUDIO_MIXER_VALUE;
855 if (dip->index == YM_MONITOR_LVL)
856 dip->mixer_class = YM_MONITOR_CLASS;
857 else
858 dip->mixer_class = YM_INPUT_CLASS;
859
860 dip->next = dip->index + 7;
861
862 strcpy(dip->label.name,
863 mixer_port_names[dip->index - YM_DAC_LVL]);
864
865 if (dip->index == YM_SPEAKER_LVL ||
866 dip->index == YM_MIC_LVL)
867 dip->un.v.num_channels = 1;
868 else
869 dip->un.v.num_channels = 2;
870
871 if (dip->index == YM_SPEAKER_LVL)
872 dip->un.v.delta = 1 << (8 - 4 /* valid bits */);
873 else if (dip->index == YM_DAC_LVL ||
874 dip->index == YM_MONITOR_LVL)
875 dip->un.v.delta = 1 << (8 - 6 /* valid bits */);
876 else
877 dip->un.v.delta = 1 << (8 - 5 /* valid bits */);
878
879 strcpy(dip->un.v.units.name, AudioNvolume);
880 break;
881
882 case YM_DAC_MUTE:
883 case YM_MIDI_MUTE:
884 case YM_CD_MUTE:
885 case YM_LINE_MUTE:
886 case YM_SPEAKER_MUTE:
887 case YM_MIC_MUTE:
888 case YM_MONITOR_MUTE:
889 if (dip->index == YM_MONITOR_MUTE)
890 dip->mixer_class = YM_MONITOR_CLASS;
891 else
892 dip->mixer_class = YM_INPUT_CLASS;
893 dip->type = AUDIO_MIXER_ENUM;
894 dip->prev = dip->index - 7;
895 mute:
896 strcpy(dip->label.name, AudioNmute);
897 dip->un.e.num_mem = 2;
898 strcpy(dip->un.e.member[0].label.name, AudioNoff);
899 dip->un.e.member[0].ord = 0;
900 strcpy(dip->un.e.member[1].label.name, AudioNon);
901 dip->un.e.member[1].ord = 1;
902 break;
903
904
905 case YM_OUTPUT_LVL:
906 dip->type = AUDIO_MIXER_VALUE;
907 dip->mixer_class = YM_OUTPUT_CLASS;
908 dip->next = YM_OUTPUT_MUTE;
909 strcpy(dip->label.name, AudioNmaster);
910 dip->un.v.num_channels = 2;
911 dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1);
912 strcpy(dip->un.v.units.name, AudioNvolume);
913 break;
914
915 case YM_OUTPUT_MUTE:
916 dip->mixer_class = YM_OUTPUT_CLASS;
917 dip->type = AUDIO_MIXER_ENUM;
918 dip->prev = YM_OUTPUT_LVL;
919 goto mute;
920
921
922 case YM_REC_LVL: /* record level */
923 dip->type = AUDIO_MIXER_VALUE;
924 dip->mixer_class = YM_RECORD_CLASS;
925 dip->next = YM_RECORD_SOURCE;
926 strcpy(dip->label.name, AudioNrecord);
927 dip->un.v.num_channels = 2;
928 dip->un.v.delta = 1 << (8 - 4 /* valid bits */);
929 strcpy(dip->un.v.units.name, AudioNvolume);
930 break;
931
932 case YM_RECORD_SOURCE:
933 dip->mixer_class = YM_RECORD_CLASS;
934 dip->type = AUDIO_MIXER_ENUM;
935 dip->prev = YM_REC_LVL;
936 strcpy(dip->label.name, AudioNsource);
937 dip->un.e.num_mem = 4;
938 strcpy(dip->un.e.member[0].label.name, AudioNmicrophone);
939 dip->un.e.member[0].ord = MIC_IN_PORT;
940 strcpy(dip->un.e.member[1].label.name, AudioNline);
941 dip->un.e.member[1].ord = LINE_IN_PORT;
942 strcpy(dip->un.e.member[2].label.name, AudioNdac);
943 dip->un.e.member[2].ord = DAC_IN_PORT;
944 strcpy(dip->un.e.member[3].label.name, AudioNcd);
945 dip->un.e.member[3].ord = AUX1_IN_PORT;
946 break;
947
948
949 case YM_MASTER_EQMODE:
950 dip->type = AUDIO_MIXER_ENUM;
951 dip->mixer_class = YM_EQ_CLASS;
952 strcpy(dip->label.name, AudioNmode);
953 strcpy(dip->un.v.units.name, AudioNmode);
954 dip->un.e.num_mem = 4;
955 strcpy(dip->un.e.member[0].label.name, AudioNdesktop);
956 dip->un.e.member[0].ord = SA3_SYS_CTL_YMODE0;
957 strcpy(dip->un.e.member[1].label.name, AudioNlaptop);
958 dip->un.e.member[1].ord = SA3_SYS_CTL_YMODE1;
959 strcpy(dip->un.e.member[2].label.name, AudioNsubnote);
960 dip->un.e.member[2].ord = SA3_SYS_CTL_YMODE2;
961 strcpy(dip->un.e.member[3].label.name, AudioNhifi);
962 dip->un.e.member[3].ord = SA3_SYS_CTL_YMODE3;
963 break;
964
965 case YM_MASTER_TREBLE:
966 dip->type = AUDIO_MIXER_VALUE;
967 dip->mixer_class = YM_EQ_CLASS;
968 strcpy(dip->label.name, AudioNtreble);
969 dip->un.v.num_channels = 2;
970 dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1)
971 >> YM_EQ_REDUCE_BIT;
972 strcpy(dip->un.v.units.name, AudioNtreble);
973 break;
974
975 case YM_MASTER_BASS:
976 dip->type = AUDIO_MIXER_VALUE;
977 dip->mixer_class = YM_EQ_CLASS;
978 strcpy(dip->label.name, AudioNbass);
979 dip->un.v.num_channels = 2;
980 dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1)
981 >> YM_EQ_REDUCE_BIT;
982 strcpy(dip->un.v.units.name, AudioNbass);
983 break;
984
985 case YM_MASTER_WIDE:
986 dip->type = AUDIO_MIXER_VALUE;
987 dip->mixer_class = YM_EQ_CLASS;
988 strcpy(dip->label.name, AudioNsurround);
989 dip->un.v.num_channels = 2;
990 dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1);
991 strcpy(dip->un.v.units.name, AudioNsurround);
992 break;
993
994
995 #ifndef AUDIO_NO_POWER_CTL
996 case YM_PWR_MODE:
997 dip->type = AUDIO_MIXER_ENUM;
998 dip->mixer_class = YM_PWR_CLASS;
999 dip->next = YM_PWR_TIMEOUT;
1000 strcpy(dip->label.name, AudioNsave);
1001 dip->un.e.num_mem = 3;
1002 strcpy(dip->un.e.member[0].label.name, AudioNpowerdown);
1003 dip->un.e.member[0].ord = YM_POWER_POWERDOWN;
1004 strcpy(dip->un.e.member[1].label.name, AudioNpowersave);
1005 dip->un.e.member[1].ord = YM_POWER_POWERSAVE;
1006 strcpy(dip->un.e.member[2].label.name, AudioNnosave);
1007 dip->un.e.member[2].ord = YM_POWER_NOSAVE;
1008 break;
1009
1010 case YM_PWR_TIMEOUT:
1011 dip->type = AUDIO_MIXER_VALUE;
1012 dip->mixer_class = YM_PWR_CLASS;
1013 dip->prev = YM_PWR_MODE;
1014 strcpy(dip->label.name, AudioNtimeout);
1015 dip->un.v.num_channels = 1;
1016 strcpy(dip->un.v.units.name, AudioNtimeout);
1017 break;
1018 #endif /* not AUDIO_NO_POWER_CTL */
1019
1020 default:
1021 return ENXIO;
1022 /*NOTREACHED*/
1023 }
1024
1025 return 0;
1026 }
1027
1028 int
1029 ym_intr(void *arg)
1030 {
1031 struct ym_softc *sc = arg;
1032 #if NMPU_YM > 0
1033 struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev);
1034 #endif
1035 u_int8_t ist;
1036 int processed;
1037
1038 mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1039
1040 /* OPL3 timer is currently unused. */
1041 if (((ist = ym_read(sc, SA3_IRQA_STAT)) &
1042 ~(SA3_IRQ_STAT_SB|SA3_IRQ_STAT_OPL3)) == 0) {
1043 DPRINTF(("%s: ym_intr: spurious interrupt\n", DVNAME(sc)));
1044 mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1045 return 0;
1046 }
1047
1048 /* Process pending interrupts. */
1049 do {
1050 processed = 0;
1051 /*
1052 * CODEC interrupts.
1053 */
1054 if (ist & (SA3_IRQ_STAT_TI|SA3_IRQ_STAT_CI|SA3_IRQ_STAT_PI)) {
1055 ad1848_isa_intr(&sc->sc_ad1848);
1056 processed = 1;
1057 }
1058 #if NMPU_YM > 0
1059 /*
1060 * MPU401 interrupt.
1061 */
1062 if (ist & SA3_IRQ_STAT_MPU) {
1063 mpu_intr(sc_mpu);
1064 processed = 1;
1065 }
1066 #endif
1067 /*
1068 * Hardware volume interrupt (SA3 only).
1069 * Recalculate master volume from the hardware setting.
1070 */
1071 if ((ist & SA3_IRQ_STAT_MV) && YM_IS_SA3(sc)) {
1072 ym_hvol_to_master_gain(sc);
1073 processed = 1;
1074 }
1075 } while (processed && (ist = ym_read(sc, SA3_IRQA_STAT)));
1076
1077 mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1078 return 1;
1079 }
1080
1081
1082 #ifndef AUDIO_NO_POWER_CTL
1083 static void
1084 ym_save_codec_regs(struct ym_softc *sc)
1085 {
1086 struct ad1848_softc *ac;
1087 int i;
1088
1089 DPRINTF(("%s: ym_save_codec_regs\n", DVNAME(sc)));
1090 ac = &sc->sc_ad1848.sc_ad1848;
1091 for (i = 0; i <= 0x1f; i++)
1092 sc->sc_codec_scan[i] = ad_read(ac, i);
1093 }
1094
1095 static void
1096 ym_restore_codec_regs(struct ym_softc *sc)
1097 {
1098 struct ad1848_softc *ac;
1099 int i, t;
1100
1101 DPRINTF(("%s: ym_restore_codec_regs\n", DVNAME(sc)));
1102 ac = &sc->sc_ad1848.sc_ad1848;
1103 for (i = 0; i <= 0x1f; i++) {
1104 /*
1105 * Wait til the chip becomes ready.
1106 * This is required after suspend/resume.
1107 */
1108 for (t = 0;
1109 t < 100000 && ADREAD(ac, AD1848_IADDR) & SP_IN_INIT; t++)
1110 ;
1111 #ifdef AUDIO_DEBUG
1112 if (t)
1113 DPRINTF(("%s: ym_restore_codec_regs: reg %d, t %d\n",
1114 DVNAME(sc), i, t));
1115 #endif
1116 ad_write(ac, i, sc->sc_codec_scan[i]);
1117 }
1118 }
1119
1120 /*
1121 * Save and restore the state on suspending / resumning.
1122 *
1123 * XXX This is not complete.
1124 * Currently only the parameters, such as output gain, are restored.
1125 * DMA state should also be restored. FIXME.
1126 */
1127 static bool
1128 ym_suspend(device_t self, const pmf_qual_t *qual)
1129 {
1130 struct ym_softc *sc = device_private(self);
1131
1132 DPRINTF(("%s: ym_power_hook: suspend\n", DVNAME(sc)));
1133
1134 mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1135
1136 /*
1137 * suspending...
1138 */
1139 callout_halt(&sc->sc_powerdown_ch,
1140 &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1141 if (sc->sc_turning_off)
1142 ym_powerdown_blocks(sc);
1143
1144 /*
1145 * Save CODEC registers.
1146 * Note that the registers read incorrect
1147 * if the CODEC part is in power-down mode.
1148 */
1149 if (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL)
1150 ym_save_codec_regs(sc);
1151
1152 /*
1153 * Save OPL3-SA3 control registers and power-down the chip.
1154 * Note that the registers read incorrect
1155 * if the chip is in global power-down mode.
1156 */
1157 sc->sc_sa3_scan[SA3_PWR_MNG] = ym_read(sc, SA3_PWR_MNG);
1158 if (sc->sc_on_blocks)
1159 ym_chip_powerdown(sc);
1160 mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1161 return true;
1162 }
1163
1164 static bool
1165 ym_resume(device_t self, const pmf_qual_t *qual)
1166 {
1167 struct ym_softc *sc = device_private(self);
1168 int i, xmax;
1169
1170 DPRINTF(("%s: ym_power_hook: resume\n", DVNAME(sc)));
1171
1172 mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1173 /*
1174 * resuming...
1175 */
1176 ym_chip_powerup(sc, 1);
1177 ym_init(sc); /* power-on CODEC */
1178
1179 /* Restore control registers. */
1180 xmax = YM_IS_SA3(sc)? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
1181 for (i = SA3_PWR_MNG + 1; i <= xmax; i++) {
1182 if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA ||
1183 i == SA3_DPWRDWN)
1184 continue;
1185 ym_write(sc, i, sc->sc_sa3_scan[i]);
1186 }
1187
1188 /* Restore CODEC registers (including mixer). */
1189 ym_restore_codec_regs(sc);
1190
1191 /* Restore global/digital power-down state. */
1192 ym_write(sc, SA3_PWR_MNG, sc->sc_sa3_scan[SA3_PWR_MNG]);
1193 if (YM_IS_SA3(sc))
1194 ym_write(sc, SA3_DPWRDWN, sc->sc_sa3_scan[SA3_DPWRDWN]);
1195 mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1196 return true;
1197 }
1198
1199 int
1200 ym_codec_power_ctl(void *arg, int flags)
1201 {
1202 struct ym_softc *sc;
1203 struct ad1848_softc *ac;
1204 int parts;
1205
1206 sc = arg;
1207 ac = &sc->sc_ad1848.sc_ad1848;
1208 DPRINTF(("%s: ym_codec_power_ctl: flags = 0x%x\n", DVNAME(sc), flags));
1209 KASSERT(mutex_owned(&ac->sc_intr_lock));
1210
1211 if (flags != 0) {
1212 parts = 0;
1213 if (flags & FREAD) {
1214 parts |= YM_POWER_CODEC_R | YM_POWER_CODEC_AD;
1215 if (ac->mute[AD1848_MONITOR_CHANNEL] == 0)
1216 parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
1217 }
1218 if (flags & FWRITE)
1219 parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
1220 } else
1221 parts = YM_POWER_CODEC_P | YM_POWER_CODEC_R |
1222 YM_POWER_CODEC_DA | YM_POWER_CODEC_AD;
1223
1224 ym_power_ctl(sc, parts, flags);
1225
1226 return 0;
1227 }
1228
1229 /*
1230 * Enter Power Save mode or Global Power Down mode.
1231 * Total dissipation becomes 5mA and 10uA (typ.) respective.
1232 */
1233 static void
1234 ym_chip_powerdown(struct ym_softc *sc)
1235 {
1236 int i, xmax;
1237
1238 DPRINTF(("%s: ym_chip_powerdown\n", DVNAME(sc)));
1239 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
1240
1241 xmax = YM_IS_SA3(sc) ? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
1242
1243 /* Save control registers. */
1244 for (i = SA3_PWR_MNG + 1; i <= xmax; i++) {
1245 if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA)
1246 continue;
1247 sc->sc_sa3_scan[i] = ym_read(sc, i);
1248 }
1249 ym_write(sc, SA3_PWR_MNG,
1250 (sc->sc_pow_mode == YM_POWER_POWERDOWN ?
1251 SA3_PWR_MNG_PDN : SA3_PWR_MNG_PSV) | SA3_PWR_MNG_PDX);
1252 }
1253
1254 /*
1255 * Power up from Power Save / Global Power Down Mode.
1256 */
1257 static void
1258 ym_chip_powerup(struct ym_softc *sc, int nosleep)
1259 {
1260 uint8_t pw;
1261
1262 DPRINTF(("%s: ym_chip_powerup\n", DVNAME(sc)));
1263 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
1264
1265 pw = ym_read(sc, SA3_PWR_MNG);
1266
1267 if ((pw & (SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN | SA3_PWR_MNG_PDX)) == 0)
1268 return; /* already on */
1269
1270 pw &= ~SA3_PWR_MNG_PDX;
1271 ym_write(sc, SA3_PWR_MNG, pw);
1272
1273 /* wait 100 ms */
1274 if (nosleep)
1275 delay(100000);
1276 else
1277 kpause("ym_pu1", false, hz / 10,
1278 &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1279
1280 pw &= ~(SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN);
1281 ym_write(sc, SA3_PWR_MNG, pw);
1282
1283 /* wait 70 ms */
1284 if (nosleep)
1285 delay(70000);
1286 else
1287 kpause("ym_pu1", false, hz / 10,
1288 &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1289
1290 /* The chip is muted automatically --- unmute it now. */
1291 ym_mute(sc, SA3_VOL_L, sc->master_mute);
1292 ym_mute(sc, SA3_VOL_R, sc->master_mute);
1293 }
1294
1295 /* callout handler for power-down */
1296 static void
1297 ym_powerdown_callout(void *arg)
1298 {
1299 struct ym_softc *sc;
1300
1301 sc = arg;
1302
1303 mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1304 if ((sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) == 0) {
1305 ym_powerdown_blocks(sc);
1306 }
1307 mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1308 }
1309
1310 static void
1311 ym_powerdown_blocks(struct ym_softc *sc)
1312 {
1313 uint16_t parts;
1314 uint16_t on_blocks;
1315 uint8_t sv;
1316
1317 on_blocks = sc->sc_on_blocks;
1318 DPRINTF(("%s: ym_powerdown_blocks: turning_off 0x%x\n",
1319 DVNAME(sc), sc->sc_turning_off));
1320 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
1321
1322 on_blocks = sc->sc_on_blocks;
1323
1324 /* Be sure not to change the state of the chip. Save it first. */
1325 sv = bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX);
1326
1327 parts = sc->sc_turning_off;
1328
1329 if (on_blocks & ~parts & YM_POWER_CODEC_CTL)
1330 parts &= ~(YM_POWER_CODEC_P | YM_POWER_CODEC_R);
1331 if (parts & YM_POWER_CODEC_CTL) {
1332 if ((on_blocks & YM_POWER_CODEC_P) == 0)
1333 parts |= YM_POWER_CODEC_P;
1334 if ((on_blocks & YM_POWER_CODEC_R) == 0)
1335 parts |= YM_POWER_CODEC_R;
1336 }
1337 parts &= ~YM_POWER_CODEC_PSEUDO;
1338
1339 /* If CODEC is being off, save the state. */
1340 if ((sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) &&
1341 (sc->sc_on_blocks & ~sc->sc_turning_off &
1342 YM_POWER_CODEC_DIGITAL) == 0)
1343 ym_save_codec_regs(sc);
1344
1345 if (YM_IS_SA3(sc)) {
1346 /* OPL3-SA3 */
1347 ym_write(sc, SA3_DPWRDWN,
1348 ym_read(sc, SA3_DPWRDWN) | (u_int8_t) parts);
1349 ym_write(sc, SA3_APWRDWN,
1350 ym_read(sc, SA3_APWRDWN) | (parts >> 8));
1351 } else {
1352 /* OPL3-SA2 (only OPL3 can be off partially) */
1353 if (parts & YM_POWER_OPL3)
1354 ym_write(sc, SA3_PWR_MNG,
1355 ym_read(sc, SA3_PWR_MNG) | SA2_PWR_MNG_FMPS);
1356 }
1357
1358 if (((sc->sc_on_blocks &= ~sc->sc_turning_off) & YM_POWER_ACTIVE) == 0)
1359 ym_chip_powerdown(sc);
1360
1361 sc->sc_turning_off = 0;
1362
1363 /* Restore the state of the chip. */
1364 bus_space_write_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX, sv);
1365 }
1366
1367 /*
1368 * Power control entry point.
1369 */
1370 void
1371 ym_power_ctl(struct ym_softc *sc, int parts, int onoff)
1372 {
1373 int need_restore_codec;
1374
1375 KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
1376
1377 DPRINTF(("%s: ym_power_ctl: parts = 0x%x, %s\n",
1378 DVNAME(sc), parts, onoff ? "on" : "off"));
1379
1380 /* This function may sleep --- needs locking. */
1381 while (sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) {
1382 sc->sc_in_power_ctl |= YM_POWER_CTL_WANTED;
1383 DPRINTF(("%s: ym_power_ctl: sleeping\n", DVNAME(sc)));
1384 cv_wait(&sc->sc_cv, &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1385 DPRINTF(("%s: ym_power_ctl: awaken\n", DVNAME(sc)));
1386 }
1387 sc->sc_in_power_ctl |= YM_POWER_CTL_INUSE;
1388
1389 /* If ON requested to parts which are scheduled to OFF, cancel it. */
1390 if (onoff && sc->sc_turning_off && (sc->sc_turning_off &= ~parts) == 0)
1391 callout_halt(&sc->sc_powerdown_ch,
1392 &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1393
1394 if (!onoff && sc->sc_turning_off)
1395 parts &= ~sc->sc_turning_off;
1396
1397 /* Discard bits which are currently {on,off}. */
1398 parts &= onoff ? ~sc->sc_on_blocks : sc->sc_on_blocks;
1399
1400 /* Cancel previous timeout if needed. */
1401 if (parts != 0 && sc->sc_turning_off)
1402 callout_halt(&sc->sc_powerdown_ch,
1403 &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
1404
1405 if (parts == 0)
1406 goto unlock; /* no work to do */
1407
1408 if (onoff) {
1409 /* Turning on is done immediately. */
1410
1411 /* If the chip is off, turn it on. */
1412 if ((sc->sc_on_blocks & YM_POWER_ACTIVE) == 0)
1413 ym_chip_powerup(sc, 0);
1414
1415 need_restore_codec = (parts & YM_POWER_CODEC_DIGITAL) &&
1416 (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) == 0;
1417
1418 sc->sc_on_blocks |= parts;
1419 if (parts & YM_POWER_CODEC_CTL)
1420 parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_R;
1421
1422 if (YM_IS_SA3(sc)) {
1423 /* OPL3-SA3 */
1424 ym_write(sc, SA3_DPWRDWN,
1425 ym_read(sc, SA3_DPWRDWN) & (u_int8_t)~parts);
1426 ym_write(sc, SA3_APWRDWN,
1427 ym_read(sc, SA3_APWRDWN) & ~(parts >> 8));
1428 } else {
1429 /* OPL3-SA2 (only OPL3 can be off partially) */
1430 if (parts & YM_POWER_OPL3)
1431 ym_write(sc, SA3_PWR_MNG,
1432 ym_read(sc, SA3_PWR_MNG)
1433 & ~SA2_PWR_MNG_FMPS);
1434 }
1435 if (need_restore_codec)
1436 ym_restore_codec_regs(sc);
1437 } else {
1438 /* Turning off is delayed. */
1439 sc->sc_turning_off |= parts;
1440 }
1441
1442 /* Schedule turning off. */
1443 if (sc->sc_pow_mode != YM_POWER_NOSAVE && sc->sc_turning_off)
1444 callout_reset(&sc->sc_powerdown_ch, hz * sc->sc_pow_timeout,
1445 ym_powerdown_callout, sc);
1446
1447 unlock:
1448 if (sc->sc_in_power_ctl & YM_POWER_CTL_WANTED)
1449 cv_broadcast(&sc->sc_cv);
1450 sc->sc_in_power_ctl = 0;
1451 }
1452 #endif /* not AUDIO_NO_POWER_CTL */
1453