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ym.c revision 1.46.4.1
      1 /*	$NetBSD: ym.c,v 1.46.4.1 2020/02/29 20:19:09 ad Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1999-2002, 2008 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by ITOH Yasufumi.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 /*
     33  * Copyright (c) 1998 Constantine Sapuntzakis. All rights reserved.
     34  *
     35  * Redistribution and use in source and binary forms, with or without
     36  * modification, are permitted provided that the following conditions
     37  * are met:
     38  * 1. Redistributions of source code must retain the above copyright
     39  *    notice, this list of conditions and the following disclaimer.
     40  * 2. Redistributions in binary form must reproduce the above copyright
     41  *    notice, this list of conditions and the following disclaimer in the
     42  *    documentation and/or other materials provided with the distribution.
     43  * 3. The name of the author may not be used to endorse or promote products
     44  *    derived from this software without specific prior written permission.
     45  *
     46  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     47  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     48  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     49  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     50  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     51  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     52  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     53  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     54  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     55  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     56  */
     57 
     58 /*
     59  *  Original code from OpenBSD.
     60  */
     61 
     62 #include <sys/cdefs.h>
     63 __KERNEL_RCSID(0, "$NetBSD: ym.c,v 1.46.4.1 2020/02/29 20:19:09 ad Exp $");
     64 
     65 #include "mpu_ym.h"
     66 #include "opt_ym.h"
     67 
     68 #include <sys/param.h>
     69 #include <sys/systm.h>
     70 #include <sys/errno.h>
     71 #include <sys/device.h>
     72 #include <sys/fcntl.h>
     73 #include <sys/kernel.h>
     74 #include <sys/proc.h>
     75 
     76 #include <sys/cpu.h>
     77 #include <sys/intr.h>
     78 #include <sys/bus.h>
     79 
     80 #include <sys/audioio.h>
     81 #include <dev/audio/audio_if.h>
     82 
     83 #include <dev/isa/isavar.h>
     84 #include <dev/isa/isadmavar.h>
     85 
     86 #include <dev/ic/ad1848reg.h>
     87 #include <dev/isa/ad1848var.h>
     88 #include <dev/ic/opl3sa3reg.h>
     89 #include <dev/isa/wssreg.h>
     90 #if NMPU_YM > 0
     91 #include <dev/ic/mpuvar.h>
     92 #endif
     93 #include <dev/isa/ymvar.h>
     94 #include <dev/isa/sbreg.h>
     95 
     96 /* Power management mode. */
     97 #ifndef YM_POWER_MODE
     98 #define YM_POWER_MODE		YM_POWER_POWERSAVE
     99 #endif
    100 
    101 /* Time in second before power down the chip. */
    102 #ifndef YM_POWER_OFF_SEC
    103 #define YM_POWER_OFF_SEC	5
    104 #endif
    105 
    106 /* Default mixer settings. */
    107 #ifndef YM_VOL_MASTER
    108 #define YM_VOL_MASTER		208
    109 #endif
    110 
    111 #ifndef YM_VOL_DAC
    112 #define YM_VOL_DAC		224
    113 #endif
    114 
    115 #ifndef YM_VOL_OPL3
    116 #define YM_VOL_OPL3		184
    117 #endif
    118 
    119 /*
    120  * Default position of the equalizer.
    121  */
    122 #ifndef YM_DEFAULT_TREBLE
    123 #define YM_DEFAULT_TREBLE	YM_EQ_FLAT_OFFSET
    124 #endif
    125 #ifndef YM_DEFAULT_BASS
    126 #define YM_DEFAULT_BASS		YM_EQ_FLAT_OFFSET
    127 #endif
    128 
    129 #ifdef __i386__		/* XXX */
    130 # include "joy.h"
    131 #else
    132 # define NJOY	0
    133 #endif
    134 
    135 #ifdef AUDIO_DEBUG
    136 #define DPRINTF(x)	if (ymdebug) printf x
    137 int	ymdebug = 0;
    138 #else
    139 #define DPRINTF(x)
    140 #endif
    141 #define DVNAME(softc)	(device_xname((softc)->sc_ad1848.sc_ad1848.sc_dev))
    142 
    143 int	ym_getdev(void *, struct audio_device *);
    144 int	ym_mixer_set_port(void *, mixer_ctrl_t *);
    145 int	ym_mixer_get_port(void *, mixer_ctrl_t *);
    146 int	ym_query_devinfo(void *, mixer_devinfo_t *);
    147 int	ym_intr(void *);
    148 #ifndef AUDIO_NO_POWER_CTL
    149 static void ym_save_codec_regs(struct ym_softc *);
    150 static void ym_restore_codec_regs(struct ym_softc *);
    151 int	ym_codec_power_ctl(void *, int);
    152 static void ym_chip_powerdown(struct ym_softc *);
    153 static void ym_chip_powerup(struct ym_softc *, int);
    154 static void	ym_powerdown_blocks(struct ym_softc *);
    155 static void	ym_powerdown_callout(void *);
    156 void	ym_power_ctl(struct ym_softc *, int, int);
    157 #endif
    158 
    159 static void ym_init(struct ym_softc *);
    160 static void ym_mute(struct ym_softc *, int, int);
    161 static void ym_set_master_gain(struct ym_softc *, struct ad1848_volume*);
    162 static void ym_hvol_to_master_gain(struct ym_softc *);
    163 static void ym_set_mic_gain(struct ym_softc *, int);
    164 static void ym_set_3d(struct ym_softc *, mixer_ctrl_t *,
    165 	struct ad1848_volume *, int);
    166 static bool ym_suspend(device_t, const pmf_qual_t *);
    167 static bool ym_resume(device_t, const pmf_qual_t *);
    168 
    169 
    170 const struct audio_hw_if ym_hw_if = {
    171 	.open			= ad1848_isa_open,
    172 	.close			= ad1848_isa_close,
    173 	.query_format		= ad1848_query_format,
    174 	.set_format		= ad1848_set_format,
    175 	.commit_settings	= ad1848_commit_settings,
    176 	.halt_output		= ad1848_isa_halt_output,
    177 	.halt_input		= ad1848_isa_halt_input,
    178 	.getdev			= ym_getdev,
    179 	.set_port		= ym_mixer_set_port,
    180 	.get_port		= ym_mixer_get_port,
    181 	.query_devinfo		= ym_query_devinfo,
    182 	.allocm			= ad1848_isa_malloc,
    183 	.freem			= ad1848_isa_free,
    184 	.round_buffersize	= ad1848_isa_round_buffersize,
    185 	.get_props		= ad1848_isa_get_props,
    186 	.trigger_output		= ad1848_isa_trigger_output,
    187 	.trigger_input		= ad1848_isa_trigger_input,
    188 	.get_locks		= ad1848_get_locks,
    189 };
    190 
    191 static inline int ym_read(struct ym_softc *, int);
    192 static inline void ym_write(struct ym_softc *, int, int);
    193 
    194 void
    195 ym_attach(struct ym_softc *sc)
    196 {
    197 	static struct ad1848_volume vol_master = {YM_VOL_MASTER, YM_VOL_MASTER};
    198 	static struct ad1848_volume vol_dac    = {YM_VOL_DAC,    YM_VOL_DAC};
    199 	static struct ad1848_volume vol_opl3   = {YM_VOL_OPL3,   YM_VOL_OPL3};
    200 	struct ad1848_softc *ac;
    201 	mixer_ctrl_t mctl;
    202 	struct audio_attach_args arg;
    203 
    204 	ac = &sc->sc_ad1848.sc_ad1848;
    205 	callout_init(&sc->sc_powerdown_ch, CALLOUT_MPSAFE);
    206 	cv_init(&sc->sc_cv, "ym");
    207 	ad1848_init_locks(ac, IPL_AUDIO);
    208 
    209 	/* Mute the output to reduce noise during initialization. */
    210 	ym_mute(sc, SA3_VOL_L, 1);
    211 	ym_mute(sc, SA3_VOL_R, 1);
    212 
    213 	sc->sc_version = ym_read(sc, SA3_MISC) & SA3_MISC_VER;
    214 	ac->chip_name = YM_IS_SA3(sc) ? "OPL3-SA3" : "OPL3-SA2";
    215 
    216 	sc->sc_ad1848.sc_ih = isa_intr_establish(sc->sc_ic, sc->ym_irq,
    217 	    IST_EDGE, IPL_AUDIO, ym_intr, sc);
    218 
    219 #ifndef AUDIO_NO_POWER_CTL
    220 	sc->sc_ad1848.powerctl = ym_codec_power_ctl;
    221 	sc->sc_ad1848.powerarg = sc;
    222 #endif
    223 	ad1848_isa_attach(&sc->sc_ad1848);
    224 	printf("\n");
    225 	ac->parent = sc;
    226 
    227 	/* Establish chip in well known mode */
    228 	ym_set_master_gain(sc, &vol_master);
    229 	ym_set_mic_gain(sc, 0);
    230 	sc->master_mute = 0;
    231 
    232 	/* Override ad1848 settings. */
    233 	ad1848_set_channel_gain(ac, AD1848_DAC_CHANNEL, &vol_dac);
    234 	ad1848_set_channel_gain(ac, AD1848_AUX2_CHANNEL, &vol_opl3);
    235 
    236 	/*
    237 	 * Mute all external sources.  If you change this, you must
    238 	 * also change the initial value of sc->sc_external_sources
    239 	 * (currently 0 --- no external source is active).
    240 	 */
    241 	sc->mic_mute = 1;
    242 	ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
    243 	ad1848_mute_channel(ac, AD1848_AUX1_CHANNEL, MUTE_ALL);	/* CD */
    244 	ad1848_mute_channel(ac, AD1848_LINE_CHANNEL, MUTE_ALL);	/* line */
    245 	ac->mute[AD1848_AUX1_CHANNEL] = MUTE_ALL;
    246 	ac->mute[AD1848_LINE_CHANNEL] = MUTE_ALL;
    247 	/* speaker is muted by default */
    248 
    249 	/* We use only one IRQ (IRQ-A). */
    250 	ym_write(sc, SA3_IRQ_CONF, SA3_IRQ_CONF_MPU_A | SA3_IRQ_CONF_WSS_A);
    251 	ym_write(sc, SA3_HVOL_INTR_CNF, SA3_HVOL_INTR_CNF_A);
    252 
    253 	/* audio at ym attachment */
    254 	sc->sc_audiodev = audio_attach_mi(&ym_hw_if, ac, ac->sc_dev);
    255 
    256 	/* opl at ym attachment */
    257 	if (sc->sc_opl_ioh) {
    258 		arg.type = AUDIODEV_TYPE_OPL;
    259 		arg.hwif = 0;
    260 		arg.hdl = 0;
    261 		(void)config_found(ac->sc_dev, &arg, audioprint);
    262 	}
    263 
    264 #if NMPU_YM > 0
    265 	/* mpu at ym attachment */
    266 	if (sc->sc_mpu_ioh) {
    267 		arg.type = AUDIODEV_TYPE_MPU;
    268 		arg.hwif = 0;
    269 		arg.hdl = 0;
    270 		sc->sc_mpudev = config_found(ac->sc_dev, &arg, audioprint);
    271 	}
    272 #endif
    273 
    274 	/* This must be AFTER the attachment of sub-devices. */
    275 	mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
    276 	ym_init(sc);
    277 
    278 #ifndef AUDIO_NO_POWER_CTL
    279 	/*
    280 	 * Initialize power control.
    281 	 */
    282 	sc->sc_pow_mode = YM_POWER_MODE;
    283 	sc->sc_pow_timeout = YM_POWER_OFF_SEC;
    284 
    285 	sc->sc_on_blocks = sc->sc_turning_off =
    286 	    YM_POWER_CODEC_P | YM_POWER_CODEC_R |
    287 	    YM_POWER_OPL3 | YM_POWER_MPU401 | YM_POWER_3D |
    288 	    YM_POWER_CODEC_DA | YM_POWER_CODEC_AD | YM_POWER_OPL3_DA;
    289 #if NJOY > 0
    290 	sc->sc_on_blocks |= YM_POWER_JOYSTICK;	/* prevents chip powerdown */
    291 #endif
    292 	ym_powerdown_blocks(sc);
    293 	mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
    294 
    295 	if (!pmf_device_register(ac->sc_dev, ym_suspend, ym_resume)) {
    296 		aprint_error_dev(ac->sc_dev,
    297 		    "cannot set power mgmt handler\n");
    298 	}
    299 #endif
    300 
    301 	/* Set tone control to the default position. */
    302 	mctl.un.value.num_channels = 1;
    303 	mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_TREBLE;
    304 	mctl.dev = YM_MASTER_TREBLE;
    305 	ym_mixer_set_port(sc, &mctl);
    306 	mctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = YM_DEFAULT_BASS;
    307 	mctl.dev = YM_MASTER_BASS;
    308 	ym_mixer_set_port(sc, &mctl);
    309 
    310 	/* Unmute the output now if the chip is on. */
    311 #ifndef AUDIO_NO_POWER_CTL
    312 	if (sc->sc_on_blocks & YM_POWER_ACTIVE)
    313 #endif
    314 	{
    315 		ym_mute(sc, SA3_VOL_L, sc->master_mute);
    316 		ym_mute(sc, SA3_VOL_R, sc->master_mute);
    317 	}
    318 }
    319 
    320 static inline int
    321 ym_read(struct ym_softc *sc, int reg)
    322 {
    323 
    324 	bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
    325 	    SA3_CTL_INDEX, (reg & 0xff));
    326 	return bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_DATA);
    327 }
    328 
    329 static inline void
    330 ym_write(struct ym_softc *sc, int reg, int data)
    331 {
    332 
    333 	bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
    334 	    SA3_CTL_INDEX, (reg & 0xff));
    335 	bus_space_write_1(sc->sc_iot, sc->sc_controlioh,
    336 	    SA3_CTL_DATA, (data & 0xff));
    337 }
    338 
    339 static void
    340 ym_init(struct ym_softc *sc)
    341 {
    342 	uint8_t dpd, apd;
    343 
    344 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
    345 
    346 	/* Mute SoundBlaster output if possible. */
    347 	if (sc->sc_sb_ioh) {
    348 		bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_ADDR,
    349 		    SBP_MASTER_VOL);
    350 		bus_space_write_1(sc->sc_iot, sc->sc_sb_ioh, SBP_MIXER_DATA,
    351 		    0x00);
    352 	}
    353 
    354 	if (!YM_IS_SA3(sc)) {
    355 		/* OPL3-SA2 */
    356 		ym_write(sc, SA3_PWR_MNG, SA2_PWR_MNG_CLKO |
    357 		    (sc->sc_opl_ioh == 0 ? SA2_PWR_MNG_FMPS : 0));
    358 		return;
    359 	}
    360 
    361 	/* OPL3-SA3 */
    362 	/* Figure out which part can be power down. */
    363 	dpd = SA3_DPWRDWN_SB		/* we never use SB */
    364 #if NMPU_YM > 0
    365 	    | (sc->sc_mpu_ioh ? 0 : SA3_DPWRDWN_MPU)
    366 #else
    367 	    | SA3_DPWRDWN_MPU
    368 #endif
    369 #if NJOY == 0
    370 	    | SA3_DPWRDWN_JOY
    371 #endif
    372 	    | SA3_DPWRDWN_PNP	/* ISA Plug and Play is done */
    373 	    /*
    374 	     * The master clock is for external wavetable synthesizer
    375 	     * OPL4-ML (YMF704) or OPL4-ML2 (YMF721),
    376 	     * and is currently unused.
    377 	     */
    378 	    | SA3_DPWRDWN_MCLKO;
    379 
    380 	apd = SA3_APWRDWN_SBDAC;	/* we never use SB */
    381 
    382 	/* Power down OPL3 if not attached. */
    383 	if (sc->sc_opl_ioh == 0) {
    384 		dpd |= SA3_DPWRDWN_FM;
    385 		apd |= SA3_APWRDWN_FMDAC;
    386 	}
    387 	/* CODEC is always attached. */
    388 
    389 	/* Power down unused digital parts. */
    390 	ym_write(sc, SA3_DPWRDWN, dpd);
    391 
    392 	/* Power down unused analog parts. */
    393 	ym_write(sc, SA3_APWRDWN, apd);
    394 }
    395 
    396 
    397 int
    398 ym_getdev(void *addr, struct audio_device *retp)
    399 {
    400 	struct ym_softc *sc;
    401 	struct ad1848_softc *ac;
    402 
    403 	sc = addr;
    404 	ac = &sc->sc_ad1848.sc_ad1848;
    405 	strlcpy(retp->name, ac->chip_name, sizeof(retp->name));
    406 	snprintf(retp->version, sizeof(retp->version), "%d", sc->sc_version);
    407 	strlcpy(retp->config, "ym", sizeof(retp->config));
    408 
    409 	return 0;
    410 }
    411 
    412 
    413 static ad1848_devmap_t mappings[] = {
    414 	{ YM_DAC_LVL, AD1848_KIND_LVL, AD1848_DAC_CHANNEL },
    415 	{ YM_MIDI_LVL, AD1848_KIND_LVL, AD1848_AUX2_CHANNEL },
    416 	{ YM_CD_LVL, AD1848_KIND_LVL, AD1848_AUX1_CHANNEL },
    417 	{ YM_LINE_LVL, AD1848_KIND_LVL, AD1848_LINE_CHANNEL },
    418 	{ YM_SPEAKER_LVL, AD1848_KIND_LVL, AD1848_MONO_CHANNEL },
    419 	{ YM_MONITOR_LVL, AD1848_KIND_LVL, AD1848_MONITOR_CHANNEL },
    420 	{ YM_DAC_MUTE, AD1848_KIND_MUTE, AD1848_DAC_CHANNEL },
    421 	{ YM_MIDI_MUTE, AD1848_KIND_MUTE, AD1848_AUX2_CHANNEL },
    422 	{ YM_CD_MUTE, AD1848_KIND_MUTE, AD1848_AUX1_CHANNEL },
    423 	{ YM_LINE_MUTE, AD1848_KIND_MUTE, AD1848_LINE_CHANNEL },
    424 	{ YM_SPEAKER_MUTE, AD1848_KIND_MUTE, AD1848_MONO_CHANNEL },
    425 	{ YM_MONITOR_MUTE, AD1848_KIND_MUTE, AD1848_MONITOR_CHANNEL },
    426 	{ YM_REC_LVL, AD1848_KIND_RECORDGAIN, -1 },
    427 	{ YM_RECORD_SOURCE, AD1848_KIND_RECORDSOURCE, -1}
    428 };
    429 
    430 #define NUMMAP	(sizeof(mappings) / sizeof(mappings[0]))
    431 
    432 
    433 static void
    434 ym_mute(struct ym_softc *sc, int left_reg, int mute)
    435 {
    436 	uint8_t reg;
    437 
    438 	reg = ym_read(sc, left_reg);
    439 	if (mute)
    440 		ym_write(sc, left_reg, reg | 0x80);
    441 	else
    442 		ym_write(sc, left_reg, reg & ~0x80);
    443 }
    444 
    445 
    446 static void
    447 ym_set_master_gain(struct ym_softc *sc, struct ad1848_volume *vol)
    448 {
    449 	u_int atten;
    450 
    451 	sc->master_gain = *vol;
    452 
    453 	atten = ((AUDIO_MAX_GAIN - vol->left) * (SA3_VOL_MV + 1)) /
    454 		(AUDIO_MAX_GAIN + 1);
    455 
    456 	ym_write(sc, SA3_VOL_L, (ym_read(sc, SA3_VOL_L) & ~SA3_VOL_MV) | atten);
    457 
    458 	atten = ((AUDIO_MAX_GAIN - vol->right) * (SA3_VOL_MV + 1)) /
    459 		(AUDIO_MAX_GAIN + 1);
    460 
    461 	ym_write(sc, SA3_VOL_R, (ym_read(sc, SA3_VOL_R) & ~SA3_VOL_MV) | atten);
    462 }
    463 
    464 /*
    465  * Read current setting of master volume from hardware
    466  * and update the software value if changed.
    467  * [SA3] This function clears hardware volume interrupt.
    468  */
    469 static void
    470 ym_hvol_to_master_gain(struct ym_softc *sc)
    471 {
    472 	u_int prevval, val;
    473 	int changed;
    474 
    475 	changed = 0;
    476 	val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_L);
    477 	prevval = (sc->master_gain.left * (SA3_VOL_MV + 1)) /
    478 	    (AUDIO_MAX_GAIN + 1);
    479 	if (val != prevval) {
    480 		sc->master_gain.left =
    481 		    val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
    482 		changed = 1;
    483 	}
    484 
    485 	val = SA3_VOL_MV & ~ym_read(sc, SA3_VOL_R);
    486 	prevval = (sc->master_gain.right * (SA3_VOL_MV + 1)) /
    487 	    (AUDIO_MAX_GAIN + 1);
    488 	if (val != prevval) {
    489 		sc->master_gain.right =
    490 		    val * ((AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1));
    491 		changed = 1;
    492 	}
    493 
    494 #if 0	/* XXX NOT YET */
    495 	/* Notify the change to async processes. */
    496 	if (changed && sc->sc_audiodev)
    497 		mixer_signal(sc->sc_audiodev);
    498 #else
    499 	__USE(changed);
    500 #endif
    501 }
    502 
    503 static void
    504 ym_set_mic_gain(struct ym_softc *sc, int vol)
    505 {
    506 	u_int atten;
    507 
    508 	sc->mic_gain = vol;
    509 
    510 	atten = ((AUDIO_MAX_GAIN - vol) * (SA3_MIC_MCV + 1)) /
    511 		(AUDIO_MAX_GAIN + 1);
    512 
    513 	ym_write(sc, SA3_MIC_VOL,
    514 		 (ym_read(sc, SA3_MIC_VOL) & ~SA3_MIC_MCV) | atten);
    515 }
    516 
    517 static void
    518 ym_set_3d(struct ym_softc *sc, mixer_ctrl_t *cp,
    519     struct ad1848_volume *val, int reg)
    520 {
    521 	uint8_t l, r, e;
    522 
    523 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
    524 
    525 	ad1848_to_vol(cp, val);
    526 
    527 	l = val->left;
    528 	r = val->right;
    529 	if (reg != SA3_3D_WIDE) {
    530 		/* flat on center */
    531 		l = YM_EQ_EXPAND_VALUE(l);
    532 		r = YM_EQ_EXPAND_VALUE(r);
    533 	}
    534 
    535 	e = (l * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
    536 	    (AUDIO_MAX_GAIN + 1) << SA3_3D_LSHIFT |
    537 	    (r * (SA3_3D_BITS + 1) + (SA3_3D_BITS + 1) / 2) /
    538 	    (AUDIO_MAX_GAIN + 1) << SA3_3D_RSHIFT;
    539 
    540 #ifndef AUDIO_NO_POWER_CTL
    541 	/* turn wide stereo on if necessary */
    542 	if (e)
    543 		ym_power_ctl(sc, YM_POWER_3D, 1);
    544 #endif
    545 
    546 	ym_write(sc, reg, e);
    547 
    548 #ifndef AUDIO_NO_POWER_CTL
    549 	/* turn wide stereo off if necessary */
    550 	if (YM_EQ_OFF(&sc->sc_treble) && YM_EQ_OFF(&sc->sc_bass) &&
    551 	    YM_WIDE_OFF(&sc->sc_wide))
    552 		ym_power_ctl(sc, YM_POWER_3D, 0);
    553 #endif
    554 }
    555 
    556 int
    557 ym_mixer_set_port(void *addr, mixer_ctrl_t *cp)
    558 {
    559 	struct ad1848_softc *ac;
    560 	struct ym_softc *sc;
    561 	struct ad1848_volume vol;
    562 	int error;
    563 	uint8_t extsources;
    564 
    565 	ac = addr;
    566 	sc = ac->parent;
    567 	error = 0;
    568 	DPRINTF(("%s: ym_mixer_set_port: dev 0x%x, type 0x%x, 0x%x (%d; %d, %d)\n",
    569 		DVNAME(sc), cp->dev, cp->type, cp->un.ord,
    570 		cp->un.value.num_channels, cp->un.value.level[0],
    571 		cp->un.value.level[1]));
    572 
    573 	/* SA2 doesn't have equalizer */
    574 	if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
    575 		return ENXIO;
    576 
    577 	mutex_spin_enter(&ac->sc_intr_lock);
    578 
    579 #ifndef AUDIO_NO_POWER_CTL
    580 	/* Power-up chip */
    581 	ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
    582 #endif
    583 
    584 	switch (cp->dev) {
    585 	case YM_OUTPUT_LVL:
    586 		ad1848_to_vol(cp, &vol);
    587 		ym_set_master_gain(sc, &vol);
    588 		goto out;
    589 
    590 	case YM_OUTPUT_MUTE:
    591 		sc->master_mute = (cp->un.ord != 0);
    592 		ym_mute(sc, SA3_VOL_L, sc->master_mute);
    593 		ym_mute(sc, SA3_VOL_R, sc->master_mute);
    594 		goto out;
    595 
    596 	case YM_MIC_LVL:
    597 		if (cp->un.value.num_channels != 1)
    598 			error = EINVAL;
    599 		else
    600 			ym_set_mic_gain(sc,
    601 			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
    602 		goto out;
    603 
    604 	case YM_MASTER_EQMODE:
    605 		sc->sc_eqmode = cp->un.ord & SA3_SYS_CTL_YMODE;
    606 		ym_write(sc, SA3_SYS_CTL, (ym_read(sc, SA3_SYS_CTL) &
    607 			     ~SA3_SYS_CTL_YMODE) | sc->sc_eqmode);
    608 		goto out;
    609 
    610 	case YM_MASTER_TREBLE:
    611 		ym_set_3d(sc, cp, &sc->sc_treble, SA3_3D_TREBLE);
    612 		goto out;
    613 
    614 	case YM_MASTER_BASS:
    615 		ym_set_3d(sc, cp, &sc->sc_bass, SA3_3D_BASS);
    616 		goto out;
    617 
    618 	case YM_MASTER_WIDE:
    619 		ym_set_3d(sc, cp, &sc->sc_wide, SA3_3D_WIDE);
    620 		goto out;
    621 
    622 #ifndef AUDIO_NO_POWER_CTL
    623 	case YM_PWR_MODE:
    624 		if ((unsigned) cp->un.ord > YM_POWER_NOSAVE)
    625 			error = EINVAL;
    626 		else
    627 			sc->sc_pow_mode = cp->un.ord;
    628 		goto out;
    629 
    630 	case YM_PWR_TIMEOUT:
    631 		if (cp->un.value.num_channels != 1)
    632 			error = EINVAL;
    633 		else
    634 			sc->sc_pow_timeout =
    635 			    cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
    636 		goto out;
    637 
    638 	/*
    639 	 * Needs power-up to hear external sources.
    640 	 */
    641 	case YM_CD_MUTE:
    642 	case YM_LINE_MUTE:
    643 	case YM_SPEAKER_MUTE:
    644 	case YM_MIC_MUTE:
    645 		extsources = YM_MIXER_TO_XS(cp->dev);
    646 		if (cp->un.ord) {
    647 			if ((sc->sc_external_sources &= ~extsources) == 0) {
    648 				/*
    649 				 * All the external sources are muted
    650 				 *  --- no need to keep the chip on.
    651 				 */
    652 				ym_power_ctl(sc, YM_POWER_EXT_SRC, 0);
    653 				DPRINTF(("%s: ym_mixer_set_port: off for ext\n",
    654 					DVNAME(sc)));
    655 			}
    656 		} else {
    657 			/* mute off - power-up the chip */
    658 			sc->sc_external_sources |= extsources;
    659 			ym_power_ctl(sc, YM_POWER_EXT_SRC, 1);
    660 			DPRINTF(("%s: ym_mixer_set_port: on for ext\n",
    661 				DVNAME(sc)));
    662 		}
    663 		break;	/* fall to ad1848_mixer_set_port() */
    664 
    665 	/*
    666 	 * Power on/off the playback part for monitoring.
    667 	 */
    668 	case YM_MONITOR_MUTE:
    669 		if ((ac->open_mode & (FREAD | FWRITE)) == FREAD)
    670 			ym_power_ctl(sc, YM_POWER_CODEC_P | YM_POWER_CODEC_DA,
    671 			    cp->un.ord == 0);
    672 		break;	/* fall to ad1848_mixer_set_port() */
    673 #endif
    674 	}
    675 
    676 	error = ad1848_mixer_set_port(ac, mappings, NUMMAP, cp);
    677 
    678 	if (error != ENXIO)
    679 		goto out;
    680 
    681 	error = 0;
    682 
    683 	switch (cp->dev) {
    684 	case YM_MIC_MUTE:
    685 		sc->mic_mute = (cp->un.ord != 0);
    686 		ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
    687 		break;
    688 
    689 	default:
    690 		error = ENXIO;
    691 		break;
    692 	}
    693 
    694 out:
    695 #ifndef AUDIO_NO_POWER_CTL
    696 	/* Power-down chip */
    697 	ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
    698 #endif
    699 	mutex_spin_exit(&ac->sc_intr_lock);
    700 
    701 	return error;
    702 }
    703 
    704 int
    705 ym_mixer_get_port(void *addr, mixer_ctrl_t *cp)
    706 {
    707 	struct ad1848_softc *ac;
    708 	struct ym_softc *sc;
    709 	int error;
    710 
    711 	ac = addr;
    712 	sc = ac->parent;
    713 	/* SA2 doesn't have equalizer */
    714 	if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(cp->dev))
    715 		return ENXIO;
    716 
    717 	switch (cp->dev) {
    718 	case YM_OUTPUT_LVL:
    719 		if (!YM_IS_SA3(sc)) {
    720 			/*
    721 			 * SA2 doesn't have hardware volume interrupt.
    722 			 * Read current value and update every time.
    723 			 */
    724 			mutex_spin_enter(&ac->sc_intr_lock);
    725 #ifndef AUDIO_NO_POWER_CTL
    726 			/* Power-up chip */
    727 			ym_power_ctl(sc, YM_POWER_CODEC_CTL, 1);
    728 #endif
    729 			ym_hvol_to_master_gain(sc);
    730 #ifndef AUDIO_NO_POWER_CTL
    731 			/* Power-down chip */
    732 			ym_power_ctl(sc, YM_POWER_CODEC_CTL, 0);
    733 #endif
    734 			mutex_spin_exit(&ac->sc_intr_lock);
    735 		}
    736 		ad1848_from_vol(cp, &sc->master_gain);
    737 		return 0;
    738 
    739 	case YM_OUTPUT_MUTE:
    740 		cp->un.ord = sc->master_mute;
    741 		return 0;
    742 
    743 	case YM_MIC_LVL:
    744 		if (cp->un.value.num_channels != 1)
    745 			return EINVAL;
    746 		cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->mic_gain;
    747 		return 0;
    748 
    749 	case YM_MASTER_EQMODE:
    750 		cp->un.ord = sc->sc_eqmode;
    751 		return 0;
    752 
    753 	case YM_MASTER_TREBLE:
    754 		ad1848_from_vol(cp, &sc->sc_treble);
    755 		return 0;
    756 
    757 	case YM_MASTER_BASS:
    758 		ad1848_from_vol(cp, &sc->sc_bass);
    759 		return 0;
    760 
    761 	case YM_MASTER_WIDE:
    762 		ad1848_from_vol(cp, &sc->sc_wide);
    763 		return 0;
    764 
    765 #ifndef AUDIO_NO_POWER_CTL
    766 	case YM_PWR_MODE:
    767 		cp->un.ord = sc->sc_pow_mode;
    768 		return 0;
    769 
    770 	case YM_PWR_TIMEOUT:
    771 		if (cp->un.value.num_channels != 1)
    772 			return EINVAL;
    773 		cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_pow_timeout;
    774 		return 0;
    775 #endif
    776 	}
    777 
    778 	error = ad1848_mixer_get_port(ac, mappings, NUMMAP, cp);
    779 
    780 	if (error != ENXIO)
    781 		return error;
    782 
    783 	error = 0;
    784 
    785 	switch (cp->dev) {
    786 	case YM_MIC_MUTE:
    787 		cp->un.ord = sc->mic_mute;
    788 		break;
    789 
    790 	default:
    791 		error = ENXIO;
    792 		break;
    793 	}
    794 
    795 	return error;
    796 }
    797 
    798 static const char *mixer_classes[] = {
    799 	AudioCinputs, AudioCrecord, AudioCoutputs, AudioCmonitor,
    800 #ifndef AUDIO_NO_POWER_CTL
    801 	AudioCpower,
    802 #endif
    803 	AudioCequalization
    804 };
    805 
    806 int
    807 ym_query_devinfo(void *addr, mixer_devinfo_t *dip)
    808 {
    809 	static const char *mixer_port_names[] = {
    810 		AudioNdac, AudioNmidi, AudioNcd, AudioNline, AudioNspeaker,
    811 		AudioNmicrophone, AudioNmonitor
    812 	};
    813 	struct ad1848_softc *ac;
    814 	struct ym_softc *sc;
    815 
    816 	ac = addr;
    817 	sc = ac->parent;
    818 	/* SA2 doesn't have equalizer */
    819 	if (!YM_IS_SA3(sc) && YM_MIXER_SA3_ONLY(dip->index))
    820 		return ENXIO;
    821 
    822 	dip->next = dip->prev = AUDIO_MIXER_LAST;
    823 
    824 	switch(dip->index) {
    825 	case YM_INPUT_CLASS:
    826 	case YM_OUTPUT_CLASS:
    827 	case YM_MONITOR_CLASS:
    828 	case YM_RECORD_CLASS:
    829 #ifndef AUDIO_NO_POWER_CTL
    830 	case YM_PWR_CLASS:
    831 #endif
    832 	case YM_EQ_CLASS:
    833 		dip->type = AUDIO_MIXER_CLASS;
    834 		dip->mixer_class = dip->index;
    835 		strcpy(dip->label.name,
    836 		       mixer_classes[dip->index - YM_INPUT_CLASS]);
    837 		break;
    838 
    839 	case YM_DAC_LVL:
    840 	case YM_MIDI_LVL:
    841 	case YM_CD_LVL:
    842 	case YM_LINE_LVL:
    843 	case YM_SPEAKER_LVL:
    844 	case YM_MIC_LVL:
    845 	case YM_MONITOR_LVL:
    846 		dip->type = AUDIO_MIXER_VALUE;
    847 		if (dip->index == YM_MONITOR_LVL)
    848 			dip->mixer_class = YM_MONITOR_CLASS;
    849 		else
    850 			dip->mixer_class = YM_INPUT_CLASS;
    851 
    852 		dip->next = dip->index + 7;
    853 
    854 		strcpy(dip->label.name,
    855 		       mixer_port_names[dip->index - YM_DAC_LVL]);
    856 
    857 		if (dip->index == YM_SPEAKER_LVL ||
    858 		    dip->index == YM_MIC_LVL)
    859 			dip->un.v.num_channels = 1;
    860 		else
    861 			dip->un.v.num_channels = 2;
    862 
    863 		if (dip->index == YM_SPEAKER_LVL)
    864 			dip->un.v.delta = 1 << (8 - 4 /* valid bits */);
    865 		else if (dip->index == YM_DAC_LVL ||
    866 		    dip->index == YM_MONITOR_LVL)
    867 			dip->un.v.delta = 1 << (8 - 6 /* valid bits */);
    868 		else
    869 			dip->un.v.delta = 1 << (8 - 5 /* valid bits */);
    870 
    871 		strcpy(dip->un.v.units.name, AudioNvolume);
    872 		break;
    873 
    874 	case YM_DAC_MUTE:
    875 	case YM_MIDI_MUTE:
    876 	case YM_CD_MUTE:
    877 	case YM_LINE_MUTE:
    878 	case YM_SPEAKER_MUTE:
    879 	case YM_MIC_MUTE:
    880 	case YM_MONITOR_MUTE:
    881 		if (dip->index == YM_MONITOR_MUTE)
    882 			dip->mixer_class = YM_MONITOR_CLASS;
    883 		else
    884 			dip->mixer_class = YM_INPUT_CLASS;
    885 		dip->type = AUDIO_MIXER_ENUM;
    886 		dip->prev = dip->index - 7;
    887 	mute:
    888 		strcpy(dip->label.name, AudioNmute);
    889 		dip->un.e.num_mem = 2;
    890 		strcpy(dip->un.e.member[0].label.name, AudioNoff);
    891 		dip->un.e.member[0].ord = 0;
    892 		strcpy(dip->un.e.member[1].label.name, AudioNon);
    893 		dip->un.e.member[1].ord = 1;
    894 		break;
    895 
    896 
    897 	case YM_OUTPUT_LVL:
    898 		dip->type = AUDIO_MIXER_VALUE;
    899 		dip->mixer_class = YM_OUTPUT_CLASS;
    900 		dip->next = YM_OUTPUT_MUTE;
    901 		strcpy(dip->label.name, AudioNmaster);
    902 		dip->un.v.num_channels = 2;
    903 		dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_VOL_MV + 1);
    904 		strcpy(dip->un.v.units.name, AudioNvolume);
    905 		break;
    906 
    907 	case YM_OUTPUT_MUTE:
    908 		dip->mixer_class = YM_OUTPUT_CLASS;
    909 		dip->type = AUDIO_MIXER_ENUM;
    910 		dip->prev = YM_OUTPUT_LVL;
    911 		goto mute;
    912 
    913 
    914 	case YM_REC_LVL:	/* record level */
    915 		dip->type = AUDIO_MIXER_VALUE;
    916 		dip->mixer_class = YM_RECORD_CLASS;
    917 		dip->next = YM_RECORD_SOURCE;
    918 		strcpy(dip->label.name, AudioNrecord);
    919 		dip->un.v.num_channels = 2;
    920 		dip->un.v.delta = 1 << (8 - 4 /* valid bits */);
    921 		strcpy(dip->un.v.units.name, AudioNvolume);
    922 		break;
    923 
    924 	case YM_RECORD_SOURCE:
    925 		dip->mixer_class = YM_RECORD_CLASS;
    926 		dip->type = AUDIO_MIXER_ENUM;
    927 		dip->prev = YM_REC_LVL;
    928 		strcpy(dip->label.name, AudioNsource);
    929 		dip->un.e.num_mem = 4;
    930 		strcpy(dip->un.e.member[0].label.name, AudioNmicrophone);
    931 		dip->un.e.member[0].ord = MIC_IN_PORT;
    932 		strcpy(dip->un.e.member[1].label.name, AudioNline);
    933 		dip->un.e.member[1].ord = LINE_IN_PORT;
    934 		strcpy(dip->un.e.member[2].label.name, AudioNdac);
    935 		dip->un.e.member[2].ord = DAC_IN_PORT;
    936 		strcpy(dip->un.e.member[3].label.name, AudioNcd);
    937 		dip->un.e.member[3].ord = AUX1_IN_PORT;
    938 		break;
    939 
    940 
    941 	case YM_MASTER_EQMODE:
    942 		dip->type = AUDIO_MIXER_ENUM;
    943 		dip->mixer_class = YM_EQ_CLASS;
    944 		strcpy(dip->label.name, AudioNmode);
    945 		strcpy(dip->un.v.units.name, AudioNmode);
    946 		dip->un.e.num_mem = 4;
    947 		strcpy(dip->un.e.member[0].label.name, AudioNdesktop);
    948 		dip->un.e.member[0].ord = SA3_SYS_CTL_YMODE0;
    949 		strcpy(dip->un.e.member[1].label.name, AudioNlaptop);
    950 		dip->un.e.member[1].ord = SA3_SYS_CTL_YMODE1;
    951 		strcpy(dip->un.e.member[2].label.name, AudioNsubnote);
    952 		dip->un.e.member[2].ord = SA3_SYS_CTL_YMODE2;
    953 		strcpy(dip->un.e.member[3].label.name, AudioNhifi);
    954 		dip->un.e.member[3].ord = SA3_SYS_CTL_YMODE3;
    955 		break;
    956 
    957 	case YM_MASTER_TREBLE:
    958 		dip->type = AUDIO_MIXER_VALUE;
    959 		dip->mixer_class = YM_EQ_CLASS;
    960 		strcpy(dip->label.name, AudioNtreble);
    961 		dip->un.v.num_channels = 2;
    962 		dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1)
    963 		    >> YM_EQ_REDUCE_BIT;
    964 		strcpy(dip->un.v.units.name, AudioNtreble);
    965 		break;
    966 
    967 	case YM_MASTER_BASS:
    968 		dip->type = AUDIO_MIXER_VALUE;
    969 		dip->mixer_class = YM_EQ_CLASS;
    970 		strcpy(dip->label.name, AudioNbass);
    971 		dip->un.v.num_channels = 2;
    972 		dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1)
    973 		    >> YM_EQ_REDUCE_BIT;
    974 		strcpy(dip->un.v.units.name, AudioNbass);
    975 		break;
    976 
    977 	case YM_MASTER_WIDE:
    978 		dip->type = AUDIO_MIXER_VALUE;
    979 		dip->mixer_class = YM_EQ_CLASS;
    980 		strcpy(dip->label.name, AudioNsurround);
    981 		dip->un.v.num_channels = 2;
    982 		dip->un.v.delta = (AUDIO_MAX_GAIN + 1) / (SA3_3D_BITS + 1);
    983 		strcpy(dip->un.v.units.name, AudioNsurround);
    984 		break;
    985 
    986 
    987 #ifndef AUDIO_NO_POWER_CTL
    988 	case YM_PWR_MODE:
    989 		dip->type = AUDIO_MIXER_ENUM;
    990 		dip->mixer_class = YM_PWR_CLASS;
    991 		dip->next = YM_PWR_TIMEOUT;
    992 		strcpy(dip->label.name, AudioNsave);
    993 		dip->un.e.num_mem = 3;
    994 		strcpy(dip->un.e.member[0].label.name, AudioNpowerdown);
    995 		dip->un.e.member[0].ord = YM_POWER_POWERDOWN;
    996 		strcpy(dip->un.e.member[1].label.name, AudioNpowersave);
    997 		dip->un.e.member[1].ord = YM_POWER_POWERSAVE;
    998 		strcpy(dip->un.e.member[2].label.name, AudioNnosave);
    999 		dip->un.e.member[2].ord = YM_POWER_NOSAVE;
   1000 		break;
   1001 
   1002 	case YM_PWR_TIMEOUT:
   1003 		dip->type = AUDIO_MIXER_VALUE;
   1004 		dip->mixer_class = YM_PWR_CLASS;
   1005 		dip->prev = YM_PWR_MODE;
   1006 		strcpy(dip->label.name, AudioNtimeout);
   1007 		dip->un.v.num_channels = 1;
   1008 		strcpy(dip->un.v.units.name, AudioNtimeout);
   1009 		break;
   1010 #endif /* not AUDIO_NO_POWER_CTL */
   1011 
   1012 	default:
   1013 		return ENXIO;
   1014 		/*NOTREACHED*/
   1015 	}
   1016 
   1017 	return 0;
   1018 }
   1019 
   1020 int
   1021 ym_intr(void *arg)
   1022 {
   1023 	struct ym_softc *sc = arg;
   1024 #if NMPU_YM > 0
   1025 	struct mpu_softc *sc_mpu = device_private(sc->sc_mpudev);
   1026 #endif
   1027 	u_int8_t ist;
   1028 	int processed;
   1029 
   1030 	mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1031 
   1032 	/* OPL3 timer is currently unused. */
   1033 	if (((ist = ym_read(sc, SA3_IRQA_STAT)) &
   1034 	     ~(SA3_IRQ_STAT_SB|SA3_IRQ_STAT_OPL3)) == 0) {
   1035 		DPRINTF(("%s: ym_intr: spurious interrupt\n", DVNAME(sc)));
   1036 		mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1037 		return 0;
   1038 	}
   1039 
   1040 	/* Process pending interrupts. */
   1041 	do {
   1042 		processed = 0;
   1043 		/*
   1044 		 * CODEC interrupts.
   1045 		 */
   1046 		if (ist & (SA3_IRQ_STAT_TI|SA3_IRQ_STAT_CI|SA3_IRQ_STAT_PI)) {
   1047 			ad1848_isa_intr(&sc->sc_ad1848);
   1048 			processed = 1;
   1049 		}
   1050 #if NMPU_YM > 0
   1051 		/*
   1052 		 * MPU401 interrupt.
   1053 		 */
   1054 		if (ist & SA3_IRQ_STAT_MPU) {
   1055 			mpu_intr(sc_mpu);
   1056 			processed = 1;
   1057 		}
   1058 #endif
   1059 		/*
   1060 		 * Hardware volume interrupt (SA3 only).
   1061 		 * Recalculate master volume from the hardware setting.
   1062 		 */
   1063 		if ((ist & SA3_IRQ_STAT_MV) && YM_IS_SA3(sc)) {
   1064 			ym_hvol_to_master_gain(sc);
   1065 			processed = 1;
   1066 		}
   1067 	} while (processed && (ist = ym_read(sc, SA3_IRQA_STAT)));
   1068 
   1069 	mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1070 	return 1;
   1071 }
   1072 
   1073 
   1074 #ifndef AUDIO_NO_POWER_CTL
   1075 static void
   1076 ym_save_codec_regs(struct ym_softc *sc)
   1077 {
   1078 	struct ad1848_softc *ac;
   1079 	int i;
   1080 
   1081 	DPRINTF(("%s: ym_save_codec_regs\n", DVNAME(sc)));
   1082 	ac = &sc->sc_ad1848.sc_ad1848;
   1083 	for (i = 0; i <= 0x1f; i++)
   1084 		sc->sc_codec_scan[i] = ad_read(ac, i);
   1085 }
   1086 
   1087 static void
   1088 ym_restore_codec_regs(struct ym_softc *sc)
   1089 {
   1090 	struct ad1848_softc *ac;
   1091 	int i, t;
   1092 
   1093 	DPRINTF(("%s: ym_restore_codec_regs\n", DVNAME(sc)));
   1094 	ac = &sc->sc_ad1848.sc_ad1848;
   1095 	for (i = 0; i <= 0x1f; i++) {
   1096 		/*
   1097 		 * Wait til the chip becomes ready.
   1098 		 * This is required after suspend/resume.
   1099 		 */
   1100 		for (t = 0;
   1101 		    t < 100000 && ADREAD(ac, AD1848_IADDR) & SP_IN_INIT; t++)
   1102 			;
   1103 #ifdef AUDIO_DEBUG
   1104 		if (t)
   1105 			DPRINTF(("%s: ym_restore_codec_regs: reg %d, t %d\n",
   1106 				 DVNAME(sc), i, t));
   1107 #endif
   1108 		ad_write(ac, i, sc->sc_codec_scan[i]);
   1109 	}
   1110 }
   1111 
   1112 /*
   1113  * Save and restore the state on suspending / resumning.
   1114  *
   1115  * XXX This is not complete.
   1116  * Currently only the parameters, such as output gain, are restored.
   1117  * DMA state should also be restored.  FIXME.
   1118  */
   1119 static bool
   1120 ym_suspend(device_t self, const pmf_qual_t *qual)
   1121 {
   1122 	struct ym_softc *sc = device_private(self);
   1123 
   1124 	DPRINTF(("%s: ym_power_hook: suspend\n", DVNAME(sc)));
   1125 
   1126 	mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1127 
   1128 	/*
   1129 	 * suspending...
   1130 	 */
   1131 	callout_halt(&sc->sc_powerdown_ch,
   1132 	    &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1133 	if (sc->sc_turning_off)
   1134 		ym_powerdown_blocks(sc);
   1135 
   1136 	/*
   1137 	 * Save CODEC registers.
   1138 	 * Note that the registers read incorrect
   1139 	 * if the CODEC part is in power-down mode.
   1140 	 */
   1141 	if (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL)
   1142 		ym_save_codec_regs(sc);
   1143 
   1144 	/*
   1145 	 * Save OPL3-SA3 control registers and power-down the chip.
   1146 	 * Note that the registers read incorrect
   1147 	 * if the chip is in global power-down mode.
   1148 	 */
   1149 	sc->sc_sa3_scan[SA3_PWR_MNG] = ym_read(sc, SA3_PWR_MNG);
   1150 	if (sc->sc_on_blocks)
   1151 		ym_chip_powerdown(sc);
   1152 	mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1153 	return true;
   1154 }
   1155 
   1156 static bool
   1157 ym_resume(device_t self, const pmf_qual_t *qual)
   1158 {
   1159 	struct ym_softc *sc = device_private(self);
   1160 	int i, xmax;
   1161 
   1162 	DPRINTF(("%s: ym_power_hook: resume\n", DVNAME(sc)));
   1163 
   1164 	mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1165 	/*
   1166 	 * resuming...
   1167 	 */
   1168 	ym_chip_powerup(sc, 1);
   1169 	ym_init(sc);		/* power-on CODEC */
   1170 
   1171 	/* Restore control registers. */
   1172 	xmax = YM_IS_SA3(sc)? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
   1173 	for (i = SA3_PWR_MNG + 1; i <= xmax; i++) {
   1174 		if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA ||
   1175 		    i == SA3_DPWRDWN)
   1176 			continue;
   1177 		ym_write(sc, i, sc->sc_sa3_scan[i]);
   1178 	}
   1179 
   1180 	/* Restore CODEC registers (including mixer). */
   1181 	ym_restore_codec_regs(sc);
   1182 
   1183 	/* Restore global/digital power-down state. */
   1184 	ym_write(sc, SA3_PWR_MNG, sc->sc_sa3_scan[SA3_PWR_MNG]);
   1185 	if (YM_IS_SA3(sc))
   1186 		ym_write(sc, SA3_DPWRDWN, sc->sc_sa3_scan[SA3_DPWRDWN]);
   1187 	mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1188 	return true;
   1189 }
   1190 
   1191 int
   1192 ym_codec_power_ctl(void *arg, int flags)
   1193 {
   1194 	struct ym_softc *sc;
   1195 	struct ad1848_softc *ac;
   1196 	int parts;
   1197 
   1198 	sc = arg;
   1199 	ac = &sc->sc_ad1848.sc_ad1848;
   1200 	DPRINTF(("%s: ym_codec_power_ctl: flags = 0x%x\n", DVNAME(sc), flags));
   1201 	KASSERT(mutex_owned(&ac->sc_intr_lock));
   1202 
   1203 	if (flags != 0) {
   1204 		parts = 0;
   1205 		if (flags & FREAD) {
   1206 			parts |= YM_POWER_CODEC_R | YM_POWER_CODEC_AD;
   1207 			if (ac->mute[AD1848_MONITOR_CHANNEL] == 0)
   1208 				parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
   1209 		}
   1210 		if (flags & FWRITE)
   1211 			parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_DA;
   1212 	} else
   1213 		parts = YM_POWER_CODEC_P | YM_POWER_CODEC_R |
   1214 			YM_POWER_CODEC_DA | YM_POWER_CODEC_AD;
   1215 
   1216 	ym_power_ctl(sc, parts, flags);
   1217 
   1218 	return 0;
   1219 }
   1220 
   1221 /*
   1222  * Enter Power Save mode or Global Power Down mode.
   1223  * Total dissipation becomes 5mA and 10uA (typ.) respective.
   1224  */
   1225 static void
   1226 ym_chip_powerdown(struct ym_softc *sc)
   1227 {
   1228 	int i, xmax;
   1229 
   1230 	DPRINTF(("%s: ym_chip_powerdown\n", DVNAME(sc)));
   1231 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
   1232 
   1233 	xmax = YM_IS_SA3(sc) ? YM_SAVE_REG_MAX_SA3 : YM_SAVE_REG_MAX_SA2;
   1234 
   1235 	/* Save control registers. */
   1236 	for (i = SA3_PWR_MNG + 1; i <= xmax; i++) {
   1237 		if (i == SA3_SB_SCAN || i == SA3_SB_SCAN_DATA)
   1238 			continue;
   1239 		sc->sc_sa3_scan[i] = ym_read(sc, i);
   1240 	}
   1241 	ym_write(sc, SA3_PWR_MNG,
   1242 		 (sc->sc_pow_mode == YM_POWER_POWERDOWN ?
   1243 			SA3_PWR_MNG_PDN : SA3_PWR_MNG_PSV) | SA3_PWR_MNG_PDX);
   1244 }
   1245 
   1246 /*
   1247  * Power up from Power Save / Global Power Down Mode.
   1248  */
   1249 static void
   1250 ym_chip_powerup(struct ym_softc *sc, int nosleep)
   1251 {
   1252 	uint8_t pw;
   1253 
   1254 	DPRINTF(("%s: ym_chip_powerup\n", DVNAME(sc)));
   1255 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
   1256 
   1257 	pw = ym_read(sc, SA3_PWR_MNG);
   1258 
   1259 	if ((pw & (SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN | SA3_PWR_MNG_PDX)) == 0)
   1260 		return;		/* already on */
   1261 
   1262 	pw &= ~SA3_PWR_MNG_PDX;
   1263 	ym_write(sc, SA3_PWR_MNG, pw);
   1264 
   1265 	/* wait 100 ms */
   1266 	if (nosleep)
   1267 		delay(100000);
   1268 	else
   1269 		kpause("ym_pu1", false, hz / 10,
   1270 		    &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1271 
   1272 	pw &= ~(SA3_PWR_MNG_PSV | SA3_PWR_MNG_PDN);
   1273 	ym_write(sc, SA3_PWR_MNG, pw);
   1274 
   1275 	/* wait 70 ms */
   1276 	if (nosleep)
   1277 		delay(70000);
   1278 	else
   1279 		kpause("ym_pu1", false, hz / 10,
   1280 		    &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1281 
   1282 	/* The chip is muted automatically --- unmute it now. */
   1283 	ym_mute(sc, SA3_VOL_L, sc->master_mute);
   1284 	ym_mute(sc, SA3_VOL_R, sc->master_mute);
   1285 }
   1286 
   1287 /* callout handler for power-down */
   1288 static void
   1289 ym_powerdown_callout(void *arg)
   1290 {
   1291 	struct ym_softc *sc;
   1292 
   1293 	sc = arg;
   1294 
   1295 	mutex_spin_enter(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1296 	if ((sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) == 0) {
   1297 		ym_powerdown_blocks(sc);
   1298 	}
   1299 	mutex_spin_exit(&sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1300 }
   1301 
   1302 static void
   1303 ym_powerdown_blocks(struct ym_softc *sc)
   1304 {
   1305 	uint16_t parts;
   1306 	uint16_t on_blocks;
   1307 	uint8_t sv;
   1308 
   1309 	on_blocks = sc->sc_on_blocks;
   1310 	DPRINTF(("%s: ym_powerdown_blocks: turning_off 0x%x\n",
   1311 		DVNAME(sc), sc->sc_turning_off));
   1312 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
   1313 
   1314 	on_blocks = sc->sc_on_blocks;
   1315 
   1316 	/* Be sure not to change the state of the chip.  Save it first. */
   1317 	sv =  bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX);
   1318 
   1319 	parts = sc->sc_turning_off;
   1320 
   1321 	if (on_blocks & ~parts & YM_POWER_CODEC_CTL)
   1322 		parts &= ~(YM_POWER_CODEC_P | YM_POWER_CODEC_R);
   1323 	if (parts & YM_POWER_CODEC_CTL) {
   1324 		if ((on_blocks & YM_POWER_CODEC_P) == 0)
   1325 			parts |= YM_POWER_CODEC_P;
   1326 		if ((on_blocks & YM_POWER_CODEC_R) == 0)
   1327 			parts |= YM_POWER_CODEC_R;
   1328 	}
   1329 	parts &= ~YM_POWER_CODEC_PSEUDO;
   1330 
   1331 	/* If CODEC is being off, save the state. */
   1332 	if ((sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) &&
   1333 	    (sc->sc_on_blocks & ~sc->sc_turning_off &
   1334 				YM_POWER_CODEC_DIGITAL) == 0)
   1335 		ym_save_codec_regs(sc);
   1336 
   1337 	if (YM_IS_SA3(sc)) {
   1338 		/* OPL3-SA3 */
   1339 		ym_write(sc, SA3_DPWRDWN,
   1340 		    ym_read(sc, SA3_DPWRDWN) | (u_int8_t) parts);
   1341 		ym_write(sc, SA3_APWRDWN,
   1342 		    ym_read(sc, SA3_APWRDWN) | (parts >> 8));
   1343 	} else {
   1344 		/* OPL3-SA2 (only OPL3 can be off partially) */
   1345 		if (parts & YM_POWER_OPL3)
   1346 			ym_write(sc, SA3_PWR_MNG,
   1347 			    ym_read(sc, SA3_PWR_MNG) | SA2_PWR_MNG_FMPS);
   1348 	}
   1349 
   1350 	if (((sc->sc_on_blocks &= ~sc->sc_turning_off) & YM_POWER_ACTIVE) == 0)
   1351 		ym_chip_powerdown(sc);
   1352 
   1353 	sc->sc_turning_off = 0;
   1354 
   1355 	/* Restore the state of the chip. */
   1356 	bus_space_write_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX, sv);
   1357 }
   1358 
   1359 /*
   1360  * Power control entry point.
   1361  */
   1362 void
   1363 ym_power_ctl(struct ym_softc *sc, int parts, int onoff)
   1364 {
   1365 	int need_restore_codec;
   1366 
   1367 	KASSERT(mutex_owned(&sc->sc_ad1848.sc_ad1848.sc_intr_lock));
   1368 
   1369 	DPRINTF(("%s: ym_power_ctl: parts = 0x%x, %s\n",
   1370 		DVNAME(sc), parts, onoff ? "on" : "off"));
   1371 
   1372 	/* This function may sleep --- needs locking. */
   1373 	while (sc->sc_in_power_ctl & YM_POWER_CTL_INUSE) {
   1374 		sc->sc_in_power_ctl |= YM_POWER_CTL_WANTED;
   1375 		DPRINTF(("%s: ym_power_ctl: sleeping\n", DVNAME(sc)));
   1376 		cv_wait(&sc->sc_cv, &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1377 		DPRINTF(("%s: ym_power_ctl: awaken\n", DVNAME(sc)));
   1378 	}
   1379 	sc->sc_in_power_ctl |= YM_POWER_CTL_INUSE;
   1380 
   1381 	/* If ON requested to parts which are scheduled to OFF, cancel it. */
   1382 	if (onoff && sc->sc_turning_off && (sc->sc_turning_off &= ~parts) == 0)
   1383 		callout_halt(&sc->sc_powerdown_ch,
   1384 		    &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1385 
   1386 	if (!onoff && sc->sc_turning_off)
   1387 		parts &= ~sc->sc_turning_off;
   1388 
   1389 	/* Discard bits which are currently {on,off}. */
   1390 	parts &= onoff ? ~sc->sc_on_blocks : sc->sc_on_blocks;
   1391 
   1392 	/* Cancel previous timeout if needed. */
   1393 	if (parts != 0 && sc->sc_turning_off)
   1394 		callout_halt(&sc->sc_powerdown_ch,
   1395 		    &sc->sc_ad1848.sc_ad1848.sc_intr_lock);
   1396 
   1397 	if (parts == 0)
   1398 		goto unlock;		/* no work to do */
   1399 
   1400 	if (onoff) {
   1401 		/* Turning on is done immediately. */
   1402 
   1403 		/* If the chip is off, turn it on. */
   1404 		if ((sc->sc_on_blocks & YM_POWER_ACTIVE) == 0)
   1405 			ym_chip_powerup(sc, 0);
   1406 
   1407 		need_restore_codec = (parts & YM_POWER_CODEC_DIGITAL) &&
   1408 		    (sc->sc_on_blocks & YM_POWER_CODEC_DIGITAL) == 0;
   1409 
   1410 		sc->sc_on_blocks |= parts;
   1411 		if (parts & YM_POWER_CODEC_CTL)
   1412 			parts |= YM_POWER_CODEC_P | YM_POWER_CODEC_R;
   1413 
   1414 		if (YM_IS_SA3(sc)) {
   1415 			/* OPL3-SA3 */
   1416 			ym_write(sc, SA3_DPWRDWN,
   1417 			    ym_read(sc, SA3_DPWRDWN) & (u_int8_t)~parts);
   1418 			ym_write(sc, SA3_APWRDWN,
   1419 			    ym_read(sc, SA3_APWRDWN) & ~(parts >> 8));
   1420 		} else {
   1421 			/* OPL3-SA2 (only OPL3 can be off partially) */
   1422 			if (parts & YM_POWER_OPL3)
   1423 				ym_write(sc, SA3_PWR_MNG,
   1424 				    ym_read(sc, SA3_PWR_MNG)
   1425 					& ~SA2_PWR_MNG_FMPS);
   1426 		}
   1427 		if (need_restore_codec)
   1428 			ym_restore_codec_regs(sc);
   1429 	} else {
   1430 		/* Turning off is delayed. */
   1431 		sc->sc_turning_off |= parts;
   1432 	}
   1433 
   1434 	/* Schedule turning off. */
   1435 	if (sc->sc_pow_mode != YM_POWER_NOSAVE && sc->sc_turning_off)
   1436 		callout_reset(&sc->sc_powerdown_ch, hz * sc->sc_pow_timeout,
   1437 		    ym_powerdown_callout, sc);
   1438 
   1439 unlock:
   1440 	if (sc->sc_in_power_ctl & YM_POWER_CTL_WANTED)
   1441 		cv_broadcast(&sc->sc_cv);
   1442 	sc->sc_in_power_ctl = 0;
   1443 }
   1444 #endif /* not AUDIO_NO_POWER_CTL */
   1445