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i82365_isapnp.c revision 1.1
      1 /*	$NetBSD: i82365_isapnp.c,v 1.1 1998/06/07 18:28:31 sommerfe Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998 Bill Sommerfeld.  All rights reserved.
      5  * Copyright (c) 1997 Marc Horowitz.  All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *	This product includes software developed by Marc Horowitz.
     18  * 4. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 
     34 #include <sys/types.h>
     35 #include <sys/param.h>
     36 #include <sys/systm.h>
     37 #include <sys/device.h>
     38 #include <sys/extent.h>
     39 #include <sys/malloc.h>
     40 
     41 #include <vm/vm.h>
     42 
     43 #include <machine/bus.h>
     44 #include <machine/intr.h>
     45 
     46 #include <dev/isa/isareg.h>
     47 #include <dev/isa/isavar.h>
     48 
     49 #include <dev/isapnp/isapnpreg.h>
     50 #include <dev/isapnp/isapnpvar.h>
     51 
     52 #include <dev/pcmcia/pcmciareg.h>
     53 #include <dev/pcmcia/pcmciavar.h>
     54 #include <dev/pcmcia/pcmciachip.h>
     55 
     56 #include <dev/ic/i82365reg.h>
     57 #include <dev/ic/i82365var.h>
     58 #include <dev/isa/i82365_isavar.h>
     59 
     60 #undef DPRINTF
     61 #ifdef PCICISADEBUG
     62 int	pcicisapnp_debug = 0 /* XXX */ ;
     63 #define	DPRINTF(arg) if (pcicisapnp_debug) printf arg;
     64 #else
     65 #define	DPRINTF(arg)
     66 #endif
     67 
     68 #ifdef __BROKEN_INDIRECT_CONFIG
     69 int pcic_isapnp_match __P((struct device *, void *, void *));
     70 #else
     71 int pcic_isapnp_match __P((struct device *, struct cfdata *, void *));
     72 #endif
     73 void	pcic_isapnp_attach __P((struct device *, struct device *, void *));
     74 
     75 struct cfattach pcic_isapnp_ca = {
     76 	sizeof(struct pcic_softc), pcic_isapnp_match, pcic_isapnp_attach
     77 };
     78 
     79 static struct pcmcia_chip_functions pcic_isa_functions = {
     80 	pcic_chip_mem_alloc,
     81 	pcic_chip_mem_free,
     82 	pcic_chip_mem_map,
     83 	pcic_chip_mem_unmap,
     84 
     85 	pcic_chip_io_alloc,
     86 	pcic_chip_io_free,
     87 	pcic_chip_io_map,
     88 	pcic_chip_io_unmap,
     89 
     90 	pcic_isa_chip_intr_establish,
     91 	pcic_isa_chip_intr_disestablish,
     92 
     93 	pcic_chip_socket_enable,
     94 	pcic_chip_socket_disable,
     95 };
     96 
     97 int
     98 pcic_isapnp_match(parent, match, aux)
     99 	struct device *parent;
    100 #ifdef __BROKEN_INDIRECT_CONFIG
    101 	void *match;
    102 #else
    103 	struct cfdata *match;
    104 #endif
    105 	void *aux;
    106 {
    107 	struct isapnp_attach_args *ipa = aux;
    108 
    109 	if (strcmp(ipa->ipa_devlogic, "PNP0E00"))
    110 		return 0;
    111 	return 1;
    112 }
    113 
    114 void
    115 pcic_isapnp_attach(parent, self, aux)
    116 	struct device *parent, *self;
    117 	void *aux;
    118 {
    119 	struct pcic_softc *sc = (void *) self;
    120 	struct isapnp_attach_args *ipa = aux;
    121 	isa_chipset_tag_t ic = ipa->ipa_ic;
    122 	bus_space_tag_t iot = ipa->ipa_iot;
    123 	bus_space_tag_t memt = ipa->ipa_memt;
    124 	bus_space_handle_t ioh;
    125 	bus_space_handle_t memh;
    126 	bus_addr_t maddr;
    127 	int msize;
    128 	int tmp1;
    129 
    130 	printf("\n");
    131 
    132 	if (isapnp_config(iot, memt, ipa)) {
    133 		printf("%s: error in region allocation\n", sc->dev.dv_xname);
    134 		return;
    135 	}
    136 
    137 	printf("%s: %s %s", sc->dev.dv_xname, ipa->ipa_devident,
    138 	    ipa->ipa_devclass);
    139 
    140 	/* sanity check that we get at least one hunk of IO space.. */
    141 	if (ipa->ipa_nio < 1) {
    142 		printf("%s: failed to get one chunk of i/o space\n",
    143 		       sc->dev.dv_xname);
    144 		return;
    145 	}
    146 
    147 	/* Find i/o space. */
    148 	ioh = ipa->ipa_io[0].h;
    149 
    150 	/* sanity check to make sure we have a real PCIC there.. */
    151 	bus_space_write_1(iot, ioh, PCIC_REG_INDEX, C0SA + PCIC_IDENT);
    152 	tmp1 = bus_space_read_1(iot, ioh, PCIC_REG_DATA);
    153 	printf("(ident 0x%x", tmp1);
    154 	if (pcic_ident_ok(tmp1)) {
    155 	  	printf(" OK)");
    156 	} else {
    157 	        printf(" Not OK)\n");
    158 		return;
    159 	}
    160 
    161 	msize =  0x4000;
    162 	if (isa_mem_alloc (memt, msize, msize, 0, 0,
    163 			   &maddr, &memh)) {
    164 		printf(": can't alloc mem space\n");
    165 		return;
    166 	}
    167 	printf(": using iobase 0x%lx iosize 0x%x", maddr, msize);
    168 	sc->membase = maddr;
    169 	sc->subregionmask = (1 << (msize / PCIC_MEM_PAGESIZE)) - 1;
    170 
    171 	sc->intr_est = ic;
    172 	sc->pct = (pcmcia_chipset_tag_t) & pcic_isa_functions;
    173 
    174 	sc->iot = iot;
    175 	sc->ioh = ioh;
    176 	sc->memt = memt;
    177 	sc->memh = memh;
    178 
    179 	/*
    180 	 * allocate an irq.  it will be used by both controllers.  I could
    181 	 * use two different interrupts, but interrupts are relatively
    182 	 * scarce, shareable, and for PCIC controllers, very infrequent.
    183 	 */
    184 
    185 	if (ipa->ipa_nirq > 0) {
    186 		sc->irq = ipa->ipa_irq[0].num;
    187 	} else {
    188 		if (isa_intr_alloc(ic,
    189 				   PCIC_CSC_INTR_IRQ_VALIDMASK & pcic_isa_intr_alloc_mask,
    190 				   IST_EDGE, &sc->irq)) {
    191 			printf("\n%s: can't allocate interrupt\n",
    192 			       sc->dev.dv_xname);
    193 			return;
    194 		}
    195 		printf(" irq %d", sc->irq);
    196 	}
    197 	printf("\n");
    198 
    199 	pcic_attach(sc);
    200 
    201 	pcic_isa_bus_width_probe(sc, iot, ioh, ipa->ipa_io[0].base, ipa->ipa_io[0].length);
    202 
    203 	sc->ih = isa_intr_establish(ic, sc->irq, IST_EDGE, IPL_TTY,
    204 	    pcic_intr, sc);
    205 	if (sc->ih == NULL) {
    206 		printf("%s: can't establish interrupt\n", sc->dev.dv_xname);
    207 		return;
    208 	}
    209 
    210 	pcic_attach_sockets(sc);
    211 
    212 }
    213