gtintrvar.h revision 1.1.4.2
1 1.1.4.2 rmind /* $NetBSD: gtintrvar.h,v 1.1.4.2 2010/05/30 05:17:29 rmind Exp $ */ 2 1.1.4.2 rmind /* 3 1.1.4.2 rmind * Copyright (c) 2009 KIYOHARA Takashi 4 1.1.4.2 rmind * All rights reserved. 5 1.1.4.2 rmind * 6 1.1.4.2 rmind * Redistribution and use in source and binary forms, with or without 7 1.1.4.2 rmind * modification, are permitted provided that the following conditions 8 1.1.4.2 rmind * are met: 9 1.1.4.2 rmind * 1. Redistributions of source code must retain the above copyright 10 1.1.4.2 rmind * notice, this list of conditions and the following disclaimer. 11 1.1.4.2 rmind * 2. Redistributions in binary form must reproduce the above copyright 12 1.1.4.2 rmind * notice, this list of conditions and the following disclaimer in the 13 1.1.4.2 rmind * documentation and/or other materials provided with the distribution. 14 1.1.4.2 rmind * 15 1.1.4.2 rmind * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 1.1.4.2 rmind * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 1.1.4.2 rmind * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18 1.1.4.2 rmind * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 19 1.1.4.2 rmind * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 20 1.1.4.2 rmind * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 1.1.4.2 rmind * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 1.1.4.2 rmind * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 23 1.1.4.2 rmind * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 24 1.1.4.2 rmind * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 1.1.4.2 rmind * POSSIBILITY OF SUCH DAMAGE. 26 1.1.4.2 rmind */ 27 1.1.4.2 rmind #ifndef _MARVELL_GTINTRVAR_H_ 28 1.1.4.2 rmind #define _MARVELL_GTINTRVAR_H_ 29 1.1.4.2 rmind 30 1.1.4.2 rmind #include <dev/marvell/gtreg.h> 31 1.1.4.2 rmind 32 1.1.4.2 rmind /* 33 1.1.4.2 rmind * Main Interrupt related functions 34 1.1.4.2 rmind */ 35 1.1.4.2 rmind 36 1.1.4.2 rmind static __inline uint32_t 37 1.1.4.2 rmind discovery_enable_intr(struct gt_softc *sc, int irq) 38 1.1.4.2 rmind { 39 1.1.4.2 rmind bus_size_t reg; 40 1.1.4.2 rmind uint32_t cim; 41 1.1.4.2 rmind 42 1.1.4.2 rmind reg = (irq < 32) ? ICR_CIM_LO : ICR_CIM_HI; 43 1.1.4.2 rmind cim = bus_space_read_4(sc->sc_iot, sc->sc_ioh, reg); 44 1.1.4.2 rmind cim |= 1 << (irq & 31); 45 1.1.4.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, reg, cim); 46 1.1.4.2 rmind return cim; 47 1.1.4.2 rmind } 48 1.1.4.2 rmind 49 1.1.4.2 rmind static __inline uint32_t 50 1.1.4.2 rmind discovery_disable_intr(struct gt_softc *sc, int irq) 51 1.1.4.2 rmind { 52 1.1.4.2 rmind bus_size_t reg; 53 1.1.4.2 rmind uint32_t cim; 54 1.1.4.2 rmind 55 1.1.4.2 rmind reg = (irq < 32) ? ICR_CIM_LO : ICR_CIM_HI; 56 1.1.4.2 rmind cim = bus_space_read_4(sc->sc_iot, sc->sc_ioh, reg); 57 1.1.4.2 rmind cim &= ~(1 << (irq & 31)); 58 1.1.4.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, reg, cim); 59 1.1.4.2 rmind return cim; 60 1.1.4.2 rmind } 61 1.1.4.2 rmind 62 1.1.4.2 rmind static __inline int 63 1.1.4.2 rmind discovery_mic_low(struct gt_softc *sc) 64 1.1.4.2 rmind { 65 1.1.4.2 rmind 66 1.1.4.2 rmind return bus_space_read_4(sc->sc_iot, sc->sc_ioh, ICR_MIC_LO); 67 1.1.4.2 rmind } 68 1.1.4.2 rmind 69 1.1.4.2 rmind static __inline int 70 1.1.4.2 rmind discovery_mic_high(struct gt_softc *sc) 71 1.1.4.2 rmind { 72 1.1.4.2 rmind 73 1.1.4.2 rmind return bus_space_read_4(sc->sc_iot, sc->sc_ioh, ICR_MIC_HI); 74 1.1.4.2 rmind } 75 1.1.4.2 rmind 76 1.1.4.2 rmind 77 1.1.4.2 rmind /* 78 1.1.4.2 rmind * GPP Interrupt related functions 79 1.1.4.2 rmind */ 80 1.1.4.2 rmind 81 1.1.4.2 rmind static __inline uint32_t 82 1.1.4.2 rmind discovery_gpp_enable_intr(struct gt_softc *sc, int pin) 83 1.1.4.2 rmind { 84 1.1.4.2 rmind uint32_t gppim; 85 1.1.4.2 rmind 86 1.1.4.2 rmind gppim = bus_space_read_4(sc->sc_iot, sc->sc_ioh, GT_GPP_Interrupt_Mask); 87 1.1.4.2 rmind gppim |= 1 << pin; 88 1.1.4.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, GT_GPP_Interrupt_Mask, gppim); 89 1.1.4.2 rmind return gppim; 90 1.1.4.2 rmind } 91 1.1.4.2 rmind 92 1.1.4.2 rmind static __inline uint32_t 93 1.1.4.2 rmind discovery_gpp_disable_intr(struct gt_softc *sc, int pin) 94 1.1.4.2 rmind { 95 1.1.4.2 rmind uint32_t gppim; 96 1.1.4.2 rmind 97 1.1.4.2 rmind gppim = bus_space_read_4(sc->sc_iot, sc->sc_ioh, GT_GPP_Interrupt_Mask); 98 1.1.4.2 rmind gppim &= ~(1 << pin); 99 1.1.4.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, GT_GPP_Interrupt_Mask, gppim); 100 1.1.4.2 rmind return gppim; 101 1.1.4.2 rmind } 102 1.1.4.2 rmind 103 1.1.4.2 rmind static __inline void 104 1.1.4.2 rmind discovery_gpp_clear_cause(struct gt_softc *sc, int pin) 105 1.1.4.2 rmind { 106 1.1.4.2 rmind uint32_t gppic; 107 1.1.4.2 rmind 108 1.1.4.2 rmind gppic = 109 1.1.4.2 rmind bus_space_read_4(sc->sc_iot, sc->sc_ioh, GT_GPP_Interrupt_Cause); 110 1.1.4.2 rmind gppic &= ~(1 << pin); 111 1.1.4.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, GT_GPP_Interrupt_Cause, 112 1.1.4.2 rmind gppic); 113 1.1.4.2 rmind } 114 1.1.4.2 rmind 115 1.1.4.2 rmind static __inline int 116 1.1.4.2 rmind discovery_gpp_cause(struct gt_softc *sc) 117 1.1.4.2 rmind { 118 1.1.4.2 rmind 119 1.1.4.2 rmind return bus_space_read_4(sc->sc_iot, sc->sc_ioh, GT_GPP_Interrupt_Cause); 120 1.1.4.2 rmind } 121 1.1.4.2 rmind 122 1.1.4.2 rmind static __inline int 123 1.1.4.2 rmind discovery_gpp_mask(struct gt_softc *sc) 124 1.1.4.2 rmind { 125 1.1.4.2 rmind 126 1.1.4.2 rmind return bus_space_read_4(sc->sc_iot, sc->sc_ioh, GT_GPP_Interrupt_Mask); 127 1.1.4.2 rmind } 128 1.1.4.2 rmind #endif /* _MARVELL_GTINTRVAR_H_ */ 129
Indexes created Mon Oct 20 20:10:13 GMT 2025