gtmpsc.c revision 1.2 1 1.2 matt /* $NetBSD: gtmpsc.c,v 1.2 2003/03/16 07:05:34 matt Exp $ */
2 1.1 matt
3 1.1 matt /*
4 1.1 matt * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
5 1.1 matt * All rights reserved.
6 1.1 matt *
7 1.1 matt * Redistribution and use in source and binary forms, with or without
8 1.1 matt * modification, are permitted provided that the following conditions
9 1.1 matt * are met:
10 1.1 matt * 1. Redistributions of source code must retain the above copyright
11 1.1 matt * notice, this list of conditions and the following disclaimer.
12 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 matt * notice, this list of conditions and the following disclaimer in the
14 1.1 matt * documentation and/or other materials provided with the distribution.
15 1.1 matt * 3. All advertising materials mentioning features or use of this software
16 1.1 matt * must display the following acknowledgement:
17 1.1 matt * This product includes software developed for the NetBSD Project by
18 1.1 matt * Allegro Networks, Inc., and Wasabi Systems, Inc.
19 1.1 matt * 4. The name of Allegro Networks, Inc. may not be used to endorse
20 1.1 matt * or promote products derived from this software without specific prior
21 1.1 matt * written permission.
22 1.1 matt * 5. The name of Wasabi Systems, Inc. may not be used to endorse
23 1.1 matt * or promote products derived from this software without specific prior
24 1.1 matt * written permission.
25 1.1 matt *
26 1.1 matt * THIS SOFTWARE IS PROVIDED BY ALLEGRO NETWORKS, INC. AND
27 1.1 matt * WASABI SYSTEMS, INC. ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
28 1.1 matt * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
29 1.1 matt * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
30 1.1 matt * IN NO EVENT SHALL EITHER ALLEGRO NETWORKS, INC. OR WASABI SYSTEMS, INC.
31 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
38 1.1 matt */
39 1.1 matt
40 1.1 matt /*
41 1.1 matt * mpsc.c - MPSC serial driver, supports UART mode only
42 1.1 matt *
43 1.1 matt *
44 1.1 matt * creation Mon Apr 9 19:40:15 PDT 2001 cliff
45 1.1 matt */
46 1.1 matt
47 1.1 matt #include "opt_kgdb.h"
48 1.1 matt
49 1.1 matt #include <sys/param.h>
50 1.1 matt #include <sys/conf.h>
51 1.1 matt #include <sys/device.h>
52 1.1 matt #include <sys/proc.h>
53 1.1 matt #include <sys/systm.h>
54 1.1 matt #include <sys/tty.h>
55 1.1 matt #include <sys/callout.h>
56 1.1 matt #include <sys/fcntl.h>
57 1.1 matt #ifdef KGDB
58 1.1 matt #include <sys/kernel.h>
59 1.1 matt #include <sys/kgdb.h>
60 1.1 matt #endif
61 1.1 matt #include <powerpc/atomic.h>
62 1.1 matt #include <dev/cons.h>
63 1.1 matt #include <machine/bus.h>
64 1.1 matt #include <machine/cpu.h> /* for DELAY */
65 1.1 matt #include <machine/stdarg.h>
66 1.1 matt #include "gtmpsc.h"
67 1.1 matt
68 1.1 matt
69 1.1 matt #include <dev/marvell/gtreg.h>
70 1.1 matt #include <dev/marvell/gtvar.h>
71 1.1 matt #include <dev/marvell/gtintrreg.h>
72 1.1 matt #include <dev/marvell/gtmpscreg.h>
73 1.1 matt #include <dev/marvell/gtsdmareg.h>
74 1.1 matt #include <dev/marvell/gtmpscvar.h>
75 1.1 matt #include <dev/marvell/gtbrgreg.h>
76 1.1 matt
77 1.1 matt /*
78 1.1 matt * XXX these delays were derived empiracaly
79 1.1 matt */
80 1.1 matt #define GTMPSC_POLL_DELAY 1 /* 1 usec */
81 1.1 matt #define GTMPSC_RESET_DELAY 100 /* 100 usec */
82 1.1 matt
83 1.1 matt #define BURSTLEN 128
84 1.1 matt
85 1.1 matt /*
86 1.1 matt * stat values for gtmpsc_common_pollc
87 1.1 matt */
88 1.1 matt #define GTMPSC_STAT_NONE 0
89 1.1 matt #define GTMPSC_STAT_BREAK 1
90 1.1 matt
91 1.1 matt
92 1.1 matt #define PRINTF(x) gtmpsc_mem_printf x
93 1.1 matt
94 1.1 matt #if defined(DEBUG)
95 1.1 matt unsigned int mpscdebug = 0;
96 1.1 matt # define STATIC
97 1.1 matt # define DPRINTF(x) do { if (mpscdebug) gtmpsc_mem_printf x ; } while (0)
98 1.1 matt #else
99 1.1 matt # define STATIC static
100 1.1 matt # define DPRINTF(x)
101 1.1 matt #endif
102 1.1 matt
103 1.1 matt #define GTMPSCUNIT_MASK 0x7ffff
104 1.1 matt #define GTMPSCDIALOUT_MASK 0x80000
105 1.1 matt
106 1.1 matt #define GTMPSCUNIT(x) (minor(x) & GTMPSCUNIT_MASK)
107 1.1 matt #define GTMPSCDIALOUT(x) (minor(x) & GTMPSCDIALOUT_MASK)
108 1.1 matt
109 1.2 matt STATIC void gtmpscinit(struct gtmpsc_softc *);
110 1.2 matt STATIC int gtmpscmatch(struct device *, struct cfdata *, void *);
111 1.2 matt STATIC void gtmpscattach(struct device *, struct device *, void *);
112 1.2 matt STATIC int compute_cdv(unsigned int);
113 1.2 matt STATIC void gtmpsc_loadchannelregs(struct gtmpsc_softc *);
114 1.2 matt STATIC void gtmpscshutdown(struct gtmpsc_softc *);
115 1.2 matt STATIC void gtmpscstart(struct tty *);
116 1.2 matt STATIC int gtmpscparam(struct tty *, struct termios *);
117 1.2 matt STATIC int gtmpsc_probe(void);
118 1.2 matt STATIC int gtmpsc_intr(void *);
119 1.1 matt STATIC int gtmpsc_softintr(void *);
120 1.1 matt
121 1.2 matt STATIC void gtmpsc_common_putn(struct gtmpsc_softc *);
122 1.2 matt STATIC void gtmpsc_common_putc(unsigned int, unsigned char);
123 1.2 matt STATIC int gtmpsc_common_getc(unsigned int);
124 1.2 matt STATIC int gtmpsc_common_pollc(unsigned int, char *, int *);
125 1.2 matt STATIC void gtmpsc_poll(void *);
126 1.1 matt #ifdef KGDB
127 1.2 matt STATIC void gtmpsc_kgdb_poll(void *);
128 1.1 matt #endif
129 1.2 matt STATIC void gtmpsc_mem_printf(const char *, ...);
130 1.1 matt
131 1.1 matt STATIC void gtmpsc_txdesc_init(gtmpsc_poll_sdma_t *, gtmpsc_poll_sdma_t *);
132 1.1 matt STATIC void gtmpsc_rxdesc_init(gtmpsc_poll_sdma_t *, gtmpsc_poll_sdma_t *);
133 1.1 matt STATIC unsigned int gtmpsc_get_causes(void);
134 1.1 matt STATIC void gtmpsc_hackinit(struct gtmpsc_softc *);
135 1.1 matt STATIC void gtmpscinit_stop(struct gtmpsc_softc *, int);
136 1.1 matt STATIC void gtmpscinit_start(struct gtmpsc_softc *, int);
137 1.2 matt #if 0
138 1.1 matt void gtmpsc_printf(const char *fmt, ...);
139 1.2 matt #endif
140 1.1 matt void gtmpsc_puts(char *);
141 1.1 matt
142 1.2 matt void gtmpsccnprobe(struct consdev *);
143 1.2 matt void gtmpsccninit(struct consdev *);
144 1.2 matt int gtmpsccngetc(dev_t);
145 1.2 matt void gtmpsccnputc(dev_t, int);
146 1.2 matt void gtmpsccnpollc(dev_t, int);
147 1.2 matt void gtmpsccnhalt(dev_t);
148 1.2 matt
149 1.2 matt STATIC void gtmpsc_txflush(gtmpsc_softc_t *);
150 1.2 matt STATIC void gtmpsc_iflush(gtmpsc_softc_t *);
151 1.2 matt STATIC void gtmpsc_shutdownhook(void *);
152 1.1 matt
153 1.1 matt dev_type_open(gtmpscopen);
154 1.1 matt dev_type_close(gtmpscclose);
155 1.1 matt dev_type_read(gtmpscread);
156 1.1 matt dev_type_write(gtmpscwrite);
157 1.1 matt dev_type_ioctl(gtmpscioctl);
158 1.1 matt dev_type_stop(gtmpscstop);
159 1.1 matt dev_type_tty(gtmpsctty);
160 1.1 matt dev_type_poll(gtmpscpoll);
161 1.1 matt
162 1.1 matt const struct cdevsw gtmpsc_cdevsw = {
163 1.1 matt gtmpscopen, gtmpscclose, gtmpscread, gtmpscwrite, gtmpscioctl,
164 1.1 matt gtmpscstop, gtmpsctty, gtmpscpoll, nommap, ttykqfilter, D_TTY
165 1.1 matt };
166 1.1 matt
167 1.1 matt CFATTACH_DECL(gtmpsc, sizeof(struct gtmpsc_softc),
168 1.1 matt gtmpscmatch, gtmpscattach, NULL, NULL);
169 1.1 matt
170 1.1 matt extern struct cfdriver gtmpsc_cd;
171 1.1 matt
172 1.1 matt #if 0
173 1.2 matt struct consdev consdev_gtmpsc = {
174 1.1 matt gtmpsccnprobe,
175 1.1 matt gtmpsccninit,
176 1.1 matt gtmpsccngetc,
177 1.1 matt gtmpsccnputc,
178 1.1 matt gtmpsccnpollc,
179 1.2 matt NULL, /* cn_bell */
180 1.1 matt NULL, /* cn_flush */
181 1.1 matt gtmpsccnhalt,
182 1.1 matt };
183 1.1 matt #endif
184 1.1 matt
185 1.1 matt STATIC int gtmpsc_nattached = 0;
186 1.1 matt STATIC void *gtmpsc_sdma_ih = NULL;
187 1.1 matt STATIC void *gtmpsc_soft_ih = NULL;
188 1.1 matt
189 1.1 matt gtmpsc_softc_t *gtmpsc_scp[GTMPSC_NCHAN] = { 0 };
190 1.1 matt
191 1.1 matt STATIC int gt_reva_gtmpsc_bug;
192 1.1 matt unsigned int sdma_imask; /* soft copy of SDMA IMASK reg */
193 1.1 matt
194 1.1 matt #ifdef KGDB
195 1.1 matt #include <sys/kgdb.h>
196 1.1 matt
197 1.1 matt static int gtmpsc_kgdb_addr;
198 1.1 matt static int gtmpsc_kgdb_attached;
199 1.1 matt
200 1.1 matt int kgdb_break_immediate /* = 0 */ ;
201 1.1 matt
202 1.2 matt STATIC int gtmpsc_kgdb_getc(void *);
203 1.2 matt STATIC void gtmpsc_kgdb_putc(void *, int);
204 1.1 matt #endif /* KGDB */
205 1.1 matt
206 1.1 matt /*
207 1.1 matt * hacks for console initialization
208 1.1 matt * which happens prior to autoconfig "attach"
209 1.1 matt */
210 1.1 matt STATIC unsigned int gtmpsccninit_done = 0;
211 1.1 matt STATIC gtmpsc_softc_t gtmpsc_fake_softc;
212 1.1 matt STATIC unsigned char gtmpsc_earlybuf[NBPG] __attribute__ ((aligned(NBPG)));
213 1.1 matt STATIC unsigned char gtmpsc_fake_dmapage[NBPG] __attribute__ ((aligned(NBPG)));
214 1.1 matt
215 1.1 matt
216 1.1 matt #define GTMPSC_PRINT_BUF_SIZE 4096
217 1.1 matt STATIC unsigned char gtmpsc_print_buf[GTMPSC_PRINT_BUF_SIZE] = { 0 };
218 1.1 matt
219 1.1 matt unsigned int gtmpsc_poll_putc_cnt = 0;
220 1.1 matt unsigned int gtmpsc_poll_putn_cnt = 0;
221 1.1 matt unsigned int gtmpsc_poll_getc_cnt = 0;
222 1.1 matt unsigned int gtmpsc_poll_pollc_cnt = 0;
223 1.1 matt unsigned int gtmpsc_poll_putc_miss = 0;
224 1.1 matt unsigned int gtmpsc_poll_putn_miss = 0;
225 1.1 matt unsigned int gtmpsc_poll_getc_miss = 0;
226 1.1 matt unsigned int gtmpsc_poll_pollc_miss = 0;
227 1.1 matt
228 1.1 matt
229 1.1 matt #ifndef SDMA_COHERENT
230 1.1 matt /*
231 1.1 matt * inlines to flush, invalidate cache
232 1.1 matt * required if DMA cache coherency is broken
233 1.1 matt * note that pointer `p' args are assumed to be cache aligned
234 1.1 matt * and the size is assumed to be one CACHELINESIZE block
235 1.1 matt */
236 1.1 matt
237 1.1 matt #define GTMPSC_CACHE_FLUSH(p) gtmpsc_cache_flush(p)
238 1.1 matt #define GTMPSC_CACHE_INVALIDATE(p) gtmpsc_cache_invalidate(p)
239 1.1 matt
240 1.1 matt static volatile inline void
241 1.1 matt gtmpsc_cache_flush(void *p)
242 1.1 matt {
243 1.1 matt __asm __volatile ("eieio; dcbf 0,%0; lwz %0,0(%0); sync;"
244 1.1 matt : "+r"(p):);
245 1.1 matt }
246 1.1 matt
247 1.1 matt static volatile inline void
248 1.1 matt gtmpsc_cache_invalidate(void *p)
249 1.1 matt {
250 1.1 matt __asm __volatile ("eieio; dcbi 0,%0; sync;" :: "r"(p));
251 1.1 matt }
252 1.1 matt #else
253 1.1 matt
254 1.1 matt #define GTMPSC_CACHE_FLUSH(p)
255 1.1 matt #define GTMPSC_CACHE_INVALIDATE(p)
256 1.1 matt
257 1.1 matt #endif /* SDMA_COHERENT */
258 1.1 matt
259 1.1 matt
260 1.2 matt extern vaddr_t gtbase;
261 1.1 matt
262 1.1 matt #define GT_READ(d,a) \
263 1.1 matt gtmpsc_reg_read(gtbase, (a))
264 1.1 matt #define GT_WRITE(d,a,v) \
265 1.1 matt gtmpsc_reg_write(gtbase,(a),(v))
266 1.1 matt
267 1.1 matt
268 1.1 matt #define SDMA_IMASK_ENABLE(bit) ({ \
269 1.1 matt unsigned int r; \
270 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, SDMA_ICAUSE, ~(bit)); \
271 1.1 matt if (gt_reva_gtmpsc_bug) \
272 1.1 matt r = sdma_imask; \
273 1.1 matt else \
274 1.1 matt r = GT_READ(sc->gtmpsc_dev.dv_parent, SDMA_IMASK); \
275 1.1 matt r |= (bit); \
276 1.1 matt sdma_imask = r; \
277 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, SDMA_IMASK, r); \
278 1.1 matt })
279 1.1 matt
280 1.1 matt #define SDMA_IMASK_DISABLE(bit) ({ \
281 1.1 matt unsigned int r; \
282 1.1 matt if (gt_reva_gtmpsc_bug) \
283 1.1 matt r = sdma_imask; \
284 1.1 matt else \
285 1.1 matt r = GT_READ(sc->gtmpsc_dev.dv_parent, SDMA_IMASK); \
286 1.1 matt r &= ~(bit); \
287 1.1 matt sdma_imask = r; \
288 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, SDMA_IMASK, r); \
289 1.1 matt })
290 1.1 matt
291 1.1 matt static volatile inline unsigned int
292 1.1 matt gtmpsc_reg_read(unsigned int p, unsigned int off)
293 1.1 matt {
294 1.1 matt unsigned int rv;
295 1.1 matt
296 1.2 matt __asm __volatile("lwbrx %0,%1,%2; eieio;"
297 1.2 matt : "=r"(rv) : "b"(off), "r"(p));
298 1.1 matt DPRINTF(("READ 0x%x 0x%x\n", off, rv));
299 1.1 matt
300 1.1 matt return rv;
301 1.1 matt }
302 1.1 matt
303 1.1 matt static volatile inline void
304 1.1 matt gtmpsc_reg_write(unsigned int p, unsigned int off, unsigned int v)
305 1.1 matt {
306 1.2 matt __asm __volatile("stwbrx %0,%1,%2; eieio;"
307 1.2 matt :: "r"(v), "b"(off), "r"(p));
308 1.1 matt DPRINTF(("WRITE 0x%x 0x%x\n", off, v));
309 1.1 matt }
310 1.1 matt
311 1.1 matt
312 1.1 matt
313 1.1 matt static volatile inline unsigned int
314 1.1 matt desc_read(unsigned int *ip)
315 1.1 matt {
316 1.1 matt unsigned int rv;
317 1.1 matt
318 1.2 matt __asm __volatile ("lwzx %0,0,%1; eieio;"
319 1.1 matt : "=r"(rv) : "r"(ip));
320 1.1 matt return rv;
321 1.1 matt }
322 1.1 matt
323 1.1 matt static volatile inline void
324 1.1 matt desc_write(unsigned int *ip, unsigned int val)
325 1.1 matt {
326 1.2 matt __asm __volatile ("stwx %0,0,%1; eieio;"
327 1.1 matt :: "r"(val), "r"(ip));
328 1.1 matt }
329 1.1 matt
330 1.1 matt
331 1.1 matt /*
332 1.1 matt * gtmpsc_txdesc_init - set up TX descriptor ring
333 1.1 matt */
334 1.1 matt STATIC void
335 1.1 matt gtmpsc_txdesc_init(gtmpsc_poll_sdma_t *vmps, gtmpsc_poll_sdma_t *pmps)
336 1.1 matt {
337 1.1 matt int n;
338 1.1 matt sdma_desc_t *dp;
339 1.1 matt gtmpsc_polltx_t *vtxp;
340 1.1 matt gtmpsc_polltx_t *ptxp;
341 1.1 matt gtmpsc_polltx_t *next_ptxp;
342 1.1 matt gtmpsc_polltx_t *first_ptxp;
343 1.1 matt
344 1.1 matt first_ptxp = ptxp = &pmps->tx[0];
345 1.1 matt vtxp = &vmps->tx[0];
346 1.1 matt next_ptxp = ptxp + 1;
347 1.1 matt for (n = (GTMPSC_NTXDESC - 1); n--; ) {
348 1.1 matt dp = &vtxp->txdesc;
349 1.1 matt desc_write(&dp->sdma_csr, 0);
350 1.1 matt desc_write(&dp->sdma_cnt, 0);
351 1.1 matt desc_write(&dp->sdma_bufp, (u_int32_t)&ptxp->txbuf);
352 1.1 matt desc_write(&dp->sdma_next, (u_int32_t)&next_ptxp->txdesc);
353 1.1 matt GTMPSC_CACHE_FLUSH(dp);
354 1.1 matt vtxp++;
355 1.1 matt ptxp++;
356 1.1 matt next_ptxp++;
357 1.1 matt }
358 1.1 matt dp = &vtxp->txdesc;
359 1.1 matt desc_write(&dp->sdma_csr, 0);
360 1.1 matt desc_write(&dp->sdma_cnt, 0);
361 1.1 matt desc_write(&dp->sdma_bufp, (u_int32_t)&ptxp->txbuf);
362 1.1 matt desc_write(&dp->sdma_next, (u_int32_t)&first_ptxp->txdesc);
363 1.1 matt GTMPSC_CACHE_FLUSH(dp);
364 1.1 matt }
365 1.1 matt
366 1.1 matt /*
367 1.1 matt * gtmpsc_rxdesc_init - set up RX descriptor ring
368 1.1 matt */
369 1.1 matt STATIC void
370 1.1 matt gtmpsc_rxdesc_init(gtmpsc_poll_sdma_t *vmps, gtmpsc_poll_sdma_t *pmps)
371 1.1 matt {
372 1.1 matt int n;
373 1.1 matt sdma_desc_t *dp;
374 1.1 matt gtmpsc_pollrx_t *vrxp;
375 1.1 matt gtmpsc_pollrx_t *prxp;
376 1.1 matt gtmpsc_pollrx_t *next_prxp;
377 1.1 matt gtmpsc_pollrx_t *first_prxp;
378 1.1 matt unsigned int csr;
379 1.1 matt
380 1.1 matt csr = SDMA_CSR_RX_L|SDMA_CSR_RX_F|SDMA_CSR_RX_OWN|SDMA_CSR_RX_EI;
381 1.1 matt first_prxp = prxp = &pmps->rx[0];
382 1.1 matt vrxp = &vmps->rx[0];
383 1.1 matt next_prxp = prxp + 1;
384 1.1 matt for (n = (GTMPSC_NRXDESC - 1); n--; ) {
385 1.1 matt dp = &vrxp->rxdesc;
386 1.1 matt desc_write(&dp->sdma_csr, csr);
387 1.1 matt desc_write(&dp->sdma_cnt,
388 1.1 matt GTMPSC_RXBUFSZ << SDMA_RX_CNT_BUFSZ_SHIFT);
389 1.1 matt desc_write(&dp->sdma_bufp, (u_int32_t)&prxp->rxbuf);
390 1.1 matt desc_write(&dp->sdma_next, (u_int32_t)&next_prxp->rxdesc);
391 1.1 matt GTMPSC_CACHE_FLUSH(dp);
392 1.1 matt vrxp++;
393 1.1 matt prxp++;
394 1.1 matt next_prxp++;
395 1.1 matt }
396 1.1 matt dp = &vrxp->rxdesc;
397 1.1 matt desc_write(&dp->sdma_csr, SDMA_CSR_RX_OWN);
398 1.1 matt desc_write(&dp->sdma_cnt,
399 1.1 matt GTMPSC_RXBUFSZ << SDMA_RX_CNT_BUFSZ_SHIFT);
400 1.1 matt desc_write(&dp->sdma_bufp, (u_int32_t)&prxp->rxbuf);
401 1.1 matt desc_write(&dp->sdma_next, (u_int32_t)&first_prxp->rxdesc);
402 1.1 matt GTMPSC_CACHE_FLUSH(dp);
403 1.1 matt }
404 1.1 matt
405 1.1 matt /*
406 1.1 matt * Compute the BRG countdown value (CDV in BRG_BCR)
407 1.1 matt */
408 1.1 matt
409 1.1 matt STATIC int
410 1.1 matt compute_cdv(unsigned int baud)
411 1.1 matt {
412 1.1 matt unsigned int cdv;
413 1.1 matt
414 1.1 matt if (baud == 0)
415 1.1 matt return 0;
416 1.1 matt cdv = (BRG_DEFAULT_INPUT_RATE / (baud * GTMPSC_CLOCK_DIVIDER) + 1) / 2 - 1;
417 1.1 matt if (cdv > BRG_BCR_CDV_MAX)
418 1.1 matt return -1;
419 1.1 matt return cdv;
420 1.1 matt }
421 1.1 matt
422 1.1 matt STATIC void
423 1.1 matt gtmpsc_loadchannelregs(struct gtmpsc_softc *sc)
424 1.1 matt {
425 1.1 matt u_int brg_bcr;
426 1.1 matt u_int unit;
427 1.1 matt
428 1.1 matt unit = sc->gtmpsc_unit;
429 1.1 matt brg_bcr = unit ? BRG_BCR1 : BRG_BCR0;
430 1.1 matt
431 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, brg_bcr, sc->gtmpsc_brg_bcr);
432 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, GTMPSC_U_CHRN(unit, 3), sc->gtmpsc_chr3);
433 1.1 matt }
434 1.1 matt
435 1.1 matt STATIC int
436 1.1 matt gtmpscmatch(struct device *parent, struct cfdata *self, void *aux)
437 1.1 matt {
438 1.1 matt struct gt_attach_args *ga = aux;
439 1.1 matt
440 1.1 matt if (gtmpsc_nattached >= GTMPSC_NCHAN) {
441 1.1 matt return 0;
442 1.1 matt }
443 1.1 matt
444 1.1 matt if (strcmp(ga->ga_name, gtmpsc_cd.cd_name) != 0) {
445 1.1 matt return 0;
446 1.1 matt }
447 1.1 matt
448 1.1 matt return 1;
449 1.1 matt }
450 1.1 matt
451 1.1 matt STATIC void
452 1.1 matt gtmpscattach(struct device *parent, struct device *self, void *aux)
453 1.1 matt {
454 1.1 matt struct gt_attach_args *ga = aux;
455 1.1 matt struct gt_softc *gt = (struct gt_softc *) parent;
456 1.1 matt struct gtmpsc_softc *sc = (struct gtmpsc_softc *) self;
457 1.1 matt gtmpsc_poll_sdma_t *vmps;
458 1.1 matt gtmpsc_poll_sdma_t *pmps;
459 1.1 matt struct tty *tp;
460 1.1 matt caddr_t kva;
461 1.1 matt int rsegs;
462 1.1 matt int err;
463 1.1 matt int s;
464 1.1 matt
465 1.1 matt DPRINTF(("mpscattach\n"));
466 1.1 matt if (ga->ga_unit >= GTMPSC_NCHAN)
467 1.1 matt return;
468 1.1 matt
469 1.1 matt s = splhigh();
470 1.1 matt
471 1.1 matt sc->gtmpsc_gt = gt;
472 1.1 matt sc->gtmpsc_memt = ga->ga_memt;
473 1.1 matt sc->gtmpsc_dmat = ga->ga_dmat;
474 1.1 matt sc->gtmpsc_unit = ga->ga_unit;
475 1.1 matt
476 1.1 matt printf(", SDMA");
477 1.1 matt err = bus_dmamem_alloc(sc->gtmpsc_dmat, NBPG, NBPG, NBPG,
478 1.1 matt sc->gtmpsc_dma_segs, 1, &rsegs,
479 1.1 matt BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW);
480 1.1 matt if (err) {
481 1.1 matt PRINTF(("mpscattach: bus_dmamem_alloc error 0x%x\n", err));
482 1.1 matt splx(s);
483 1.1 matt return;
484 1.1 matt }
485 1.1 matt #ifndef SDMA_COHERENT
486 1.1 matt err = bus_dmamem_map(sc->gtmpsc_dmat, sc->gtmpsc_dma_segs, 1, NBPG,
487 1.1 matt &kva, BUS_DMA_NOWAIT);
488 1.1 matt #else
489 1.1 matt err = bus_dmamem_map(sc->gtmpsc_dmat, sc->gtmpsc_dma_segs, 1, NBPG,
490 1.1 matt &kva, BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
491 1.1 matt #endif
492 1.1 matt if (err) {
493 1.1 matt PRINTF(("mpscattach: bus_dmamem_map error 0x%x\n", err));
494 1.1 matt splx(s);
495 1.1 matt return;
496 1.1 matt }
497 1.1 matt
498 1.1 matt bzero(kva, NBPG); /* paranoid/superfluous */
499 1.1 matt
500 1.1 matt vmps = (gtmpsc_poll_sdma_t *)kva; /* KVA */
501 1.1 matt pmps = (gtmpsc_poll_sdma_t *)sc->gtmpsc_dma_segs[0].ds_addr; /* PA */
502 1.1 matt #ifdef DEBUG
503 1.1 matt printf(" at %p/%p", vmps, pmps);
504 1.1 matt #endif
505 1.1 matt gtmpsc_txdesc_init(vmps, pmps);
506 1.1 matt gtmpsc_rxdesc_init(vmps, pmps);
507 1.1 matt sc->gtmpsc_poll_sdmapage = vmps;
508 1.1 matt
509 1.1 matt if (gtmpsc_scp[sc->gtmpsc_unit] != NULL)
510 1.1 matt gtmpsc_txflush(gtmpsc_scp[sc->gtmpsc_unit]);
511 1.1 matt
512 1.1 matt sc->gtmpsc_tty = tp = ttymalloc();
513 1.1 matt tp->t_oproc = gtmpscstart;
514 1.1 matt tp->t_param = gtmpscparam;
515 1.1 matt tty_attach(tp);
516 1.1 matt
517 1.1 matt gtmpsc_nattached++;
518 1.1 matt gtmpscinit(sc);
519 1.1 matt
520 1.1 matt gtmpsc_scp[sc->gtmpsc_unit] = sc;
521 1.1 matt
522 1.1 matt if (gtmpsc_nattached == 1) {
523 1.1 matt void *ih;
524 1.1 matt
525 1.1 matt KASSERT(gtmpsc_sdma_ih == NULL);
526 1.1 matt ih = intr_establish(IRQ_SDMA, IST_LEVEL, IPL_SERIAL,
527 1.1 matt gtmpsc_intr, &sc);
528 1.1 matt if (ih == NULL)
529 1.1 matt panic("mpscattach: cannot intr_establish IRQ_SDMA");
530 1.1 matt gtmpsc_sdma_ih = ih;
531 1.1 matt
532 1.1 matt KASSERT(gtmpsc_soft_ih == NULL);
533 1.1 matt ih = intr_establish(SIR_SERIAL, IST_SOFT, IPL_SOFTSERIAL,
534 1.1 matt gtmpsc_softintr, NULL);
535 1.1 matt if (ih == NULL)
536 1.1 matt panic("mpscattach: cannot intr_establish SIR_SERIAL");
537 1.1 matt gtmpsc_soft_ih = ih;
538 1.1 matt }
539 1.1 matt printf(" irqs %d, %d", IRQ_SDMA, SIR_SERIAL);
540 1.1 matt
541 1.1 matt shutdownhook_establish(gtmpsc_shutdownhook, sc);
542 1.1 matt
543 1.1 matt #ifdef DDB
544 1.1 matt if (sc->gtmpsc_unit == 0)
545 1.1 matt SDMA_IMASK_ENABLE(SDMA_INTR_RXBUF(sc->gtmpsc_unit));
546 1.1 matt #endif /* DDB */
547 1.1 matt
548 1.1 matt printf("%s\n", (gt_reva_gtmpsc_bug) ? " [Rev A. bug]" : "");
549 1.1 matt
550 1.1 matt splx(s);
551 1.1 matt #ifdef KGDB
552 1.1 matt /*
553 1.1 matt * Allow kgdb to "take over" this port. If this is
554 1.1 matt * the kgdb device, it has exclusive use.
555 1.1 matt */
556 1.1 matt if (sc->gtmpsc_unit == comkgdbport) {
557 1.1 matt if (comkgdbport == 0) { /* FIXME */
558 1.1 matt printf("%s(kgdb): cannot share with console\n",
559 1.1 matt sc->gtmpsc_dev.dv_xname);
560 1.1 matt return;
561 1.1 matt }
562 1.1 matt
563 1.1 matt sc->gtmpsc_flags |= GTMPSCF_KGDB;
564 1.1 matt printf("%s: kgdb\n", sc->gtmpsc_dev.dv_xname);
565 1.1 matt gtmpsc_txflush(gtmpsc_scp[0]);
566 1.1 matt kgdb_attach(gtmpsc_kgdb_getc, gtmpsc_kgdb_putc, NULL);
567 1.1 matt kgdb_dev = 123; /* unneeded, only to satisfy some tests */
568 1.1 matt gtmpsc_kgdb_attached = 1;
569 1.1 matt SDMA_IMASK_ENABLE(SDMA_INTR_RXBUF(sc->gtmpsc_unit));
570 1.1 matt kgdb_connect(1);
571 1.1 matt }
572 1.1 matt #endif /* KGDB */
573 1.1 matt
574 1.1 matt }
575 1.1 matt
576 1.1 matt STATIC void
577 1.1 matt gtmpscshutdown(struct gtmpsc_softc *sc)
578 1.1 matt {
579 1.1 matt struct tty *tp;
580 1.1 matt int s;
581 1.1 matt
582 1.1 matt #ifdef KGDB
583 1.1 matt if (sc->gtmpsc_flags & GTMPSCF_KGDB != 0)
584 1.1 matt return;
585 1.1 matt #endif
586 1.1 matt tp = sc->gtmpsc_tty;
587 1.1 matt s = splserial();
588 1.1 matt /* Fake carrier off */
589 1.1 matt (void) (*tp->t_linesw->l_modem)(tp, 0);
590 1.1 matt SDMA_IMASK_DISABLE(SDMA_INTR_RXBUF(sc->gtmpsc_unit));
591 1.1 matt splx(s);
592 1.1 matt }
593 1.1 matt
594 1.1 matt int
595 1.1 matt gtmpscopen(dev_t dev, int flag, int mode, struct proc *p)
596 1.1 matt {
597 1.1 matt struct gtmpsc_softc *sc;
598 1.1 matt int unit = GTMPSCUNIT(dev);
599 1.1 matt struct tty *tp;
600 1.1 matt int s;
601 1.1 matt int s2;
602 1.1 matt int error;
603 1.1 matt
604 1.1 matt if (unit >= gtmpsc_cd.cd_ndevs)
605 1.1 matt return ENXIO;
606 1.1 matt sc = gtmpsc_cd.cd_devs[unit];
607 1.1 matt if (!sc)
608 1.1 matt return ENXIO;
609 1.1 matt #ifdef KGDB
610 1.1 matt /*
611 1.1 matt * If this is the kgdb port, no other use is permitted.
612 1.1 matt */
613 1.1 matt if (sc->gtmpsc_flags & GTMPSCF_KGDB != 0)
614 1.1 matt return (EBUSY);
615 1.1 matt #endif
616 1.1 matt tp = sc->gtmpsc_tty;
617 1.1 matt if (ISSET(tp->t_state, TS_ISOPEN) &&
618 1.1 matt ISSET(tp->t_state, TS_XCLUDE) &&
619 1.1 matt p->p_ucred->cr_uid != 0)
620 1.1 matt return (EBUSY);
621 1.1 matt
622 1.1 matt s = spltty();
623 1.1 matt
624 1.1 matt if (!(tp->t_state & TS_ISOPEN)) {
625 1.1 matt struct termios t;
626 1.1 matt
627 1.1 matt tp->t_dev = dev;
628 1.1 matt s2 = splserial();
629 1.1 matt SDMA_IMASK_ENABLE(SDMA_INTR_RXBUF(unit));
630 1.1 matt splx(s2);
631 1.1 matt t.c_ispeed = 0;
632 1.1 matt #if 0
633 1.1 matt t.c_ospeed = TTYDEF_SPEED;
634 1.1 matt #else
635 1.1 matt t.c_ospeed = GT_MPSC_DEFAULT_BAUD_RATE;
636 1.1 matt #endif
637 1.1 matt t.c_cflag = TTYDEF_CFLAG;
638 1.1 matt /* Make sure gtmpscparam() will do something. */
639 1.1 matt tp->t_ospeed = 0;
640 1.1 matt (void) gtmpscparam(tp, &t);
641 1.1 matt tp->t_iflag = TTYDEF_IFLAG;
642 1.1 matt tp->t_oflag = TTYDEF_OFLAG;
643 1.1 matt tp->t_lflag = TTYDEF_LFLAG;
644 1.1 matt ttychars(tp);
645 1.1 matt ttsetwater(tp);
646 1.1 matt s2 = splserial();
647 1.1 matt /* Clear the input ring */
648 1.1 matt sc->gtmpsc_rxfifo_putix = 0;
649 1.1 matt sc->gtmpsc_rxfifo_getix = 0;
650 1.1 matt sc->gtmpsc_rxfifo_navail = GTMPSC_RXFIFOSZ;
651 1.1 matt gtmpsc_iflush(sc);
652 1.1 matt splx(s2);
653 1.1 matt }
654 1.1 matt splx(s);
655 1.1 matt error = ttyopen(tp, GTMPSCDIALOUT(dev), ISSET(flag, O_NONBLOCK));
656 1.1 matt if (error)
657 1.1 matt goto bad;
658 1.1 matt
659 1.1 matt error = (*tp->t_linesw->l_open)(dev, tp);
660 1.1 matt if (error)
661 1.1 matt goto bad;
662 1.1 matt
663 1.1 matt return (0);
664 1.1 matt
665 1.1 matt bad:
666 1.1 matt if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
667 1.1 matt /*
668 1.1 matt * We failed to open the device, and nobody else had it opened.
669 1.1 matt * Clean up the state as appropriate.
670 1.1 matt */
671 1.1 matt gtmpscshutdown(sc);
672 1.1 matt }
673 1.1 matt
674 1.1 matt return (error);
675 1.1 matt }
676 1.1 matt
677 1.1 matt int
678 1.1 matt gtmpscclose(dev_t dev, int flag, int mode, struct proc *p)
679 1.1 matt {
680 1.1 matt int unit = GTMPSCUNIT(dev);
681 1.1 matt struct gtmpsc_softc *sc = gtmpsc_cd.cd_devs[unit];
682 1.1 matt struct tty *tp = sc->gtmpsc_tty;
683 1.1 matt int s;
684 1.1 matt
685 1.1 matt s = splserial();
686 1.1 matt if (!ISSET(tp->t_state, TS_ISOPEN)) {
687 1.1 matt splx(s);
688 1.1 matt return (0);
689 1.1 matt }
690 1.1 matt
691 1.1 matt (*tp->t_linesw->l_close)(tp, flag);
692 1.1 matt ttyclose(tp);
693 1.1 matt if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
694 1.1 matt /*
695 1.1 matt * Although we got a last close, the device may still be in
696 1.1 matt * use; e.g. if this was the dialout node, and there are still
697 1.1 matt * processes waiting for carrier on the non-dialout node.
698 1.1 matt */
699 1.1 matt gtmpscshutdown(sc);
700 1.1 matt }
701 1.1 matt
702 1.1 matt splx(s);
703 1.1 matt return (0);
704 1.1 matt }
705 1.1 matt
706 1.1 matt int
707 1.1 matt gtmpscread(dev_t dev, struct uio *uio, int flag)
708 1.1 matt {
709 1.1 matt struct gtmpsc_softc *sc = gtmpsc_cd.cd_devs[GTMPSCUNIT(dev)];
710 1.1 matt struct tty *tp = sc->gtmpsc_tty;
711 1.1 matt
712 1.1 matt return (*tp->t_linesw->l_read)(tp, uio, flag);
713 1.1 matt }
714 1.1 matt
715 1.1 matt int
716 1.1 matt gtmpscwrite(dev_t dev, struct uio *uio, int flag)
717 1.1 matt {
718 1.1 matt struct gtmpsc_softc *sc = gtmpsc_cd.cd_devs[GTMPSCUNIT(dev)];
719 1.1 matt struct tty *tp = sc->gtmpsc_tty;
720 1.1 matt
721 1.1 matt return (*tp->t_linesw->l_write)(tp, uio, flag);
722 1.1 matt }
723 1.1 matt
724 1.1 matt int
725 1.1 matt gtmpscpoll(dev_t dev, int events, struct proc *p)
726 1.1 matt {
727 1.1 matt struct gtmpsc_softc *sc = gtmpsc_cd.cd_devs[GTMPSCUNIT(dev)];
728 1.1 matt struct tty *tp = sc->gtmpsc_tty;
729 1.1 matt
730 1.1 matt return ((*tp->t_linesw->l_poll)(tp, events, p));
731 1.1 matt }
732 1.1 matt
733 1.1 matt int
734 1.1 matt gtmpscioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
735 1.1 matt {
736 1.1 matt struct gtmpsc_softc *sc = gtmpsc_cd.cd_devs[GTMPSCUNIT(dev)];
737 1.1 matt struct tty *tp = sc->gtmpsc_tty;
738 1.1 matt int error;
739 1.1 matt
740 1.1 matt if ((error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p)) >= 0)
741 1.1 matt return error;
742 1.1 matt if ((error = ttioctl(tp, cmd, data, flag, p)) >= 0)
743 1.1 matt return error;
744 1.1 matt return ENOTTY;
745 1.1 matt }
746 1.1 matt
747 1.1 matt struct tty *
748 1.1 matt gtmpsctty(dev_t dev)
749 1.1 matt {
750 1.1 matt struct gtmpsc_softc *sc = gtmpsc_cd.cd_devs[GTMPSCUNIT(dev)];
751 1.1 matt
752 1.1 matt return sc->gtmpsc_tty;
753 1.1 matt }
754 1.1 matt
755 1.1 matt void
756 1.1 matt gtmpscstop(struct tty *tp, int flag)
757 1.1 matt {
758 1.1 matt }
759 1.1 matt
760 1.1 matt STATIC void
761 1.1 matt gtmpscstart(struct tty *tp)
762 1.1 matt {
763 1.1 matt struct gtmpsc_softc *sc;
764 1.1 matt unsigned char *tba;
765 1.1 matt unsigned int unit;
766 1.1 matt int s, s2, tbc;
767 1.1 matt
768 1.1 matt unit = GTMPSCUNIT(tp->t_dev);
769 1.1 matt if (unit >= GTMPSC_NCHAN)
770 1.1 matt return;
771 1.1 matt sc = gtmpsc_scp[unit];
772 1.1 matt if (sc == NULL)
773 1.1 matt return;
774 1.1 matt
775 1.1 matt s = spltty();
776 1.1 matt if (tp->t_state & (TS_TIMEOUT | TS_BUSY | TS_TTSTOP))
777 1.1 matt goto out;
778 1.1 matt if (sc->sc_tx_stopped)
779 1.1 matt goto out;
780 1.1 matt if (tp->t_outq.c_cc <= tp->t_lowat) {
781 1.1 matt if ((tp->t_state & TS_ASLEEP) != 0) {
782 1.1 matt tp->t_state &= ~TS_ASLEEP;
783 1.1 matt wakeup(&tp->t_outq);
784 1.1 matt }
785 1.1 matt selwakeup(&tp->t_wsel);
786 1.1 matt if (tp->t_outq.c_cc == 0)
787 1.1 matt goto out;
788 1.1 matt }
789 1.1 matt
790 1.1 matt /* Grab the first contiguous region of buffer space. */
791 1.1 matt tba = tp->t_outq.c_cf;
792 1.1 matt tbc = ndqb(&tp->t_outq, 0);
793 1.1 matt
794 1.1 matt s2 = splserial();
795 1.1 matt
796 1.1 matt sc->sc_tba = tba;
797 1.1 matt sc->sc_tbc = tbc;
798 1.1 matt sc->cnt_tx_from_ldisc += tbc;
799 1.1 matt SDMA_IMASK_ENABLE(SDMA_INTR_TXBUF(unit));
800 1.1 matt tp->t_state |= TS_BUSY;
801 1.1 matt sc->sc_tx_busy = 1;
802 1.1 matt gtmpsc_common_putn(sc);
803 1.1 matt
804 1.1 matt splx(s2);
805 1.1 matt out:
806 1.1 matt splx(s);
807 1.1 matt }
808 1.1 matt
809 1.1 matt STATIC int
810 1.1 matt gtmpscparam(struct tty *tp, struct termios *t)
811 1.1 matt {
812 1.1 matt struct gtmpsc_softc *sc = gtmpsc_cd.cd_devs[GTMPSCUNIT(tp->t_dev)];
813 1.1 matt int ospeed = compute_cdv(t->c_ospeed);
814 1.1 matt int s;
815 1.1 matt
816 1.1 matt /* Check requested parameters. */
817 1.1 matt if (ospeed < 0)
818 1.1 matt return (EINVAL);
819 1.1 matt if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
820 1.1 matt return (EINVAL);
821 1.1 matt
822 1.1 matt /*
823 1.1 matt * If there were no changes, don't do anything. This avoids dropping
824 1.1 matt * input and improves performance when all we did was frob things like
825 1.1 matt * VMIN and VTIME.
826 1.1 matt */
827 1.1 matt if (tp->t_ospeed == t->c_ospeed &&
828 1.1 matt tp->t_cflag == t->c_cflag)
829 1.1 matt return (0);
830 1.1 matt
831 1.1 matt s = splserial();
832 1.1 matt
833 1.1 matt sc->gtmpsc_brg_bcr = BRG_BCR_EN | BRG_BCR_CLKS_TCLK | ospeed;
834 1.1 matt sc->gtmpsc_chr3 = GTMPSC_MAXIDLE(t->c_ospeed);
835 1.1 matt
836 1.1 matt /* And copy to tty. */
837 1.1 matt tp->t_ispeed = 0;
838 1.1 matt tp->t_ospeed = t->c_ospeed;
839 1.1 matt tp->t_cflag = t->c_cflag;
840 1.1 matt
841 1.1 matt if (!sc->sc_heldchange) {
842 1.1 matt if (sc->sc_tx_busy) {
843 1.1 matt sc->sc_heldtbc = sc->sc_tbc;
844 1.1 matt sc->sc_tbc = 0;
845 1.1 matt sc->sc_heldchange = 1;
846 1.1 matt } else
847 1.1 matt gtmpsc_loadchannelregs(sc);
848 1.1 matt }
849 1.1 matt
850 1.1 matt splx(s);
851 1.1 matt
852 1.1 matt /* Fake carrier on */
853 1.1 matt (void) (*tp->t_linesw->l_modem)(tp, 1);
854 1.1 matt
855 1.1 matt return 0;
856 1.1 matt }
857 1.1 matt
858 1.1 matt STATIC int
859 1.1 matt gtmpsc_probe(void)
860 1.1 matt {
861 1.1 matt return 1; /* XXX */
862 1.1 matt }
863 1.1 matt
864 1.1 matt STATIC unsigned int
865 1.1 matt gtmpsc_get_causes(void)
866 1.1 matt {
867 1.1 matt int i;
868 1.1 matt struct gtmpsc_softc *sc;
869 1.1 matt unsigned int cause = 0;
870 1.1 matt static unsigned int bits[4] = {
871 1.1 matt SDMA_INTR_RXBUF(0),
872 1.1 matt SDMA_INTR_TXBUF(0),
873 1.1 matt SDMA_INTR_RXBUF(1),
874 1.1 matt SDMA_INTR_TXBUF(1),
875 1.1 matt };
876 1.1 matt sdma_desc_t *desc_addr[4];
877 1.1 matt static unsigned int fake_once = SDMA_INTR_RXBUF(0)
878 1.1 matt | SDMA_INTR_RXBUF(1);
879 1.1 matt
880 1.1 matt desc_addr[0] = 0;
881 1.1 matt desc_addr[1] = 0;
882 1.1 matt desc_addr[2] = 0;
883 1.1 matt desc_addr[3] = 0;
884 1.1 matt sc = gtmpsc_cd.cd_devs[0];
885 1.1 matt if (sc != 0) {
886 1.1 matt if (sdma_imask & SDMA_INTR_RXBUF(0)) {
887 1.1 matt desc_addr[0] =
888 1.1 matt &sc->gtmpsc_poll_sdmapage->rx[sc->gtmpsc_poll_rxix].rxdesc;
889 1.1 matt GTMPSC_CACHE_INVALIDATE(desc_addr[0]);
890 1.2 matt __asm __volatile ("dcbt 0,%0" :: "r"(desc_addr[0]));
891 1.1 matt }
892 1.1 matt if (sdma_imask & SDMA_INTR_TXBUF(0)) {
893 1.1 matt desc_addr[1] =
894 1.1 matt &sc->gtmpsc_poll_sdmapage->tx[sc->gtmpsc_poll_txix].txdesc;
895 1.1 matt GTMPSC_CACHE_INVALIDATE(desc_addr[1]);
896 1.2 matt __asm __volatile ("dcbt 0,%0" :: "r"(desc_addr[1]));
897 1.1 matt }
898 1.1 matt }
899 1.1 matt sc = gtmpsc_cd.cd_devs[1];
900 1.1 matt if (sc != 0) {
901 1.1 matt if (sdma_imask & SDMA_INTR_RXBUF(1)) {
902 1.1 matt desc_addr[2] =
903 1.1 matt &sc->gtmpsc_poll_sdmapage->rx[sc->gtmpsc_poll_rxix].rxdesc;
904 1.1 matt GTMPSC_CACHE_INVALIDATE(desc_addr[2]);
905 1.2 matt __asm __volatile ("dcbt 0,%0" :: "r"(desc_addr[2]));
906 1.1 matt }
907 1.1 matt if (sdma_imask & SDMA_INTR_TXBUF(1)) {
908 1.1 matt desc_addr[3] =
909 1.1 matt &sc->gtmpsc_poll_sdmapage->tx[sc->gtmpsc_poll_txix].txdesc;
910 1.1 matt GTMPSC_CACHE_INVALIDATE(desc_addr[3]);
911 1.2 matt __asm __volatile ("dcbt 0,%0" :: "r"(desc_addr[3]));
912 1.1 matt }
913 1.1 matt }
914 1.1 matt
915 1.1 matt for (i = 0; i < 4; ++i)
916 1.1 matt if ((sdma_imask & bits[i]) && desc_addr[i] != 0 &&
917 1.1 matt (desc_addr[i]->sdma_csr & SDMA_CSR_TX_OWN) == 0)
918 1.1 matt cause |= bits[i];
919 1.1 matt if (fake_once & sdma_imask) {
920 1.1 matt cause |= fake_once & sdma_imask;
921 1.1 matt /* fake_once &= ~(cause & fake_once); */
922 1.1 matt }
923 1.1 matt return cause;
924 1.1 matt }
925 1.1 matt
926 1.1 matt STATIC int
927 1.1 matt gtmpsc_intr(void *arg)
928 1.1 matt {
929 1.1 matt struct gtmpsc_softc *sc;
930 1.1 matt unsigned int unit;
931 1.1 matt int spurious = 1;
932 1.1 matt unsigned int r;
933 1.1 matt unsigned int cause=0;
934 1.1 matt
935 1.1 matt if (gt_reva_gtmpsc_bug)
936 1.1 matt cause = gtmpsc_get_causes();
937 1.1 matt
938 1.1 matt #ifdef KGDB
939 1.1 matt if (kgdb_break_immediate) {
940 1.1 matt unit = comkgdbport;
941 1.1 matt sc = gtmpsc_cd.cd_devs[unit];
942 1.1 matt if (sc == 0 || (sc->gtmpsc_flags & GTMPSCF_KGDB) == 0)
943 1.1 matt goto skip_kgdb;
944 1.1 matt if (gt_reva_gtmpsc_bug)
945 1.1 matt r = cause & sdma_imask;
946 1.1 matt else {
947 1.1 matt r = GT_READ(sc->gtmpsc_dev.dv_parent, SDMA_ICAUSE);
948 1.1 matt r &= GT_READ(sc->gtmpsc_dev.dv_parent, SDMA_IMASK);
949 1.1 matt }
950 1.1 matt r &= SDMA_INTR_RXBUF(unit);
951 1.1 matt if (r == 0)
952 1.1 matt goto skip_kgdb;
953 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, SDMA_ICAUSE, ~r);
954 1.1 matt spurious = 0;
955 1.1 matt gtmpsc_kgdb_poll(sc);
956 1.1 matt }
957 1.1 matt skip_kgdb:
958 1.1 matt #endif
959 1.1 matt for (unit = 0; unit < GTMPSC_NCHAN; ++unit) {
960 1.1 matt sc = gtmpsc_cd.cd_devs[unit];
961 1.1 matt if (sc == 0)
962 1.1 matt continue;
963 1.1 matt if (gt_reva_gtmpsc_bug)
964 1.1 matt r = cause & sdma_imask;
965 1.1 matt else {
966 1.1 matt r = GT_READ(sc->gtmpsc_dev.dv_parent, SDMA_ICAUSE);
967 1.1 matt r &= GT_READ(sc->gtmpsc_dev.dv_parent, SDMA_IMASK);
968 1.1 matt }
969 1.1 matt r &= SDMA_U_INTR_MASK(unit);
970 1.1 matt if (r == 0)
971 1.1 matt continue;
972 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, SDMA_ICAUSE, ~r);
973 1.1 matt spurious = 0;
974 1.1 matt if (r & SDMA_INTR_RXBUF(unit)) {
975 1.1 matt #ifdef KGDB
976 1.1 matt if (sc->gtmpsc_flags & GTMPSCF_KGDB)
977 1.1 matt gtmpsc_kgdb_poll(sc);
978 1.1 matt else
979 1.1 matt #endif
980 1.1 matt gtmpsc_poll(sc);
981 1.1 matt }
982 1.1 matt if (r & SDMA_INTR_TXBUF(unit)) {
983 1.1 matt /*
984 1.1 matt * If we've delayed a parameter change, do it now,
985 1.1 matt * and restart output.
986 1.1 matt */
987 1.1 matt if (sc->sc_heldchange) {
988 1.1 matt gtmpsc_loadchannelregs(sc);
989 1.1 matt sc->sc_heldchange = 0;
990 1.1 matt sc->sc_tbc = sc->sc_heldtbc;
991 1.1 matt sc->sc_heldtbc = 0;
992 1.1 matt }
993 1.1 matt
994 1.1 matt /* Output the next chunk of the contiguous buffer,
995 1.1 matt if any. */
996 1.1 matt if (sc->sc_tbc > 0)
997 1.1 matt gtmpsc_common_putn(sc);
998 1.1 matt if (sc->sc_tbc == 0 && sc->sc_tx_busy) {
999 1.1 matt sc->sc_tx_busy = 0;
1000 1.1 matt sc->sc_tx_done = 1;
1001 1.1 matt setsoftserial();
1002 1.1 matt SDMA_IMASK_DISABLE(SDMA_INTR_TXBUF(unit));
1003 1.1 matt }
1004 1.1 matt }
1005 1.1 matt }
1006 1.1 matt return 1;
1007 1.1 matt /* return !spurious; */
1008 1.1 matt }
1009 1.1 matt
1010 1.1 matt STATIC int
1011 1.1 matt gtmpsc_softintr(void *unused)
1012 1.1 matt {
1013 1.1 matt unsigned int unit;
1014 1.1 matt struct gtmpsc_softc *sc;
1015 1.1 matt struct tty *tp;
1016 1.2 matt int (*rint)(int, struct tty *);
1017 1.1 matt int jobs;
1018 1.1 matt int s;
1019 1.1 matt
1020 1.1 matt for (unit = 0; unit < GTMPSC_NCHAN; ++unit) {
1021 1.1 matt sc = gtmpsc_cd.cd_devs[unit];
1022 1.1 matt if (sc == 0)
1023 1.1 matt continue;
1024 1.1 matt tp = sc->gtmpsc_tty;
1025 1.1 matt rint = tp->t_linesw->l_rint;
1026 1.1 matt do {
1027 1.1 matt jobs = 0;
1028 1.1 matt if (sc->gtmpsc_rxfifo_navail < GTMPSC_RXFIFOSZ) {
1029 1.1 matt s = spltty();
1030 1.1 matt rint(sc->gtmpsc_rxfifo[sc->gtmpsc_rxfifo_getix++],
1031 1.1 matt tp);
1032 1.1 matt if (sc->gtmpsc_rxfifo_getix >= GTMPSC_RXFIFOSZ)
1033 1.1 matt sc->gtmpsc_rxfifo_getix = 0;
1034 1.1 matt ++sc->cnt_rx_from_fifo;
1035 1.1 matt /* atomic_add() returns the previous value */
1036 1.1 matt jobs += atomic_add(&sc->gtmpsc_rxfifo_navail, 1) + 1
1037 1.1 matt < GTMPSC_RXFIFOSZ;
1038 1.1 matt splx(s);
1039 1.1 matt }
1040 1.1 matt if (sc->sc_tx_done) {
1041 1.1 matt ++jobs;
1042 1.1 matt sc->sc_tx_done = 0;
1043 1.1 matt s = spltty();
1044 1.1 matt tp->t_state &= ~TS_BUSY;
1045 1.1 matt if ((tp->t_state & TS_FLUSH) != 0)
1046 1.1 matt tp->t_state &= ~TS_FLUSH;
1047 1.1 matt else
1048 1.1 matt ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1049 1.1 matt (*tp->t_linesw->l_start)(tp);
1050 1.1 matt splx(s);
1051 1.1 matt }
1052 1.1 matt } while (jobs);
1053 1.1 matt }
1054 1.1 matt return 1;
1055 1.1 matt }
1056 1.1 matt
1057 1.1 matt /*
1058 1.1 matt * Console support functions
1059 1.1 matt */
1060 1.1 matt void
1061 1.1 matt gtmpsccnprobe(struct consdev *cd)
1062 1.1 matt {
1063 1.1 matt int maj;
1064 1.1 matt /* {extern void return_to_dink(int); return_to_dink(gtbase);} */
1065 1.1 matt
1066 1.1 matt if (!gtmpsc_probe())
1067 1.1 matt return;
1068 1.1 matt
1069 1.1 matt maj = cdevsw_lookup_major(>mpsc_cdevsw);
1070 1.1 matt cd->cn_dev = makedev(maj, 0);
1071 1.1 matt cd->cn_pri = CN_INTERNAL;
1072 1.1 matt }
1073 1.1 matt
1074 1.1 matt /*
1075 1.1 matt * gtmpsc_hackinit - hacks required to supprt GTMPSC console
1076 1.1 matt */
1077 1.1 matt STATIC void
1078 1.1 matt gtmpsc_hackinit(struct gtmpsc_softc *sc)
1079 1.1 matt {
1080 1.1 matt gtmpsc_poll_sdma_t *vmps;
1081 1.1 matt gtmpsc_poll_sdma_t *pmps;
1082 1.1 matt
1083 1.1 matt DPRINTF(("hackinit\n"));
1084 1.1 matt
1085 1.1 matt bzero(sc, sizeof(struct gtmpsc_softc));
1086 1.1 matt gtmpsc_scp[sc->gtmpsc_unit] = sc;
1087 1.1 matt
1088 1.1 matt vmps = (gtmpsc_poll_sdma_t *)gtmpsc_fake_dmapage; /* KVA */
1089 1.1 matt pmps = (gtmpsc_poll_sdma_t *)gtmpsc_fake_dmapage; /* PA */
1090 1.1 matt
1091 1.1 matt gtmpsc_txdesc_init(vmps, pmps);
1092 1.1 matt gtmpsc_rxdesc_init(vmps, pmps);
1093 1.1 matt
1094 1.1 matt sc->gtmpsc_poll_sdmapage = vmps;
1095 1.1 matt }
1096 1.1 matt
1097 1.1 matt /*
1098 1.1 matt * gtmpsc_txflush - wait for output to drain
1099 1.1 matt */
1100 1.1 matt STATIC void
1101 1.1 matt gtmpsc_txflush(gtmpsc_softc_t *sc)
1102 1.1 matt {
1103 1.1 matt unsigned int csr;
1104 1.1 matt unsigned int *csrp;
1105 1.1 matt gtmpsc_polltx_t *vtxp;
1106 1.1 matt int limit = 4000000; /* 4 seconds */
1107 1.1 matt int ix;
1108 1.1 matt
1109 1.1 matt ix = sc->gtmpsc_poll_txix - 1;
1110 1.1 matt if (ix < 0)
1111 1.1 matt ix = GTMPSC_NTXDESC - 1;
1112 1.1 matt
1113 1.1 matt vtxp = &sc->gtmpsc_poll_sdmapage->tx[ix];
1114 1.1 matt csrp = &vtxp->txdesc.sdma_csr;
1115 1.1 matt while (limit > 0) {
1116 1.1 matt GTMPSC_CACHE_INVALIDATE(csrp);
1117 1.1 matt csr = desc_read(csrp);
1118 1.1 matt if ((csr & SDMA_CSR_TX_OWN) == 0)
1119 1.1 matt break;
1120 1.1 matt DELAY(GTMPSC_POLL_DELAY);
1121 1.1 matt limit -= GTMPSC_POLL_DELAY;
1122 1.1 matt }
1123 1.1 matt }
1124 1.1 matt
1125 1.1 matt STATIC void
1126 1.1 matt gtmpsc_iflush(gtmpsc_softc_t *sc)
1127 1.1 matt {
1128 1.1 matt int timo;
1129 1.1 matt char c;
1130 1.1 matt int stat;
1131 1.1 matt
1132 1.1 matt for (timo = 50000; timo; timo--)
1133 1.1 matt if (gtmpsc_common_pollc(sc->gtmpsc_unit, &c, &stat) == 0)
1134 1.1 matt return;
1135 1.1 matt #ifdef DIAGNOSTIC
1136 1.1 matt printf("%s: gtmpsc_iflush timeout %02x\n", sc->gtmpsc_dev.dv_xname, c);
1137 1.1 matt #endif
1138 1.1 matt }
1139 1.1 matt
1140 1.1 matt STATIC void
1141 1.1 matt gtmpscinit_stop(struct gtmpsc_softc *sc, int once)
1142 1.1 matt {
1143 1.1 matt unsigned int r;
1144 1.1 matt unsigned int unit = sc->gtmpsc_unit;
1145 1.1 matt
1146 1.1 matt /*
1147 1.1 matt * XXX HACK FIXME
1148 1.1 matt * PMON output has not been flushed. give him a chance
1149 1.1 matt */
1150 1.1 matt #if 1
1151 1.1 matt if (! once)
1152 1.1 matt DELAY(100000); /* XXX */
1153 1.1 matt #endif
1154 1.1 matt
1155 1.1 matt DPRINTF(("mpscinit: unit 0x%x\n", unit));
1156 1.1 matt if (unit >= GTMPSC_NCHAN) {
1157 1.1 matt PRINTF(("mpscinit: undefined unit %d\n", sc->gtmpsc_unit));
1158 1.1 matt return;
1159 1.1 matt }
1160 1.1 matt
1161 1.1 matt sc->gtmpsc_chr2 = 0; /* Default value of CHR2 */
1162 1.1 matt
1163 1.1 matt /*
1164 1.1 matt * stop GTMPSC unit
1165 1.1 matt */
1166 1.1 matt r = sc->gtmpsc_chr2 | GTMPSC_CHR2_RXABORT|GTMPSC_CHR2_TXABORT;
1167 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, GTMPSC_U_CHRN(unit, 2), r);
1168 1.1 matt
1169 1.1 matt DELAY(GTMPSC_RESET_DELAY);
1170 1.1 matt
1171 1.1 matt /*
1172 1.1 matt * abort SDMA TX, RX for GTMPSC unit
1173 1.1 matt */
1174 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, SDMA_U_SDCM(unit),
1175 1.1 matt SDMA_SDCM_AR|SDMA_SDCM_AT);
1176 1.1 matt
1177 1.1 matt if (once == 0) {
1178 1.1 matt /*
1179 1.1 matt * Determine if this is the buggy GT-64260A case.
1180 1.1 matt * If this is, then most of GTMPSC and SDMA registers
1181 1.1 matt * are unreadable.
1182 1.1 matt * (They always yield -1).
1183 1.1 matt */
1184 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, SDMA_IMASK, 0);
1185 1.1 matt r = GT_READ(sc->gtmpsc_dev.dv_parent, SDMA_IMASK);
1186 1.1 matt gt_reva_gtmpsc_bug = r == ~0;
1187 1.1 matt sdma_imask = 0;
1188 1.1 matt }
1189 1.1 matt /*
1190 1.1 matt * poll for GTMPSC RX abort completion
1191 1.1 matt */
1192 1.1 matt if (gt_reva_gtmpsc_bug) {
1193 1.1 matt /* Sync up with the device first */
1194 1.1 matt r = GT_READ(sc->gtmpsc_dev.dv_parent, GTMPSC_U_CHRN(unit, 2));
1195 1.1 matt DELAY(GTMPSC_RESET_DELAY);
1196 1.1 matt } else
1197 1.1 matt for (;;) {
1198 1.1 matt r = GT_READ(sc->gtmpsc_dev.dv_parent,
1199 1.1 matt GTMPSC_U_CHRN(unit, 2));
1200 1.1 matt if (! (r & GTMPSC_CHR2_RXABORT))
1201 1.1 matt break;
1202 1.1 matt }
1203 1.1 matt
1204 1.1 matt /*
1205 1.1 matt * poll for SDMA RX abort completion
1206 1.1 matt */
1207 1.1 matt for (;;) {
1208 1.1 matt r = GT_READ(sc->gtmpsc_dev.dv_parent, SDMA_U_SDCM(unit));
1209 1.1 matt if (! (r & SDMA_SDCM_AR))
1210 1.1 matt break;
1211 1.1 matt }
1212 1.1 matt
1213 1.1 matt }
1214 1.1 matt
1215 1.1 matt STATIC void
1216 1.1 matt gtmpscinit_start(struct gtmpsc_softc *sc, int once)
1217 1.1 matt {
1218 1.1 matt unsigned int r;
1219 1.1 matt unsigned int unit = sc->gtmpsc_unit;
1220 1.1 matt
1221 1.1 matt /*
1222 1.1 matt * initialize softc's "current" transfer indicies & counts
1223 1.1 matt */
1224 1.1 matt sc->gtmpsc_cx = 0;
1225 1.1 matt sc->gtmpsc_nc = 0;
1226 1.1 matt sc->gtmpsc_poll_txix = 0;
1227 1.1 matt sc->gtmpsc_poll_rxix = 0;
1228 1.1 matt
1229 1.1 matt /*
1230 1.1 matt * initialize softc's RX softintr FIFO
1231 1.1 matt */
1232 1.1 matt sc->gtmpsc_rxfifo_putix = 0;
1233 1.1 matt sc->gtmpsc_rxfifo_getix = 0;
1234 1.1 matt sc->gtmpsc_rxfifo_navail = GTMPSC_RXFIFOSZ;
1235 1.1 matt memset(&sc->gtmpsc_rxfifo[0], 0, GTMPSC_RXFIFOSZ);
1236 1.1 matt
1237 1.1 matt /*
1238 1.1 matt * set SDMA unit port TX descriptor pointers
1239 1.1 matt * "next" pointer of last descriptor is start of ring
1240 1.1 matt */
1241 1.1 matt r = desc_read(
1242 1.1 matt &sc->gtmpsc_poll_sdmapage->tx[GTMPSC_NTXDESC-1].txdesc.sdma_next);
1243 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, SDMA_U_SCTDP(unit), r); /* current */
1244 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, SDMA_U_SFTDP(unit), r); /* first */
1245 1.1 matt /*
1246 1.1 matt * set SDMA unit port RX descriptor pointer
1247 1.1 matt * "next" pointer of last descriptor is start of ring
1248 1.1 matt */
1249 1.1 matt r = desc_read(
1250 1.1 matt &sc->gtmpsc_poll_sdmapage->rx[GTMPSC_NRXDESC-1].rxdesc.sdma_next);
1251 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, SDMA_U_SCRDP(unit), r); /* current */
1252 1.1 matt
1253 1.1 matt /*
1254 1.1 matt * initialize SDMA unit Configuration Register
1255 1.1 matt */
1256 1.1 matt r = SDMA_SDC_BSZ_8x64|SDMA_SDC_SFM|SDMA_SDC_RFT;
1257 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, SDMA_U_SDC(unit), r);
1258 1.1 matt
1259 1.1 matt /*
1260 1.1 matt * enable SDMA receive
1261 1.1 matt */
1262 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, SDMA_U_SDCM(unit), SDMA_SDCM_ERD);
1263 1.1 matt
1264 1.1 matt if (once++ == 0) {
1265 1.1 matt /*
1266 1.1 matt * GTMPSC Routing:
1267 1.1 matt * MR0 --> Serial Port 0
1268 1.1 matt * MR1 --> Serial Port 1
1269 1.1 matt */
1270 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, GTMPSC_MRR, GTMPSC_MRR_RES);
1271 1.1 matt
1272 1.1 matt /*
1273 1.1 matt * RX and TX Clock Routing:
1274 1.1 matt * CRR0 --> BRG0
1275 1.1 matt * CRR1 --> BRG1
1276 1.1 matt */
1277 1.1 matt r = GTMPSC_CRR_BRG0 | (GTMPSC_CRR_BRG1 << GTMPSC_CRR1_SHIFT);
1278 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, GTMPSC_RCRR, r);
1279 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, GTMPSC_TCRR, r);
1280 1.1 matt }
1281 1.1 matt sc->gtmpsc_brg_bcr =
1282 1.1 matt BRG_BCR_EN | BRG_BCR_CLKS_TCLK | compute_cdv(GT_MPSC_DEFAULT_BAUD_RATE);
1283 1.1 matt sc->gtmpsc_chr3 = GTMPSC_MAXIDLE(GT_MPSC_DEFAULT_BAUD_RATE);
1284 1.1 matt gtmpsc_loadchannelregs(sc);
1285 1.1 matt
1286 1.1 matt /*
1287 1.1 matt * set MPSC Protocol configuration register for GTMPSC unit
1288 1.1 matt */
1289 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, GTMPSC_U_MPCR(unit), GTMPSC_MPCR_CL_8);
1290 1.1 matt
1291 1.1 matt /*
1292 1.1 matt * set MPSC LO and HI port config registers for GTMPSC unit
1293 1.1 matt */
1294 1.1 matt r = GTMPSC_MMCR_LO_MODE_UART
1295 1.1 matt |GTMPSC_MMCR_LO_ET
1296 1.1 matt |GTMPSC_MMCR_LO_ER
1297 1.1 matt |GTMPSC_MMCR_LO_NLM;
1298 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, GTMPSC_U_MMCR_LO(unit), r);
1299 1.1 matt
1300 1.1 matt r =
1301 1.1 matt GTMPSC_MMCR_HI_TCDV_DEFAULT
1302 1.1 matt |GTMPSC_MMCR_HI_RDW
1303 1.1 matt |GTMPSC_MMCR_HI_RCDV_DEFAULT;
1304 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, GTMPSC_U_MMCR_HI(unit), r);
1305 1.1 matt
1306 1.1 matt /*
1307 1.1 matt * tell MPSC receive the Enter Hunt
1308 1.1 matt */
1309 1.1 matt r = sc->gtmpsc_chr2 | GTMPSC_CHR2_EH;
1310 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, GTMPSC_U_CHRN(unit, 2), r);
1311 1.1 matt
1312 1.1 matt /*
1313 1.1 matt * clear any pending SDMA interrupts for this unit
1314 1.1 matt */
1315 1.1 matt r = GT_READ(sc->gtmpsc_dev.dv_parent, SDMA_ICAUSE);
1316 1.1 matt r &= ~SDMA_U_INTR_MASK(unit);
1317 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, SDMA_ICAUSE, r); /* ??? */
1318 1.1 matt
1319 1.1 matt DPRINTF(("gtmpscinit: OK\n"));
1320 1.1 matt }
1321 1.1 matt
1322 1.1 matt /*
1323 1.1 matt * gtmpscinit - prepare MPSC for operation
1324 1.1 matt *
1325 1.1 matt * assumes we are called at ipl >= IPL_SERIAL
1326 1.1 matt */
1327 1.1 matt STATIC void
1328 1.1 matt gtmpscinit(struct gtmpsc_softc *sc)
1329 1.1 matt {
1330 1.1 matt static int once = 0;
1331 1.1 matt
1332 1.1 matt gtmpscinit_stop(sc, once);
1333 1.1 matt gtmpscinit_start(sc, once);
1334 1.1 matt once++;
1335 1.1 matt }
1336 1.1 matt
1337 1.1 matt /*
1338 1.1 matt * gtmpsccninit - initialize the driver and the mpsc device
1339 1.1 matt */
1340 1.1 matt void
1341 1.1 matt gtmpsccninit(struct consdev *cd)
1342 1.1 matt {
1343 1.1 matt struct gtmpsc_softc *sc;
1344 1.1 matt unsigned int unit;
1345 1.1 matt int s;
1346 1.1 matt
1347 1.1 matt unit = GTMPSCUNIT(cd->cn_dev);
1348 1.1 matt DPRINTF(("gtmpsccninit unit 0x%x\n", unit));
1349 1.1 matt
1350 1.1 matt s = splserial();
1351 1.1 matt
1352 1.1 matt if (gtmpsc_nattached == 0) {
1353 1.1 matt unsigned char *cp;
1354 1.1 matt unsigned char c;
1355 1.1 matt unsigned int i;
1356 1.1 matt
1357 1.1 matt sc = >mpsc_fake_softc;
1358 1.1 matt gtmpsc_hackinit(sc);
1359 1.1 matt gtmpscinit(sc);
1360 1.1 matt gtmpsccninit_done = 1;
1361 1.1 matt cp = gtmpsc_earlybuf;
1362 1.1 matt for (i=0; i < sizeof(gtmpsc_earlybuf); i++) {
1363 1.1 matt c = *cp++;
1364 1.1 matt if (c == 0)
1365 1.1 matt break;
1366 1.1 matt gtmpsc_common_putc(0, c);
1367 1.1 matt }
1368 1.1 matt } else {
1369 1.1 matt gtmpsc_poll_sdma_t *vmps;
1370 1.1 matt gtmpsc_poll_sdma_t *pmps;
1371 1.1 matt
1372 1.1 matt sc = gtmpsc_scp[unit];
1373 1.1 matt
1374 1.1 matt gtmpsc_txflush(gtmpsc_scp[sc->gtmpsc_unit]);
1375 1.1 matt SDMA_IMASK_DISABLE(SDMA_INTR_RXBUF(sc->gtmpsc_unit)
1376 1.1 matt | SDMA_INTR_TXBUF(sc->gtmpsc_unit));
1377 1.1 matt
1378 1.1 matt gtmpscinit_stop(sc, 1);
1379 1.1 matt
1380 1.1 matt pmps = (gtmpsc_poll_sdma_t *)sc->gtmpsc_dma_segs[0].ds_addr;
1381 1.1 matt vmps = sc->gtmpsc_poll_sdmapage;
1382 1.1 matt gtmpsc_txdesc_init(vmps, pmps);
1383 1.1 matt gtmpsc_rxdesc_init(vmps, pmps);
1384 1.1 matt
1385 1.1 matt gtmpscinit_start(sc, 1);
1386 1.1 matt }
1387 1.1 matt
1388 1.1 matt splx(s);
1389 1.1 matt }
1390 1.1 matt
1391 1.1 matt int
1392 1.1 matt gtmpsccngetc(dev_t dev)
1393 1.1 matt {
1394 1.1 matt int s;
1395 1.1 matt int c;
1396 1.1 matt unsigned int unit;
1397 1.1 matt
1398 1.1 matt unit = GTMPSCUNIT(dev);
1399 1.1 matt if (unit >= GTMPSC_NCHAN)
1400 1.1 matt return 0;
1401 1.1 matt s = splserial();
1402 1.1 matt c = gtmpsc_common_getc(unit);
1403 1.1 matt splx(s);
1404 1.1 matt
1405 1.1 matt return c;
1406 1.1 matt }
1407 1.1 matt
1408 1.1 matt void
1409 1.1 matt gtmpsccnputc(dev_t dev, int c)
1410 1.1 matt {
1411 1.1 matt char ch = c;
1412 1.1 matt int s;
1413 1.1 matt unsigned int unit;
1414 1.1 matt static int ix = 0;
1415 1.1 matt
1416 1.1 matt if (gtmpsccninit_done == 0) {
1417 1.1 matt if ((minor(dev) == 0) && (ix < sizeof(gtmpsc_earlybuf)))
1418 1.1 matt gtmpsc_earlybuf[ix++] = (unsigned char)c;
1419 1.1 matt return;
1420 1.1 matt }
1421 1.1 matt
1422 1.1 matt unit = GTMPSCUNIT(dev);
1423 1.1 matt DPRINTF(("gtmpsccninit unit 0x%x\n", unit));
1424 1.1 matt
1425 1.1 matt if (unit >= GTMPSC_NCHAN)
1426 1.1 matt return;
1427 1.1 matt s = splserial();
1428 1.1 matt gtmpsc_common_putc(unit, ch);
1429 1.1 matt splx(s);
1430 1.1 matt }
1431 1.1 matt
1432 1.1 matt void
1433 1.1 matt gtmpsccnpollc(dev_t dev, int on)
1434 1.1 matt {
1435 1.1 matt }
1436 1.1 matt
1437 1.1 matt /*
1438 1.1 matt * gtmpsc_common_pollc - non-blocking console read
1439 1.1 matt *
1440 1.1 matt * if there is an RX char, return it in *cp
1441 1.1 matt * set *statp if Break detected
1442 1.1 matt *
1443 1.1 matt * assumes we are called at ipl >= IPL_SERIAL
1444 1.1 matt *
1445 1.1 matt * return 1 if there is RX data
1446 1.1 matt * otherwise return 0
1447 1.1 matt */
1448 1.1 matt STATIC int
1449 1.1 matt gtmpsc_common_pollc(unsigned int unit, char *cp, int *statp)
1450 1.1 matt {
1451 1.1 matt struct gtmpsc_softc *sc = gtmpsc_scp[unit];
1452 1.1 matt gtmpsc_pollrx_t *vrxp;
1453 1.1 matt unsigned int ix;
1454 1.1 matt unsigned int cx;
1455 1.1 matt unsigned int nc;
1456 1.1 matt
1457 1.1 matt *statp = GTMPSC_STAT_NONE;
1458 1.1 matt ix = sc->gtmpsc_poll_rxix;
1459 1.1 matt nc = sc->gtmpsc_nc;
1460 1.1 matt cx = sc->gtmpsc_cx;
1461 1.1 matt if (nc == 0) {
1462 1.1 matt unsigned int *csrp;
1463 1.1 matt unsigned int csr;
1464 1.1 matt
1465 1.1 matt vrxp = &sc->gtmpsc_poll_sdmapage->rx[ix];
1466 1.1 matt csrp = &vrxp->rxdesc.sdma_csr;
1467 1.1 matt cx = 0;
1468 1.1 matt
1469 1.1 matt GTMPSC_CACHE_INVALIDATE(csrp);
1470 1.1 matt csr = desc_read(csrp);
1471 1.1 matt if (csr & SDMA_CSR_RX_OWN)
1472 1.1 matt return 0;
1473 1.1 matt if (csr & SDMA_CSR_RX_BR)
1474 1.1 matt *statp = GTMPSC_STAT_BREAK;
1475 1.1 matt if (csr & SDMA_CSR_RX_ES)
1476 1.1 matt PRINTF(("mpsc 0 RX error, rxdesc csr 0x%x\n", csr));
1477 1.1 matt
1478 1.1 matt nc = desc_read(&vrxp->rxdesc.sdma_cnt);
1479 1.1 matt nc &= SDMA_RX_CNT_BCNT_MASK;
1480 1.1 matt csr = SDMA_CSR_RX_L|SDMA_CSR_RX_F|SDMA_CSR_RX_OWN
1481 1.1 matt |SDMA_CSR_RX_EI;
1482 1.1 matt if (nc == 0) {
1483 1.1 matt if ((++ix) >= GTMPSC_NRXDESC)
1484 1.1 matt ix = 0;
1485 1.1 matt sc->gtmpsc_poll_rxix = ix;
1486 1.1 matt desc_write(csrp, csr);
1487 1.1 matt GTMPSC_CACHE_FLUSH(csrp);
1488 1.1 matt return 0;
1489 1.1 matt }
1490 1.1 matt bcopy(vrxp->rxbuf, sc->gtmpsc_rxbuf, nc);
1491 1.1 matt desc_write(csrp, csr);
1492 1.1 matt GTMPSC_CACHE_FLUSH(csrp);
1493 1.1 matt }
1494 1.1 matt gtmpsc_poll_pollc_cnt++;
1495 1.1 matt nc--;
1496 1.1 matt *cp = sc->gtmpsc_rxbuf[cx++];
1497 1.1 matt if (nc == 0) {
1498 1.1 matt if ((++ix) >= GTMPSC_NRXDESC)
1499 1.1 matt ix = 0;
1500 1.1 matt sc->gtmpsc_poll_rxix = ix;
1501 1.1 matt }
1502 1.1 matt sc->gtmpsc_cx = cx;
1503 1.1 matt sc->gtmpsc_nc = nc;
1504 1.1 matt return 1;
1505 1.1 matt }
1506 1.1 matt
1507 1.1 matt /*
1508 1.1 matt * gtmpsc_common_getc - polled console read
1509 1.1 matt *
1510 1.1 matt * We copy data from the DMA buffers into a buffer in the softc
1511 1.1 matt * to reduce descriptor ownership turnaround time
1512 1.1 matt * MPSC can crater if it wraps descriptor rings,
1513 1.1 matt * which is asynchronous and throttled only by line speed.
1514 1.1 matt *
1515 1.1 matt * This code assumes the buffer PA==KVA
1516 1.1 matt * and assumes we are called at ipl >= IPL_SERIAL
1517 1.1 matt */
1518 1.1 matt STATIC int
1519 1.1 matt gtmpsc_common_getc(unsigned int unit)
1520 1.1 matt {
1521 1.1 matt struct gtmpsc_softc *sc = gtmpsc_scp[unit];
1522 1.1 matt gtmpsc_pollrx_t *vrxp;
1523 1.1 matt unsigned int ix;
1524 1.1 matt unsigned int cx;
1525 1.1 matt unsigned int nc;
1526 1.1 matt int c;
1527 1.1 matt
1528 1.1 matt ix = sc->gtmpsc_poll_rxix;
1529 1.1 matt nc = sc->gtmpsc_nc;
1530 1.1 matt cx = sc->gtmpsc_cx;
1531 1.1 matt while (nc == 0) {
1532 1.1 matt unsigned int *csrp;
1533 1.1 matt unsigned int csr;
1534 1.1 matt unsigned int r;
1535 1.1 matt
1536 1.1 matt vrxp = &sc->gtmpsc_poll_sdmapage->rx[ix];
1537 1.1 matt csrp = &vrxp->rxdesc.sdma_csr;
1538 1.1 matt cx = 0;
1539 1.1 matt
1540 1.1 matt GTMPSC_CACHE_INVALIDATE(csrp);
1541 1.1 matt csr = desc_read(csrp);
1542 1.1 matt if (csr & SDMA_CSR_RX_OWN) {
1543 1.1 matt r = sc->gtmpsc_chr2 | GTMPSC_CHR2_CRD;
1544 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent,
1545 1.1 matt GTMPSC_U_CHRN(unit, 2), r);
1546 1.1 matt do {
1547 1.1 matt
1548 1.1 matt gtmpsc_poll_getc_miss++;
1549 1.1 matt GTMPSC_CACHE_INVALIDATE(csrp);
1550 1.1 matt csr = desc_read(csrp);
1551 1.1 matt } while (csr & SDMA_CSR_RX_OWN);
1552 1.1 matt }
1553 1.1 matt if (csr & SDMA_CSR_RX_ES)
1554 1.1 matt PRINTF(("mpsc 0 RX error, rxdesc csr 0x%x\n", csr));
1555 1.1 matt
1556 1.1 matt nc = desc_read(&vrxp->rxdesc.sdma_cnt);
1557 1.1 matt nc &= SDMA_RX_CNT_BCNT_MASK;
1558 1.1 matt if (nc) {
1559 1.1 matt bcopy(vrxp->rxbuf, sc->gtmpsc_rxbuf, nc);
1560 1.1 matt } else {
1561 1.1 matt if ((++ix) >= GTMPSC_NRXDESC)
1562 1.1 matt ix = 0;
1563 1.1 matt sc->gtmpsc_poll_rxix = ix;
1564 1.1 matt }
1565 1.1 matt csr = SDMA_CSR_RX_L|SDMA_CSR_RX_F|SDMA_CSR_RX_OWN
1566 1.1 matt |SDMA_CSR_RX_EI;
1567 1.1 matt desc_write(csrp, csr);
1568 1.1 matt GTMPSC_CACHE_FLUSH(csrp);
1569 1.1 matt #ifdef KGDB
1570 1.1 matt if (unit == comkgdbport && gt_reva_gtmpsc_bug)
1571 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, SDMA_ICAUSE,
1572 1.1 matt ~SDMA_INTR_RXBUF(unit));
1573 1.1 matt #endif
1574 1.1 matt }
1575 1.1 matt gtmpsc_poll_getc_cnt++;
1576 1.1 matt nc--;
1577 1.1 matt c = (int)sc->gtmpsc_rxbuf[cx++];
1578 1.1 matt if (nc == 0) {
1579 1.1 matt if ((++ix) >= GTMPSC_NRXDESC)
1580 1.1 matt ix = 0;
1581 1.1 matt sc->gtmpsc_poll_rxix = ix;
1582 1.1 matt }
1583 1.1 matt sc->gtmpsc_cx = cx;
1584 1.1 matt sc->gtmpsc_nc = nc;
1585 1.1 matt return c;
1586 1.1 matt }
1587 1.1 matt
1588 1.1 matt /*
1589 1.1 matt * gtmpsc_common_putn - write a buffer into the hardware
1590 1.1 matt *
1591 1.1 matt * assumes we are called at ipl >= IPL_SERIAL
1592 1.1 matt */
1593 1.1 matt STATIC void
1594 1.1 matt gtmpsc_common_putn(struct gtmpsc_softc *sc)
1595 1.1 matt
1596 1.1 matt {
1597 1.1 matt int unit = sc->gtmpsc_unit;
1598 1.1 matt int n;
1599 1.1 matt int kick;
1600 1.1 matt gtmpsc_polltx_t *vtxp;
1601 1.1 matt unsigned int *csrp;
1602 1.1 matt unsigned int csr;
1603 1.1 matt unsigned int ix;
1604 1.1 matt unsigned int sdcm;
1605 1.1 matt
1606 1.1 matt kick = 0;
1607 1.1 matt for (ix = sc->gtmpsc_poll_txix; sc->sc_tbc;) {
1608 1.1 matt vtxp = &sc->gtmpsc_poll_sdmapage->tx[ix];
1609 1.1 matt csrp = &vtxp->txdesc.sdma_csr;
1610 1.1 matt GTMPSC_CACHE_INVALIDATE(csrp);
1611 1.1 matt csr = desc_read(csrp);
1612 1.1 matt if ((csr & SDMA_CSR_TX_OWN) != 0)
1613 1.1 matt break;
1614 1.1 matt n = sc->sc_tbc;
1615 1.1 matt if (n > GTMPSC_TXBUFSZ)
1616 1.1 matt n = GTMPSC_TXBUFSZ;
1617 1.1 matt bcopy(sc->sc_tba, vtxp->txbuf, n);
1618 1.1 matt csr = SDMA_CSR_TX_L | SDMA_CSR_TX_F
1619 1.1 matt | SDMA_CSR_TX_EI | SDMA_CSR_TX_OWN;
1620 1.1 matt desc_write(&vtxp->txdesc.sdma_cnt,
1621 1.1 matt (n << SDMA_TX_CNT_BCNT_SHIFT) | n);
1622 1.1 matt desc_write(csrp, csr);
1623 1.1 matt GTMPSC_CACHE_FLUSH(csrp);
1624 1.1 matt sc->sc_tbc -= n;
1625 1.1 matt sc->sc_tba += n;
1626 1.1 matt gtmpsc_poll_putn_cnt += n;
1627 1.1 matt sc->cnt_tx_to_sdma += n;
1628 1.1 matt kick = 1;
1629 1.1 matt
1630 1.1 matt if (++ix >= GTMPSC_NTXDESC)
1631 1.1 matt ix = 0;
1632 1.1 matt }
1633 1.1 matt if (kick) {
1634 1.1 matt sc->gtmpsc_poll_txix = ix;
1635 1.1 matt
1636 1.1 matt /*
1637 1.1 matt * now kick some SDMA
1638 1.1 matt */
1639 1.1 matt sdcm = GT_READ(sc->gtmpsc_dev.dv_parent, SDMA_U_SDCM(unit));
1640 1.1 matt
1641 1.1 matt if ((sdcm & SDMA_SDCM_TXD) == 0) {
1642 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, SDMA_U_SDCM(unit),
1643 1.1 matt SDMA_SDCM_TXD);
1644 1.1 matt }
1645 1.1 matt }
1646 1.1 matt }
1647 1.1 matt
1648 1.1 matt /*
1649 1.1 matt * gtmpsc_common_putc - polled console putc
1650 1.1 matt *
1651 1.1 matt * assumes we are called at ipl >= IPL_SERIAL
1652 1.1 matt */
1653 1.1 matt STATIC void
1654 1.1 matt gtmpsc_common_putc(unsigned int unit, unsigned char c)
1655 1.1 matt {
1656 1.1 matt struct gtmpsc_softc *sc = gtmpsc_scp[unit];
1657 1.1 matt gtmpsc_polltx_t *vtxp;
1658 1.1 matt unsigned int *csrp;
1659 1.1 matt unsigned int csr;
1660 1.1 matt unsigned int ix;
1661 1.1 matt unsigned int nix;
1662 1.1 matt unsigned int sdcm;
1663 1.1 matt
1664 1.1 matt ix = sc->gtmpsc_poll_txix;
1665 1.1 matt nix = ix + 1;
1666 1.1 matt if (nix >= GTMPSC_NTXDESC)
1667 1.1 matt nix = 0;
1668 1.1 matt sc->gtmpsc_poll_txix = nix;
1669 1.1 matt vtxp = &sc->gtmpsc_poll_sdmapage->tx[ix];
1670 1.1 matt csrp = &vtxp->txdesc.sdma_csr;
1671 1.1 matt
1672 1.1 matt for (;;) {
1673 1.1 matt
1674 1.1 matt GTMPSC_CACHE_INVALIDATE(csrp);
1675 1.1 matt csr = desc_read(csrp);
1676 1.1 matt if ((csr & SDMA_CSR_TX_OWN) == 0)
1677 1.1 matt break;
1678 1.1 matt gtmpsc_poll_putc_miss++;
1679 1.1 matt }
1680 1.1 matt if (csr & SDMA_CSR_TX_ES)
1681 1.1 matt PRINTF(("mpsc 0 TX error, txdesc csr 0x%x\n", csr));
1682 1.1 matt
1683 1.1 matt gtmpsc_poll_putc_cnt++;
1684 1.1 matt vtxp->txbuf[0] = c;
1685 1.1 matt csr = SDMA_CSR_TX_L | SDMA_CSR_TX_F
1686 1.1 matt | SDMA_CSR_TX_EI | SDMA_CSR_TX_OWN;
1687 1.1 matt desc_write(&vtxp->txdesc.sdma_cnt, (1 << SDMA_TX_CNT_BCNT_SHIFT) | 1);
1688 1.1 matt desc_write(csrp, csr);
1689 1.1 matt GTMPSC_CACHE_FLUSH(csrp);
1690 1.1 matt
1691 1.1 matt /*
1692 1.1 matt * now kick some SDMA
1693 1.1 matt */
1694 1.1 matt sdcm = GT_READ(sc->gtmpsc_dev.dv_parent, SDMA_U_SDCM(unit));
1695 1.1 matt
1696 1.1 matt if ((sdcm & SDMA_SDCM_TXD) == 0) {
1697 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, SDMA_U_SDCM(unit),
1698 1.1 matt SDMA_SDCM_TXD);
1699 1.1 matt }
1700 1.1 matt }
1701 1.1 matt
1702 1.1 matt
1703 1.1 matt STATIC void
1704 1.1 matt gtmpsc_poll(void *arg)
1705 1.1 matt {
1706 1.1 matt struct gtmpsc_softc *sc = (struct gtmpsc_softc *)arg;
1707 1.1 matt int kick;
1708 1.1 matt char ch;
1709 1.1 matt int stat;
1710 1.1 matt static struct timeval msg_time = {0,0};
1711 1.1 matt static struct timeval cur_time;
1712 1.1 matt static int fifo_full = 0;
1713 1.1 matt
1714 1.1 matt kick = 0;
1715 1.1 matt while (gtmpsc_common_pollc(sc->gtmpsc_unit, &ch, &stat)) {
1716 1.1 matt #ifdef DDB
1717 1.1 matt if (stat)
1718 1.1 matt break;
1719 1.1 matt #endif
1720 1.1 matt ++sc->cnt_rx_from_sdma;
1721 1.1 matt if (sc->gtmpsc_rxfifo_navail != 0) {
1722 1.1 matt sc->gtmpsc_rxfifo[sc->gtmpsc_rxfifo_putix++] = ch;
1723 1.1 matt if (sc->gtmpsc_rxfifo_putix == GTMPSC_RXFIFOSZ)
1724 1.1 matt sc->gtmpsc_rxfifo_putix = 0;
1725 1.1 matt atomic_add(&sc->gtmpsc_rxfifo_navail, -1);
1726 1.1 matt ++sc->cnt_rx_to_fifo;
1727 1.1 matt fifo_full = 0;
1728 1.1 matt kick = 1;
1729 1.1 matt } else {
1730 1.1 matt if (fifo_full == 0) {
1731 1.1 matt fifo_full = 1;
1732 1.1 matt microtime(&cur_time);
1733 1.1 matt if (cur_time.tv_sec - msg_time.tv_sec >= 5) {
1734 1.1 matt /* Only do this once in 5 sec */
1735 1.1 matt msg_time = cur_time;
1736 1.1 matt printf("mpsc%d: input FIFO full, "
1737 1.1 matt "dropping incoming characters\n",
1738 1.1 matt sc->gtmpsc_unit);
1739 1.1 matt }
1740 1.1 matt }
1741 1.1 matt }
1742 1.1 matt }
1743 1.1 matt #ifdef DDB
1744 1.2 matt #ifdef MPSC_CONSOLE
1745 1.1 matt if (stat) {
1746 1.1 matt struct consdev *ocd = cn_tab;
1747 1.1 matt if (ocd->cn_init != gtmpsccninit) {
1748 1.1 matt cn_tab = &constab[0];
1749 1.1 matt Debugger();
1750 1.1 matt cn_tab = ocd;
1751 1.1 matt } else {
1752 1.1 matt Debugger();
1753 1.1 matt }
1754 1.1 matt }
1755 1.1 matt #endif
1756 1.2 matt #endif
1757 1.1 matt if (kick)
1758 1.1 matt setsoftserial();
1759 1.1 matt }
1760 1.1 matt
1761 1.1 matt #ifdef KGDB
1762 1.1 matt /* ARGSUSED */
1763 1.1 matt STATIC int
1764 1.1 matt gtmpsc_kgdb_getc(arg)
1765 1.1 matt void *arg;
1766 1.1 matt {
1767 1.1 matt
1768 1.1 matt return (gtmpsc_common_getc(comkgdbport));
1769 1.1 matt }
1770 1.1 matt
1771 1.1 matt /* ARGSUSED */
1772 1.1 matt STATIC void
1773 1.1 matt gtmpsc_kgdb_putc(arg, c)
1774 1.1 matt void *arg;
1775 1.1 matt int c;
1776 1.1 matt {
1777 1.1 matt
1778 1.1 matt return (gtmpsc_common_putc(comkgdbport, c));
1779 1.1 matt }
1780 1.1 matt
1781 1.1 matt STATIC void
1782 1.1 matt gtmpsc_kgdb_poll(void *arg)
1783 1.1 matt {
1784 1.1 matt struct gtmpsc_softc *sc = (struct gtmpsc_softc *)arg;
1785 1.1 matt int s;
1786 1.1 matt char c;
1787 1.1 matt int brk;
1788 1.1 matt
1789 1.1 matt s = splserial();
1790 1.1 matt if (kgdb_recover == 0) { /* gdb is not currently talking to its agent */
1791 1.1 matt while (gtmpsc_common_pollc(sc->gtmpsc_unit, &c, &brk)) {
1792 1.1 matt if (c == CTRL('c'))
1793 1.1 matt brk = GTMPSC_STAT_BREAK;
1794 1.1 matt if (brk == GTMPSC_STAT_BREAK)
1795 1.1 matt break;
1796 1.1 matt }
1797 1.1 matt if (brk == GTMPSC_STAT_BREAK) {
1798 1.1 matt if (kgdb_break_immediate)
1799 1.1 matt breakpoint();
1800 1.1 matt else {
1801 1.1 matt printf("connecting to kgdb\n");
1802 1.1 matt kgdb_connect(1);
1803 1.1 matt }
1804 1.1 matt }
1805 1.1 matt }
1806 1.1 matt splx(s);
1807 1.1 matt }
1808 1.1 matt
1809 1.1 matt #endif /* KGDB */
1810 1.1 matt
1811 1.2 matt #if 0
1812 1.1 matt void
1813 1.1 matt #ifdef __STDC__
1814 1.1 matt gtmpsc_printf(const char *fmt, ...)
1815 1.1 matt #else
1816 1.1 matt gtmpsc_printf(fmt, va_alist)
1817 1.1 matt char *fmt;
1818 1.1 matt va_dcl
1819 1.1 matt #endif
1820 1.1 matt
1821 1.1 matt {
1822 1.1 matt struct consdev *ocd;
1823 1.1 matt int s;
1824 1.1 matt va_list ap;
1825 1.1 matt
1826 1.1 matt s = splserial();
1827 1.1 matt ocd = cn_tab;
1828 1.1 matt cn_tab = &constab[0];
1829 1.1 matt va_start(ap, fmt);
1830 1.1 matt printf(fmt, ap);
1831 1.1 matt va_end(ap);
1832 1.1 matt cn_tab = ocd;
1833 1.1 matt splx(s);
1834 1.1 matt }
1835 1.2 matt #endif
1836 1.1 matt
1837 1.1 matt void
1838 1.1 matt #ifdef __STDC__
1839 1.1 matt gtmpsc_mem_printf(const char *fmt, ...)
1840 1.1 matt #else
1841 1.1 matt gtmpsc_mem_printf(fmt, va_alist)
1842 1.1 matt char *fmt;
1843 1.1 matt va_dcl
1844 1.1 matt #endif
1845 1.1 matt {
1846 1.1 matt int s;
1847 1.1 matt va_list ap;
1848 1.1 matt static unsigned char *p = gtmpsc_print_buf;
1849 1.1 matt
1850 1.1 matt s = splserial();
1851 1.1 matt if (p >= >mpsc_print_buf[GTMPSC_PRINT_BUF_SIZE - 128]) {
1852 1.1 matt bzero(gtmpsc_print_buf, GTMPSC_PRINT_BUF_SIZE);
1853 1.1 matt p = gtmpsc_print_buf;
1854 1.1 matt }
1855 1.1 matt va_start(ap, fmt);
1856 1.1 matt p += vsprintf(p, fmt, ap);
1857 1.1 matt va_end(ap);
1858 1.1 matt splx(s);
1859 1.1 matt }
1860 1.1 matt
1861 1.1 matt void
1862 1.1 matt gtmpsc_shutdownhook(void *arg)
1863 1.1 matt {
1864 1.1 matt gtmpsc_softc_t *sc = (gtmpsc_softc_t *)arg;
1865 1.1 matt
1866 1.1 matt gtmpsc_txflush(sc);
1867 1.1 matt }
1868 1.1 matt
1869 1.1 matt void
1870 1.1 matt gtmpsccnhalt(dev_t dev)
1871 1.1 matt {
1872 1.1 matt unsigned int unit;
1873 1.1 matt gtmpsc_softc_t *sc = gtmpsc_scp[unit];
1874 1.1 matt u_int32_t r;
1875 1.1 matt
1876 1.1 matt for (unit = 0; unit < GTMPSC_NCHAN; unit++) {
1877 1.1 matt sc = gtmpsc_scp[unit];
1878 1.1 matt if (sc == NULL)
1879 1.1 matt continue;
1880 1.1 matt
1881 1.1 matt /*
1882 1.1 matt * flush TX buffers
1883 1.1 matt */
1884 1.1 matt gtmpsc_txflush(sc);
1885 1.1 matt
1886 1.1 matt /*
1887 1.1 matt * stop MPSC unit RX
1888 1.1 matt */
1889 1.1 matt r = GT_READ(sc->gtmpsc_dev.dv_parent, GTMPSC_U_CHRN(unit, 2));
1890 1.1 matt r &= ~GTMPSC_CHR2_EH;
1891 1.1 matt r |= GTMPSC_CHR2_RXABORT;
1892 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, GTMPSC_U_CHRN(unit, 2), r);
1893 1.1 matt
1894 1.1 matt DELAY(GTMPSC_RESET_DELAY);
1895 1.1 matt
1896 1.1 matt /*
1897 1.1 matt * abort SDMA RX for MPSC unit
1898 1.1 matt */
1899 1.1 matt GT_WRITE(sc->gtmpsc_dev.dv_parent, SDMA_U_SDCM(unit),
1900 1.1 matt SDMA_SDCM_AR);
1901 1.1 matt }
1902 1.1 matt }
1903 1.1 matt
1904 1.1 matt void
1905 1.1 matt gtmpsc_puts(char *str)
1906 1.1 matt {
1907 1.1 matt char c;
1908 1.1 matt
1909 1.1 matt if (str == NULL)
1910 1.1 matt return;
1911 1.1 matt while ((c = *str++) != 0)
1912 1.1 matt gtmpsccnputc(0, c);
1913 1.1 matt }
1914