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gtpcivar.h revision 1.2
      1  1.2  matt /*	$NetBSD: gtpcivar.h,v 1.2 2003/03/16 07:05:34 matt Exp $	*/
      2  1.1  matt 
      3  1.1  matt /*
      4  1.1  matt  * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
      5  1.1  matt  * All rights reserved.
      6  1.1  matt  *
      7  1.1  matt  * Redistribution and use in source and binary forms, with or without
      8  1.1  matt  * modification, are permitted provided that the following conditions
      9  1.1  matt  * are met:
     10  1.1  matt  * 1. Redistributions of source code must retain the above copyright
     11  1.1  matt  *    notice, this list of conditions and the following disclaimer.
     12  1.1  matt  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  matt  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  matt  *    documentation and/or other materials provided with the distribution.
     15  1.1  matt  * 3. All advertising materials mentioning features or use of this software
     16  1.1  matt  *    must display the following acknowledgement:
     17  1.1  matt  *      This product includes software developed for the NetBSD Project by
     18  1.1  matt  *      Allegro Networks, Inc., and Wasabi Systems, Inc.
     19  1.1  matt  * 4. The name of Allegro Networks, Inc. may not be used to endorse
     20  1.1  matt  *    or promote products derived from this software without specific prior
     21  1.1  matt  *    written permission.
     22  1.1  matt  * 5. The name of Wasabi Systems, Inc. may not be used to endorse
     23  1.1  matt  *    or promote products derived from this software without specific prior
     24  1.1  matt  *    written permission.
     25  1.1  matt  *
     26  1.1  matt  * THIS SOFTWARE IS PROVIDED BY ALLEGRO NETWORKS, INC. AND
     27  1.1  matt  * WASABI SYSTEMS, INC. ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
     28  1.1  matt  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
     29  1.1  matt  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     30  1.1  matt  * IN NO EVENT SHALL EITHER ALLEGRO NETWORKS, INC. OR WASABI SYSTEMS, INC.
     31  1.1  matt  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  1.1  matt  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  1.1  matt  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  1.1  matt  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  1.1  matt  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  1.1  matt  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  1.1  matt  * POSSIBILITY OF SUCH DAMAGE.
     38  1.1  matt  */
     39  1.1  matt 
     40  1.1  matt #ifndef _DEV_MARVELL_GTPCIVAR_H
     41  1.1  matt #define _DEV_MARVELL_GTPCIVAR_H
     42  1.1  matt 
     43  1.1  matt /*
     44  1.1  matt  */
     45  1.2  matt struct gtpci_chipset {
     46  1.2  matt 	struct pci_chipset gtpc_pc;
     47  1.2  matt 	int gtpc_busno;
     48  1.2  matt 	bus_space_tag_t gtpc_io_bs;
     49  1.2  matt 	bus_space_tag_t gtpc_mem_bs;
     50  1.2  matt 	bus_space_tag_t gtpc_gt_memt;
     51  1.2  matt 	bus_space_handle_t gtpc_gt_memh;
     52  1.2  matt 	bus_size_t gtpc_cfgaddr;
     53  1.2  matt 	bus_size_t gtpc_cfgdata;
     54  1.2  matt 	bus_size_t gtpc_syncreg;
     55  1.2  matt };
     56  1.1  matt 
     57  1.2  matt 
     58  1.2  matt #ifdef _KERNEL
     59  1.1  matt static uint32_t __inline
     60  1.2  matt gtpci_read(struct gtpci_chipset *gtpc, bus_size_t reg)
     61  1.1  matt {
     62  1.1  matt 	uint32_t rv;
     63  1.2  matt 	(void) bus_space_read_4(gtpc->gtpc_gt_memt, gtpc->gtpc_gt_memh,
     64  1.2  matt 	    gtpc->gtpc_syncreg);
     65  1.2  matt 	rv = bus_space_read_4(gtpc->gtpc_gt_memt, gtpc->gtpc_gt_memh, reg);
     66  1.2  matt 	(void) bus_space_read_4(gtpc->gtpc_gt_memt, gtpc->gtpc_gt_memh,
     67  1.2  matt 	    gtpc->gtpc_syncreg);
     68  1.1  matt 	return rv;
     69  1.1  matt }
     70  1.1  matt 
     71  1.1  matt static void __inline
     72  1.2  matt gtpci_write(struct gtpci_chipset *gtpc, bus_size_t reg, uint32_t val)
     73  1.1  matt {
     74  1.2  matt 	(void) bus_space_read_4(gtpc->gtpc_gt_memt, gtpc->gtpc_gt_memh,
     75  1.2  matt 	    gtpc->gtpc_syncreg);
     76  1.2  matt 	bus_space_write_4(gtpc->gtpc_gt_memt, gtpc->gtpc_gt_memh, reg, val);
     77  1.2  matt 	(void) bus_space_read_4(gtpc->gtpc_gt_memt, gtpc->gtpc_gt_memh,
     78  1.2  matt 	    gtpc->gtpc_syncreg);
     79  1.1  matt }
     80  1.1  matt 
     81  1.1  matt pcitag_t gtpci_make_tag(pci_chipset_tag_t, int, int, int);
     82  1.1  matt void	gtpci_decompose_tag(pci_chipset_tag_t, pcitag_t, int *, int *, int *);
     83  1.1  matt pcireg_t gtpci_conf_read(pci_chipset_tag_t, pcitag_t, int);
     84  1.1  matt void	gtpci_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t);
     85  1.1  matt 
     86  1.1  matt void	gtpci_md_bus_devorder(pci_chipset_tag_t, int, char []);
     87  1.1  matt int	gtpci_md_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
     88  1.1  matt int	gtpci_md_conf_hook(pci_chipset_tag_t, int, int, int, pcireg_t);
     89  1.1  matt void	gtpci_md_conf_interrupt(pci_chipset_tag_t, int, int, int, int, int *);
     90  1.2  matt #endif /* _KERNEL */
     91  1.1  matt 
     92  1.1  matt #endif /* _DEV_MARVELL_GTPCIVAR_H */
     93