gttwsi.c revision 1.3.2.2
1 1.3.2.2 yamt /* $NetBSD: gttwsi.c,v 1.3.2.2 2010/08/11 22:53:37 yamt Exp $ */ 2 1.3.2.2 yamt /* 3 1.3.2.2 yamt * Copyright (c) 2008 Eiji Kawauchi. 4 1.3.2.2 yamt * All rights reserved. 5 1.3.2.2 yamt * 6 1.3.2.2 yamt * Redistribution and use in source and binary forms, with or without 7 1.3.2.2 yamt * modification, are permitted provided that the following conditions 8 1.3.2.2 yamt * are met: 9 1.3.2.2 yamt * 1. Redistributions of source code must retain the above copyright 10 1.3.2.2 yamt * notice, this list of conditions and the following disclaimer. 11 1.3.2.2 yamt * 2. Redistributions in binary form must reproduce the above copyright 12 1.3.2.2 yamt * notice, this list of conditions and the following disclaimer in the 13 1.3.2.2 yamt * documentation and/or other materials provided with the distribution. 14 1.3.2.2 yamt * 3. All advertising materials mentioning features or use of this software 15 1.3.2.2 yamt * must display the following acknowledgement: 16 1.3.2.2 yamt * This product includes software developed for the NetBSD Project by 17 1.3.2.2 yamt * Eiji Kawauchi. 18 1.3.2.2 yamt * 4. The name of the author may not be used to endorse or promote products 19 1.3.2.2 yamt * derived from this software without specific prior written permission 20 1.3.2.2 yamt * 21 1.3.2.2 yamt * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 1.3.2.2 yamt * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 1.3.2.2 yamt * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 1.3.2.2 yamt * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 1.3.2.2 yamt * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 1.3.2.2 yamt * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 1.3.2.2 yamt * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 1.3.2.2 yamt * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 1.3.2.2 yamt * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 1.3.2.2 yamt * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 1.3.2.2 yamt */ 32 1.3.2.2 yamt /* 33 1.3.2.2 yamt * Copyright (c) 2005 Brocade Communcations, inc. 34 1.3.2.2 yamt * All rights reserved. 35 1.3.2.2 yamt * 36 1.3.2.2 yamt * Written by Matt Thomas for Brocade Communcations, Inc. 37 1.3.2.2 yamt * 38 1.3.2.2 yamt * Redistribution and use in source and binary forms, with or without 39 1.3.2.2 yamt * modification, are permitted provided that the following conditions 40 1.3.2.2 yamt * are met: 41 1.3.2.2 yamt * 1. Redistributions of source code must retain the above copyright 42 1.3.2.2 yamt * notice, this list of conditions and the following disclaimer. 43 1.3.2.2 yamt * 2. Redistributions in binary form must reproduce the above copyright 44 1.3.2.2 yamt * notice, this list of conditions and the following disclaimer in the 45 1.3.2.2 yamt * documentation and/or other materials provided with the distribution. 46 1.3.2.2 yamt * 3. The name of Brocade Communications, Inc. may not be used to endorse 47 1.3.2.2 yamt * or promote products derived from this software without specific prior 48 1.3.2.2 yamt * written permission. 49 1.3.2.2 yamt * 50 1.3.2.2 yamt * THIS SOFTWARE IS PROVIDED BY BROCADE COMMUNICATIONS, INC. ``AS IS'' AND 51 1.3.2.2 yamt * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 1.3.2.2 yamt * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 1.3.2.2 yamt * ARE DISCLAIMED. IN NO EVENT SHALL EITHER BROCADE COMMUNICATIONS, INC. BE 54 1.3.2.2 yamt * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 1.3.2.2 yamt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 1.3.2.2 yamt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 1.3.2.2 yamt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 1.3.2.2 yamt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 1.3.2.2 yamt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 60 1.3.2.2 yamt * OF THE POSSIBILITY OF SUCH DAMAGE. 61 1.3.2.2 yamt */ 62 1.3.2.2 yamt //#define TWSI_DEBUG 63 1.3.2.2 yamt 64 1.3.2.2 yamt /* 65 1.3.2.2 yamt * Marvell Two-Wire Serial Interface (aka I2C) master driver 66 1.3.2.2 yamt */ 67 1.3.2.2 yamt 68 1.3.2.2 yamt #include <sys/cdefs.h> 69 1.3.2.2 yamt __KERNEL_RCSID(0, "$NetBSD: gttwsi.c,v 1.3.2.2 2010/08/11 22:53:37 yamt Exp $"); 70 1.3.2.2 yamt #include "locators.h" 71 1.3.2.2 yamt 72 1.3.2.2 yamt #include <sys/param.h> 73 1.3.2.2 yamt #include <sys/bus.h> 74 1.3.2.2 yamt #include <sys/condvar.h> 75 1.3.2.2 yamt #include <sys/device.h> 76 1.3.2.2 yamt #include <sys/errno.h> 77 1.3.2.2 yamt #include <sys/kernel.h> 78 1.3.2.2 yamt #include <sys/mutex.h> 79 1.3.2.2 yamt #include <sys/systm.h> 80 1.3.2.2 yamt 81 1.3.2.2 yamt #include <machine/cpu.h> 82 1.3.2.2 yamt #include <machine/param.h> 83 1.3.2.2 yamt 84 1.3.2.2 yamt #include <dev/i2c/i2cvar.h> 85 1.3.2.2 yamt 86 1.3.2.2 yamt #include <dev/marvell/marvellvar.h> 87 1.3.2.2 yamt #include <dev/marvell/gttwsireg.h> 88 1.3.2.2 yamt 89 1.3.2.2 yamt struct gttwsi_softc { 90 1.3.2.2 yamt device_t sc_dev; 91 1.3.2.2 yamt bus_space_tag_t sc_bust; 92 1.3.2.2 yamt bus_space_handle_t sc_bush; 93 1.3.2.2 yamt uint8_t sc_started; 94 1.3.2.2 yamt struct i2c_controller sc_i2c; 95 1.3.2.2 yamt kmutex_t sc_buslock; 96 1.3.2.2 yamt kmutex_t sc_mtx; 97 1.3.2.2 yamt kcondvar_t sc_cv; 98 1.3.2.2 yamt }; 99 1.3.2.2 yamt 100 1.3.2.2 yamt static int gttwsi_match(device_t, cfdata_t, void *); 101 1.3.2.2 yamt static void gttwsi_attach(device_t, device_t, void *); 102 1.3.2.2 yamt 103 1.3.2.2 yamt static int gttwsi_intr(void *); 104 1.3.2.2 yamt 105 1.3.2.2 yamt static int gttwsi_acquire_bus(void *, int); 106 1.3.2.2 yamt static void gttwsi_release_bus(void *, int); 107 1.3.2.2 yamt static int gttwsi_send_start(void *v, int flags); 108 1.3.2.2 yamt static int gttwsi_send_stop(void *v, int flags); 109 1.3.2.2 yamt static int gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags); 110 1.3.2.2 yamt static int gttwsi_read_byte(void *v, uint8_t *valp, int flags); 111 1.3.2.2 yamt static int gttwsi_write_byte(void *v, uint8_t val, int flags); 112 1.3.2.2 yamt 113 1.3.2.2 yamt static int gttwsi_wait(struct gttwsi_softc *, uint32_t, uint32_t, int); 114 1.3.2.2 yamt 115 1.3.2.2 yamt static __inline u_int32_t RREG(struct gttwsi_softc *, u_int32_t); 116 1.3.2.2 yamt static __inline void WREG(struct gttwsi_softc *, u_int32_t, u_int32_t); 117 1.3.2.2 yamt 118 1.3.2.2 yamt 119 1.3.2.2 yamt CFATTACH_DECL_NEW(gttwsi_gt, sizeof(struct gttwsi_softc), 120 1.3.2.2 yamt gttwsi_match, gttwsi_attach, NULL, NULL); 121 1.3.2.2 yamt CFATTACH_DECL_NEW(gttwsi_mbus, sizeof(struct gttwsi_softc), 122 1.3.2.2 yamt gttwsi_match, gttwsi_attach, NULL, NULL); 123 1.3.2.2 yamt 124 1.3.2.2 yamt 125 1.3.2.2 yamt static __inline u_int32_t 126 1.3.2.2 yamt RREG(struct gttwsi_softc *sc, u_int32_t reg) 127 1.3.2.2 yamt { 128 1.3.2.2 yamt u_int32_t val; 129 1.3.2.2 yamt 130 1.3.2.2 yamt val = bus_space_read_4(sc->sc_bust, sc->sc_bush, reg); 131 1.3.2.2 yamt #ifdef TWSI_DEBUG 132 1.3.2.2 yamt printf("I2C:R:%02x:%02x\n", reg, val); 133 1.3.2.2 yamt #else 134 1.3.2.2 yamt DELAY(TWSI_READ_DELAY); 135 1.3.2.2 yamt #endif 136 1.3.2.2 yamt return val; 137 1.3.2.2 yamt } 138 1.3.2.2 yamt 139 1.3.2.2 yamt static __inline void 140 1.3.2.2 yamt WREG(struct gttwsi_softc *sc, u_int32_t reg, u_int32_t val) 141 1.3.2.2 yamt { 142 1.3.2.2 yamt bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val); 143 1.3.2.2 yamt #ifdef TWSI_DEBUG 144 1.3.2.2 yamt printf("I2C:W:%02x:%02x\n", reg, val); 145 1.3.2.2 yamt #else 146 1.3.2.2 yamt DELAY(TWSI_WRITE_DELAY); 147 1.3.2.2 yamt #endif 148 1.3.2.2 yamt return; 149 1.3.2.2 yamt } 150 1.3.2.2 yamt 151 1.3.2.2 yamt 152 1.3.2.2 yamt /* ARGSUSED */ 153 1.3.2.2 yamt static int 154 1.3.2.2 yamt gttwsi_match(device_t parent, cfdata_t match, void *aux) 155 1.3.2.2 yamt { 156 1.3.2.2 yamt struct marvell_attach_args *mva = aux; 157 1.3.2.2 yamt 158 1.3.2.2 yamt if (strcmp(mva->mva_name, match->cf_name) != 0) 159 1.3.2.2 yamt return 0; 160 1.3.2.2 yamt if (mva->mva_offset == MVA_OFFSET_DEFAULT || 161 1.3.2.2 yamt mva->mva_irq == MVA_IRQ_DEFAULT) 162 1.3.2.2 yamt return 0; 163 1.3.2.2 yamt 164 1.3.2.2 yamt mva->mva_size = GTTWSI_SIZE; 165 1.3.2.2 yamt return 1; 166 1.3.2.2 yamt } 167 1.3.2.2 yamt 168 1.3.2.2 yamt /* ARGSUSED */ 169 1.3.2.2 yamt static void 170 1.3.2.2 yamt gttwsi_attach(device_t parent, device_t self, void *args) 171 1.3.2.2 yamt { 172 1.3.2.2 yamt struct gttwsi_softc *sc = device_private(self); 173 1.3.2.2 yamt struct marvell_attach_args *mva = args; 174 1.3.2.2 yamt struct i2cbus_attach_args iba; 175 1.3.2.2 yamt 176 1.3.2.2 yamt aprint_naive("\n"); 177 1.3.2.2 yamt aprint_normal(": Marvell TWSI controller\n"); 178 1.3.2.2 yamt 179 1.3.2.2 yamt sc->sc_dev = self; 180 1.3.2.2 yamt sc->sc_bust = mva->mva_iot; 181 1.3.2.2 yamt if (bus_space_subregion(mva->mva_iot, mva->mva_ioh, mva->mva_offset, 182 1.3.2.2 yamt mva->mva_size, &sc->sc_bush)) { 183 1.3.2.2 yamt aprint_error_dev(self, "Cannot map registers\n"); 184 1.3.2.2 yamt return; 185 1.3.2.2 yamt } 186 1.3.2.2 yamt 187 1.3.2.2 yamt mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE); 188 1.3.2.2 yamt mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_BIO); 189 1.3.2.2 yamt cv_init(&sc->sc_cv, "gttwsi"); 190 1.3.2.2 yamt 191 1.3.2.2 yamt sc->sc_started = 0; 192 1.3.2.2 yamt sc->sc_i2c.ic_cookie = sc; 193 1.3.2.2 yamt sc->sc_i2c.ic_acquire_bus = gttwsi_acquire_bus; 194 1.3.2.2 yamt sc->sc_i2c.ic_release_bus = gttwsi_release_bus; 195 1.3.2.2 yamt sc->sc_i2c.ic_exec = NULL; 196 1.3.2.2 yamt sc->sc_i2c.ic_send_start = gttwsi_send_start; 197 1.3.2.2 yamt sc->sc_i2c.ic_send_stop = gttwsi_send_stop; 198 1.3.2.2 yamt sc->sc_i2c.ic_initiate_xfer = gttwsi_initiate_xfer; 199 1.3.2.2 yamt sc->sc_i2c.ic_read_byte = gttwsi_read_byte; 200 1.3.2.2 yamt sc->sc_i2c.ic_write_byte = gttwsi_write_byte; 201 1.3.2.2 yamt 202 1.3.2.2 yamt marvell_intr_establish(mva->mva_irq, IPL_BIO, gttwsi_intr, sc); 203 1.3.2.2 yamt 204 1.3.2.2 yamt /* 205 1.3.2.2 yamt * Put the controller into Soft Reset. 206 1.3.2.2 yamt */ 207 1.3.2.2 yamt /* reset */ 208 1.3.2.2 yamt WREG(sc, TWSI_SOFTRESET, SOFTRESET_VAL); 209 1.3.2.2 yamt 210 1.3.2.2 yamt memset(&iba, 0, sizeof(iba)); 211 1.3.2.2 yamt iba.iba_tag = &sc->sc_i2c; 212 1.3.2.2 yamt (void) config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print); 213 1.3.2.2 yamt } 214 1.3.2.2 yamt 215 1.3.2.2 yamt static int 216 1.3.2.2 yamt gttwsi_intr(void *arg) 217 1.3.2.2 yamt { 218 1.3.2.2 yamt struct gttwsi_softc *sc = arg; 219 1.3.2.2 yamt uint32_t val; 220 1.3.2.2 yamt 221 1.3.2.2 yamt val = RREG(sc, TWSI_CONTROL); 222 1.3.2.2 yamt if (val & CONTROL_IFLG) { 223 1.3.2.2 yamt WREG(sc, TWSI_CONTROL, val & ~CONTROL_INTEN); 224 1.3.2.2 yamt mutex_enter(&sc->sc_mtx); 225 1.3.2.2 yamt cv_signal(&sc->sc_cv); 226 1.3.2.2 yamt mutex_exit(&sc->sc_mtx); 227 1.3.2.2 yamt 228 1.3.2.2 yamt return 1; /* handled */ 229 1.3.2.2 yamt } 230 1.3.2.2 yamt return 0; 231 1.3.2.2 yamt } 232 1.3.2.2 yamt 233 1.3.2.2 yamt /* ARGSUSED */ 234 1.3.2.2 yamt static int 235 1.3.2.2 yamt gttwsi_acquire_bus(void *arg, int flags) 236 1.3.2.2 yamt { 237 1.3.2.2 yamt struct gttwsi_softc *sc = arg; 238 1.3.2.2 yamt 239 1.3.2.2 yamt mutex_enter(&sc->sc_buslock); 240 1.3.2.2 yamt return 0; 241 1.3.2.2 yamt } 242 1.3.2.2 yamt 243 1.3.2.2 yamt /* ARGSUSED */ 244 1.3.2.2 yamt static void 245 1.3.2.2 yamt gttwsi_release_bus(void *arg, int flags) 246 1.3.2.2 yamt { 247 1.3.2.2 yamt struct gttwsi_softc *sc = arg; 248 1.3.2.2 yamt 249 1.3.2.2 yamt mutex_exit(&sc->sc_buslock); 250 1.3.2.2 yamt } 251 1.3.2.2 yamt 252 1.3.2.2 yamt static int 253 1.3.2.2 yamt gttwsi_send_start(void *v, int flags) 254 1.3.2.2 yamt { 255 1.3.2.2 yamt struct gttwsi_softc *sc = v; 256 1.3.2.2 yamt int expect; 257 1.3.2.2 yamt 258 1.3.2.2 yamt if (sc->sc_started) 259 1.3.2.2 yamt expect = STAT_RSCT; 260 1.3.2.2 yamt else 261 1.3.2.2 yamt expect = STAT_SCT; 262 1.3.2.2 yamt sc->sc_started = 1; 263 1.3.2.2 yamt return gttwsi_wait(sc, CONTROL_START, expect, flags); 264 1.3.2.2 yamt } 265 1.3.2.2 yamt 266 1.3.2.2 yamt static int 267 1.3.2.2 yamt gttwsi_send_stop(void *v, int flags) 268 1.3.2.2 yamt { 269 1.3.2.2 yamt struct gttwsi_softc *sc = v; 270 1.3.2.2 yamt int retry = TWSI_RETRY_COUNT; 271 1.3.2.2 yamt 272 1.3.2.2 yamt sc->sc_started = 0; 273 1.3.2.2 yamt 274 1.3.2.2 yamt /* Interrupt is not generated for STAT_NRS. */ 275 1.3.2.2 yamt WREG(sc, TWSI_CONTROL, CONTROL_STOP | CONTROL_TWSIEN); 276 1.3.2.2 yamt while (retry > 0) { 277 1.3.2.2 yamt if (RREG(sc, TWSI_STATUS) == STAT_NRS) 278 1.3.2.2 yamt return 0; 279 1.3.2.2 yamt retry--; 280 1.3.2.2 yamt DELAY(TWSI_STAT_DELAY); 281 1.3.2.2 yamt } 282 1.3.2.2 yamt 283 1.3.2.2 yamt aprint_error_dev(sc->sc_dev, "send STOP failed\n"); 284 1.3.2.2 yamt return -1; 285 1.3.2.2 yamt } 286 1.3.2.2 yamt 287 1.3.2.2 yamt static int 288 1.3.2.2 yamt gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags) 289 1.3.2.2 yamt { 290 1.3.2.2 yamt struct gttwsi_softc *sc = v; 291 1.3.2.2 yamt uint32_t data, expect; 292 1.3.2.2 yamt int error, read; 293 1.3.2.2 yamt 294 1.3.2.2 yamt gttwsi_send_start(v, flags); 295 1.3.2.2 yamt 296 1.3.2.2 yamt read = (flags & I2C_F_READ) != 0; 297 1.3.2.2 yamt if (read) 298 1.3.2.2 yamt expect = STAT_ARBT_AR; 299 1.3.2.2 yamt else 300 1.3.2.2 yamt expect = STAT_AWBT_AR; 301 1.3.2.2 yamt 302 1.3.2.2 yamt /* 303 1.3.2.2 yamt * First byte contains whether this xfer is a read or write. 304 1.3.2.2 yamt */ 305 1.3.2.2 yamt data = read; 306 1.3.2.2 yamt if (addr > 0x7f) { 307 1.3.2.2 yamt /* 308 1.3.2.2 yamt * If this is a 10bit request, the first address byte is 309 1.3.2.2 yamt * 0b11110<b9><b8><r/w>. 310 1.3.2.2 yamt */ 311 1.3.2.2 yamt data |= 0xf0 | ((addr & 0x300) >> 7); 312 1.3.2.2 yamt WREG(sc, TWSI_DATA, data); 313 1.3.2.2 yamt error = gttwsi_wait(sc, 0, expect, flags); 314 1.3.2.2 yamt if (error) 315 1.3.2.2 yamt return error; 316 1.3.2.2 yamt /* 317 1.3.2.2 yamt * The first address byte has been sent, now to send 318 1.3.2.2 yamt * the second one. 319 1.3.2.2 yamt */ 320 1.3.2.2 yamt if (read) 321 1.3.2.2 yamt expect = STAT_SARBT_AR; 322 1.3.2.2 yamt else 323 1.3.2.2 yamt expect = STAT_SAWBT_AR; 324 1.3.2.2 yamt data = (uint8_t)addr; 325 1.3.2.2 yamt } else 326 1.3.2.2 yamt data |= (addr << 1); 327 1.3.2.2 yamt 328 1.3.2.2 yamt WREG(sc, TWSI_DATA, data); 329 1.3.2.2 yamt return gttwsi_wait(sc, 0, expect, flags); 330 1.3.2.2 yamt } 331 1.3.2.2 yamt 332 1.3.2.2 yamt static int 333 1.3.2.2 yamt gttwsi_read_byte(void *v, uint8_t *valp, int flags) 334 1.3.2.2 yamt { 335 1.3.2.2 yamt struct gttwsi_softc *sc = v; 336 1.3.2.2 yamt int error; 337 1.3.2.2 yamt 338 1.3.2.2 yamt error = gttwsi_wait(sc, CONTROL_ACK, STAT_MRRD_AT, flags); 339 1.3.2.2 yamt if (!error) 340 1.3.2.2 yamt *valp = RREG(sc, TWSI_DATA); 341 1.3.2.2 yamt if (flags & I2C_F_LAST) 342 1.3.2.2 yamt WREG(sc, TWSI_CONTROL, 0); 343 1.3.2.2 yamt return error; 344 1.3.2.2 yamt } 345 1.3.2.2 yamt 346 1.3.2.2 yamt static int 347 1.3.2.2 yamt gttwsi_write_byte(void *v, uint8_t val, int flags) 348 1.3.2.2 yamt { 349 1.3.2.2 yamt struct gttwsi_softc *sc = v; 350 1.3.2.2 yamt 351 1.3.2.2 yamt WREG(sc, TWSI_DATA, val); 352 1.3.2.2 yamt return gttwsi_wait(sc, 0, STAT_MTDB_AR, flags); 353 1.3.2.2 yamt } 354 1.3.2.2 yamt 355 1.3.2.2 yamt static int 356 1.3.2.2 yamt gttwsi_wait(struct gttwsi_softc *sc, uint32_t control, uint32_t expect, 357 1.3.2.2 yamt int flags) 358 1.3.2.2 yamt { 359 1.3.2.2 yamt uint32_t status; 360 1.3.2.2 yamt int error = 0; 361 1.3.2.2 yamt 362 1.3.2.2 yamt DELAY(5); 363 1.3.2.2 yamt if (!(flags & I2C_F_POLL)) 364 1.3.2.2 yamt control |= CONTROL_INTEN; 365 1.3.2.2 yamt WREG(sc, TWSI_CONTROL, control | CONTROL_TWSIEN); 366 1.3.2.2 yamt 367 1.3.2.2 yamt for (;;) { 368 1.3.2.2 yamt control = RREG(sc, TWSI_CONTROL); 369 1.3.2.2 yamt if (control & CONTROL_IFLG) 370 1.3.2.2 yamt break; 371 1.3.2.2 yamt if (!(flags & I2C_F_POLL)) { 372 1.3.2.2 yamt mutex_enter(&sc->sc_mtx); 373 1.3.2.2 yamt error = cv_timedwait_sig(&sc->sc_cv, &sc->sc_mtx, hz); 374 1.3.2.2 yamt mutex_exit(&sc->sc_mtx); 375 1.3.2.2 yamt if (error) 376 1.3.2.2 yamt return error; 377 1.3.2.2 yamt } 378 1.3.2.2 yamt DELAY(TWSI_RETRY_DELAY); 379 1.3.2.2 yamt } 380 1.3.2.2 yamt 381 1.3.2.2 yamt status = RREG(sc, TWSI_STATUS); 382 1.3.2.2 yamt if (status != expect) { 383 1.3.2.2 yamt aprint_error_dev(sc->sc_dev, 384 1.3.2.2 yamt "unexpected status 0x%x: expect 0x%x\n", status, expect); 385 1.3.2.2 yamt return EIO; 386 1.3.2.2 yamt } 387 1.3.2.2 yamt 388 1.3.2.2 yamt if ((flags & I2C_F_STOP) && expect != STAT_MRRD_AT) 389 1.3.2.2 yamt error = gttwsi_send_stop(sc, flags); 390 1.3.2.2 yamt 391 1.3.2.2 yamt return error; 392 1.3.2.2 yamt } 393
Indexes created Tue Oct 07 21:09:53 GMT 2025