gttwsi.c revision 1.2 1 /* $NetBSD: gttwsi.c,v 1.2 2010/07/11 08:43:36 kiyohara Exp $ */
2 /*
3 * Copyright (c) 2008 Eiji Kawauchi.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed for the NetBSD Project by
17 * Eiji Kawauchi.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32 /*
33 * Copyright (c) 2005 Brocade Communcations, inc.
34 * All rights reserved.
35 *
36 * Written by Matt Thomas for Brocade Communcations, Inc.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution.
46 * 3. The name of Brocade Communications, Inc. may not be used to endorse
47 * or promote products derived from this software without specific prior
48 * written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY BROCADE COMMUNICATIONS, INC. ``AS IS'' AND
51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL EITHER BROCADE COMMUNICATIONS, INC. BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
60 * OF THE POSSIBILITY OF SUCH DAMAGE.
61 */
62 //#define TWSI_DEBUG
63
64 /*
65 * Marvell Two-Wire Serial Interface (aka I2C) master driver
66 */
67
68 #include <sys/cdefs.h>
69 __KERNEL_RCSID(0, "$NetBSD: gttwsi.c,v 1.2 2010/07/11 08:43:36 kiyohara Exp $");
70 #include "locators.h"
71
72 #include <sys/param.h>
73 #include <sys/bus.h>
74 #include <sys/condvar.h>
75 #include <sys/device.h>
76 #include <sys/errno.h>
77 #include <sys/kernel.h>
78 #include <sys/mutex.h>
79 #include <sys/systm.h>
80
81 #include <machine/cpu.h>
82 #include <machine/param.h>
83
84 #include <dev/i2c/i2cvar.h>
85
86 #include <dev/marvell/marvellvar.h>
87 #include <dev/marvell/gttwsireg.h>
88
89 struct gttwsi_softc {
90 device_t sc_dev;
91 bus_space_tag_t sc_bust;
92 bus_space_handle_t sc_bush;
93 uint8_t sc_started;
94 struct i2c_controller sc_i2c;
95 kmutex_t sc_buslock;
96 kmutex_t sc_mtx;
97 kcondvar_t sc_cv;
98 };
99
100 static int gttwsi_match(device_t, cfdata_t, void *);
101 static void gttwsi_attach(device_t, device_t, void *);
102
103 static int gttwsi_intr(void *);
104
105 static int gttwsi_acquire_bus(void *, int);
106 static void gttwsi_release_bus(void *, int);
107 static int gttwsi_send_start(void *v, int flags);
108 static int gttwsi_send_stop(void *v, int flags);
109 static int gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags);
110 static int gttwsi_read_byte(void *v, uint8_t *valp, int flags);
111 static int gttwsi_write_byte(void *v, uint8_t val, int flags);
112
113 static int gttwsi_wait(struct gttwsi_softc *, uint32_t, uint32_t, int);
114
115 static __inline u_int32_t RREG(struct gttwsi_softc *, u_int32_t);
116 static __inline void WREG(struct gttwsi_softc *, u_int32_t, u_int32_t);
117
118
119 CFATTACH_DECL_NEW(gttwsi_gt, sizeof(struct gttwsi_softc),
120 gttwsi_match, gttwsi_attach, NULL, NULL);
121 CFATTACH_DECL_NEW(gttwsi_mbus, sizeof(struct gttwsi_softc),
122 gttwsi_match, gttwsi_attach, NULL, NULL);
123
124
125 static __inline u_int32_t
126 RREG(struct gttwsi_softc *sc, u_int32_t reg)
127 {
128 u_int32_t val;
129
130 val = bus_space_read_4(sc->sc_bust, sc->sc_bush, reg);
131 #ifdef TWSI_DEBUG
132 printf("I2C:R:%02x:%02x\n", reg, val);
133 #else
134 DELAY(TWSI_READ_DELAY);
135 #endif
136 return val;
137 }
138
139 static __inline void
140 WREG(struct gttwsi_softc *sc, u_int32_t reg, u_int32_t val)
141 {
142 bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val);
143 #ifdef TWSI_DEBUG
144 printf("I2C:W:%02x:%02x\n", reg, val);
145 #else
146 DELAY(TWSI_WRITE_DELAY);
147 #endif
148 return;
149 }
150
151
152 /* ARGSUSED */
153 static int
154 gttwsi_match(device_t parent, cfdata_t match, void *aux)
155 {
156 struct marvell_attach_args *mva = aux;
157
158 if (strcmp(mva->mva_name, match->cf_name) != 0)
159 return 0;
160
161 if (mva->mva_offset == MVA_OFFSET_DEFAULT ||
162 mva->mva_irq == MVA_IRQ_DEFAULT)
163 return 0;
164
165 mva->mva_size = GTTWSI_SIZE;
166 return 1;
167 }
168
169 /* ARGSUSED */
170 static void
171 gttwsi_attach(device_t parent, device_t self, void *args)
172 {
173 struct gttwsi_softc *sc = device_private(self);
174 struct marvell_attach_args *mva = args;
175 struct i2cbus_attach_args iba;
176
177 aprint_naive("\n");
178 aprint_normal(": Marvell TWSI controller\n");
179
180 sc->sc_dev = self;
181 sc->sc_bust = mva->mva_iot;
182 if (bus_space_subregion(mva->mva_iot, mva->mva_ioh, mva->mva_offset,
183 mva->mva_size, &sc->sc_bush)) {
184 aprint_error_dev(self, "Cannot map registers\n");
185 return;
186 }
187
188 mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE);
189 mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_BIO);
190 cv_init(&sc->sc_cv, "gttwsi");
191
192 sc->sc_started = 0;
193 sc->sc_i2c.ic_cookie = sc;
194 sc->sc_i2c.ic_acquire_bus = gttwsi_acquire_bus;
195 sc->sc_i2c.ic_release_bus = gttwsi_release_bus;
196 sc->sc_i2c.ic_exec = NULL;
197 sc->sc_i2c.ic_send_start = gttwsi_send_start;
198 sc->sc_i2c.ic_send_stop = gttwsi_send_stop;
199 sc->sc_i2c.ic_initiate_xfer = gttwsi_initiate_xfer;
200 sc->sc_i2c.ic_read_byte = gttwsi_read_byte;
201 sc->sc_i2c.ic_write_byte = gttwsi_write_byte;
202
203 marvell_intr_establish(mva->mva_irq, IPL_BIO, gttwsi_intr, sc);
204
205 /*
206 * Put the controller into Soft Reset.
207 */
208 /* reset */
209 WREG(sc, TWSI_SOFTRESET, SOFTRESET_VAL);
210
211 memset(&iba, 0, sizeof(iba));
212 iba.iba_tag = &sc->sc_i2c;
213 (void) config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print);
214 }
215
216 static int
217 gttwsi_intr(void *arg)
218 {
219 struct gttwsi_softc *sc = arg;
220 uint32_t val;
221
222 val = RREG(sc, TWSI_CONTROL);
223 if (val & CONTROL_IFLG) {
224 WREG(sc, TWSI_CONTROL, val & ~CONTROL_INTEN);
225 mutex_enter(&sc->sc_mtx);
226 cv_signal(&sc->sc_cv);
227 mutex_exit(&sc->sc_mtx);
228
229 return 1; /* handled */
230 }
231 return 0;
232 }
233
234 /* ARGSUSED */
235 static int
236 gttwsi_acquire_bus(void *arg, int flags)
237 {
238 struct gttwsi_softc *sc = arg;
239
240 mutex_enter(&sc->sc_buslock);
241 return 0;
242 }
243
244 /* ARGSUSED */
245 static void
246 gttwsi_release_bus(void *arg, int flags)
247 {
248 struct gttwsi_softc *sc = arg;
249
250 mutex_exit(&sc->sc_buslock);
251 }
252
253 static int
254 gttwsi_send_start(void *v, int flags)
255 {
256 struct gttwsi_softc *sc = v;
257 int expect;
258
259 if (sc->sc_started)
260 expect = STAT_RSCT;
261 else
262 expect = STAT_SCT;
263 sc->sc_started = 1;
264 return gttwsi_wait(sc, CONTROL_START, expect, flags);
265 }
266
267 static int
268 gttwsi_send_stop(void *v, int flags)
269 {
270 struct gttwsi_softc *sc = v;
271 int retry = TWSI_RETRY_COUNT;
272
273 sc->sc_started = 0;
274
275 /* Interrupt is not generated for STAT_NRS. */
276 WREG(sc, TWSI_CONTROL, CONTROL_STOP | CONTROL_TWSIEN);
277 while (retry > 0) {
278 if (RREG(sc, TWSI_STATUS) == STAT_NRS)
279 return 0;
280 retry--;
281 DELAY(TWSI_STAT_DELAY);
282 }
283
284 aprint_error_dev(sc->sc_dev, "send STOP failed\n");
285 return -1;
286 }
287
288 static int
289 gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags)
290 {
291 struct gttwsi_softc *sc = v;
292 uint32_t data, expect;
293 int error, read;
294
295 gttwsi_send_start(v, flags);
296
297 read = (flags & I2C_F_READ) != 0;
298 if (read)
299 expect = STAT_ARBT_AR;
300 else
301 expect = STAT_AWBT_AR;
302
303 /*
304 * First byte contains whether this xfer is a read or write.
305 */
306 data = read;
307 if (addr > 0x7f) {
308 /*
309 * If this is a 10bit request, the first address byte is
310 * 0b11110<b9><b8><r/w>.
311 */
312 data |= 0xf0 | ((addr & 0x300) >> 7);
313 WREG(sc, TWSI_DATA, data);
314 error = gttwsi_wait(sc, 0, expect, flags);
315 if (error)
316 return error;
317 /*
318 * The first address byte has been sent, now to send
319 * the second one.
320 */
321 if (read)
322 expect = STAT_SARBT_AR;
323 else
324 expect = STAT_SAWBT_AR;
325 data = (uint8_t)addr;
326 } else
327 data |= (addr << 1);
328
329 WREG(sc, TWSI_DATA, data);
330 return gttwsi_wait(sc, 0, expect, flags);
331 }
332
333 static int
334 gttwsi_read_byte(void *v, uint8_t *valp, int flags)
335 {
336 struct gttwsi_softc *sc = v;
337 int error;
338
339 error = gttwsi_wait(sc, CONTROL_ACK, STAT_MRRD_AT, flags);
340 if (!error)
341 *valp = RREG(sc, TWSI_DATA);
342 if (flags & I2C_F_LAST)
343 WREG(sc, TWSI_CONTROL, 0);
344 return error;
345 }
346
347 static int
348 gttwsi_write_byte(void *v, uint8_t val, int flags)
349 {
350 struct gttwsi_softc *sc = v;
351
352 WREG(sc, TWSI_DATA, val);
353 return gttwsi_wait(sc, 0, STAT_MTDB_AR, flags);
354 }
355
356 static int
357 gttwsi_wait(struct gttwsi_softc *sc, uint32_t control, uint32_t expect,
358 int flags)
359 {
360 uint32_t status;
361 int error = 0;
362
363 DELAY(5);
364 if (!(flags & I2C_F_POLL))
365 control |= CONTROL_INTEN;
366 WREG(sc, TWSI_CONTROL, control | CONTROL_TWSIEN);
367
368 for (;;) {
369 control = RREG(sc, TWSI_CONTROL);
370 if (control & CONTROL_IFLG)
371 break;
372 if (!(flags & I2C_F_POLL)) {
373 mutex_enter(&sc->sc_mtx);
374 error = cv_timedwait_sig(&sc->sc_cv, &sc->sc_mtx, hz);
375 mutex_exit(&sc->sc_mtx);
376 if (error)
377 return error;
378 }
379 DELAY(TWSI_RETRY_DELAY);
380 }
381
382 status = RREG(sc, TWSI_STATUS);
383 if (status != expect) {
384 aprint_error_dev(sc->sc_dev,
385 "unexpected status 0x%x: expect 0x%x\n", status, expect);
386 return EIO;
387 }
388
389 if ((flags & I2C_F_STOP) && expect != STAT_MRRD_AT)
390 error = gttwsi_send_stop(sc, flags);
391
392 return error;
393 }
394