gttwsi.c revision 1.6.2.1
1 /* $NetBSD: gttwsi.c,v 1.6.2.1 2013/06/23 06:20:17 tls Exp $ */ 2 /* 3 * Copyright (c) 2008 Eiji Kawauchi. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed for the NetBSD Project by 17 * Eiji Kawauchi. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 /* 33 * Copyright (c) 2005 Brocade Communcations, inc. 34 * All rights reserved. 35 * 36 * Written by Matt Thomas for Brocade Communcations, Inc. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. The name of Brocade Communications, Inc. may not be used to endorse 47 * or promote products derived from this software without specific prior 48 * written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY BROCADE COMMUNICATIONS, INC. ``AS IS'' AND 51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL EITHER BROCADE COMMUNICATIONS, INC. BE 54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 60 * OF THE POSSIBILITY OF SUCH DAMAGE. 61 */ 62 //#define TWSI_DEBUG 63 64 /* 65 * Marvell Two-Wire Serial Interface (aka I2C) master driver 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: gttwsi.c,v 1.6.2.1 2013/06/23 06:20:17 tls Exp $"); 70 #include "locators.h" 71 72 #include <sys/param.h> 73 #include <sys/bus.h> 74 #include <sys/condvar.h> 75 #include <sys/device.h> 76 #include <sys/errno.h> 77 #include <sys/kernel.h> 78 #include <sys/mutex.h> 79 #include <sys/systm.h> 80 81 #include <machine/cpu.h> 82 #include <machine/param.h> 83 84 #include <dev/i2c/i2cvar.h> 85 86 #include <dev/marvell/marvellvar.h> 87 #include <dev/marvell/gttwsireg.h> 88 89 struct gttwsi_softc { 90 device_t sc_dev; 91 bus_space_tag_t sc_bust; 92 bus_space_handle_t sc_bush; 93 uint8_t sc_started; 94 struct i2c_controller sc_i2c; 95 kmutex_t sc_buslock; 96 kmutex_t sc_mtx; 97 kcondvar_t sc_cv; 98 }; 99 100 static int gttwsi_match(device_t, cfdata_t, void *); 101 static void gttwsi_attach(device_t, device_t, void *); 102 103 static int gttwsi_intr(void *); 104 105 static int gttwsi_acquire_bus(void *, int); 106 static void gttwsi_release_bus(void *, int); 107 static int gttwsi_send_start(void *v, int flags); 108 static int gttwsi_send_stop(void *v, int flags); 109 static int gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags); 110 static int gttwsi_read_byte(void *v, uint8_t *valp, int flags); 111 static int gttwsi_write_byte(void *v, uint8_t val, int flags); 112 113 static int gttwsi_wait(struct gttwsi_softc *, uint32_t, uint32_t, int); 114 115 static __inline u_int32_t RREG(struct gttwsi_softc *, u_int32_t); 116 static __inline void WREG(struct gttwsi_softc *, u_int32_t, u_int32_t); 117 118 119 CFATTACH_DECL_NEW(gttwsi_gt, sizeof(struct gttwsi_softc), 120 gttwsi_match, gttwsi_attach, NULL, NULL); 121 CFATTACH_DECL_NEW(gttwsi_mbus, sizeof(struct gttwsi_softc), 122 gttwsi_match, gttwsi_attach, NULL, NULL); 123 124 125 static __inline u_int32_t 126 RREG(struct gttwsi_softc *sc, u_int32_t reg) 127 { 128 u_int32_t val; 129 130 val = bus_space_read_4(sc->sc_bust, sc->sc_bush, reg); 131 #ifdef TWSI_DEBUG 132 printf("I2C:R:%02x:%02x\n", reg, val); 133 #else 134 DELAY(TWSI_READ_DELAY); 135 #endif 136 return val; 137 } 138 139 static __inline void 140 WREG(struct gttwsi_softc *sc, u_int32_t reg, u_int32_t val) 141 { 142 bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val); 143 #ifdef TWSI_DEBUG 144 printf("I2C:W:%02x:%02x\n", reg, val); 145 #else 146 DELAY(TWSI_WRITE_DELAY); 147 #endif 148 return; 149 } 150 151 152 /* ARGSUSED */ 153 static int 154 gttwsi_match(device_t parent, cfdata_t match, void *aux) 155 { 156 struct marvell_attach_args *mva = aux; 157 158 if (strcmp(mva->mva_name, match->cf_name) != 0) 159 return 0; 160 if (mva->mva_offset == MVA_OFFSET_DEFAULT || 161 mva->mva_irq == MVA_IRQ_DEFAULT) 162 return 0; 163 164 mva->mva_size = GTTWSI_SIZE; 165 return 1; 166 } 167 168 /* ARGSUSED */ 169 static void 170 gttwsi_attach(device_t parent, device_t self, void *args) 171 { 172 struct gttwsi_softc *sc = device_private(self); 173 struct marvell_attach_args *mva = args; 174 struct i2cbus_attach_args iba; 175 176 aprint_naive("\n"); 177 aprint_normal(": Marvell TWSI controller\n"); 178 179 sc->sc_dev = self; 180 sc->sc_bust = mva->mva_iot; 181 if (bus_space_subregion(mva->mva_iot, mva->mva_ioh, mva->mva_offset, 182 mva->mva_size, &sc->sc_bush)) { 183 aprint_error_dev(self, "Cannot map registers\n"); 184 return; 185 } 186 187 mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE); 188 mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_BIO); 189 cv_init(&sc->sc_cv, "gttwsi"); 190 191 sc->sc_started = 0; 192 sc->sc_i2c.ic_cookie = sc; 193 sc->sc_i2c.ic_acquire_bus = gttwsi_acquire_bus; 194 sc->sc_i2c.ic_release_bus = gttwsi_release_bus; 195 sc->sc_i2c.ic_exec = NULL; 196 sc->sc_i2c.ic_send_start = gttwsi_send_start; 197 sc->sc_i2c.ic_send_stop = gttwsi_send_stop; 198 sc->sc_i2c.ic_initiate_xfer = gttwsi_initiate_xfer; 199 sc->sc_i2c.ic_read_byte = gttwsi_read_byte; 200 sc->sc_i2c.ic_write_byte = gttwsi_write_byte; 201 202 marvell_intr_establish(mva->mva_irq, IPL_BIO, gttwsi_intr, sc); 203 204 /* 205 * Put the controller into Soft Reset. 206 */ 207 /* reset */ 208 WREG(sc, TWSI_SOFTRESET, SOFTRESET_VAL); 209 210 memset(&iba, 0, sizeof(iba)); 211 iba.iba_tag = &sc->sc_i2c; 212 (void) config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print); 213 } 214 215 static int 216 gttwsi_intr(void *arg) 217 { 218 struct gttwsi_softc *sc = arg; 219 uint32_t val; 220 221 val = RREG(sc, TWSI_CONTROL); 222 if (val & CONTROL_IFLG) { 223 WREG(sc, TWSI_CONTROL, val & ~CONTROL_INTEN); 224 mutex_enter(&sc->sc_mtx); 225 cv_signal(&sc->sc_cv); 226 mutex_exit(&sc->sc_mtx); 227 228 return 1; /* handled */ 229 } 230 return 0; 231 } 232 233 /* ARGSUSED */ 234 static int 235 gttwsi_acquire_bus(void *arg, int flags) 236 { 237 struct gttwsi_softc *sc = arg; 238 239 mutex_enter(&sc->sc_buslock); 240 return 0; 241 } 242 243 /* ARGSUSED */ 244 static void 245 gttwsi_release_bus(void *arg, int flags) 246 { 247 struct gttwsi_softc *sc = arg; 248 249 mutex_exit(&sc->sc_buslock); 250 } 251 252 static int 253 gttwsi_send_start(void *v, int flags) 254 { 255 struct gttwsi_softc *sc = v; 256 int expect; 257 258 if (sc->sc_started) 259 expect = STAT_RSCT; 260 else 261 expect = STAT_SCT; 262 sc->sc_started = 1; 263 return gttwsi_wait(sc, CONTROL_START, expect, flags); 264 } 265 266 static int 267 gttwsi_send_stop(void *v, int flags) 268 { 269 struct gttwsi_softc *sc = v; 270 int retry = TWSI_RETRY_COUNT; 271 272 sc->sc_started = 0; 273 274 /* Interrupt is not generated for STAT_NRS. */ 275 WREG(sc, TWSI_CONTROL, CONTROL_STOP | CONTROL_TWSIEN); 276 while (retry > 0) { 277 if (RREG(sc, TWSI_STATUS) == STAT_NRS) 278 return 0; 279 retry--; 280 DELAY(TWSI_STAT_DELAY); 281 } 282 283 aprint_error_dev(sc->sc_dev, "send STOP failed\n"); 284 return -1; 285 } 286 287 static int 288 gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags) 289 { 290 struct gttwsi_softc *sc = v; 291 uint32_t data, expect; 292 int error, read; 293 294 gttwsi_send_start(v, flags); 295 296 read = (flags & I2C_F_READ) != 0; 297 if (read) 298 expect = STAT_ARBT_AR; 299 else 300 expect = STAT_AWBT_AR; 301 302 /* 303 * First byte contains whether this xfer is a read or write. 304 */ 305 data = read; 306 if (addr > 0x7f) { 307 /* 308 * If this is a 10bit request, the first address byte is 309 * 0b11110<b9><b8><r/w>. 310 */ 311 data |= 0xf0 | ((addr & 0x300) >> 7); 312 WREG(sc, TWSI_DATA, data); 313 error = gttwsi_wait(sc, 0, expect, flags); 314 if (error) 315 return error; 316 /* 317 * The first address byte has been sent, now to send 318 * the second one. 319 */ 320 if (read) 321 expect = STAT_SARBT_AR; 322 else 323 expect = STAT_SAWBT_AR; 324 data = (uint8_t)addr; 325 } else 326 data |= (addr << 1); 327 328 WREG(sc, TWSI_DATA, data); 329 return gttwsi_wait(sc, 0, expect, flags); 330 } 331 332 static int 333 gttwsi_read_byte(void *v, uint8_t *valp, int flags) 334 { 335 struct gttwsi_softc *sc = v; 336 int error; 337 338 if (flags & I2C_F_LAST) 339 error = gttwsi_wait(sc, 0, STAT_MRRD_ANT, flags); 340 else 341 error = gttwsi_wait(sc, CONTROL_ACK, STAT_MRRD_AT, flags); 342 if (!error) 343 *valp = RREG(sc, TWSI_DATA); 344 if (flags & I2C_F_LAST) { 345 #if defined(ARMADAXP) 346 error = gttwsi_send_stop(sc, flags); 347 #else 348 WREG(sc, TWSI_CONTROL, 0); 349 #endif 350 } 351 return error; 352 } 353 354 static int 355 gttwsi_write_byte(void *v, uint8_t val, int flags) 356 { 357 struct gttwsi_softc *sc = v; 358 359 WREG(sc, TWSI_DATA, val); 360 #if defined(ARMADAXP) 361 if (flags & I2C_F_LAST) 362 gttwsi_send_stop(sc, flags); 363 #endif 364 return gttwsi_wait(sc, 0, STAT_MTDB_AR, flags); 365 } 366 367 static int 368 gttwsi_wait(struct gttwsi_softc *sc, uint32_t control, uint32_t expect, 369 int flags) 370 { 371 uint32_t status; 372 int timo, error = 0; 373 374 DELAY(5); 375 if (!(flags & I2C_F_POLL)) 376 control |= CONTROL_INTEN; 377 WREG(sc, TWSI_CONTROL, control | CONTROL_TWSIEN); 378 379 timo = 0; 380 for (;;) { 381 control = RREG(sc, TWSI_CONTROL); 382 if (control & CONTROL_IFLG) 383 break; 384 if (!(flags & I2C_F_POLL)) { 385 mutex_enter(&sc->sc_mtx); 386 error = cv_timedwait_sig(&sc->sc_cv, &sc->sc_mtx, hz); 387 mutex_exit(&sc->sc_mtx); 388 if (error) 389 return error; 390 } 391 DELAY(TWSI_RETRY_DELAY); 392 if (timo++ > 1000000) /* 1sec */ 393 break; 394 } 395 396 status = RREG(sc, TWSI_STATUS); 397 if (status != expect) { 398 aprint_error_dev(sc->sc_dev, 399 "unexpected status 0x%x: expect 0x%x\n", status, expect); 400 return EIO; 401 } 402 403 #ifndef ARMADAXP 404 if (flags & I2C_F_STOP) 405 switch (expect) { 406 case STAT_SCT: 407 case STAT_RSCT: 408 case STAT_MRRD_AT: 409 case STAT_ARBT_AR: 410 break; 411 default: 412 error = gttwsi_send_stop(sc, flags); 413 } 414 #endif 415 416 return error; 417 } 418
Indexes created Tue Oct 07 21:09:53 GMT 2025