gttwsi.c revision 1.7
1 /* $NetBSD: gttwsi.c,v 1.7 2013/05/01 12:25:31 rkujawa Exp $ */ 2 /* 3 * Copyright (c) 2008 Eiji Kawauchi. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed for the NetBSD Project by 17 * Eiji Kawauchi. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 /* 33 * Copyright (c) 2005 Brocade Communcations, inc. 34 * All rights reserved. 35 * 36 * Written by Matt Thomas for Brocade Communcations, Inc. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. The name of Brocade Communications, Inc. may not be used to endorse 47 * or promote products derived from this software without specific prior 48 * written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY BROCADE COMMUNICATIONS, INC. ``AS IS'' AND 51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL EITHER BROCADE COMMUNICATIONS, INC. BE 54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 60 * OF THE POSSIBILITY OF SUCH DAMAGE. 61 */ 62 //#define TWSI_DEBUG 63 64 /* 65 * Marvell Two-Wire Serial Interface (aka I2C) master driver 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: gttwsi.c,v 1.7 2013/05/01 12:25:31 rkujawa Exp $"); 70 #include "locators.h" 71 72 #include <sys/param.h> 73 #include <sys/bus.h> 74 #include <sys/condvar.h> 75 #include <sys/device.h> 76 #include <sys/errno.h> 77 #include <sys/kernel.h> 78 #include <sys/mutex.h> 79 #include <sys/systm.h> 80 81 #include <machine/cpu.h> 82 #include <machine/param.h> 83 84 #include <dev/i2c/i2cvar.h> 85 86 #include <dev/marvell/marvellvar.h> 87 #include <dev/marvell/gttwsireg.h> 88 89 #include "opt_mvsoc.h" 90 91 struct gttwsi_softc { 92 device_t sc_dev; 93 bus_space_tag_t sc_bust; 94 bus_space_handle_t sc_bush; 95 uint8_t sc_started; 96 struct i2c_controller sc_i2c; 97 kmutex_t sc_buslock; 98 kmutex_t sc_mtx; 99 kcondvar_t sc_cv; 100 }; 101 102 static int gttwsi_match(device_t, cfdata_t, void *); 103 static void gttwsi_attach(device_t, device_t, void *); 104 105 static int gttwsi_intr(void *); 106 107 static int gttwsi_acquire_bus(void *, int); 108 static void gttwsi_release_bus(void *, int); 109 static int gttwsi_send_start(void *v, int flags); 110 static int gttwsi_send_stop(void *v, int flags); 111 static int gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags); 112 static int gttwsi_read_byte(void *v, uint8_t *valp, int flags); 113 static int gttwsi_write_byte(void *v, uint8_t val, int flags); 114 115 static int gttwsi_wait(struct gttwsi_softc *, uint32_t, uint32_t, int); 116 117 static __inline u_int32_t RREG(struct gttwsi_softc *, u_int32_t); 118 static __inline void WREG(struct gttwsi_softc *, u_int32_t, u_int32_t); 119 120 121 CFATTACH_DECL_NEW(gttwsi_gt, sizeof(struct gttwsi_softc), 122 gttwsi_match, gttwsi_attach, NULL, NULL); 123 CFATTACH_DECL_NEW(gttwsi_mbus, sizeof(struct gttwsi_softc), 124 gttwsi_match, gttwsi_attach, NULL, NULL); 125 126 127 static __inline u_int32_t 128 RREG(struct gttwsi_softc *sc, u_int32_t reg) 129 { 130 u_int32_t val; 131 132 val = bus_space_read_4(sc->sc_bust, sc->sc_bush, reg); 133 #ifdef TWSI_DEBUG 134 printf("I2C:R:%02x:%02x\n", reg, val); 135 #else 136 DELAY(TWSI_READ_DELAY); 137 #endif 138 return val; 139 } 140 141 static __inline void 142 WREG(struct gttwsi_softc *sc, u_int32_t reg, u_int32_t val) 143 { 144 bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val); 145 #ifdef TWSI_DEBUG 146 printf("I2C:W:%02x:%02x\n", reg, val); 147 #else 148 DELAY(TWSI_WRITE_DELAY); 149 #endif 150 return; 151 } 152 153 154 /* ARGSUSED */ 155 static int 156 gttwsi_match(device_t parent, cfdata_t match, void *aux) 157 { 158 struct marvell_attach_args *mva = aux; 159 160 if (strcmp(mva->mva_name, match->cf_name) != 0) 161 return 0; 162 if (mva->mva_offset == MVA_OFFSET_DEFAULT || 163 mva->mva_irq == MVA_IRQ_DEFAULT) 164 return 0; 165 166 mva->mva_size = GTTWSI_SIZE; 167 return 1; 168 } 169 170 /* ARGSUSED */ 171 static void 172 gttwsi_attach(device_t parent, device_t self, void *args) 173 { 174 struct gttwsi_softc *sc = device_private(self); 175 struct marvell_attach_args *mva = args; 176 struct i2cbus_attach_args iba; 177 178 aprint_naive("\n"); 179 aprint_normal(": Marvell TWSI controller\n"); 180 181 sc->sc_dev = self; 182 sc->sc_bust = mva->mva_iot; 183 if (bus_space_subregion(mva->mva_iot, mva->mva_ioh, mva->mva_offset, 184 mva->mva_size, &sc->sc_bush)) { 185 aprint_error_dev(self, "Cannot map registers\n"); 186 return; 187 } 188 189 mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE); 190 mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_BIO); 191 cv_init(&sc->sc_cv, "gttwsi"); 192 193 sc->sc_started = 0; 194 sc->sc_i2c.ic_cookie = sc; 195 sc->sc_i2c.ic_acquire_bus = gttwsi_acquire_bus; 196 sc->sc_i2c.ic_release_bus = gttwsi_release_bus; 197 sc->sc_i2c.ic_exec = NULL; 198 sc->sc_i2c.ic_send_start = gttwsi_send_start; 199 sc->sc_i2c.ic_send_stop = gttwsi_send_stop; 200 sc->sc_i2c.ic_initiate_xfer = gttwsi_initiate_xfer; 201 sc->sc_i2c.ic_read_byte = gttwsi_read_byte; 202 sc->sc_i2c.ic_write_byte = gttwsi_write_byte; 203 204 marvell_intr_establish(mva->mva_irq, IPL_BIO, gttwsi_intr, sc); 205 206 /* 207 * Put the controller into Soft Reset. 208 */ 209 /* reset */ 210 WREG(sc, TWSI_SOFTRESET, SOFTRESET_VAL); 211 212 memset(&iba, 0, sizeof(iba)); 213 iba.iba_tag = &sc->sc_i2c; 214 (void) config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print); 215 } 216 217 static int 218 gttwsi_intr(void *arg) 219 { 220 struct gttwsi_softc *sc = arg; 221 uint32_t val; 222 223 val = RREG(sc, TWSI_CONTROL); 224 if (val & CONTROL_IFLG) { 225 WREG(sc, TWSI_CONTROL, val & ~CONTROL_INTEN); 226 mutex_enter(&sc->sc_mtx); 227 cv_signal(&sc->sc_cv); 228 mutex_exit(&sc->sc_mtx); 229 230 return 1; /* handled */ 231 } 232 return 0; 233 } 234 235 /* ARGSUSED */ 236 static int 237 gttwsi_acquire_bus(void *arg, int flags) 238 { 239 struct gttwsi_softc *sc = arg; 240 241 mutex_enter(&sc->sc_buslock); 242 return 0; 243 } 244 245 /* ARGSUSED */ 246 static void 247 gttwsi_release_bus(void *arg, int flags) 248 { 249 struct gttwsi_softc *sc = arg; 250 251 mutex_exit(&sc->sc_buslock); 252 } 253 254 static int 255 gttwsi_send_start(void *v, int flags) 256 { 257 struct gttwsi_softc *sc = v; 258 int expect; 259 260 if (sc->sc_started) 261 expect = STAT_RSCT; 262 else 263 expect = STAT_SCT; 264 sc->sc_started = 1; 265 return gttwsi_wait(sc, CONTROL_START, expect, flags); 266 } 267 268 static int 269 gttwsi_send_stop(void *v, int flags) 270 { 271 struct gttwsi_softc *sc = v; 272 int retry = TWSI_RETRY_COUNT; 273 274 sc->sc_started = 0; 275 276 /* Interrupt is not generated for STAT_NRS. */ 277 WREG(sc, TWSI_CONTROL, CONTROL_STOP | CONTROL_TWSIEN); 278 while (retry > 0) { 279 if (RREG(sc, TWSI_STATUS) == STAT_NRS) 280 return 0; 281 retry--; 282 DELAY(TWSI_STAT_DELAY); 283 } 284 285 aprint_error_dev(sc->sc_dev, "send STOP failed\n"); 286 return -1; 287 } 288 289 static int 290 gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags) 291 { 292 struct gttwsi_softc *sc = v; 293 uint32_t data, expect; 294 int error, read; 295 296 gttwsi_send_start(v, flags); 297 298 read = (flags & I2C_F_READ) != 0; 299 if (read) 300 expect = STAT_ARBT_AR; 301 else 302 expect = STAT_AWBT_AR; 303 304 /* 305 * First byte contains whether this xfer is a read or write. 306 */ 307 data = read; 308 if (addr > 0x7f) { 309 /* 310 * If this is a 10bit request, the first address byte is 311 * 0b11110<b9><b8><r/w>. 312 */ 313 data |= 0xf0 | ((addr & 0x300) >> 7); 314 WREG(sc, TWSI_DATA, data); 315 error = gttwsi_wait(sc, 0, expect, flags); 316 if (error) 317 return error; 318 /* 319 * The first address byte has been sent, now to send 320 * the second one. 321 */ 322 if (read) 323 expect = STAT_SARBT_AR; 324 else 325 expect = STAT_SAWBT_AR; 326 data = (uint8_t)addr; 327 } else 328 data |= (addr << 1); 329 330 WREG(sc, TWSI_DATA, data); 331 return gttwsi_wait(sc, 0, expect, flags); 332 } 333 334 static int 335 gttwsi_read_byte(void *v, uint8_t *valp, int flags) 336 { 337 struct gttwsi_softc *sc = v; 338 int error; 339 340 if (flags & I2C_F_LAST) 341 error = gttwsi_wait(sc, 0, STAT_MRRD_ANT, flags); 342 else 343 error = gttwsi_wait(sc, CONTROL_ACK, STAT_MRRD_AT, flags); 344 if (!error) 345 *valp = RREG(sc, TWSI_DATA); 346 if (flags & I2C_F_LAST) { 347 #if defined(ARMADAXP) 348 error = gttwsi_send_stop(sc, flags); 349 #else 350 WREG(sc, TWSI_CONTROL, 0); 351 #endif 352 } 353 return error; 354 } 355 356 static int 357 gttwsi_write_byte(void *v, uint8_t val, int flags) 358 { 359 struct gttwsi_softc *sc = v; 360 361 WREG(sc, TWSI_DATA, val); 362 #if defined(ARMADAXP) 363 if (flags & I2C_F_LAST) 364 gttwsi_send_stop(sc, flags); 365 #endif 366 return gttwsi_wait(sc, 0, STAT_MTDB_AR, flags); 367 } 368 369 static int 370 gttwsi_wait(struct gttwsi_softc *sc, uint32_t control, uint32_t expect, 371 int flags) 372 { 373 uint32_t status; 374 int timo, error = 0; 375 376 DELAY(5); 377 if (!(flags & I2C_F_POLL)) 378 control |= CONTROL_INTEN; 379 WREG(sc, TWSI_CONTROL, control | CONTROL_TWSIEN); 380 381 timo = 0; 382 for (;;) { 383 control = RREG(sc, TWSI_CONTROL); 384 if (control & CONTROL_IFLG) 385 break; 386 if (!(flags & I2C_F_POLL)) { 387 mutex_enter(&sc->sc_mtx); 388 error = cv_timedwait_sig(&sc->sc_cv, &sc->sc_mtx, hz); 389 mutex_exit(&sc->sc_mtx); 390 if (error) 391 return error; 392 } 393 DELAY(TWSI_RETRY_DELAY); 394 if (timo++ > 1000000) /* 1sec */ 395 break; 396 } 397 398 status = RREG(sc, TWSI_STATUS); 399 if (status != expect) { 400 aprint_error_dev(sc->sc_dev, 401 "unexpected status 0x%x: expect 0x%x\n", status, expect); 402 return EIO; 403 } 404 405 #ifndef ARMADAXP 406 if (flags & I2C_F_STOP) 407 switch (expect) { 408 case STAT_SCT: 409 case STAT_RSCT: 410 case STAT_MRRD_AT: 411 case STAT_ARBT_AR: 412 break; 413 default: 414 error = gttwsi_send_stop(sc, flags); 415 } 416 #endif 417 418 return error; 419 } 420
Indexes created Tue Oct 07 21:09:53 GMT 2025