gtvar.h revision 1.1 1 1.1 matt /* $NetBSD: gtvar.h,v 1.1 2003/03/05 22:08:23 matt Exp $ */
2 1.1 matt
3 1.1 matt /*
4 1.1 matt * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
5 1.1 matt * All rights reserved.
6 1.1 matt *
7 1.1 matt * Redistribution and use in source and binary forms, with or without
8 1.1 matt * modification, are permitted provided that the following conditions
9 1.1 matt * are met:
10 1.1 matt * 1. Redistributions of source code must retain the above copyright
11 1.1 matt * notice, this list of conditions and the following disclaimer.
12 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 matt * notice, this list of conditions and the following disclaimer in the
14 1.1 matt * documentation and/or other materials provided with the distribution.
15 1.1 matt * 3. All advertising materials mentioning features or use of this software
16 1.1 matt * must display the following acknowledgement:
17 1.1 matt * This product includes software developed for the NetBSD Project by
18 1.1 matt * Allegro Networks, Inc., and Wasabi Systems, Inc.
19 1.1 matt * 4. The name of Allegro Networks, Inc. may not be used to endorse
20 1.1 matt * or promote products derived from this software without specific prior
21 1.1 matt * written permission.
22 1.1 matt * 5. The name of Wasabi Systems, Inc. may not be used to endorse
23 1.1 matt * or promote products derived from this software without specific prior
24 1.1 matt * written permission.
25 1.1 matt *
26 1.1 matt * THIS SOFTWARE IS PROVIDED BY ALLEGRO NETWORKS, INC. AND
27 1.1 matt * WASABI SYSTEMS, INC. ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
28 1.1 matt * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
29 1.1 matt * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
30 1.1 matt * IN NO EVENT SHALL EITHER ALLEGRO NETWORKS, INC. OR WASABI SYSTEMS, INC.
31 1.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 matt * POSSIBILITY OF SUCH DAMAGE.
38 1.1 matt */
39 1.1 matt
40 1.1 matt /*
41 1.1 matt * gtvar.h -- placeholder for GT system controller driver
42 1.1 matt */
43 1.1 matt #ifndef _DISCOVERY_DEV_GTVAR_H_
44 1.1 matt #define _DISCOVERY_DEV_GTVAR_H_
45 1.1 matt
46 1.1 matt #include <sys/systm.h>
47 1.1 matt
48 1.1 matt #define GTPCI_NBUS 2
49 1.1 matt
50 1.1 matt struct gt_softc {
51 1.1 matt struct device gt_dev;
52 1.1 matt vaddr_t gt_vbase; /* mapped GT base address */
53 1.1 matt #if 0
54 1.1 matt vaddr_t gt_iobat_vbase; /* I/O BAT virtual base */
55 1.1 matt paddr_t gt_iobat_pbase; /* I/O BAT physical base */
56 1.1 matt vsize_t gt_iobat_mask; /* I/O BAT mask (signif. bits only) */
57 1.1 matt #endif
58 1.1 matt struct pci_chipset *gt_pcis[GTPCI_NBUS];
59 1.1 matt bus_dma_tag_t gt_dmat;
60 1.1 matt bus_space_tag_t gt_memt;
61 1.1 matt bus_space_tag_t gt_pci0_memt;
62 1.1 matt bus_space_tag_t gt_pci0_iot;
63 1.1 matt bus_space_tag_t gt_pci1_memt;
64 1.1 matt bus_space_tag_t gt_pci1_iot;
65 1.1 matt };
66 1.1 matt
67 1.1 matt struct gt_attach_args {
68 1.1 matt const char *ga_name; /* class name of device */
69 1.1 matt bus_dma_tag_t ga_dmat; /* dma tag */
70 1.1 matt bus_space_tag_t ga_memt; /* GT bus space tag */
71 1.1 matt int ga_unit; /* instance of ga_name */
72 1.1 matt };
73 1.1 matt
74 1.1 matt #ifdef _KERNEL
75 1.1 matt #include "locators.h"
76 1.1 matt
77 1.1 matt #ifdef DEBUG
78 1.1 matt extern int gtpci_debug;
79 1.1 matt #endif
80 1.1 matt
81 1.1 matt /*
82 1.1 matt * Locators for GT private devices, as specified to config.
83 1.1 matt */
84 1.1 matt #define gtcf_dev cf_loc[GTCF_DEV]
85 1.1 matt #define GT_UNK_DEV GTCF_DEV_DEFAULT /* wcarded 'dev' */
86 1.1 matt
87 1.1 matt #define gtcf_function cf_loc[GTCF_FUNCTION]
88 1.1 matt #define GT_UNK_FUNCTION GTCF_FUNCTION_DEFAULT /* wcarded 'function' */
89 1.1 matt
90 1.1 matt void gt_attach_common(struct gt_softc *);
91 1.1 matt uint32_t gt_read_mpp(void);
92 1.1 matt int gt_cfprint (void *, const char *);
93 1.1 matt
94 1.1 matt void gtpci_config(struct gt_softc *, int,
95 1.1 matt bus_space_tag_t, bus_space_tag_t, bus_dma_tag_t);
96 1.1 matt void gteth_config (struct gt_softc *, int);
97 1.1 matt void gtmpsc_config (struct gt_softc *, int);
98 1.1 matt
99 1.1 matt /* int gt_bs_extent_init(struct discovery_bus_space *, char *); AKB */
100 1.1 matt int gt_mii_read (struct device *, struct device *, int, int);
101 1.1 matt void gt_mii_write (struct device *, struct device *, int, int, int);
102 1.1 matt int gtget_macaddr(struct gt_softc *gt, int function, char *enaddr);
103 1.1 matt void gtpci_config_bus(struct pci_chipset *pc, int busno);
104 1.1 matt void gt_setup(struct device *gt);
105 1.1 matt void gt_watchdog_service(void);
106 1.1 matt
107 1.1 matt #define gt_read(a,b) gt_read_4(a,b)
108 1.1 matt #define gt_write(a,b,c) gt_write_4(a,b,c)
109 1.1 matt
110 1.1 matt static __inline uint32_t
111 1.1 matt gt_read_4(struct device *dv, bus_addr_t off)
112 1.1 matt {
113 1.1 matt struct gt_softc *gt = (struct gt_softc *) dv;
114 1.1 matt uint32_t rv;
115 1.1 matt
116 1.1 matt __asm __volatile("eieio; lwbrx %0,%1,%2; eieio;"
117 1.1 matt : "=r"(rv)
118 1.1 matt : "b"(gt->gt_vbase), "r"(off));
119 1.1 matt
120 1.1 matt return rv;
121 1.1 matt }
122 1.1 matt
123 1.1 matt static __inline void
124 1.1 matt gt_write_4(struct device *dv, bus_addr_t off, uint32_t v)
125 1.1 matt {
126 1.1 matt struct gt_softc *gt = (struct gt_softc *) dv;
127 1.1 matt
128 1.1 matt __asm __volatile("eieio; stwbrx %0,%1,%2; eieio;"
129 1.1 matt :: "r"(v), "b"(gt->gt_vbase), "r"(off));
130 1.1 matt }
131 1.1 matt
132 1.1 matt #if defined(__powerpc__)
133 1.1 matt static volatile inline int atomic_add(volatile int *p, int v);
134 1.1 matt
135 1.1 matt static volatile inline int
136 1.1 matt atomic_add(volatile int *p, int v)
137 1.1 matt {
138 1.1 matt int rv;
139 1.1 matt int rtmp;
140 1.1 matt
141 1.1 matt __asm __volatile(
142 1.1 matt "1: lwarx %0,0,%2\n"
143 1.1 matt " add %1,%3,%0\n"
144 1.1 matt " stwcx. %1,0,%2\n"
145 1.1 matt " bne- 1b\n"
146 1.1 matt " sync"
147 1.1 matt : "=&r"(rv), "=&r"(rtmp)
148 1.1 matt : "r"(p), "r"(v)
149 1.1 matt : "cc");
150 1.1 matt
151 1.1 matt return rv;
152 1.1 matt }
153 1.1 matt
154 1.1 matt #endif /* __powerpc__ */
155 1.1 matt
156 1.1 matt #endif /* _KERNEL */
157 1.1 matt
158 1.1 matt #endif /* _DISCOVERY_DEV_GTVAR_H_ */
159