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gtvar.h revision 1.14
      1  1.14   cegger /*	$NetBSD: gtvar.h,v 1.14 2009/05/12 14:30:25 cegger Exp $	*/
      2   1.1     matt 
      3   1.1     matt /*
      4   1.1     matt  * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
      5   1.1     matt  * All rights reserved.
      6   1.1     matt  *
      7   1.1     matt  * Redistribution and use in source and binary forms, with or without
      8   1.1     matt  * modification, are permitted provided that the following conditions
      9   1.1     matt  * are met:
     10   1.1     matt  * 1. Redistributions of source code must retain the above copyright
     11   1.1     matt  *    notice, this list of conditions and the following disclaimer.
     12   1.1     matt  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1     matt  *    notice, this list of conditions and the following disclaimer in the
     14   1.1     matt  *    documentation and/or other materials provided with the distribution.
     15   1.1     matt  * 3. All advertising materials mentioning features or use of this software
     16   1.1     matt  *    must display the following acknowledgement:
     17   1.1     matt  *      This product includes software developed for the NetBSD Project by
     18   1.1     matt  *      Allegro Networks, Inc., and Wasabi Systems, Inc.
     19   1.1     matt  * 4. The name of Allegro Networks, Inc. may not be used to endorse
     20   1.1     matt  *    or promote products derived from this software without specific prior
     21   1.1     matt  *    written permission.
     22   1.1     matt  * 5. The name of Wasabi Systems, Inc. may not be used to endorse
     23   1.1     matt  *    or promote products derived from this software without specific prior
     24   1.1     matt  *    written permission.
     25   1.1     matt  *
     26   1.1     matt  * THIS SOFTWARE IS PROVIDED BY ALLEGRO NETWORKS, INC. AND
     27   1.1     matt  * WASABI SYSTEMS, INC. ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
     28   1.1     matt  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
     29   1.1     matt  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     30   1.1     matt  * IN NO EVENT SHALL EITHER ALLEGRO NETWORKS, INC. OR WASABI SYSTEMS, INC.
     31   1.1     matt  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32   1.1     matt  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33   1.1     matt  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34   1.1     matt  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35   1.1     matt  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36   1.1     matt  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37   1.1     matt  * POSSIBILITY OF SUCH DAMAGE.
     38   1.1     matt  */
     39   1.1     matt 
     40   1.1     matt /*
     41   1.1     matt  * gtvar.h -- placeholder for GT system controller driver
     42   1.1     matt  */
     43   1.1     matt #ifndef _DISCOVERY_DEV_GTVAR_H_
     44   1.2     matt #define	_DISCOVERY_DEV_GTVAR_H_
     45   1.1     matt 
     46   1.1     matt #include <sys/systm.h>
     47   1.1     matt 
     48   1.1     matt struct gt_softc {
     49   1.1     matt 	struct device gt_dev;
     50   1.1     matt 	bus_dma_tag_t gt_dmat;
     51   1.2     matt 	bus_space_tag_t gt_memt;	/* the GT itself */
     52   1.2     matt 	bus_space_tag_t gt_pci0_memt;	/* PCI0 mem space */
     53   1.2     matt 	bus_space_tag_t gt_pci0_iot;	/* PCI0 i/o space */
     54  1.13  thorpej 	bool gt_pci0_host;		/* We're host on PCI0 if TRUE */
     55   1.2     matt 	bus_space_tag_t gt_pci1_memt;	/* PCI1 mem space */
     56   1.2     matt 	bus_space_tag_t gt_pci1_iot;	/* PCI1 i/o space */
     57  1.13  thorpej 	bool gt_pci1_host;		/* We're host on PCI1 if TRUE */
     58   1.2     matt 
     59   1.2     matt 	bus_space_handle_t gt_memh;	/* to access the GT registers */
     60   1.2     matt 	int gt_childmask;		/* what children are present */
     61   1.1     matt };
     62   1.1     matt 
     63   1.2     matt #define	GT_CHILDOK(gt, ga, cd, pos, max) \
     64   1.2     matt 	(((ga)->ga_unit) < (max) &&  \
     65   1.2     matt 	    !((gt)->gt_childmask & (1 << (((ga)->ga_unit) + (pos)))) && \
     66   1.2     matt 	    !strcmp((ga)->ga_name, (cd)->cd_name))
     67   1.2     matt 
     68   1.2     matt #define	GT_MPSCOK(gt, ga, cd)		GT_CHILDOK((gt), (ga), (cd), 0, 2)
     69   1.2     matt #define	GT_PCIOK(gt, ga, cd)		GT_CHILDOK((gt), (ga), (cd), 2, 2)
     70   1.2     matt #define	GT_ETHEROK(gt, ga, cd)		GT_CHILDOK((gt), (ga), (cd), 4, 3)
     71   1.2     matt #define	GT_OBIOOK(gt, ga, cd)		GT_CHILDOK((gt), (ga), (cd), 7, 5)
     72   1.8     matt #define	GT_I2COK(gt, ga, cd)		GT_CHILDOK((gt), (ga), (cd), 12, 1)
     73   1.2     matt 
     74   1.2     matt #define	GT_CHILDFOUND(gt, ga, pos) \
     75   1.2     matt 	((void)(((gt)->gt_childmask |= (1 << (((ga)->ga_unit) + (pos))))))
     76   1.2     matt 
     77   1.2     matt #define	GT_MPSCFOUND(gt, ga)		GT_CHILDFOUND((gt), (ga), 0)
     78   1.2     matt #define	GT_PCIFOUND(gt, ga)		GT_CHILDFOUND((gt), (ga), 2)
     79   1.2     matt #define	GT_ETHERFOUND(gt, ga)		GT_CHILDFOUND((gt), (ga), 4)
     80   1.2     matt #define	GT_OBIOFOUND(gt, ga)		GT_CHILDFOUND((gt), (ga), 7)
     81   1.8     matt #define	GT_I2CFOUND(gt, ga)		GT_CHILDFOUND((gt), (ga), 12)
     82   1.2     matt 
     83   1.1     matt struct gt_attach_args {
     84   1.1     matt 	const char *ga_name;		/* class name of device */
     85   1.1     matt 	bus_dma_tag_t ga_dmat;		/* dma tag */
     86   1.1     matt 	bus_space_tag_t ga_memt;	/* GT bus space tag */
     87   1.2     matt 	bus_space_handle_t ga_memh;	/* GT bus space handle */
     88   1.1     matt 	int ga_unit;			/* instance of ga_name */
     89   1.1     matt };
     90   1.1     matt 
     91   1.2     matt struct obio_attach_args {
     92   1.2     matt 	const char *oa_name;		/* call name of device */
     93   1.2     matt 	bus_space_tag_t oa_memt;	/* bus space tag */
     94   1.2     matt 	bus_addr_t oa_offset;		/* offset (absolute) to device */
     95   1.2     matt 	bus_size_t oa_size;		/* size (strided) of device */
     96   1.2     matt 	int oa_irq;			/* irq */
     97   1.2     matt };
     98   1.2     matt 
     99   1.1     matt #ifdef _KERNEL
    100   1.7      jmc #include "locators.h"
    101   1.1     matt 
    102   1.1     matt #ifdef DEBUG
    103   1.1     matt extern int gtpci_debug;
    104   1.1     matt #endif
    105   1.1     matt 
    106   1.7      jmc /*
    107   1.7      jmc  * Locators for GT private devices, as specified to config.
    108   1.7      jmc  */
    109   1.7      jmc #define	GT_UNK_UNIT		GTCF_UNIT_DEFAULT	/* wcarded 'function' */
    110   1.7      jmc 
    111   1.7      jmc #define	OBIO_UNK_OFFSET		OBIOCF_OFFSET_DEFAULT	/* wcarded 'offset' */
    112   1.7      jmc 
    113   1.7      jmc #define	OBIO_UNK_SIZE		OBIOCF_SIZE_DEFAULT	/* wcarded 'size' */
    114   1.7      jmc 
    115   1.7      jmc #define	OBIO_UNK_IRQ		OBIOCF_IRQ_DEFAULT	/* wcarded 'irq' */
    116   1.7      jmc 
    117   1.1     matt void	gt_attach_common(struct gt_softc *);
    118   1.1     matt uint32_t gt_read_mpp(void);
    119   1.3     matt int	gt_cfprint(void *, const char *);
    120   1.1     matt 
    121   1.1     matt /* int     gt_bs_extent_init(struct discovery_bus_space *, char *);  AKB */
    122  1.14   cegger int	gt_mii_read(device_t, device_t, int, int);
    123  1.14   cegger void	gt_mii_write(device_t, device_t, int, int, int);
    124   1.2     matt int	gtget_macaddr(struct gt_softc *,int, char *);
    125   1.1     matt void	gt_watchdog_service(void);
    126   1.5     matt bus_addr_t gt_dma_phys_to_bus_mem(bus_dma_tag_t, bus_addr_t);
    127   1.5     matt bus_addr_t gt_dma_bus_mem_to_phys(bus_dma_tag_t, bus_addr_t);
    128   1.1     matt 
    129   1.2     matt #define	gt_read(gt,o) \
    130   1.2     matt 	bus_space_read_4((gt)->gt_memt, (gt)->gt_memh, (o))
    131   1.2     matt #define	gt_write(gt,o,v) \
    132   1.2     matt 	bus_space_write_4((gt)->gt_memt, (gt)->gt_memh, (o), (v))
    133   1.1     matt 
    134   1.1     matt #if defined(__powerpc__)
    135  1.12      mrg static __inline int
    136   1.1     matt atomic_add(volatile int *p, int	v)
    137   1.1     matt {
    138   1.1     matt 	int	rv;
    139   1.1     matt 	int	rtmp;
    140   1.1     matt 
    141  1.10    perry 	__asm volatile(
    142   1.1     matt 	"1:	lwarx	%0,0,%2\n"
    143   1.1     matt 	"	add	%1,%3,%0\n"
    144   1.1     matt 	"	stwcx.	%1,0,%2\n"
    145   1.1     matt 	"	bne-	1b\n"
    146   1.1     matt 	"	sync"
    147   1.1     matt 			: "=&r"(rv), "=&r"(rtmp)
    148   1.1     matt 			: "r"(p), "r"(v)
    149   1.1     matt 			: "cc");
    150   1.1     matt 
    151   1.1     matt 	return rv;
    152   1.1     matt }
    153   1.1     matt 
    154   1.1     matt #endif /* __powerpc__ */
    155   1.1     matt 
    156   1.1     matt #endif /* _KERNEL */
    157   1.1     matt 
    158   1.1     matt #endif /* _DISCOVERY_DEV_GTVAR_H_ */
    159