if_mvgbe.c revision 1.2.4.3
1 1.2.4.2 uebayasi /* $NetBSD: if_mvgbe.c,v 1.2.4.3 2010/10/22 07:22:01 uebayasi Exp $ */ 2 1.2.4.2 uebayasi /* 3 1.2.4.2 uebayasi * Copyright (c) 2007, 2008 KIYOHARA Takashi 4 1.2.4.2 uebayasi * All rights reserved. 5 1.2.4.2 uebayasi * 6 1.2.4.2 uebayasi * Redistribution and use in source and binary forms, with or without 7 1.2.4.2 uebayasi * modification, are permitted provided that the following conditions 8 1.2.4.2 uebayasi * are met: 9 1.2.4.2 uebayasi * 1. Redistributions of source code must retain the above copyright 10 1.2.4.2 uebayasi * notice, this list of conditions and the following disclaimer. 11 1.2.4.2 uebayasi * 2. Redistributions in binary form must reproduce the above copyright 12 1.2.4.2 uebayasi * notice, this list of conditions and the following disclaimer in the 13 1.2.4.2 uebayasi * documentation and/or other materials provided with the distribution. 14 1.2.4.2 uebayasi * 15 1.2.4.2 uebayasi * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 1.2.4.2 uebayasi * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 1.2.4.2 uebayasi * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18 1.2.4.2 uebayasi * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 19 1.2.4.2 uebayasi * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 20 1.2.4.2 uebayasi * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 1.2.4.2 uebayasi * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 1.2.4.2 uebayasi * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 23 1.2.4.2 uebayasi * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 24 1.2.4.2 uebayasi * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 1.2.4.2 uebayasi * POSSIBILITY OF SUCH DAMAGE. 26 1.2.4.2 uebayasi */ 27 1.2.4.2 uebayasi #include <sys/cdefs.h> 28 1.2.4.2 uebayasi __KERNEL_RCSID(0, "$NetBSD: if_mvgbe.c,v 1.2.4.3 2010/10/22 07:22:01 uebayasi Exp $"); 29 1.2.4.2 uebayasi 30 1.2.4.2 uebayasi #include "rnd.h" 31 1.2.4.2 uebayasi 32 1.2.4.2 uebayasi #include <sys/param.h> 33 1.2.4.2 uebayasi #include <sys/bus.h> 34 1.2.4.2 uebayasi #include <sys/device.h> 35 1.2.4.2 uebayasi #include <sys/endian.h> 36 1.2.4.2 uebayasi #include <sys/errno.h> 37 1.2.4.2 uebayasi #include <sys/kmem.h> 38 1.2.4.2 uebayasi #include <sys/mutex.h> 39 1.2.4.2 uebayasi #include <sys/sockio.h> 40 1.2.4.2 uebayasi 41 1.2.4.2 uebayasi #include <dev/marvell/marvellreg.h> 42 1.2.4.2 uebayasi #include <dev/marvell/marvellvar.h> 43 1.2.4.2 uebayasi #include <dev/marvell/mvgbereg.h> 44 1.2.4.2 uebayasi 45 1.2.4.2 uebayasi #include <net/if.h> 46 1.2.4.2 uebayasi #include <net/if_ether.h> 47 1.2.4.2 uebayasi #include <net/if_media.h> 48 1.2.4.2 uebayasi 49 1.2.4.2 uebayasi #include <netinet/in.h> 50 1.2.4.2 uebayasi #include <netinet/in_systm.h> 51 1.2.4.2 uebayasi #include <netinet/ip.h> 52 1.2.4.2 uebayasi 53 1.2.4.2 uebayasi #include <net/bpf.h> 54 1.2.4.2 uebayasi #if NRND > 0 55 1.2.4.2 uebayasi #include <sys/rnd.h> 56 1.2.4.2 uebayasi #endif 57 1.2.4.2 uebayasi 58 1.2.4.2 uebayasi #include <dev/mii/mii.h> 59 1.2.4.2 uebayasi #include <dev/mii/miivar.h> 60 1.2.4.2 uebayasi 61 1.2.4.2 uebayasi #include "locators.h" 62 1.2.4.2 uebayasi 63 1.2.4.2 uebayasi /* #define MVGBE_DEBUG 3 */ 64 1.2.4.2 uebayasi #ifdef MVGBE_DEBUG 65 1.2.4.2 uebayasi #define DPRINTF(x) if (mvgbe_debug) printf x 66 1.2.4.2 uebayasi #define DPRINTFN(n,x) if (mvgbe_debug >= (n)) printf x 67 1.2.4.2 uebayasi int mvgbe_debug = MVGBE_DEBUG; 68 1.2.4.2 uebayasi #else 69 1.2.4.2 uebayasi #define DPRINTF(x) 70 1.2.4.2 uebayasi #define DPRINTFN(n,x) 71 1.2.4.2 uebayasi #endif 72 1.2.4.2 uebayasi 73 1.2.4.2 uebayasi 74 1.2.4.2 uebayasi #define MVGBE_READ(sc, reg) \ 75 1.2.4.2 uebayasi bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)) 76 1.2.4.2 uebayasi #define MVGBE_WRITE(sc, reg, val) \ 77 1.2.4.2 uebayasi bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val)) 78 1.2.4.2 uebayasi #define MVGBE_READ_FILTER(sc, reg) \ 79 1.2.4.2 uebayasi bus_space_read_4((sc)->sc_iot, (sc)->sc_dafh, (reg)) 80 1.2.4.2 uebayasi #define MVGBE_WRITE_FILTER(sc, reg, val, c) \ 81 1.2.4.2 uebayasi bus_space_set_region_4((sc)->sc_iot, (sc)->sc_dafh, (reg), (val), (c)) 82 1.2.4.2 uebayasi 83 1.2.4.2 uebayasi #define MVGBE_TX_RING_CNT 256 84 1.2.4.2 uebayasi #define MVGBE_RX_RING_CNT 256 85 1.2.4.2 uebayasi 86 1.2.4.2 uebayasi #define MVGBE_JSLOTS 384 /* XXXX */ 87 1.2.4.2 uebayasi #define MVGBE_JLEN (MVGBE_MRU + MVGBE_BUF_ALIGN) 88 1.2.4.2 uebayasi #define MVGBE_NTXSEG 30 89 1.2.4.2 uebayasi #define MVGBE_JPAGESZ PAGE_SIZE 90 1.2.4.2 uebayasi #define MVGBE_RESID \ 91 1.2.4.2 uebayasi (MVGBE_JPAGESZ - (MVGBE_JLEN * MVGBE_JSLOTS) % MVGBE_JPAGESZ) 92 1.2.4.2 uebayasi #define MVGBE_JMEM \ 93 1.2.4.2 uebayasi ((MVGBE_JLEN * MVGBE_JSLOTS) + MVGBE_RESID) 94 1.2.4.2 uebayasi 95 1.2.4.2 uebayasi #define MVGBE_TX_RING_ADDR(sc, i) \ 96 1.2.4.2 uebayasi ((sc)->sc_ring_map->dm_segs[0].ds_addr + \ 97 1.2.4.2 uebayasi offsetof(struct mvgbe_ring_data, mvgbe_tx_ring[(i)])) 98 1.2.4.2 uebayasi 99 1.2.4.2 uebayasi #define MVGBE_RX_RING_ADDR(sc, i) \ 100 1.2.4.2 uebayasi ((sc)->sc_ring_map->dm_segs[0].ds_addr + \ 101 1.2.4.2 uebayasi offsetof(struct mvgbe_ring_data, mvgbe_rx_ring[(i)])) 102 1.2.4.2 uebayasi 103 1.2.4.2 uebayasi #define MVGBE_CDOFF(x) offsetof(struct mvgbe_ring_data, x) 104 1.2.4.2 uebayasi #define MVGBE_CDTXOFF(x) MVGBE_CDOFF(mvgbe_tx_ring[(x)]) 105 1.2.4.2 uebayasi #define MVGBE_CDRXOFF(x) MVGBE_CDOFF(mvgbe_rx_ring[(x)]) 106 1.2.4.2 uebayasi 107 1.2.4.2 uebayasi #define MVGBE_CDTXSYNC(sc, x, n, ops) \ 108 1.2.4.2 uebayasi do { \ 109 1.2.4.2 uebayasi int __x, __n; \ 110 1.2.4.2 uebayasi const int __descsize = sizeof(struct mvgbe_tx_desc); \ 111 1.2.4.2 uebayasi \ 112 1.2.4.2 uebayasi __x = (x); \ 113 1.2.4.2 uebayasi __n = (n); \ 114 1.2.4.2 uebayasi \ 115 1.2.4.2 uebayasi /* If it will wrap around, sync to the end of the ring. */ \ 116 1.2.4.2 uebayasi if ((__x + __n) > MVGBE_TX_RING_CNT) { \ 117 1.2.4.2 uebayasi bus_dmamap_sync((sc)->sc_dmat, \ 118 1.2.4.2 uebayasi (sc)->sc_ring_map, MVGBE_CDTXOFF(__x), \ 119 1.2.4.2 uebayasi __descsize * (MVGBE_TX_RING_CNT - __x), (ops)); \ 120 1.2.4.2 uebayasi __n -= (MVGBE_TX_RING_CNT - __x); \ 121 1.2.4.2 uebayasi __x = 0; \ 122 1.2.4.2 uebayasi } \ 123 1.2.4.2 uebayasi \ 124 1.2.4.2 uebayasi /* Now sync whatever is left. */ \ 125 1.2.4.2 uebayasi bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_ring_map, \ 126 1.2.4.2 uebayasi MVGBE_CDTXOFF((__x)), __descsize * __n, (ops)); \ 127 1.2.4.2 uebayasi } while (0 /*CONSTCOND*/) 128 1.2.4.2 uebayasi 129 1.2.4.2 uebayasi #define MVGBE_CDRXSYNC(sc, x, ops) \ 130 1.2.4.2 uebayasi do { \ 131 1.2.4.2 uebayasi bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_ring_map, \ 132 1.2.4.2 uebayasi MVGBE_CDRXOFF((x)), sizeof(struct mvgbe_rx_desc), (ops)); \ 133 1.2.4.2 uebayasi } while (/*CONSTCOND*/0) 134 1.2.4.2 uebayasi 135 1.2.4.2 uebayasi 136 1.2.4.2 uebayasi struct mvgbe_jpool_entry { 137 1.2.4.2 uebayasi int slot; 138 1.2.4.2 uebayasi LIST_ENTRY(mvgbe_jpool_entry) jpool_entries; 139 1.2.4.2 uebayasi }; 140 1.2.4.2 uebayasi 141 1.2.4.2 uebayasi struct mvgbe_chain { 142 1.2.4.2 uebayasi void *mvgbe_desc; 143 1.2.4.2 uebayasi struct mbuf *mvgbe_mbuf; 144 1.2.4.2 uebayasi struct mvgbe_chain *mvgbe_next; 145 1.2.4.2 uebayasi }; 146 1.2.4.2 uebayasi 147 1.2.4.2 uebayasi struct mvgbe_txmap_entry { 148 1.2.4.2 uebayasi bus_dmamap_t dmamap; 149 1.2.4.2 uebayasi SIMPLEQ_ENTRY(mvgbe_txmap_entry) link; 150 1.2.4.2 uebayasi }; 151 1.2.4.2 uebayasi 152 1.2.4.2 uebayasi struct mvgbe_chain_data { 153 1.2.4.2 uebayasi struct mvgbe_chain mvgbe_tx_chain[MVGBE_TX_RING_CNT]; 154 1.2.4.2 uebayasi struct mvgbe_txmap_entry *mvgbe_tx_map[MVGBE_TX_RING_CNT]; 155 1.2.4.2 uebayasi int mvgbe_tx_prod; 156 1.2.4.2 uebayasi int mvgbe_tx_cons; 157 1.2.4.2 uebayasi int mvgbe_tx_cnt; 158 1.2.4.2 uebayasi 159 1.2.4.2 uebayasi struct mvgbe_chain mvgbe_rx_chain[MVGBE_RX_RING_CNT]; 160 1.2.4.2 uebayasi bus_dmamap_t mvgbe_rx_map[MVGBE_RX_RING_CNT]; 161 1.2.4.2 uebayasi bus_dmamap_t mvgbe_rx_jumbo_map; 162 1.2.4.2 uebayasi int mvgbe_rx_prod; 163 1.2.4.2 uebayasi int mvgbe_rx_cons; 164 1.2.4.2 uebayasi int mvgbe_rx_cnt; 165 1.2.4.2 uebayasi 166 1.2.4.2 uebayasi /* Stick the jumbo mem management stuff here too. */ 167 1.2.4.2 uebayasi void *mvgbe_jslots[MVGBE_JSLOTS]; 168 1.2.4.2 uebayasi void *mvgbe_jumbo_buf; 169 1.2.4.2 uebayasi }; 170 1.2.4.2 uebayasi 171 1.2.4.2 uebayasi struct mvgbe_ring_data { 172 1.2.4.2 uebayasi struct mvgbe_tx_desc mvgbe_tx_ring[MVGBE_TX_RING_CNT]; 173 1.2.4.2 uebayasi struct mvgbe_rx_desc mvgbe_rx_ring[MVGBE_RX_RING_CNT]; 174 1.2.4.2 uebayasi }; 175 1.2.4.2 uebayasi 176 1.2.4.2 uebayasi struct mvgbec_softc { 177 1.2.4.2 uebayasi device_t sc_dev; 178 1.2.4.2 uebayasi 179 1.2.4.2 uebayasi bus_space_tag_t sc_iot; 180 1.2.4.2 uebayasi bus_space_handle_t sc_ioh; 181 1.2.4.2 uebayasi 182 1.2.4.2 uebayasi kmutex_t sc_mtx; 183 1.2.4.3 uebayasi 184 1.2.4.3 uebayasi int sc_fix_tqtb; 185 1.2.4.2 uebayasi }; 186 1.2.4.2 uebayasi 187 1.2.4.2 uebayasi struct mvgbe_softc { 188 1.2.4.2 uebayasi device_t sc_dev; 189 1.2.4.3 uebayasi int sc_port; 190 1.2.4.2 uebayasi 191 1.2.4.2 uebayasi bus_space_tag_t sc_iot; 192 1.2.4.2 uebayasi bus_space_handle_t sc_ioh; 193 1.2.4.2 uebayasi bus_space_handle_t sc_dafh; /* dest address filter handle */ 194 1.2.4.2 uebayasi bus_dma_tag_t sc_dmat; 195 1.2.4.2 uebayasi 196 1.2.4.2 uebayasi struct ethercom sc_ethercom; 197 1.2.4.2 uebayasi struct mii_data sc_mii; 198 1.2.4.2 uebayasi u_int8_t sc_enaddr[ETHER_ADDR_LEN]; /* station addr */ 199 1.2.4.2 uebayasi 200 1.2.4.2 uebayasi struct mvgbe_chain_data sc_cdata; 201 1.2.4.2 uebayasi struct mvgbe_ring_data *sc_rdata; 202 1.2.4.2 uebayasi bus_dmamap_t sc_ring_map; 203 1.2.4.2 uebayasi int sc_if_flags; 204 1.2.4.2 uebayasi 205 1.2.4.2 uebayasi LIST_HEAD(__mvgbe_jfreehead, mvgbe_jpool_entry) sc_jfree_listhead; 206 1.2.4.2 uebayasi LIST_HEAD(__mvgbe_jinusehead, mvgbe_jpool_entry) sc_jinuse_listhead; 207 1.2.4.2 uebayasi SIMPLEQ_HEAD(__mvgbe_txmaphead, mvgbe_txmap_entry) sc_txmap_head; 208 1.2.4.2 uebayasi 209 1.2.4.2 uebayasi #if NRND > 0 210 1.2.4.2 uebayasi rndsource_element_t sc_rnd_source; 211 1.2.4.2 uebayasi #endif 212 1.2.4.2 uebayasi }; 213 1.2.4.2 uebayasi 214 1.2.4.2 uebayasi 215 1.2.4.2 uebayasi /* Gigabit Ethernet Unit Global part functions */ 216 1.2.4.2 uebayasi 217 1.2.4.2 uebayasi static int mvgbec_match(device_t, struct cfdata *, void *); 218 1.2.4.2 uebayasi static void mvgbec_attach(device_t, device_t, void *); 219 1.2.4.2 uebayasi 220 1.2.4.2 uebayasi static int mvgbec_print(void *, const char *); 221 1.2.4.2 uebayasi static int mvgbec_search(device_t, cfdata_t, const int *, void *); 222 1.2.4.2 uebayasi 223 1.2.4.2 uebayasi /* MII funcstions */ 224 1.2.4.2 uebayasi static int mvgbec_miibus_readreg(device_t, int, int); 225 1.2.4.2 uebayasi static void mvgbec_miibus_writereg(device_t, int, int, int); 226 1.2.4.2 uebayasi static void mvgbec_miibus_statchg(device_t); 227 1.2.4.2 uebayasi 228 1.2.4.2 uebayasi static void mvgbec_wininit(struct mvgbec_softc *); 229 1.2.4.2 uebayasi 230 1.2.4.2 uebayasi /* Gigabit Ethernet Port part functions */ 231 1.2.4.2 uebayasi 232 1.2.4.2 uebayasi static int mvgbe_match(device_t, struct cfdata *, void *); 233 1.2.4.2 uebayasi static void mvgbe_attach(device_t, device_t, void *); 234 1.2.4.2 uebayasi 235 1.2.4.2 uebayasi static int mvgbe_intr(void *); 236 1.2.4.2 uebayasi 237 1.2.4.2 uebayasi static void mvgbe_start(struct ifnet *); 238 1.2.4.2 uebayasi static int mvgbe_ioctl(struct ifnet *, u_long, void *); 239 1.2.4.2 uebayasi static int mvgbe_init(struct ifnet *); 240 1.2.4.2 uebayasi static void mvgbe_stop(struct ifnet *, int); 241 1.2.4.2 uebayasi static void mvgbe_watchdog(struct ifnet *); 242 1.2.4.2 uebayasi 243 1.2.4.2 uebayasi /* MII funcstions */ 244 1.2.4.2 uebayasi static int mvgbe_ifmedia_upd(struct ifnet *); 245 1.2.4.2 uebayasi static void mvgbe_ifmedia_sts(struct ifnet *, struct ifmediareq *); 246 1.2.4.2 uebayasi 247 1.2.4.2 uebayasi static int mvgbe_init_rx_ring(struct mvgbe_softc *); 248 1.2.4.2 uebayasi static int mvgbe_init_tx_ring(struct mvgbe_softc *); 249 1.2.4.2 uebayasi static int mvgbe_newbuf(struct mvgbe_softc *, int, struct mbuf *, bus_dmamap_t); 250 1.2.4.2 uebayasi static int mvgbe_alloc_jumbo_mem(struct mvgbe_softc *); 251 1.2.4.2 uebayasi static void *mvgbe_jalloc(struct mvgbe_softc *); 252 1.2.4.2 uebayasi static void mvgbe_jfree(struct mbuf *, void *, size_t, void *); 253 1.2.4.2 uebayasi static int mvgbe_encap(struct mvgbe_softc *, struct mbuf *, uint32_t *); 254 1.2.4.2 uebayasi static void mvgbe_rxeof(struct mvgbe_softc *); 255 1.2.4.2 uebayasi static void mvgbe_txeof(struct mvgbe_softc *); 256 1.2.4.2 uebayasi static void mvgbe_setmulti(struct mvgbe_softc *); 257 1.2.4.2 uebayasi #ifdef MVGBE_DEBUG 258 1.2.4.2 uebayasi static void mvgbe_dump_txdesc(struct mvgbe_tx_desc *, int); 259 1.2.4.2 uebayasi #endif 260 1.2.4.2 uebayasi 261 1.2.4.2 uebayasi CFATTACH_DECL_NEW(mvgbec_gt, sizeof(struct mvgbec_softc), 262 1.2.4.2 uebayasi mvgbec_match, mvgbec_attach, NULL, NULL); 263 1.2.4.2 uebayasi CFATTACH_DECL_NEW(mvgbec_mbus, sizeof(struct mvgbec_softc), 264 1.2.4.2 uebayasi mvgbec_match, mvgbec_attach, NULL, NULL); 265 1.2.4.2 uebayasi 266 1.2.4.2 uebayasi CFATTACH_DECL_NEW(mvgbe, sizeof(struct mvgbe_softc), 267 1.2.4.2 uebayasi mvgbe_match, mvgbe_attach, NULL, NULL); 268 1.2.4.2 uebayasi 269 1.2.4.2 uebayasi 270 1.2.4.2 uebayasi struct mvgbe_port { 271 1.2.4.2 uebayasi int model; 272 1.2.4.3 uebayasi int unit; 273 1.2.4.2 uebayasi int ports; 274 1.2.4.3 uebayasi int irqs[3]; 275 1.2.4.3 uebayasi int flags; 276 1.2.4.3 uebayasi #define FLAGS_FIX_TQTB (1 << 0) 277 1.2.4.2 uebayasi } mvgbe_ports[] = { 278 1.2.4.3 uebayasi { MARVELL_DISCOVERY_II, 0, 3, { 32, 33, 34 }, 0 }, 279 1.2.4.3 uebayasi { MARVELL_DISCOVERY_III, 0, 3, { 32, 33, 34 }, 0 }, 280 1.2.4.2 uebayasi #if 0 281 1.2.4.3 uebayasi { MARVELL_DISCOVERY_LT, 0, ?, { }, 0 }, 282 1.2.4.3 uebayasi { MARVELL_DISCOVERY_V, 0, ?, { }, 0 }, 283 1.2.4.3 uebayasi { MARVELL_DISCOVERY_VI, 0, ?, { }, 0 }, 284 1.2.4.2 uebayasi #endif 285 1.2.4.3 uebayasi { MARVELL_ORION_1_88F5082, 0, 1, { 21 }, 0 }, 286 1.2.4.3 uebayasi { MARVELL_ORION_1_88F5180N, 0, 1, { 21 }, 0 }, 287 1.2.4.3 uebayasi { MARVELL_ORION_1_88F5181, 0, 1, { 21 }, 0 }, 288 1.2.4.3 uebayasi { MARVELL_ORION_1_88F5182, 0, 1, { 21 }, 0 }, 289 1.2.4.3 uebayasi { MARVELL_ORION_2_88F5281, 0, 1, { 21 }, 0 }, 290 1.2.4.3 uebayasi { MARVELL_ORION_1_88F6082, 0, 1, { 21 }, 0 }, 291 1.2.4.3 uebayasi { MARVELL_ORION_1_88W8660, 0, 1, { 21 }, 0 }, 292 1.2.4.3 uebayasi 293 1.2.4.3 uebayasi { MARVELL_KIRKWOOD_88F6180, 0, 1, { 11 }, FLAGS_FIX_TQTB }, 294 1.2.4.3 uebayasi { MARVELL_KIRKWOOD_88F6192, 0, 1, { 11 }, FLAGS_FIX_TQTB }, 295 1.2.4.3 uebayasi { MARVELL_KIRKWOOD_88F6192, 1, 1, { 14 }, FLAGS_FIX_TQTB }, 296 1.2.4.3 uebayasi { MARVELL_KIRKWOOD_88F6281, 0, 1, { 11 }, FLAGS_FIX_TQTB }, 297 1.2.4.3 uebayasi { MARVELL_KIRKWOOD_88F6281, 1, 1, { 14 }, FLAGS_FIX_TQTB }, 298 1.2.4.3 uebayasi 299 1.2.4.3 uebayasi { MARVELL_MV78XX0_MV78100, 0, 1, { 40 }, FLAGS_FIX_TQTB }, 300 1.2.4.3 uebayasi { MARVELL_MV78XX0_MV78100, 1, 1, { 44 }, FLAGS_FIX_TQTB }, 301 1.2.4.3 uebayasi { MARVELL_MV78XX0_MV78200, 0, 1, { 40 }, FLAGS_FIX_TQTB }, 302 1.2.4.3 uebayasi { MARVELL_MV78XX0_MV78200, 1, 1, { 44 }, FLAGS_FIX_TQTB }, 303 1.2.4.3 uebayasi { MARVELL_MV78XX0_MV78200, 2, 1, { 48 }, FLAGS_FIX_TQTB }, 304 1.2.4.3 uebayasi { MARVELL_MV78XX0_MV78200, 3, 1, { 52 }, FLAGS_FIX_TQTB }, 305 1.2.4.2 uebayasi }; 306 1.2.4.2 uebayasi 307 1.2.4.2 uebayasi 308 1.2.4.2 uebayasi /* ARGSUSED */ 309 1.2.4.2 uebayasi static int 310 1.2.4.2 uebayasi mvgbec_match(device_t parent, struct cfdata *match, void *aux) 311 1.2.4.2 uebayasi { 312 1.2.4.2 uebayasi struct marvell_attach_args *mva = aux; 313 1.2.4.2 uebayasi int i; 314 1.2.4.2 uebayasi 315 1.2.4.2 uebayasi if (strcmp(mva->mva_name, match->cf_name) != 0) 316 1.2.4.2 uebayasi return 0; 317 1.2.4.2 uebayasi if (mva->mva_offset == MVA_OFFSET_DEFAULT) 318 1.2.4.2 uebayasi return 0; 319 1.2.4.2 uebayasi 320 1.2.4.2 uebayasi for (i = 0; i < __arraycount(mvgbe_ports); i++) 321 1.2.4.2 uebayasi if (mva->mva_model == mvgbe_ports[i].model) { 322 1.2.4.2 uebayasi mva->mva_size = MVGBE_SIZE; 323 1.2.4.2 uebayasi return 1; 324 1.2.4.2 uebayasi } 325 1.2.4.2 uebayasi return 0; 326 1.2.4.2 uebayasi } 327 1.2.4.2 uebayasi 328 1.2.4.2 uebayasi /* ARGSUSED */ 329 1.2.4.2 uebayasi static void 330 1.2.4.2 uebayasi mvgbec_attach(device_t parent, device_t self, void *aux) 331 1.2.4.2 uebayasi { 332 1.2.4.2 uebayasi struct mvgbec_softc *sc = device_private(self); 333 1.2.4.2 uebayasi struct marvell_attach_args *mva = aux, gbea; 334 1.2.4.2 uebayasi struct mvgbe_softc *port; 335 1.2.4.2 uebayasi struct mii_softc *mii; 336 1.2.4.2 uebayasi device_t child; 337 1.2.4.2 uebayasi uint32_t phyaddr; 338 1.2.4.2 uebayasi int i, j; 339 1.2.4.2 uebayasi 340 1.2.4.2 uebayasi aprint_naive("\n"); 341 1.2.4.2 uebayasi aprint_normal(": Marvell Gigabit Ethernet Controller\n"); 342 1.2.4.2 uebayasi 343 1.2.4.2 uebayasi sc->sc_dev = self; 344 1.2.4.2 uebayasi sc->sc_iot = mva->mva_iot; 345 1.2.4.2 uebayasi if (bus_space_subregion(mva->mva_iot, mva->mva_ioh, mva->mva_offset, 346 1.2.4.2 uebayasi mva->mva_size, &sc->sc_ioh)) { 347 1.2.4.2 uebayasi aprint_error_dev(self, "Cannot map registers\n"); 348 1.2.4.2 uebayasi return; 349 1.2.4.2 uebayasi } 350 1.2.4.2 uebayasi phyaddr = 0; 351 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_PHYADDR, phyaddr); 352 1.2.4.2 uebayasi 353 1.2.4.2 uebayasi mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_NET); 354 1.2.4.2 uebayasi 355 1.2.4.2 uebayasi /* Disable and clear Gigabit Ethernet Unit interrupts */ 356 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_EUIM, 0); 357 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_EUIC, 0); 358 1.2.4.2 uebayasi 359 1.2.4.2 uebayasi mvgbec_wininit(sc); 360 1.2.4.2 uebayasi 361 1.2.4.2 uebayasi memset(&gbea, 0, sizeof(gbea)); 362 1.2.4.2 uebayasi for (i = 0; i < __arraycount(mvgbe_ports); i++) { 363 1.2.4.3 uebayasi if (mvgbe_ports[i].model != mva->mva_model || 364 1.2.4.3 uebayasi mvgbe_ports[i].unit != mva->mva_unit) 365 1.2.4.2 uebayasi continue; 366 1.2.4.2 uebayasi 367 1.2.4.3 uebayasi sc->sc_fix_tqtb = mvgbe_ports[i].flags & FLAGS_FIX_TQTB; 368 1.2.4.3 uebayasi 369 1.2.4.2 uebayasi for (j = 0; j < mvgbe_ports[i].ports; j++) { 370 1.2.4.2 uebayasi gbea.mva_name = "mvgbe"; 371 1.2.4.2 uebayasi gbea.mva_model = mva->mva_model; 372 1.2.4.2 uebayasi gbea.mva_iot = sc->sc_iot; 373 1.2.4.2 uebayasi gbea.mva_ioh = sc->sc_ioh; 374 1.2.4.2 uebayasi gbea.mva_unit = j; 375 1.2.4.2 uebayasi gbea.mva_dmat = mva->mva_dmat; 376 1.2.4.2 uebayasi gbea.mva_irq = mvgbe_ports[i].irqs[j]; 377 1.2.4.2 uebayasi child = config_found_sm_loc(sc->sc_dev, "mvgbec", NULL, 378 1.2.4.2 uebayasi &gbea, mvgbec_print, mvgbec_search); 379 1.2.4.2 uebayasi if (child) { 380 1.2.4.2 uebayasi port = device_private(child); 381 1.2.4.2 uebayasi mii = LIST_FIRST(&port->sc_mii.mii_phys); 382 1.2.4.2 uebayasi phyaddr |= MVGBE_PHYADDR_PHYAD(j, mii->mii_phy); 383 1.2.4.2 uebayasi } 384 1.2.4.2 uebayasi } 385 1.2.4.3 uebayasi break; 386 1.2.4.2 uebayasi } 387 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_PHYADDR, phyaddr); 388 1.2.4.2 uebayasi } 389 1.2.4.2 uebayasi 390 1.2.4.2 uebayasi static int 391 1.2.4.2 uebayasi mvgbec_print(void *aux, const char *pnp) 392 1.2.4.2 uebayasi { 393 1.2.4.2 uebayasi struct marvell_attach_args *gbea = aux; 394 1.2.4.2 uebayasi 395 1.2.4.2 uebayasi if (pnp) 396 1.2.4.2 uebayasi aprint_normal("%s at %s port %d", 397 1.2.4.2 uebayasi gbea->mva_name, pnp, gbea->mva_unit); 398 1.2.4.2 uebayasi else { 399 1.2.4.2 uebayasi if (gbea->mva_unit != MVGBECCF_PORT_DEFAULT) 400 1.2.4.2 uebayasi aprint_normal(" port %d", gbea->mva_unit); 401 1.2.4.2 uebayasi if (gbea->mva_irq != MVGBECCF_IRQ_DEFAULT) 402 1.2.4.2 uebayasi aprint_normal(" irq %d", gbea->mva_irq); 403 1.2.4.2 uebayasi } 404 1.2.4.2 uebayasi return UNCONF; 405 1.2.4.2 uebayasi } 406 1.2.4.2 uebayasi 407 1.2.4.2 uebayasi /* ARGSUSED */ 408 1.2.4.2 uebayasi static int 409 1.2.4.2 uebayasi mvgbec_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux) 410 1.2.4.2 uebayasi { 411 1.2.4.2 uebayasi struct marvell_attach_args *gbea = aux; 412 1.2.4.2 uebayasi 413 1.2.4.2 uebayasi if (cf->cf_loc[MVGBECCF_PORT] == gbea->mva_unit && 414 1.2.4.2 uebayasi cf->cf_loc[MVGBECCF_IRQ] != MVGBECCF_IRQ_DEFAULT) 415 1.2.4.2 uebayasi gbea->mva_irq = cf->cf_loc[MVGBECCF_IRQ]; 416 1.2.4.2 uebayasi 417 1.2.4.2 uebayasi return config_match(parent, cf, aux); 418 1.2.4.2 uebayasi } 419 1.2.4.2 uebayasi 420 1.2.4.2 uebayasi static int 421 1.2.4.2 uebayasi mvgbec_miibus_readreg(device_t dev, int phy, int reg) 422 1.2.4.2 uebayasi { 423 1.2.4.2 uebayasi struct mvgbe_softc *sc = device_private(dev); 424 1.2.4.2 uebayasi struct mvgbec_softc *csc = device_private(device_parent(dev)); 425 1.2.4.2 uebayasi struct ifnet *ifp = &sc->sc_ethercom.ec_if; 426 1.2.4.2 uebayasi uint32_t smi, val; 427 1.2.4.2 uebayasi int i; 428 1.2.4.2 uebayasi 429 1.2.4.2 uebayasi mutex_enter(&csc->sc_mtx); 430 1.2.4.2 uebayasi 431 1.2.4.2 uebayasi for (i = 0; i < MVGBE_PHY_TIMEOUT; i++) { 432 1.2.4.2 uebayasi DELAY(1); 433 1.2.4.2 uebayasi if (!(MVGBE_READ(csc, MVGBE_SMI) & MVGBE_SMI_BUSY)) 434 1.2.4.2 uebayasi break; 435 1.2.4.2 uebayasi } 436 1.2.4.2 uebayasi if (i == MVGBE_PHY_TIMEOUT) { 437 1.2.4.2 uebayasi aprint_error_ifnet(ifp, "SMI busy timeout\n"); 438 1.2.4.2 uebayasi mutex_exit(&csc->sc_mtx); 439 1.2.4.2 uebayasi return -1; 440 1.2.4.2 uebayasi } 441 1.2.4.2 uebayasi 442 1.2.4.2 uebayasi smi = 443 1.2.4.2 uebayasi MVGBE_SMI_PHYAD(phy) | MVGBE_SMI_REGAD(reg) | MVGBE_SMI_OPCODE_READ; 444 1.2.4.2 uebayasi MVGBE_WRITE(csc, MVGBE_SMI, smi); 445 1.2.4.2 uebayasi 446 1.2.4.2 uebayasi for (i = 0; i < MVGBE_PHY_TIMEOUT; i++) { 447 1.2.4.2 uebayasi DELAY(1); 448 1.2.4.2 uebayasi smi = MVGBE_READ(csc, MVGBE_SMI); 449 1.2.4.2 uebayasi if (smi & MVGBE_SMI_READVALID) 450 1.2.4.2 uebayasi break; 451 1.2.4.2 uebayasi } 452 1.2.4.2 uebayasi 453 1.2.4.2 uebayasi mutex_exit(&csc->sc_mtx); 454 1.2.4.2 uebayasi 455 1.2.4.2 uebayasi DPRINTFN(9, ("mvgbec_miibus_readreg: i=%d, timeout=%d\n", 456 1.2.4.2 uebayasi i, MVGBE_PHY_TIMEOUT)); 457 1.2.4.2 uebayasi 458 1.2.4.2 uebayasi val = smi & MVGBE_SMI_DATA_MASK; 459 1.2.4.2 uebayasi 460 1.2.4.2 uebayasi DPRINTFN(9, ("mvgbec_miibus_readreg phy=%d, reg=%#x, val=%#x\n", 461 1.2.4.2 uebayasi phy, reg, val)); 462 1.2.4.2 uebayasi 463 1.2.4.2 uebayasi return val; 464 1.2.4.2 uebayasi } 465 1.2.4.2 uebayasi 466 1.2.4.2 uebayasi static void 467 1.2.4.2 uebayasi mvgbec_miibus_writereg(device_t dev, int phy, int reg, int val) 468 1.2.4.2 uebayasi { 469 1.2.4.2 uebayasi struct mvgbe_softc *sc = device_private(dev); 470 1.2.4.2 uebayasi struct mvgbec_softc *csc = device_private(device_parent(dev)); 471 1.2.4.2 uebayasi struct ifnet *ifp = &sc->sc_ethercom.ec_if; 472 1.2.4.2 uebayasi uint32_t smi; 473 1.2.4.2 uebayasi int i; 474 1.2.4.2 uebayasi 475 1.2.4.2 uebayasi DPRINTFN(9, ("mvgbec_miibus_writereg phy=%d reg=%#x val=%#x\n", 476 1.2.4.2 uebayasi phy, reg, val)); 477 1.2.4.2 uebayasi 478 1.2.4.2 uebayasi mutex_enter(&csc->sc_mtx); 479 1.2.4.2 uebayasi 480 1.2.4.2 uebayasi for (i = 0; i < MVGBE_PHY_TIMEOUT; i++) { 481 1.2.4.2 uebayasi DELAY(1); 482 1.2.4.2 uebayasi if (!(MVGBE_READ(csc, MVGBE_SMI) & MVGBE_SMI_BUSY)) 483 1.2.4.2 uebayasi break; 484 1.2.4.2 uebayasi } 485 1.2.4.2 uebayasi if (i == MVGBE_PHY_TIMEOUT) { 486 1.2.4.2 uebayasi aprint_error_ifnet(ifp, "SMI busy timeout\n"); 487 1.2.4.2 uebayasi mutex_exit(&csc->sc_mtx); 488 1.2.4.2 uebayasi return; 489 1.2.4.2 uebayasi } 490 1.2.4.2 uebayasi 491 1.2.4.2 uebayasi smi = MVGBE_SMI_PHYAD(phy) | MVGBE_SMI_REGAD(reg) | 492 1.2.4.2 uebayasi MVGBE_SMI_OPCODE_WRITE | (val & MVGBE_SMI_DATA_MASK); 493 1.2.4.2 uebayasi MVGBE_WRITE(csc, MVGBE_SMI, smi); 494 1.2.4.2 uebayasi 495 1.2.4.2 uebayasi for (i = 0; i < MVGBE_PHY_TIMEOUT; i++) { 496 1.2.4.2 uebayasi DELAY(1); 497 1.2.4.2 uebayasi if (!(MVGBE_READ(csc, MVGBE_SMI) & MVGBE_SMI_BUSY)) 498 1.2.4.2 uebayasi break; 499 1.2.4.2 uebayasi } 500 1.2.4.2 uebayasi 501 1.2.4.2 uebayasi mutex_exit(&csc->sc_mtx); 502 1.2.4.2 uebayasi 503 1.2.4.2 uebayasi if (i == MVGBE_PHY_TIMEOUT) 504 1.2.4.2 uebayasi aprint_error_ifnet(ifp, "phy write timed out\n"); 505 1.2.4.2 uebayasi } 506 1.2.4.2 uebayasi 507 1.2.4.2 uebayasi static void 508 1.2.4.2 uebayasi mvgbec_miibus_statchg(device_t dev) 509 1.2.4.2 uebayasi { 510 1.2.4.2 uebayasi 511 1.2.4.2 uebayasi /* nothing to do */ 512 1.2.4.2 uebayasi } 513 1.2.4.2 uebayasi 514 1.2.4.2 uebayasi 515 1.2.4.2 uebayasi static void 516 1.2.4.2 uebayasi mvgbec_wininit(struct mvgbec_softc *sc) 517 1.2.4.2 uebayasi { 518 1.2.4.2 uebayasi device_t pdev = device_parent(sc->sc_dev); 519 1.2.4.2 uebayasi uint64_t base; 520 1.2.4.2 uebayasi uint32_t en, ac, size; 521 1.2.4.2 uebayasi int window, target, attr, rv, i; 522 1.2.4.2 uebayasi static int tags[] = { 523 1.2.4.2 uebayasi MARVELL_TAG_SDRAM_CS0, 524 1.2.4.2 uebayasi MARVELL_TAG_SDRAM_CS1, 525 1.2.4.2 uebayasi MARVELL_TAG_SDRAM_CS2, 526 1.2.4.2 uebayasi MARVELL_TAG_SDRAM_CS3, 527 1.2.4.2 uebayasi 528 1.2.4.2 uebayasi MARVELL_TAG_UNDEFINED, 529 1.2.4.2 uebayasi }; 530 1.2.4.2 uebayasi 531 1.2.4.2 uebayasi /* First disable all address decode windows */ 532 1.2.4.2 uebayasi en = MVGBE_BARE_EN_MASK; 533 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_BARE, en); 534 1.2.4.2 uebayasi 535 1.2.4.2 uebayasi ac = 0; 536 1.2.4.2 uebayasi for (window = 0, i = 0; 537 1.2.4.2 uebayasi tags[i] != MARVELL_TAG_UNDEFINED && window < MVGBE_NWINDOW; i++) { 538 1.2.4.2 uebayasi rv = marvell_winparams_by_tag(pdev, tags[i], 539 1.2.4.2 uebayasi &target, &attr, &base, &size); 540 1.2.4.2 uebayasi if (rv != 0 || size == 0) 541 1.2.4.2 uebayasi continue; 542 1.2.4.2 uebayasi 543 1.2.4.2 uebayasi if (base > 0xffffffffULL) { 544 1.2.4.2 uebayasi if (window >= MVGBE_NREMAP) { 545 1.2.4.2 uebayasi aprint_error_dev(sc->sc_dev, 546 1.2.4.2 uebayasi "can't remap window %d\n", window); 547 1.2.4.2 uebayasi continue; 548 1.2.4.2 uebayasi } 549 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_HA(window), 550 1.2.4.2 uebayasi (base >> 32) & 0xffffffff); 551 1.2.4.2 uebayasi } 552 1.2.4.2 uebayasi 553 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_BASEADDR(window), 554 1.2.4.2 uebayasi MVGBE_BASEADDR_TARGET(target) | 555 1.2.4.2 uebayasi MVGBE_BASEADDR_ATTR(attr) | 556 1.2.4.2 uebayasi MVGBE_BASEADDR_BASE(base)); 557 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_S(window), MVGBE_S_SIZE(size)); 558 1.2.4.2 uebayasi 559 1.2.4.2 uebayasi en &= ~(1 << window); 560 1.2.4.2 uebayasi /* set full access (r/w) */ 561 1.2.4.2 uebayasi ac |= MVGBE_EPAP_EPAR(window, MVGBE_EPAP_AC_FA); 562 1.2.4.2 uebayasi window++; 563 1.2.4.2 uebayasi } 564 1.2.4.2 uebayasi /* allow to access decode window */ 565 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_EPAP, ac); 566 1.2.4.2 uebayasi 567 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_BARE, en); 568 1.2.4.2 uebayasi } 569 1.2.4.2 uebayasi 570 1.2.4.2 uebayasi 571 1.2.4.2 uebayasi /* ARGSUSED */ 572 1.2.4.2 uebayasi static int 573 1.2.4.2 uebayasi mvgbe_match(device_t parent, struct cfdata *match, void *aux) 574 1.2.4.2 uebayasi { 575 1.2.4.2 uebayasi struct marvell_attach_args *mva = aux; 576 1.2.4.2 uebayasi uint32_t pbase, maddrh, maddrl; 577 1.2.4.2 uebayasi 578 1.2.4.2 uebayasi pbase = MVGBE_PORTR_BASE + mva->mva_unit * MVGBE_PORTR_SIZE; 579 1.2.4.2 uebayasi maddrh = 580 1.2.4.2 uebayasi bus_space_read_4(mva->mva_iot, mva->mva_ioh, pbase + MVGBE_MACAH); 581 1.2.4.2 uebayasi maddrl = 582 1.2.4.2 uebayasi bus_space_read_4(mva->mva_iot, mva->mva_ioh, pbase + MVGBE_MACAL); 583 1.2.4.2 uebayasi if ((maddrh | maddrl) == 0) 584 1.2.4.2 uebayasi return 0; 585 1.2.4.2 uebayasi 586 1.2.4.2 uebayasi return 1; 587 1.2.4.2 uebayasi } 588 1.2.4.2 uebayasi 589 1.2.4.2 uebayasi /* ARGSUSED */ 590 1.2.4.2 uebayasi static void 591 1.2.4.2 uebayasi mvgbe_attach(device_t parent, device_t self, void *aux) 592 1.2.4.2 uebayasi { 593 1.2.4.2 uebayasi struct mvgbe_softc *sc = device_private(self); 594 1.2.4.2 uebayasi struct marvell_attach_args *mva = aux; 595 1.2.4.2 uebayasi struct mvgbe_txmap_entry *entry; 596 1.2.4.2 uebayasi struct ifnet *ifp; 597 1.2.4.2 uebayasi bus_dma_segment_t seg; 598 1.2.4.2 uebayasi bus_dmamap_t dmamap; 599 1.2.4.2 uebayasi int rseg, i; 600 1.2.4.2 uebayasi uint32_t maddrh, maddrl; 601 1.2.4.2 uebayasi void *kva; 602 1.2.4.2 uebayasi 603 1.2.4.2 uebayasi aprint_naive("\n"); 604 1.2.4.2 uebayasi aprint_normal("\n"); 605 1.2.4.2 uebayasi 606 1.2.4.2 uebayasi sc->sc_dev = self; 607 1.2.4.2 uebayasi sc->sc_port = mva->mva_unit; 608 1.2.4.2 uebayasi sc->sc_iot = mva->mva_iot; 609 1.2.4.2 uebayasi if (bus_space_subregion(mva->mva_iot, mva->mva_ioh, 610 1.2.4.2 uebayasi MVGBE_PORTR_BASE + mva->mva_unit * MVGBE_PORTR_SIZE, 611 1.2.4.2 uebayasi MVGBE_PORTR_SIZE, &sc->sc_ioh)) { 612 1.2.4.2 uebayasi aprint_error_dev(self, "Cannot map registers\n"); 613 1.2.4.2 uebayasi return; 614 1.2.4.2 uebayasi } 615 1.2.4.2 uebayasi if (bus_space_subregion(mva->mva_iot, mva->mva_ioh, 616 1.2.4.2 uebayasi MVGBE_PORTDAFR_BASE + mva->mva_unit * MVGBE_PORTDAFR_SIZE, 617 1.2.4.2 uebayasi MVGBE_PORTDAFR_SIZE, &sc->sc_dafh)) { 618 1.2.4.2 uebayasi aprint_error_dev(self, 619 1.2.4.2 uebayasi "Cannot map destination address filter registers\n"); 620 1.2.4.2 uebayasi return; 621 1.2.4.2 uebayasi } 622 1.2.4.2 uebayasi sc->sc_dmat = mva->mva_dmat; 623 1.2.4.2 uebayasi 624 1.2.4.2 uebayasi maddrh = MVGBE_READ(sc, MVGBE_MACAH); 625 1.2.4.2 uebayasi maddrl = MVGBE_READ(sc, MVGBE_MACAL); 626 1.2.4.2 uebayasi sc->sc_enaddr[0] = maddrh >> 24; 627 1.2.4.2 uebayasi sc->sc_enaddr[1] = maddrh >> 16; 628 1.2.4.2 uebayasi sc->sc_enaddr[2] = maddrh >> 8; 629 1.2.4.2 uebayasi sc->sc_enaddr[3] = maddrh >> 0; 630 1.2.4.2 uebayasi sc->sc_enaddr[4] = maddrl >> 8; 631 1.2.4.2 uebayasi sc->sc_enaddr[5] = maddrl >> 0; 632 1.2.4.2 uebayasi aprint_normal_dev(self, "Ethernet address %s\n", 633 1.2.4.2 uebayasi ether_sprintf(sc->sc_enaddr)); 634 1.2.4.2 uebayasi 635 1.2.4.2 uebayasi /* clear all ethernet port interrupts */ 636 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_IC, 0); 637 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_ICE, 0); 638 1.2.4.2 uebayasi 639 1.2.4.2 uebayasi marvell_intr_establish(mva->mva_irq, IPL_NET, mvgbe_intr, sc); 640 1.2.4.2 uebayasi 641 1.2.4.2 uebayasi /* Allocate the descriptor queues. */ 642 1.2.4.2 uebayasi if (bus_dmamem_alloc(sc->sc_dmat, sizeof(struct mvgbe_ring_data), 643 1.2.4.2 uebayasi PAGE_SIZE, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) { 644 1.2.4.2 uebayasi aprint_error_dev(self, "can't alloc rx buffers\n"); 645 1.2.4.2 uebayasi return; 646 1.2.4.2 uebayasi } 647 1.2.4.2 uebayasi if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, 648 1.2.4.2 uebayasi sizeof(struct mvgbe_ring_data), &kva, BUS_DMA_NOWAIT)) { 649 1.2.4.2 uebayasi aprint_error_dev(self, "can't map dma buffers (%lu bytes)\n", 650 1.2.4.2 uebayasi (u_long)sizeof(struct mvgbe_ring_data)); 651 1.2.4.2 uebayasi goto fail1; 652 1.2.4.2 uebayasi } 653 1.2.4.2 uebayasi if (bus_dmamap_create(sc->sc_dmat, sizeof(struct mvgbe_ring_data), 1, 654 1.2.4.2 uebayasi sizeof(struct mvgbe_ring_data), 0, BUS_DMA_NOWAIT, 655 1.2.4.2 uebayasi &sc->sc_ring_map)) { 656 1.2.4.2 uebayasi aprint_error_dev(self, "can't create dma map\n"); 657 1.2.4.2 uebayasi goto fail2; 658 1.2.4.2 uebayasi } 659 1.2.4.2 uebayasi if (bus_dmamap_load(sc->sc_dmat, sc->sc_ring_map, kva, 660 1.2.4.2 uebayasi sizeof(struct mvgbe_ring_data), NULL, BUS_DMA_NOWAIT)) { 661 1.2.4.2 uebayasi aprint_error_dev(self, "can't load dma map\n"); 662 1.2.4.2 uebayasi goto fail3; 663 1.2.4.2 uebayasi } 664 1.2.4.2 uebayasi for (i = 0; i < MVGBE_RX_RING_CNT; i++) 665 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_rx_chain[i].mvgbe_mbuf = NULL; 666 1.2.4.2 uebayasi 667 1.2.4.2 uebayasi SIMPLEQ_INIT(&sc->sc_txmap_head); 668 1.2.4.2 uebayasi for (i = 0; i < MVGBE_TX_RING_CNT; i++) { 669 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_tx_chain[i].mvgbe_mbuf = NULL; 670 1.2.4.2 uebayasi 671 1.2.4.2 uebayasi if (bus_dmamap_create(sc->sc_dmat, 672 1.2.4.2 uebayasi MVGBE_JLEN, MVGBE_NTXSEG, MVGBE_JLEN, 0, 673 1.2.4.2 uebayasi BUS_DMA_NOWAIT, &dmamap)) { 674 1.2.4.2 uebayasi aprint_error_dev(self, "Can't create TX dmamap\n"); 675 1.2.4.2 uebayasi goto fail4; 676 1.2.4.2 uebayasi } 677 1.2.4.2 uebayasi 678 1.2.4.2 uebayasi entry = kmem_alloc(sizeof(*entry), KM_SLEEP); 679 1.2.4.2 uebayasi if (!entry) { 680 1.2.4.2 uebayasi aprint_error_dev(self, "Can't alloc txmap entry\n"); 681 1.2.4.2 uebayasi bus_dmamap_destroy(sc->sc_dmat, dmamap); 682 1.2.4.2 uebayasi goto fail4; 683 1.2.4.2 uebayasi } 684 1.2.4.2 uebayasi entry->dmamap = dmamap; 685 1.2.4.2 uebayasi SIMPLEQ_INSERT_HEAD(&sc->sc_txmap_head, entry, link); 686 1.2.4.2 uebayasi } 687 1.2.4.2 uebayasi 688 1.2.4.2 uebayasi sc->sc_rdata = (struct mvgbe_ring_data *)kva; 689 1.2.4.2 uebayasi memset(sc->sc_rdata, 0, sizeof(struct mvgbe_ring_data)); 690 1.2.4.2 uebayasi 691 1.2.4.2 uebayasi #if 0 692 1.2.4.2 uebayasi /* 693 1.2.4.2 uebayasi * We can support 802.1Q VLAN-sized frames and jumbo 694 1.2.4.2 uebayasi * Ethernet frames. 695 1.2.4.2 uebayasi */ 696 1.2.4.2 uebayasi sc->sc_ethercom.ec_capabilities |= 697 1.2.4.2 uebayasi ETHERCAP_VLAN_MTU | ETHERCAP_VLAN_HWTAGGING | ETHERCAP_JUMBO_MTU; 698 1.2.4.2 uebayasi #else 699 1.2.4.2 uebayasi /* XXXX: We don't know the usage of VLAN. */ 700 1.2.4.2 uebayasi sc->sc_ethercom.ec_capabilities |= ETHERCAP_JUMBO_MTU; 701 1.2.4.2 uebayasi #endif 702 1.2.4.2 uebayasi 703 1.2.4.2 uebayasi /* Try to allocate memory for jumbo buffers. */ 704 1.2.4.2 uebayasi if (mvgbe_alloc_jumbo_mem(sc)) { 705 1.2.4.2 uebayasi aprint_error_dev(self, "jumbo buffer allocation failed\n"); 706 1.2.4.2 uebayasi goto fail4; 707 1.2.4.2 uebayasi } 708 1.2.4.2 uebayasi 709 1.2.4.2 uebayasi ifp = &sc->sc_ethercom.ec_if; 710 1.2.4.2 uebayasi ifp->if_softc = sc; 711 1.2.4.2 uebayasi ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 712 1.2.4.2 uebayasi ifp->if_start = mvgbe_start; 713 1.2.4.2 uebayasi ifp->if_ioctl = mvgbe_ioctl; 714 1.2.4.2 uebayasi ifp->if_init = mvgbe_init; 715 1.2.4.2 uebayasi ifp->if_stop = mvgbe_stop; 716 1.2.4.2 uebayasi ifp->if_watchdog = mvgbe_watchdog; 717 1.2.4.2 uebayasi /* 718 1.2.4.2 uebayasi * We can do IPv4/TCPv4/UDPv4 checksums in hardware. 719 1.2.4.2 uebayasi */ 720 1.2.4.2 uebayasi sc->sc_ethercom.ec_if.if_capabilities |= 721 1.2.4.2 uebayasi IFCAP_CSUM_IPv4_Tx | IFCAP_CSUM_IPv4_Rx | 722 1.2.4.2 uebayasi IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_TCPv4_Rx | 723 1.2.4.2 uebayasi IFCAP_CSUM_UDPv4_Tx | IFCAP_CSUM_UDPv4_Rx; 724 1.2.4.2 uebayasi IFQ_SET_MAXLEN(&ifp->if_snd, max(MVGBE_TX_RING_CNT - 1, IFQ_MAXLEN)); 725 1.2.4.2 uebayasi IFQ_SET_READY(&ifp->if_snd); 726 1.2.4.2 uebayasi strcpy(ifp->if_xname, device_xname(sc->sc_dev)); 727 1.2.4.2 uebayasi 728 1.2.4.2 uebayasi mvgbe_stop(ifp, 0); 729 1.2.4.2 uebayasi 730 1.2.4.2 uebayasi /* 731 1.2.4.2 uebayasi * Do MII setup. 732 1.2.4.2 uebayasi */ 733 1.2.4.2 uebayasi sc->sc_mii.mii_ifp = ifp; 734 1.2.4.2 uebayasi sc->sc_mii.mii_readreg = mvgbec_miibus_readreg; 735 1.2.4.2 uebayasi sc->sc_mii.mii_writereg = mvgbec_miibus_writereg; 736 1.2.4.2 uebayasi sc->sc_mii.mii_statchg = mvgbec_miibus_statchg; 737 1.2.4.2 uebayasi 738 1.2.4.2 uebayasi sc->sc_ethercom.ec_mii = &sc->sc_mii; 739 1.2.4.2 uebayasi ifmedia_init(&sc->sc_mii.mii_media, 0, 740 1.2.4.2 uebayasi mvgbe_ifmedia_upd, mvgbe_ifmedia_sts); 741 1.2.4.2 uebayasi mii_attach(self, &sc->sc_mii, 0xffffffff, 742 1.2.4.2 uebayasi MII_PHY_ANY, MII_OFFSET_ANY, 0); 743 1.2.4.2 uebayasi if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 744 1.2.4.2 uebayasi aprint_error_dev(self, "no PHY found!\n"); 745 1.2.4.2 uebayasi ifmedia_add(&sc->sc_mii.mii_media, 746 1.2.4.2 uebayasi IFM_ETHER|IFM_MANUAL, 0, NULL); 747 1.2.4.2 uebayasi ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_MANUAL); 748 1.2.4.2 uebayasi } else 749 1.2.4.2 uebayasi ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 750 1.2.4.2 uebayasi 751 1.2.4.2 uebayasi /* 752 1.2.4.2 uebayasi * Call MI attach routines. 753 1.2.4.2 uebayasi */ 754 1.2.4.2 uebayasi if_attach(ifp); 755 1.2.4.2 uebayasi 756 1.2.4.2 uebayasi ether_ifattach(ifp, sc->sc_enaddr); 757 1.2.4.2 uebayasi 758 1.2.4.2 uebayasi #if NRND > 0 759 1.2.4.2 uebayasi rnd_attach_source(&sc->sc_rnd_source, device_xname(sc->sc_dev), 760 1.2.4.2 uebayasi RND_TYPE_NET, 0); 761 1.2.4.2 uebayasi #endif 762 1.2.4.2 uebayasi 763 1.2.4.2 uebayasi return; 764 1.2.4.2 uebayasi 765 1.2.4.2 uebayasi fail4: 766 1.2.4.2 uebayasi while ((entry = SIMPLEQ_FIRST(&sc->sc_txmap_head)) != NULL) { 767 1.2.4.2 uebayasi SIMPLEQ_REMOVE_HEAD(&sc->sc_txmap_head, link); 768 1.2.4.2 uebayasi bus_dmamap_destroy(sc->sc_dmat, entry->dmamap); 769 1.2.4.2 uebayasi } 770 1.2.4.2 uebayasi bus_dmamap_unload(sc->sc_dmat, sc->sc_ring_map); 771 1.2.4.2 uebayasi fail3: 772 1.2.4.2 uebayasi bus_dmamap_destroy(sc->sc_dmat, sc->sc_ring_map); 773 1.2.4.2 uebayasi fail2: 774 1.2.4.2 uebayasi bus_dmamem_unmap(sc->sc_dmat, kva, sizeof(struct mvgbe_ring_data)); 775 1.2.4.2 uebayasi fail1: 776 1.2.4.2 uebayasi bus_dmamem_free(sc->sc_dmat, &seg, rseg); 777 1.2.4.2 uebayasi return; 778 1.2.4.2 uebayasi } 779 1.2.4.2 uebayasi 780 1.2.4.2 uebayasi 781 1.2.4.2 uebayasi static int 782 1.2.4.2 uebayasi mvgbe_intr(void *arg) 783 1.2.4.2 uebayasi { 784 1.2.4.2 uebayasi struct mvgbe_softc *sc = arg; 785 1.2.4.2 uebayasi struct ifnet *ifp = &sc->sc_ethercom.ec_if; 786 1.2.4.2 uebayasi uint32_t ic, ice, datum = 0; 787 1.2.4.2 uebayasi int claimed = 0; 788 1.2.4.2 uebayasi 789 1.2.4.2 uebayasi for (;;) { 790 1.2.4.2 uebayasi ice = MVGBE_READ(sc, MVGBE_ICE); 791 1.2.4.2 uebayasi ic = MVGBE_READ(sc, MVGBE_IC); 792 1.2.4.2 uebayasi 793 1.2.4.2 uebayasi DPRINTFN(3, ("mvgbe_intr: ic=%#x, ice=%#x\n", ic, ice)); 794 1.2.4.2 uebayasi if (ic == 0 && ice == 0) 795 1.2.4.2 uebayasi break; 796 1.2.4.2 uebayasi 797 1.2.4.2 uebayasi datum = datum ^ ic ^ ice; 798 1.2.4.2 uebayasi 799 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_IC, ~ic); 800 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_ICE, ~ice); 801 1.2.4.2 uebayasi 802 1.2.4.2 uebayasi claimed = 1; 803 1.2.4.2 uebayasi 804 1.2.4.2 uebayasi if (ice & MVGBE_ICE_LINKCHG) { 805 1.2.4.2 uebayasi if (MVGBE_READ(sc, MVGBE_PS) & MVGBE_PS_LINKUP) { 806 1.2.4.2 uebayasi /* Enable port RX and TX. */ 807 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_RQC, MVGBE_RQC_ENQ(0)); 808 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_TQC, MVGBE_TQC_ENQ); 809 1.2.4.2 uebayasi } else { 810 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_RQC, MVGBE_RQC_DISQ(0)); 811 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_TQC, MVGBE_TQC_DISQ); 812 1.2.4.2 uebayasi } 813 1.2.4.2 uebayasi } 814 1.2.4.2 uebayasi 815 1.2.4.2 uebayasi if (ic & (MVGBE_IC_RXBUF | MVGBE_IC_RXERROR)) 816 1.2.4.2 uebayasi mvgbe_rxeof(sc); 817 1.2.4.2 uebayasi 818 1.2.4.2 uebayasi if (ice & (MVGBE_ICE_TXBUF | MVGBE_ICE_TXERR)) 819 1.2.4.2 uebayasi mvgbe_txeof(sc); 820 1.2.4.2 uebayasi } 821 1.2.4.2 uebayasi 822 1.2.4.2 uebayasi if (!IFQ_IS_EMPTY(&ifp->if_snd)) 823 1.2.4.2 uebayasi mvgbe_start(ifp); 824 1.2.4.2 uebayasi 825 1.2.4.2 uebayasi #if NRND > 0 826 1.2.4.2 uebayasi if (RND_ENABLED(&sc->sc_rnd_source)) 827 1.2.4.2 uebayasi rnd_add_uint32(&sc->sc_rnd_source, datum); 828 1.2.4.2 uebayasi #endif 829 1.2.4.2 uebayasi 830 1.2.4.2 uebayasi return claimed; 831 1.2.4.2 uebayasi } 832 1.2.4.2 uebayasi 833 1.2.4.2 uebayasi static void 834 1.2.4.2 uebayasi mvgbe_start(struct ifnet *ifp) 835 1.2.4.2 uebayasi { 836 1.2.4.2 uebayasi struct mvgbe_softc *sc = ifp->if_softc; 837 1.2.4.2 uebayasi struct mbuf *m_head = NULL; 838 1.2.4.2 uebayasi uint32_t idx = sc->sc_cdata.mvgbe_tx_prod; 839 1.2.4.2 uebayasi int pkts = 0; 840 1.2.4.2 uebayasi 841 1.2.4.2 uebayasi DPRINTFN(3, ("mvgbe_start (idx %d, tx_chain[idx] %p)\n", idx, 842 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_tx_chain[idx].mvgbe_mbuf)); 843 1.2.4.2 uebayasi 844 1.2.4.2 uebayasi if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 845 1.2.4.2 uebayasi return; 846 1.2.4.2 uebayasi /* If Link is DOWN, can't start TX */ 847 1.2.4.2 uebayasi if (!(MVGBE_READ(sc, MVGBE_PS) & MVGBE_PS_LINKUP)) 848 1.2.4.2 uebayasi return; 849 1.2.4.2 uebayasi 850 1.2.4.2 uebayasi while (sc->sc_cdata.mvgbe_tx_chain[idx].mvgbe_mbuf == NULL) { 851 1.2.4.2 uebayasi IFQ_POLL(&ifp->if_snd, m_head); 852 1.2.4.2 uebayasi if (m_head == NULL) 853 1.2.4.2 uebayasi break; 854 1.2.4.2 uebayasi 855 1.2.4.2 uebayasi /* 856 1.2.4.2 uebayasi * Pack the data into the transmit ring. If we 857 1.2.4.2 uebayasi * don't have room, set the OACTIVE flag and wait 858 1.2.4.2 uebayasi * for the NIC to drain the ring. 859 1.2.4.2 uebayasi */ 860 1.2.4.2 uebayasi if (mvgbe_encap(sc, m_head, &idx)) { 861 1.2.4.2 uebayasi ifp->if_flags |= IFF_OACTIVE; 862 1.2.4.2 uebayasi break; 863 1.2.4.2 uebayasi } 864 1.2.4.2 uebayasi 865 1.2.4.2 uebayasi /* now we are committed to transmit the packet */ 866 1.2.4.2 uebayasi IFQ_DEQUEUE(&ifp->if_snd, m_head); 867 1.2.4.2 uebayasi pkts++; 868 1.2.4.2 uebayasi 869 1.2.4.2 uebayasi /* 870 1.2.4.2 uebayasi * If there's a BPF listener, bounce a copy of this frame 871 1.2.4.2 uebayasi * to him. 872 1.2.4.2 uebayasi */ 873 1.2.4.2 uebayasi if (ifp->if_bpf) 874 1.2.4.2 uebayasi bpf_ops->bpf_mtap(ifp->if_bpf, m_head); 875 1.2.4.2 uebayasi } 876 1.2.4.2 uebayasi if (pkts == 0) 877 1.2.4.2 uebayasi return; 878 1.2.4.2 uebayasi 879 1.2.4.2 uebayasi /* Transmit at Queue 0 */ 880 1.2.4.2 uebayasi if (idx != sc->sc_cdata.mvgbe_tx_prod) { 881 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_tx_prod = idx; 882 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_TQC, MVGBE_TQC_ENQ); 883 1.2.4.2 uebayasi 884 1.2.4.2 uebayasi /* 885 1.2.4.2 uebayasi * Set a timeout in case the chip goes out to lunch. 886 1.2.4.2 uebayasi */ 887 1.2.4.2 uebayasi ifp->if_timer = 5; 888 1.2.4.2 uebayasi } 889 1.2.4.2 uebayasi } 890 1.2.4.2 uebayasi 891 1.2.4.2 uebayasi static int 892 1.2.4.2 uebayasi mvgbe_ioctl(struct ifnet *ifp, u_long command, void *data) 893 1.2.4.2 uebayasi { 894 1.2.4.2 uebayasi struct mvgbe_softc *sc = ifp->if_softc; 895 1.2.4.2 uebayasi struct ifreq *ifr = data; 896 1.2.4.2 uebayasi struct mii_data *mii; 897 1.2.4.2 uebayasi int s, error = 0; 898 1.2.4.2 uebayasi 899 1.2.4.2 uebayasi s = splnet(); 900 1.2.4.2 uebayasi 901 1.2.4.2 uebayasi switch (command) { 902 1.2.4.2 uebayasi case SIOCSIFFLAGS: 903 1.2.4.2 uebayasi DPRINTFN(2, ("mvgbe_ioctl IFFLAGS\n")); 904 1.2.4.2 uebayasi if (ifp->if_flags & IFF_UP) 905 1.2.4.2 uebayasi mvgbe_init(ifp); 906 1.2.4.2 uebayasi else 907 1.2.4.2 uebayasi if (ifp->if_flags & IFF_RUNNING) 908 1.2.4.2 uebayasi mvgbe_stop(ifp, 0); 909 1.2.4.2 uebayasi sc->sc_if_flags = ifp->if_flags; 910 1.2.4.2 uebayasi error = 0; 911 1.2.4.2 uebayasi break; 912 1.2.4.2 uebayasi 913 1.2.4.2 uebayasi case SIOCGIFMEDIA: 914 1.2.4.2 uebayasi case SIOCSIFMEDIA: 915 1.2.4.2 uebayasi DPRINTFN(2, ("mvgbe_ioctl MEDIA\n")); 916 1.2.4.2 uebayasi mii = &sc->sc_mii; 917 1.2.4.2 uebayasi error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command); 918 1.2.4.2 uebayasi break; 919 1.2.4.2 uebayasi 920 1.2.4.2 uebayasi default: 921 1.2.4.2 uebayasi DPRINTFN(2, ("mvgbe_ioctl ETHER\n")); 922 1.2.4.2 uebayasi error = ether_ioctl(ifp, command, data); 923 1.2.4.2 uebayasi if (error == ENETRESET) { 924 1.2.4.2 uebayasi if (ifp->if_flags & IFF_RUNNING) { 925 1.2.4.2 uebayasi mvgbe_setmulti(sc); 926 1.2.4.2 uebayasi DPRINTFN(2, 927 1.2.4.2 uebayasi ("mvgbe_ioctl setmulti called\n")); 928 1.2.4.2 uebayasi } 929 1.2.4.2 uebayasi error = 0; 930 1.2.4.2 uebayasi } 931 1.2.4.2 uebayasi break; 932 1.2.4.2 uebayasi } 933 1.2.4.2 uebayasi 934 1.2.4.2 uebayasi splx(s); 935 1.2.4.2 uebayasi 936 1.2.4.2 uebayasi return error; 937 1.2.4.2 uebayasi } 938 1.2.4.2 uebayasi 939 1.2.4.2 uebayasi static int 940 1.2.4.2 uebayasi mvgbe_init(struct ifnet *ifp) 941 1.2.4.2 uebayasi { 942 1.2.4.2 uebayasi struct mvgbe_softc *sc = ifp->if_softc; 943 1.2.4.3 uebayasi struct mvgbec_softc *csc = device_private(device_parent(sc->sc_dev)); 944 1.2.4.2 uebayasi struct mii_data *mii = &sc->sc_mii; 945 1.2.4.3 uebayasi uint32_t reg; 946 1.2.4.2 uebayasi int i, s; 947 1.2.4.2 uebayasi 948 1.2.4.2 uebayasi DPRINTFN(2, ("mvgbe_init\n")); 949 1.2.4.2 uebayasi 950 1.2.4.2 uebayasi s = splnet(); 951 1.2.4.2 uebayasi 952 1.2.4.2 uebayasi if (ifp->if_flags & IFF_RUNNING) { 953 1.2.4.2 uebayasi splx(s); 954 1.2.4.2 uebayasi return 0; 955 1.2.4.2 uebayasi } 956 1.2.4.2 uebayasi 957 1.2.4.2 uebayasi /* Cancel pending I/O and free all RX/TX buffers. */ 958 1.2.4.2 uebayasi mvgbe_stop(ifp, 0); 959 1.2.4.2 uebayasi 960 1.2.4.2 uebayasi /* clear all ethernet port interrupts */ 961 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_IC, 0); 962 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_ICE, 0); 963 1.2.4.2 uebayasi 964 1.2.4.2 uebayasi /* Init TX/RX descriptors */ 965 1.2.4.2 uebayasi if (mvgbe_init_tx_ring(sc) == ENOBUFS) { 966 1.2.4.2 uebayasi aprint_error_ifnet(ifp, 967 1.2.4.2 uebayasi "initialization failed: no memory for tx buffers\n"); 968 1.2.4.2 uebayasi splx(s); 969 1.2.4.2 uebayasi return ENOBUFS; 970 1.2.4.2 uebayasi } 971 1.2.4.2 uebayasi if (mvgbe_init_rx_ring(sc) == ENOBUFS) { 972 1.2.4.2 uebayasi aprint_error_ifnet(ifp, 973 1.2.4.2 uebayasi "initialization failed: no memory for rx buffers\n"); 974 1.2.4.2 uebayasi splx(s); 975 1.2.4.2 uebayasi return ENOBUFS; 976 1.2.4.2 uebayasi } 977 1.2.4.2 uebayasi 978 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_PSC, 979 1.2.4.2 uebayasi MVGBE_PSC_ANFC | /* Enable Auto-Neg Flow Ctrl */ 980 1.2.4.2 uebayasi MVGBE_PSC_RESERVED | /* Must be set to 1 */ 981 1.2.4.2 uebayasi MVGBE_PSC_FLFAIL | /* Do NOT Force Link Fail */ 982 1.2.4.2 uebayasi MVGBE_PSC_MRU(MVGBE_PSC_MRU_9700) | /* Always 9700 OK */ 983 1.2.4.2 uebayasi MVGBE_PSC_SETFULLDX); /* Set_FullDx */ 984 1.2.4.3 uebayasi /* XXXX: mvgbe(4) always use RGMII. */ 985 1.2.4.3 uebayasi MVGBE_WRITE(sc, MVGBE_PSC1, 986 1.2.4.3 uebayasi MVGBE_READ(sc, MVGBE_PSC1) | MVGBE_PSC1_RGMIIEN); 987 1.2.4.3 uebayasi /* XXXX: Also always Weighted Round-Robin Priority Mode */ 988 1.2.4.3 uebayasi MVGBE_WRITE(sc, MVGBE_TQFPC, MVGBE_TQFPC_EN(0)); 989 1.2.4.2 uebayasi 990 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_CRDP(0), MVGBE_RX_RING_ADDR(sc, 0)); 991 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_TCQDP, MVGBE_TX_RING_ADDR(sc, 0)); 992 1.2.4.2 uebayasi 993 1.2.4.3 uebayasi if (csc->sc_fix_tqtb) { 994 1.2.4.2 uebayasi /* 995 1.2.4.3 uebayasi * Queue 0 (offset 0x72700) must be programmed to 0x3fffffff. 996 1.2.4.3 uebayasi * And offset 0x72704 must be programmed to 0x03ffffff. 997 1.2.4.3 uebayasi * Queue 1 through 7 must be programmed to 0x0. 998 1.2.4.2 uebayasi */ 999 1.2.4.3 uebayasi MVGBE_WRITE(sc, MVGBE_TQTBCOUNT(0), 0x3fffffff); 1000 1.2.4.3 uebayasi MVGBE_WRITE(sc, MVGBE_TQTBCONFIG(0), 0x03ffffff); 1001 1.2.4.3 uebayasi for (i = 1; i < 8; i++) { 1002 1.2.4.3 uebayasi MVGBE_WRITE(sc, MVGBE_TQTBCOUNT(i), 0x0); 1003 1.2.4.3 uebayasi MVGBE_WRITE(sc, MVGBE_TQTBCONFIG(i), 0x0); 1004 1.2.4.3 uebayasi } 1005 1.2.4.3 uebayasi } else 1006 1.2.4.3 uebayasi for (i = 1; i < 8; i++) { 1007 1.2.4.3 uebayasi MVGBE_WRITE(sc, MVGBE_TQTBCOUNT(i), 0x3fffffff); 1008 1.2.4.3 uebayasi MVGBE_WRITE(sc, MVGBE_TQTBCONFIG(i), 0xffff7fff); 1009 1.2.4.3 uebayasi MVGBE_WRITE(sc, MVGBE_TQAC(i), 0xfc0000ff); 1010 1.2.4.3 uebayasi } 1011 1.2.4.2 uebayasi 1012 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_PXC, MVGBE_PXC_RXCS); 1013 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_PXCX, 0); 1014 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_SDC, 1015 1.2.4.2 uebayasi MVGBE_SDC_RXBSZ_16_64BITWORDS | 1016 1.2.4.2 uebayasi #if BYTE_ORDER == LITTLE_ENDIAN 1017 1.2.4.2 uebayasi MVGBE_SDC_BLMR | /* Big/Litlle Endian Receive Mode: No swap */ 1018 1.2.4.2 uebayasi MVGBE_SDC_BLMT | /* Big/Litlle Endian Transmit Mode: No swap */ 1019 1.2.4.2 uebayasi #endif 1020 1.2.4.2 uebayasi MVGBE_SDC_TXBSZ_16_64BITWORDS); 1021 1.2.4.2 uebayasi 1022 1.2.4.2 uebayasi mii_mediachg(mii); 1023 1.2.4.2 uebayasi 1024 1.2.4.2 uebayasi /* Enable port */ 1025 1.2.4.2 uebayasi reg = MVGBE_READ(sc, MVGBE_PSC); 1026 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_PSC, reg | MVGBE_PSC_PORTEN); 1027 1.2.4.2 uebayasi 1028 1.2.4.2 uebayasi /* If Link is UP, Start RX and TX traffic */ 1029 1.2.4.2 uebayasi if (MVGBE_READ(sc, MVGBE_PS) & MVGBE_PS_LINKUP) { 1030 1.2.4.2 uebayasi /* Enable port RX/TX. */ 1031 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_RQC, MVGBE_RQC_ENQ(0)); 1032 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_TQC, MVGBE_TQC_ENQ); 1033 1.2.4.2 uebayasi } 1034 1.2.4.2 uebayasi 1035 1.2.4.2 uebayasi /* Enable interrupt masks */ 1036 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_PIM, 1037 1.2.4.2 uebayasi MVGBE_IC_RXBUF | 1038 1.2.4.2 uebayasi MVGBE_IC_EXTEND | 1039 1.2.4.2 uebayasi MVGBE_IC_RXBUFQ_MASK | 1040 1.2.4.2 uebayasi MVGBE_IC_RXERROR | 1041 1.2.4.2 uebayasi MVGBE_IC_RXERRQ_MASK); 1042 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_PEIM, 1043 1.2.4.2 uebayasi MVGBE_ICE_TXBUF | 1044 1.2.4.2 uebayasi MVGBE_ICE_TXERR | 1045 1.2.4.2 uebayasi MVGBE_ICE_LINKCHG); 1046 1.2.4.2 uebayasi 1047 1.2.4.2 uebayasi ifp->if_flags |= IFF_RUNNING; 1048 1.2.4.2 uebayasi ifp->if_flags &= ~IFF_OACTIVE; 1049 1.2.4.2 uebayasi 1050 1.2.4.2 uebayasi splx(s); 1051 1.2.4.2 uebayasi 1052 1.2.4.2 uebayasi return 0; 1053 1.2.4.2 uebayasi } 1054 1.2.4.2 uebayasi 1055 1.2.4.2 uebayasi /* ARGSUSED */ 1056 1.2.4.2 uebayasi static void 1057 1.2.4.2 uebayasi mvgbe_stop(struct ifnet *ifp, int disable) 1058 1.2.4.2 uebayasi { 1059 1.2.4.2 uebayasi struct mvgbe_softc *sc = ifp->if_softc; 1060 1.2.4.2 uebayasi struct mvgbe_chain_data *cdata = &sc->sc_cdata; 1061 1.2.4.2 uebayasi uint32_t reg; 1062 1.2.4.2 uebayasi int i, cnt; 1063 1.2.4.2 uebayasi 1064 1.2.4.2 uebayasi DPRINTFN(2, ("mvgbe_stop\n")); 1065 1.2.4.2 uebayasi 1066 1.2.4.2 uebayasi /* Stop Rx port activity. Check port Rx activity. */ 1067 1.2.4.2 uebayasi reg = MVGBE_READ(sc, MVGBE_RQC); 1068 1.2.4.2 uebayasi if (reg & MVGBE_RQC_ENQ_MASK) 1069 1.2.4.2 uebayasi /* Issue stop command for active channels only */ 1070 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_RQC, MVGBE_RQC_DISQ_DISABLE(reg)); 1071 1.2.4.2 uebayasi 1072 1.2.4.2 uebayasi /* Stop Tx port activity. Check port Tx activity. */ 1073 1.2.4.2 uebayasi if (MVGBE_READ(sc, MVGBE_TQC) & MVGBE_TQC_ENQ) 1074 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_TQC, MVGBE_TQC_DISQ); 1075 1.2.4.2 uebayasi 1076 1.2.4.2 uebayasi /* Force link down */ 1077 1.2.4.2 uebayasi reg = MVGBE_READ(sc, MVGBE_PSC); 1078 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_PSC, reg & ~MVGBE_PSC_FLFAIL); 1079 1.2.4.2 uebayasi 1080 1.2.4.2 uebayasi #define RX_DISABLE_TIMEOUT 0x1000000 1081 1.2.4.2 uebayasi #define TX_FIFO_EMPTY_TIMEOUT 0x1000000 1082 1.2.4.2 uebayasi /* Wait for all Rx activity to terminate. */ 1083 1.2.4.2 uebayasi cnt = 0; 1084 1.2.4.2 uebayasi do { 1085 1.2.4.2 uebayasi if (cnt >= RX_DISABLE_TIMEOUT) { 1086 1.2.4.2 uebayasi aprint_error_ifnet(ifp, 1087 1.2.4.2 uebayasi "timeout for RX stopped. rqc 0x%x\n", reg); 1088 1.2.4.2 uebayasi break; 1089 1.2.4.2 uebayasi } 1090 1.2.4.2 uebayasi cnt++; 1091 1.2.4.2 uebayasi 1092 1.2.4.2 uebayasi /* 1093 1.2.4.2 uebayasi * Check Receive Queue Command register that all Rx queues 1094 1.2.4.2 uebayasi * are stopped 1095 1.2.4.2 uebayasi */ 1096 1.2.4.2 uebayasi reg = MVGBE_READ(sc, MVGBE_RQC); 1097 1.2.4.2 uebayasi } while (reg & 0xff); 1098 1.2.4.2 uebayasi 1099 1.2.4.2 uebayasi /* Double check to verify that TX FIFO is empty */ 1100 1.2.4.2 uebayasi cnt = 0; 1101 1.2.4.2 uebayasi while (1) { 1102 1.2.4.2 uebayasi do { 1103 1.2.4.2 uebayasi if (cnt >= TX_FIFO_EMPTY_TIMEOUT) { 1104 1.2.4.2 uebayasi aprint_error_ifnet(ifp, 1105 1.2.4.2 uebayasi "timeout for TX FIFO empty. status 0x%x\n", 1106 1.2.4.2 uebayasi reg); 1107 1.2.4.2 uebayasi break; 1108 1.2.4.2 uebayasi } 1109 1.2.4.2 uebayasi cnt++; 1110 1.2.4.2 uebayasi 1111 1.2.4.2 uebayasi reg = MVGBE_READ(sc, MVGBE_PS); 1112 1.2.4.2 uebayasi } while 1113 1.2.4.2 uebayasi (!(reg & MVGBE_PS_TXFIFOEMP) || reg & MVGBE_PS_TXINPROG); 1114 1.2.4.2 uebayasi 1115 1.2.4.2 uebayasi if (cnt >= TX_FIFO_EMPTY_TIMEOUT) 1116 1.2.4.2 uebayasi break; 1117 1.2.4.2 uebayasi 1118 1.2.4.2 uebayasi /* Double check */ 1119 1.2.4.2 uebayasi reg = MVGBE_READ(sc, MVGBE_PS); 1120 1.2.4.2 uebayasi if (reg & MVGBE_PS_TXFIFOEMP && !(reg & MVGBE_PS_TXINPROG)) 1121 1.2.4.2 uebayasi break; 1122 1.2.4.2 uebayasi else 1123 1.2.4.2 uebayasi aprint_error_ifnet(ifp, 1124 1.2.4.2 uebayasi "TX FIFO empty double check failed." 1125 1.2.4.2 uebayasi " %d loops, status 0x%x\n", cnt, reg); 1126 1.2.4.2 uebayasi } 1127 1.2.4.2 uebayasi 1128 1.2.4.2 uebayasi /* Reset the Enable bit in the Port Serial Control Register */ 1129 1.2.4.2 uebayasi reg = MVGBE_READ(sc, MVGBE_PSC); 1130 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_PSC, reg & ~MVGBE_PSC_PORTEN); 1131 1.2.4.2 uebayasi 1132 1.2.4.2 uebayasi /* Disable interrupts */ 1133 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_PIM, 0); 1134 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_PEIM, 0); 1135 1.2.4.2 uebayasi 1136 1.2.4.2 uebayasi /* Free RX and TX mbufs still in the queues. */ 1137 1.2.4.2 uebayasi for (i = 0; i < MVGBE_RX_RING_CNT; i++) { 1138 1.2.4.2 uebayasi if (cdata->mvgbe_rx_chain[i].mvgbe_mbuf != NULL) { 1139 1.2.4.2 uebayasi m_freem(cdata->mvgbe_rx_chain[i].mvgbe_mbuf); 1140 1.2.4.2 uebayasi cdata->mvgbe_rx_chain[i].mvgbe_mbuf = NULL; 1141 1.2.4.2 uebayasi } 1142 1.2.4.2 uebayasi } 1143 1.2.4.2 uebayasi for (i = 0; i < MVGBE_TX_RING_CNT; i++) { 1144 1.2.4.2 uebayasi if (cdata->mvgbe_tx_chain[i].mvgbe_mbuf != NULL) { 1145 1.2.4.2 uebayasi m_freem(cdata->mvgbe_tx_chain[i].mvgbe_mbuf); 1146 1.2.4.2 uebayasi cdata->mvgbe_tx_chain[i].mvgbe_mbuf = NULL; 1147 1.2.4.2 uebayasi } 1148 1.2.4.2 uebayasi } 1149 1.2.4.2 uebayasi 1150 1.2.4.2 uebayasi ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1151 1.2.4.2 uebayasi } 1152 1.2.4.2 uebayasi 1153 1.2.4.2 uebayasi static void 1154 1.2.4.2 uebayasi mvgbe_watchdog(struct ifnet *ifp) 1155 1.2.4.2 uebayasi { 1156 1.2.4.2 uebayasi struct mvgbe_softc *sc = ifp->if_softc; 1157 1.2.4.2 uebayasi 1158 1.2.4.2 uebayasi /* 1159 1.2.4.2 uebayasi * Reclaim first as there is a possibility of losing Tx completion 1160 1.2.4.2 uebayasi * interrupts. 1161 1.2.4.2 uebayasi */ 1162 1.2.4.2 uebayasi mvgbe_txeof(sc); 1163 1.2.4.2 uebayasi if (sc->sc_cdata.mvgbe_tx_cnt != 0) { 1164 1.2.4.2 uebayasi aprint_error_ifnet(ifp, "watchdog timeout\n"); 1165 1.2.4.2 uebayasi 1166 1.2.4.2 uebayasi ifp->if_oerrors++; 1167 1.2.4.2 uebayasi 1168 1.2.4.2 uebayasi mvgbe_init(ifp); 1169 1.2.4.2 uebayasi } 1170 1.2.4.2 uebayasi } 1171 1.2.4.2 uebayasi 1172 1.2.4.2 uebayasi 1173 1.2.4.2 uebayasi /* 1174 1.2.4.2 uebayasi * Set media options. 1175 1.2.4.2 uebayasi */ 1176 1.2.4.2 uebayasi static int 1177 1.2.4.2 uebayasi mvgbe_ifmedia_upd(struct ifnet *ifp) 1178 1.2.4.2 uebayasi { 1179 1.2.4.2 uebayasi struct mvgbe_softc *sc = ifp->if_softc; 1180 1.2.4.2 uebayasi 1181 1.2.4.2 uebayasi mii_mediachg(&sc->sc_mii); 1182 1.2.4.2 uebayasi return 0; 1183 1.2.4.2 uebayasi } 1184 1.2.4.2 uebayasi 1185 1.2.4.2 uebayasi /* 1186 1.2.4.2 uebayasi * Report current media status. 1187 1.2.4.2 uebayasi */ 1188 1.2.4.2 uebayasi static void 1189 1.2.4.2 uebayasi mvgbe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1190 1.2.4.2 uebayasi { 1191 1.2.4.2 uebayasi struct mvgbe_softc *sc = ifp->if_softc; 1192 1.2.4.2 uebayasi 1193 1.2.4.2 uebayasi mii_pollstat(&sc->sc_mii); 1194 1.2.4.2 uebayasi ifmr->ifm_active = sc->sc_mii.mii_media_active; 1195 1.2.4.2 uebayasi ifmr->ifm_status = sc->sc_mii.mii_media_status; 1196 1.2.4.2 uebayasi } 1197 1.2.4.2 uebayasi 1198 1.2.4.2 uebayasi 1199 1.2.4.2 uebayasi static int 1200 1.2.4.2 uebayasi mvgbe_init_rx_ring(struct mvgbe_softc *sc) 1201 1.2.4.2 uebayasi { 1202 1.2.4.2 uebayasi struct mvgbe_chain_data *cd = &sc->sc_cdata; 1203 1.2.4.2 uebayasi struct mvgbe_ring_data *rd = sc->sc_rdata; 1204 1.2.4.2 uebayasi int i; 1205 1.2.4.2 uebayasi 1206 1.2.4.2 uebayasi bzero((char *)rd->mvgbe_rx_ring, 1207 1.2.4.2 uebayasi sizeof(struct mvgbe_rx_desc) * MVGBE_RX_RING_CNT); 1208 1.2.4.2 uebayasi 1209 1.2.4.2 uebayasi for (i = 0; i < MVGBE_RX_RING_CNT; i++) { 1210 1.2.4.2 uebayasi cd->mvgbe_rx_chain[i].mvgbe_desc = 1211 1.2.4.2 uebayasi &rd->mvgbe_rx_ring[i]; 1212 1.2.4.2 uebayasi if (i == MVGBE_RX_RING_CNT - 1) { 1213 1.2.4.2 uebayasi cd->mvgbe_rx_chain[i].mvgbe_next = 1214 1.2.4.2 uebayasi &cd->mvgbe_rx_chain[0]; 1215 1.2.4.2 uebayasi rd->mvgbe_rx_ring[i].nextdescptr = 1216 1.2.4.2 uebayasi MVGBE_RX_RING_ADDR(sc, 0); 1217 1.2.4.2 uebayasi } else { 1218 1.2.4.2 uebayasi cd->mvgbe_rx_chain[i].mvgbe_next = 1219 1.2.4.2 uebayasi &cd->mvgbe_rx_chain[i + 1]; 1220 1.2.4.2 uebayasi rd->mvgbe_rx_ring[i].nextdescptr = 1221 1.2.4.2 uebayasi MVGBE_RX_RING_ADDR(sc, i + 1); 1222 1.2.4.2 uebayasi } 1223 1.2.4.2 uebayasi } 1224 1.2.4.2 uebayasi 1225 1.2.4.2 uebayasi for (i = 0; i < MVGBE_RX_RING_CNT; i++) { 1226 1.2.4.2 uebayasi if (mvgbe_newbuf(sc, i, NULL, 1227 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_rx_jumbo_map) == ENOBUFS) { 1228 1.2.4.2 uebayasi aprint_error_ifnet(&sc->sc_ethercom.ec_if, 1229 1.2.4.2 uebayasi "failed alloc of %dth mbuf\n", i); 1230 1.2.4.2 uebayasi return ENOBUFS; 1231 1.2.4.2 uebayasi } 1232 1.2.4.2 uebayasi } 1233 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_rx_prod = 0; 1234 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_rx_cons = 0; 1235 1.2.4.2 uebayasi 1236 1.2.4.2 uebayasi return 0; 1237 1.2.4.2 uebayasi } 1238 1.2.4.2 uebayasi 1239 1.2.4.2 uebayasi static int 1240 1.2.4.2 uebayasi mvgbe_init_tx_ring(struct mvgbe_softc *sc) 1241 1.2.4.2 uebayasi { 1242 1.2.4.2 uebayasi struct mvgbe_chain_data *cd = &sc->sc_cdata; 1243 1.2.4.2 uebayasi struct mvgbe_ring_data *rd = sc->sc_rdata; 1244 1.2.4.2 uebayasi int i; 1245 1.2.4.2 uebayasi 1246 1.2.4.2 uebayasi bzero((char *)sc->sc_rdata->mvgbe_tx_ring, 1247 1.2.4.2 uebayasi sizeof(struct mvgbe_tx_desc) * MVGBE_TX_RING_CNT); 1248 1.2.4.2 uebayasi 1249 1.2.4.2 uebayasi for (i = 0; i < MVGBE_TX_RING_CNT; i++) { 1250 1.2.4.2 uebayasi cd->mvgbe_tx_chain[i].mvgbe_desc = 1251 1.2.4.2 uebayasi &rd->mvgbe_tx_ring[i]; 1252 1.2.4.2 uebayasi if (i == MVGBE_TX_RING_CNT - 1) { 1253 1.2.4.2 uebayasi cd->mvgbe_tx_chain[i].mvgbe_next = 1254 1.2.4.2 uebayasi &cd->mvgbe_tx_chain[0]; 1255 1.2.4.2 uebayasi rd->mvgbe_tx_ring[i].nextdescptr = 1256 1.2.4.2 uebayasi MVGBE_TX_RING_ADDR(sc, 0); 1257 1.2.4.2 uebayasi } else { 1258 1.2.4.2 uebayasi cd->mvgbe_tx_chain[i].mvgbe_next = 1259 1.2.4.2 uebayasi &cd->mvgbe_tx_chain[i + 1]; 1260 1.2.4.2 uebayasi rd->mvgbe_tx_ring[i].nextdescptr = 1261 1.2.4.2 uebayasi MVGBE_TX_RING_ADDR(sc, i + 1); 1262 1.2.4.2 uebayasi } 1263 1.2.4.2 uebayasi rd->mvgbe_tx_ring[i].cmdsts = MVGBE_BUFFER_OWNED_BY_HOST; 1264 1.2.4.2 uebayasi } 1265 1.2.4.2 uebayasi 1266 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_tx_prod = 0; 1267 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_tx_cons = 0; 1268 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_tx_cnt = 0; 1269 1.2.4.2 uebayasi 1270 1.2.4.2 uebayasi MVGBE_CDTXSYNC(sc, 0, MVGBE_TX_RING_CNT, 1271 1.2.4.2 uebayasi BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1272 1.2.4.2 uebayasi 1273 1.2.4.2 uebayasi return 0; 1274 1.2.4.2 uebayasi } 1275 1.2.4.2 uebayasi 1276 1.2.4.2 uebayasi static int 1277 1.2.4.2 uebayasi mvgbe_newbuf(struct mvgbe_softc *sc, int i, struct mbuf *m, 1278 1.2.4.2 uebayasi bus_dmamap_t dmamap) 1279 1.2.4.2 uebayasi { 1280 1.2.4.2 uebayasi struct mbuf *m_new = NULL; 1281 1.2.4.2 uebayasi struct mvgbe_chain *c; 1282 1.2.4.2 uebayasi struct mvgbe_rx_desc *r; 1283 1.2.4.2 uebayasi int align; 1284 1.2.4.2 uebayasi 1285 1.2.4.2 uebayasi if (m == NULL) { 1286 1.2.4.2 uebayasi void *buf = NULL; 1287 1.2.4.2 uebayasi 1288 1.2.4.2 uebayasi MGETHDR(m_new, M_DONTWAIT, MT_DATA); 1289 1.2.4.2 uebayasi if (m_new == NULL) { 1290 1.2.4.2 uebayasi aprint_error_ifnet(&sc->sc_ethercom.ec_if, 1291 1.2.4.2 uebayasi "no memory for rx list -- packet dropped!\n"); 1292 1.2.4.2 uebayasi return ENOBUFS; 1293 1.2.4.2 uebayasi } 1294 1.2.4.2 uebayasi 1295 1.2.4.2 uebayasi /* Allocate the jumbo buffer */ 1296 1.2.4.2 uebayasi buf = mvgbe_jalloc(sc); 1297 1.2.4.2 uebayasi if (buf == NULL) { 1298 1.2.4.2 uebayasi m_freem(m_new); 1299 1.2.4.2 uebayasi DPRINTFN(1, ("%s jumbo allocation failed -- packet " 1300 1.2.4.2 uebayasi "dropped!\n", sc->sc_ethercom.ec_if.if_xname)); 1301 1.2.4.2 uebayasi return ENOBUFS; 1302 1.2.4.2 uebayasi } 1303 1.2.4.2 uebayasi 1304 1.2.4.2 uebayasi /* Attach the buffer to the mbuf */ 1305 1.2.4.2 uebayasi m_new->m_len = m_new->m_pkthdr.len = MVGBE_JLEN; 1306 1.2.4.2 uebayasi MEXTADD(m_new, buf, MVGBE_JLEN, 0, mvgbe_jfree, sc); 1307 1.2.4.2 uebayasi } else { 1308 1.2.4.2 uebayasi /* 1309 1.2.4.2 uebayasi * We're re-using a previously allocated mbuf; 1310 1.2.4.2 uebayasi * be sure to re-init pointers and lengths to 1311 1.2.4.2 uebayasi * default values. 1312 1.2.4.2 uebayasi */ 1313 1.2.4.2 uebayasi m_new = m; 1314 1.2.4.2 uebayasi m_new->m_len = m_new->m_pkthdr.len = MVGBE_JLEN; 1315 1.2.4.2 uebayasi m_new->m_data = m_new->m_ext.ext_buf; 1316 1.2.4.2 uebayasi } 1317 1.2.4.2 uebayasi align = (u_long)m_new->m_data & MVGBE_BUF_MASK; 1318 1.2.4.2 uebayasi if (align != 0) 1319 1.2.4.2 uebayasi m_adj(m_new, MVGBE_BUF_ALIGN - align); 1320 1.2.4.2 uebayasi 1321 1.2.4.2 uebayasi c = &sc->sc_cdata.mvgbe_rx_chain[i]; 1322 1.2.4.2 uebayasi r = c->mvgbe_desc; 1323 1.2.4.2 uebayasi c->mvgbe_mbuf = m_new; 1324 1.2.4.2 uebayasi r->bufptr = dmamap->dm_segs[0].ds_addr + 1325 1.2.4.2 uebayasi (((vaddr_t)m_new->m_data - (vaddr_t)sc->sc_cdata.mvgbe_jumbo_buf)); 1326 1.2.4.2 uebayasi r->bufsize = MVGBE_JLEN & ~MVGBE_BUF_MASK; 1327 1.2.4.2 uebayasi r->cmdsts = MVGBE_BUFFER_OWNED_BY_DMA | MVGBE_RX_ENABLE_INTERRUPT; 1328 1.2.4.2 uebayasi 1329 1.2.4.3 uebayasi MVGBE_CDRXSYNC(sc, i, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1330 1.2.4.2 uebayasi 1331 1.2.4.2 uebayasi return 0; 1332 1.2.4.2 uebayasi } 1333 1.2.4.2 uebayasi 1334 1.2.4.2 uebayasi /* 1335 1.2.4.2 uebayasi * Memory management for jumbo frames. 1336 1.2.4.2 uebayasi */ 1337 1.2.4.2 uebayasi 1338 1.2.4.2 uebayasi static int 1339 1.2.4.2 uebayasi mvgbe_alloc_jumbo_mem(struct mvgbe_softc *sc) 1340 1.2.4.2 uebayasi { 1341 1.2.4.2 uebayasi char *ptr, *kva; 1342 1.2.4.2 uebayasi bus_dma_segment_t seg; 1343 1.2.4.2 uebayasi int i, rseg, state, error; 1344 1.2.4.2 uebayasi struct mvgbe_jpool_entry *entry; 1345 1.2.4.2 uebayasi 1346 1.2.4.2 uebayasi state = error = 0; 1347 1.2.4.2 uebayasi 1348 1.2.4.2 uebayasi /* Grab a big chunk o' storage. */ 1349 1.2.4.2 uebayasi if (bus_dmamem_alloc(sc->sc_dmat, MVGBE_JMEM, PAGE_SIZE, 0, 1350 1.2.4.2 uebayasi &seg, 1, &rseg, BUS_DMA_NOWAIT)) { 1351 1.2.4.2 uebayasi aprint_error_dev(sc->sc_dev, "can't alloc rx buffers\n"); 1352 1.2.4.2 uebayasi return ENOBUFS; 1353 1.2.4.2 uebayasi } 1354 1.2.4.2 uebayasi 1355 1.2.4.2 uebayasi state = 1; 1356 1.2.4.2 uebayasi if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, MVGBE_JMEM, 1357 1.2.4.2 uebayasi (void **)&kva, BUS_DMA_NOWAIT)) { 1358 1.2.4.2 uebayasi aprint_error_dev(sc->sc_dev, 1359 1.2.4.2 uebayasi "can't map dma buffers (%d bytes)\n", MVGBE_JMEM); 1360 1.2.4.2 uebayasi error = ENOBUFS; 1361 1.2.4.2 uebayasi goto out; 1362 1.2.4.2 uebayasi } 1363 1.2.4.2 uebayasi 1364 1.2.4.2 uebayasi state = 2; 1365 1.2.4.2 uebayasi if (bus_dmamap_create(sc->sc_dmat, MVGBE_JMEM, 1, MVGBE_JMEM, 0, 1366 1.2.4.2 uebayasi BUS_DMA_NOWAIT, &sc->sc_cdata.mvgbe_rx_jumbo_map)) { 1367 1.2.4.2 uebayasi aprint_error_dev(sc->sc_dev, "can't create dma map\n"); 1368 1.2.4.2 uebayasi error = ENOBUFS; 1369 1.2.4.2 uebayasi goto out; 1370 1.2.4.2 uebayasi } 1371 1.2.4.2 uebayasi 1372 1.2.4.2 uebayasi state = 3; 1373 1.2.4.2 uebayasi if (bus_dmamap_load(sc->sc_dmat, sc->sc_cdata.mvgbe_rx_jumbo_map, 1374 1.2.4.2 uebayasi kva, MVGBE_JMEM, NULL, BUS_DMA_NOWAIT)) { 1375 1.2.4.2 uebayasi aprint_error_dev(sc->sc_dev, "can't load dma map\n"); 1376 1.2.4.2 uebayasi error = ENOBUFS; 1377 1.2.4.2 uebayasi goto out; 1378 1.2.4.2 uebayasi } 1379 1.2.4.2 uebayasi 1380 1.2.4.2 uebayasi state = 4; 1381 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_jumbo_buf = (void *)kva; 1382 1.2.4.2 uebayasi DPRINTFN(1,("mvgbe_jumbo_buf = 0x%p\n", sc->sc_cdata.mvgbe_jumbo_buf)); 1383 1.2.4.2 uebayasi 1384 1.2.4.2 uebayasi LIST_INIT(&sc->sc_jfree_listhead); 1385 1.2.4.2 uebayasi LIST_INIT(&sc->sc_jinuse_listhead); 1386 1.2.4.2 uebayasi 1387 1.2.4.2 uebayasi /* 1388 1.2.4.2 uebayasi * Now divide it up into 9K pieces and save the addresses 1389 1.2.4.2 uebayasi * in an array. 1390 1.2.4.2 uebayasi */ 1391 1.2.4.2 uebayasi ptr = sc->sc_cdata.mvgbe_jumbo_buf; 1392 1.2.4.2 uebayasi for (i = 0; i < MVGBE_JSLOTS; i++) { 1393 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_jslots[i] = ptr; 1394 1.2.4.2 uebayasi ptr += MVGBE_JLEN; 1395 1.2.4.2 uebayasi entry = kmem_alloc(sizeof(struct mvgbe_jpool_entry), KM_SLEEP); 1396 1.2.4.2 uebayasi if (entry == NULL) { 1397 1.2.4.2 uebayasi aprint_error_dev(sc->sc_dev, 1398 1.2.4.2 uebayasi "no memory for jumbo buffer queue!\n"); 1399 1.2.4.2 uebayasi error = ENOBUFS; 1400 1.2.4.2 uebayasi goto out; 1401 1.2.4.2 uebayasi } 1402 1.2.4.2 uebayasi entry->slot = i; 1403 1.2.4.2 uebayasi if (i) 1404 1.2.4.2 uebayasi LIST_INSERT_HEAD(&sc->sc_jfree_listhead, entry, 1405 1.2.4.2 uebayasi jpool_entries); 1406 1.2.4.2 uebayasi else 1407 1.2.4.2 uebayasi LIST_INSERT_HEAD(&sc->sc_jinuse_listhead, entry, 1408 1.2.4.2 uebayasi jpool_entries); 1409 1.2.4.2 uebayasi } 1410 1.2.4.2 uebayasi out: 1411 1.2.4.2 uebayasi if (error != 0) { 1412 1.2.4.2 uebayasi switch (state) { 1413 1.2.4.2 uebayasi case 4: 1414 1.2.4.2 uebayasi bus_dmamap_unload(sc->sc_dmat, 1415 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_rx_jumbo_map); 1416 1.2.4.2 uebayasi case 3: 1417 1.2.4.2 uebayasi bus_dmamap_destroy(sc->sc_dmat, 1418 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_rx_jumbo_map); 1419 1.2.4.2 uebayasi case 2: 1420 1.2.4.2 uebayasi bus_dmamem_unmap(sc->sc_dmat, kva, MVGBE_JMEM); 1421 1.2.4.2 uebayasi case 1: 1422 1.2.4.2 uebayasi bus_dmamem_free(sc->sc_dmat, &seg, rseg); 1423 1.2.4.2 uebayasi break; 1424 1.2.4.2 uebayasi default: 1425 1.2.4.2 uebayasi break; 1426 1.2.4.2 uebayasi } 1427 1.2.4.2 uebayasi } 1428 1.2.4.2 uebayasi 1429 1.2.4.2 uebayasi return error; 1430 1.2.4.2 uebayasi } 1431 1.2.4.2 uebayasi 1432 1.2.4.2 uebayasi /* 1433 1.2.4.2 uebayasi * Allocate a jumbo buffer. 1434 1.2.4.2 uebayasi */ 1435 1.2.4.2 uebayasi static void * 1436 1.2.4.2 uebayasi mvgbe_jalloc(struct mvgbe_softc *sc) 1437 1.2.4.2 uebayasi { 1438 1.2.4.2 uebayasi struct mvgbe_jpool_entry *entry; 1439 1.2.4.2 uebayasi 1440 1.2.4.2 uebayasi entry = LIST_FIRST(&sc->sc_jfree_listhead); 1441 1.2.4.2 uebayasi 1442 1.2.4.2 uebayasi if (entry == NULL) 1443 1.2.4.2 uebayasi return NULL; 1444 1.2.4.2 uebayasi 1445 1.2.4.2 uebayasi LIST_REMOVE(entry, jpool_entries); 1446 1.2.4.2 uebayasi LIST_INSERT_HEAD(&sc->sc_jinuse_listhead, entry, jpool_entries); 1447 1.2.4.2 uebayasi return sc->sc_cdata.mvgbe_jslots[entry->slot]; 1448 1.2.4.2 uebayasi } 1449 1.2.4.2 uebayasi 1450 1.2.4.2 uebayasi /* 1451 1.2.4.2 uebayasi * Release a jumbo buffer. 1452 1.2.4.2 uebayasi */ 1453 1.2.4.2 uebayasi static void 1454 1.2.4.2 uebayasi mvgbe_jfree(struct mbuf *m, void *buf, size_t size, void *arg) 1455 1.2.4.2 uebayasi { 1456 1.2.4.2 uebayasi struct mvgbe_jpool_entry *entry; 1457 1.2.4.2 uebayasi struct mvgbe_softc *sc; 1458 1.2.4.2 uebayasi int i, s; 1459 1.2.4.2 uebayasi 1460 1.2.4.2 uebayasi /* Extract the softc struct pointer. */ 1461 1.2.4.2 uebayasi sc = (struct mvgbe_softc *)arg; 1462 1.2.4.2 uebayasi 1463 1.2.4.2 uebayasi if (sc == NULL) 1464 1.2.4.2 uebayasi panic("%s: can't find softc pointer!", __func__); 1465 1.2.4.2 uebayasi 1466 1.2.4.2 uebayasi /* calculate the slot this buffer belongs to */ 1467 1.2.4.2 uebayasi 1468 1.2.4.2 uebayasi i = ((vaddr_t)buf - (vaddr_t)sc->sc_cdata.mvgbe_jumbo_buf) / MVGBE_JLEN; 1469 1.2.4.2 uebayasi 1470 1.2.4.2 uebayasi if ((i < 0) || (i >= MVGBE_JSLOTS)) 1471 1.2.4.2 uebayasi panic("%s: asked to free buffer that we don't manage!", 1472 1.2.4.2 uebayasi __func__); 1473 1.2.4.2 uebayasi 1474 1.2.4.2 uebayasi s = splvm(); 1475 1.2.4.2 uebayasi entry = LIST_FIRST(&sc->sc_jinuse_listhead); 1476 1.2.4.2 uebayasi if (entry == NULL) 1477 1.2.4.2 uebayasi panic("%s: buffer not in use!", __func__); 1478 1.2.4.2 uebayasi entry->slot = i; 1479 1.2.4.2 uebayasi LIST_REMOVE(entry, jpool_entries); 1480 1.2.4.2 uebayasi LIST_INSERT_HEAD(&sc->sc_jfree_listhead, entry, jpool_entries); 1481 1.2.4.2 uebayasi 1482 1.2.4.2 uebayasi if (__predict_true(m != NULL)) 1483 1.2.4.2 uebayasi pool_cache_put(mb_cache, m); 1484 1.2.4.2 uebayasi splx(s); 1485 1.2.4.2 uebayasi } 1486 1.2.4.2 uebayasi 1487 1.2.4.2 uebayasi static int 1488 1.2.4.2 uebayasi mvgbe_encap(struct mvgbe_softc *sc, struct mbuf *m_head, 1489 1.2.4.2 uebayasi uint32_t *txidx) 1490 1.2.4.2 uebayasi { 1491 1.2.4.2 uebayasi struct mvgbe_tx_desc *f = NULL; 1492 1.2.4.2 uebayasi struct mvgbe_txmap_entry *entry; 1493 1.2.4.2 uebayasi bus_dma_segment_t *txseg; 1494 1.2.4.2 uebayasi bus_dmamap_t txmap; 1495 1.2.4.2 uebayasi uint32_t first, current, last, cmdsts = 0; 1496 1.2.4.2 uebayasi int m_csumflags, i; 1497 1.2.4.2 uebayasi 1498 1.2.4.2 uebayasi DPRINTFN(3, ("mvgbe_encap\n")); 1499 1.2.4.2 uebayasi 1500 1.2.4.2 uebayasi entry = SIMPLEQ_FIRST(&sc->sc_txmap_head); 1501 1.2.4.2 uebayasi if (entry == NULL) { 1502 1.2.4.2 uebayasi DPRINTFN(2, ("mvgbe_encap: no txmap available\n")); 1503 1.2.4.2 uebayasi return ENOBUFS; 1504 1.2.4.2 uebayasi } 1505 1.2.4.2 uebayasi txmap = entry->dmamap; 1506 1.2.4.2 uebayasi 1507 1.2.4.2 uebayasi first = current = last = *txidx; 1508 1.2.4.2 uebayasi 1509 1.2.4.2 uebayasi /* 1510 1.2.4.2 uebayasi * Preserve m_pkthdr.csum_flags here since m_head might be 1511 1.2.4.2 uebayasi * updated by m_defrag() 1512 1.2.4.2 uebayasi */ 1513 1.2.4.2 uebayasi m_csumflags = m_head->m_pkthdr.csum_flags; 1514 1.2.4.2 uebayasi 1515 1.2.4.2 uebayasi /* 1516 1.2.4.2 uebayasi * Start packing the mbufs in this chain into 1517 1.2.4.2 uebayasi * the fragment pointers. Stop when we run out 1518 1.2.4.2 uebayasi * of fragments or hit the end of the mbuf chain. 1519 1.2.4.2 uebayasi */ 1520 1.2.4.2 uebayasi if (bus_dmamap_load_mbuf(sc->sc_dmat, txmap, m_head, BUS_DMA_NOWAIT)) { 1521 1.2.4.2 uebayasi DPRINTFN(1, ("mvgbe_encap: dmamap failed\n")); 1522 1.2.4.2 uebayasi return ENOBUFS; 1523 1.2.4.2 uebayasi } 1524 1.2.4.2 uebayasi 1525 1.2.4.2 uebayasi /* Sync the DMA map. */ 1526 1.2.4.2 uebayasi bus_dmamap_sync(sc->sc_dmat, txmap, 0, txmap->dm_mapsize, 1527 1.2.4.2 uebayasi BUS_DMASYNC_PREWRITE); 1528 1.2.4.2 uebayasi 1529 1.2.4.2 uebayasi if (sc->sc_cdata.mvgbe_tx_cnt + txmap->dm_nsegs >= 1530 1.2.4.2 uebayasi MVGBE_TX_RING_CNT) { 1531 1.2.4.2 uebayasi DPRINTFN(2, ("mvgbe_encap: too few descriptors free\n")); 1532 1.2.4.2 uebayasi bus_dmamap_unload(sc->sc_dmat, txmap); 1533 1.2.4.2 uebayasi return ENOBUFS; 1534 1.2.4.2 uebayasi } 1535 1.2.4.2 uebayasi 1536 1.2.4.2 uebayasi txseg = txmap->dm_segs; 1537 1.2.4.2 uebayasi 1538 1.2.4.2 uebayasi DPRINTFN(2, ("mvgbe_encap: dm_nsegs=%d\n", txmap->dm_nsegs)); 1539 1.2.4.2 uebayasi 1540 1.2.4.2 uebayasi for (i = 0; i < txmap->dm_nsegs; i++) { 1541 1.2.4.2 uebayasi f = &sc->sc_rdata->mvgbe_tx_ring[current]; 1542 1.2.4.2 uebayasi f->bufptr = txseg[i].ds_addr; 1543 1.2.4.2 uebayasi f->bytecnt = txseg[i].ds_len; 1544 1.2.4.2 uebayasi f->cmdsts = MVGBE_BUFFER_OWNED_BY_DMA; 1545 1.2.4.2 uebayasi last = current; 1546 1.2.4.2 uebayasi current = (current + 1) % MVGBE_TX_RING_CNT; 1547 1.2.4.2 uebayasi } 1548 1.2.4.2 uebayasi 1549 1.2.4.2 uebayasi if (m_csumflags & M_CSUM_IPv4) 1550 1.2.4.2 uebayasi cmdsts |= MVGBE_TX_GENERATE_IP_CHKSUM; 1551 1.2.4.2 uebayasi if (m_csumflags & M_CSUM_TCPv4) 1552 1.2.4.2 uebayasi cmdsts |= 1553 1.2.4.2 uebayasi MVGBE_TX_GENERATE_L4_CHKSUM | MVGBE_TX_L4_TYPE_TCP; 1554 1.2.4.2 uebayasi if (m_csumflags & M_CSUM_UDPv4) 1555 1.2.4.2 uebayasi cmdsts |= 1556 1.2.4.2 uebayasi MVGBE_TX_GENERATE_L4_CHKSUM | MVGBE_TX_L4_TYPE_UDP; 1557 1.2.4.2 uebayasi if (m_csumflags & (M_CSUM_IPv4 | M_CSUM_TCPv4 | M_CSUM_UDPv4)) { 1558 1.2.4.2 uebayasi const int iphdr_unitlen = sizeof(struct ip) / sizeof(uint32_t); 1559 1.2.4.2 uebayasi 1560 1.2.4.2 uebayasi cmdsts |= MVGBE_TX_IP_NO_FRAG | 1561 1.2.4.2 uebayasi MVGBE_TX_IP_HEADER_LEN(iphdr_unitlen); /* unit is 4B */ 1562 1.2.4.2 uebayasi } 1563 1.2.4.2 uebayasi if (txmap->dm_nsegs == 1) 1564 1.2.4.2 uebayasi f->cmdsts = cmdsts | 1565 1.2.4.2 uebayasi MVGBE_BUFFER_OWNED_BY_DMA | 1566 1.2.4.2 uebayasi MVGBE_TX_GENERATE_CRC | 1567 1.2.4.2 uebayasi MVGBE_TX_ENABLE_INTERRUPT | 1568 1.2.4.2 uebayasi MVGBE_TX_ZERO_PADDING | 1569 1.2.4.2 uebayasi MVGBE_TX_FIRST_DESC | 1570 1.2.4.2 uebayasi MVGBE_TX_LAST_DESC; 1571 1.2.4.2 uebayasi else { 1572 1.2.4.2 uebayasi f = &sc->sc_rdata->mvgbe_tx_ring[first]; 1573 1.2.4.2 uebayasi f->cmdsts = cmdsts | 1574 1.2.4.2 uebayasi MVGBE_BUFFER_OWNED_BY_DMA | 1575 1.2.4.2 uebayasi MVGBE_TX_GENERATE_CRC | 1576 1.2.4.2 uebayasi MVGBE_TX_FIRST_DESC; 1577 1.2.4.2 uebayasi 1578 1.2.4.2 uebayasi f = &sc->sc_rdata->mvgbe_tx_ring[last]; 1579 1.2.4.2 uebayasi f->cmdsts = 1580 1.2.4.2 uebayasi MVGBE_BUFFER_OWNED_BY_DMA | 1581 1.2.4.2 uebayasi MVGBE_TX_ENABLE_INTERRUPT | 1582 1.2.4.2 uebayasi MVGBE_TX_ZERO_PADDING | 1583 1.2.4.2 uebayasi MVGBE_TX_LAST_DESC; 1584 1.2.4.2 uebayasi } 1585 1.2.4.2 uebayasi 1586 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_tx_chain[last].mvgbe_mbuf = m_head; 1587 1.2.4.2 uebayasi SIMPLEQ_REMOVE_HEAD(&sc->sc_txmap_head, link); 1588 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_tx_map[last] = entry; 1589 1.2.4.2 uebayasi 1590 1.2.4.2 uebayasi /* Sync descriptors before handing to chip */ 1591 1.2.4.2 uebayasi MVGBE_CDTXSYNC(sc, *txidx, txmap->dm_nsegs, 1592 1.2.4.3 uebayasi BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1593 1.2.4.2 uebayasi 1594 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_tx_cnt += i; 1595 1.2.4.2 uebayasi *txidx = current; 1596 1.2.4.2 uebayasi 1597 1.2.4.2 uebayasi DPRINTFN(3, ("mvgbe_encap: completed successfully\n")); 1598 1.2.4.2 uebayasi 1599 1.2.4.2 uebayasi return 0; 1600 1.2.4.2 uebayasi } 1601 1.2.4.2 uebayasi 1602 1.2.4.2 uebayasi static void 1603 1.2.4.2 uebayasi mvgbe_rxeof(struct mvgbe_softc *sc) 1604 1.2.4.2 uebayasi { 1605 1.2.4.2 uebayasi struct mvgbe_chain_data *cdata = &sc->sc_cdata; 1606 1.2.4.2 uebayasi struct mvgbe_rx_desc *cur_rx; 1607 1.2.4.2 uebayasi struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1608 1.2.4.2 uebayasi struct mbuf *m; 1609 1.2.4.2 uebayasi bus_dmamap_t dmamap; 1610 1.2.4.2 uebayasi uint32_t rxstat; 1611 1.2.4.2 uebayasi int idx, cur, total_len; 1612 1.2.4.2 uebayasi 1613 1.2.4.2 uebayasi idx = sc->sc_cdata.mvgbe_rx_prod; 1614 1.2.4.2 uebayasi 1615 1.2.4.2 uebayasi DPRINTFN(3, ("mvgbe_rxeof %d\n", idx)); 1616 1.2.4.2 uebayasi 1617 1.2.4.2 uebayasi for (;;) { 1618 1.2.4.2 uebayasi cur = idx; 1619 1.2.4.2 uebayasi 1620 1.2.4.2 uebayasi /* Sync the descriptor */ 1621 1.2.4.2 uebayasi MVGBE_CDRXSYNC(sc, idx, 1622 1.2.4.2 uebayasi BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1623 1.2.4.2 uebayasi 1624 1.2.4.2 uebayasi cur_rx = &sc->sc_rdata->mvgbe_rx_ring[idx]; 1625 1.2.4.2 uebayasi 1626 1.2.4.2 uebayasi if ((cur_rx->cmdsts & MVGBE_BUFFER_OWNED_MASK) == 1627 1.2.4.2 uebayasi MVGBE_BUFFER_OWNED_BY_DMA) { 1628 1.2.4.2 uebayasi /* Invalidate the descriptor -- it's not ready yet */ 1629 1.2.4.2 uebayasi MVGBE_CDRXSYNC(sc, idx, BUS_DMASYNC_PREREAD); 1630 1.2.4.2 uebayasi sc->sc_cdata.mvgbe_rx_prod = idx; 1631 1.2.4.2 uebayasi break; 1632 1.2.4.2 uebayasi } 1633 1.2.4.2 uebayasi #ifdef DIAGNOSTIC 1634 1.2.4.2 uebayasi if ((cur_rx->cmdsts & 1635 1.2.4.2 uebayasi (MVGBE_RX_LAST_DESC | MVGBE_RX_FIRST_DESC)) != 1636 1.2.4.2 uebayasi (MVGBE_RX_LAST_DESC | MVGBE_RX_FIRST_DESC)) 1637 1.2.4.2 uebayasi panic( 1638 1.2.4.2 uebayasi "mvgbe_rxeof: buffer size is smaller than packet"); 1639 1.2.4.2 uebayasi #endif 1640 1.2.4.2 uebayasi 1641 1.2.4.2 uebayasi dmamap = sc->sc_cdata.mvgbe_rx_jumbo_map; 1642 1.2.4.2 uebayasi 1643 1.2.4.2 uebayasi bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 1644 1.2.4.2 uebayasi BUS_DMASYNC_POSTREAD); 1645 1.2.4.2 uebayasi 1646 1.2.4.2 uebayasi m = cdata->mvgbe_rx_chain[idx].mvgbe_mbuf; 1647 1.2.4.2 uebayasi cdata->mvgbe_rx_chain[idx].mvgbe_mbuf = NULL; 1648 1.2.4.2 uebayasi total_len = cur_rx->bytecnt; 1649 1.2.4.2 uebayasi rxstat = cur_rx->cmdsts; 1650 1.2.4.2 uebayasi 1651 1.2.4.2 uebayasi cdata->mvgbe_rx_map[idx] = NULL; 1652 1.2.4.2 uebayasi 1653 1.2.4.2 uebayasi idx = (idx + 1) % MVGBE_RX_RING_CNT; 1654 1.2.4.2 uebayasi 1655 1.2.4.2 uebayasi if (rxstat & MVGBE_ERROR_SUMMARY) { 1656 1.2.4.2 uebayasi #if 0 1657 1.2.4.2 uebayasi int err = rxstat & MVGBE_RX_ERROR_CODE_MASK; 1658 1.2.4.2 uebayasi 1659 1.2.4.2 uebayasi if (err == MVGBE_RX_CRC_ERROR) 1660 1.2.4.2 uebayasi ifp->if_ierrors++; 1661 1.2.4.2 uebayasi if (err == MVGBE_RX_OVERRUN_ERROR) 1662 1.2.4.2 uebayasi ifp->if_ierrors++; 1663 1.2.4.2 uebayasi if (err == MVGBE_RX_MAX_FRAME_LEN_ERROR) 1664 1.2.4.2 uebayasi ifp->if_ierrors++; 1665 1.2.4.2 uebayasi if (err == MVGBE_RX_RESOURCE_ERROR) 1666 1.2.4.2 uebayasi ifp->if_ierrors++; 1667 1.2.4.2 uebayasi #else 1668 1.2.4.2 uebayasi ifp->if_ierrors++; 1669 1.2.4.2 uebayasi #endif 1670 1.2.4.2 uebayasi mvgbe_newbuf(sc, cur, m, dmamap); 1671 1.2.4.2 uebayasi continue; 1672 1.2.4.2 uebayasi } 1673 1.2.4.2 uebayasi 1674 1.2.4.2 uebayasi if (total_len > MVGBE_RX_CSUM_MIN_BYTE) { 1675 1.2.4.2 uebayasi /* Check IP header checksum */ 1676 1.2.4.2 uebayasi if (rxstat & MVGBE_RX_IP_FRAME_TYPE) { 1677 1.2.4.2 uebayasi m->m_pkthdr.csum_flags |= M_CSUM_IPv4; 1678 1.2.4.2 uebayasi if (!(rxstat & MVGBE_RX_IP_HEADER_OK)) 1679 1.2.4.2 uebayasi m->m_pkthdr.csum_flags |= 1680 1.2.4.2 uebayasi M_CSUM_IPv4_BAD; 1681 1.2.4.2 uebayasi } 1682 1.2.4.2 uebayasi /* Check TCP/UDP checksum */ 1683 1.2.4.2 uebayasi if (rxstat & MVGBE_RX_L4_TYPE_TCP) 1684 1.2.4.2 uebayasi m->m_pkthdr.csum_flags |= M_CSUM_TCPv4; 1685 1.2.4.2 uebayasi else if (rxstat & MVGBE_RX_L4_TYPE_UDP) 1686 1.2.4.2 uebayasi m->m_pkthdr.csum_flags |= M_CSUM_UDPv4; 1687 1.2.4.2 uebayasi if (!(rxstat & MVGBE_RX_L4_CHECKSUM)) 1688 1.2.4.2 uebayasi m->m_pkthdr.csum_flags |= M_CSUM_TCP_UDP_BAD; 1689 1.2.4.2 uebayasi } 1690 1.2.4.2 uebayasi 1691 1.2.4.2 uebayasi /* 1692 1.2.4.2 uebayasi * Try to allocate a new jumbo buffer. If that 1693 1.2.4.2 uebayasi * fails, copy the packet to mbufs and put the 1694 1.2.4.2 uebayasi * jumbo buffer back in the ring so it can be 1695 1.2.4.2 uebayasi * re-used. If allocating mbufs fails, then we 1696 1.2.4.2 uebayasi * have to drop the packet. 1697 1.2.4.2 uebayasi */ 1698 1.2.4.2 uebayasi if (mvgbe_newbuf(sc, cur, NULL, dmamap) == ENOBUFS) { 1699 1.2.4.2 uebayasi struct mbuf *m0; 1700 1.2.4.2 uebayasi 1701 1.2.4.2 uebayasi m0 = m_devget(mtod(m, char *), total_len, 0, ifp, NULL); 1702 1.2.4.2 uebayasi mvgbe_newbuf(sc, cur, m, dmamap); 1703 1.2.4.2 uebayasi if (m0 == NULL) { 1704 1.2.4.2 uebayasi aprint_error_ifnet(ifp, 1705 1.2.4.2 uebayasi "no receive buffers available --" 1706 1.2.4.2 uebayasi " packet dropped!\n"); 1707 1.2.4.2 uebayasi ifp->if_ierrors++; 1708 1.2.4.2 uebayasi continue; 1709 1.2.4.2 uebayasi } 1710 1.2.4.2 uebayasi m = m0; 1711 1.2.4.2 uebayasi } else { 1712 1.2.4.2 uebayasi m->m_pkthdr.rcvif = ifp; 1713 1.2.4.2 uebayasi m->m_pkthdr.len = m->m_len = total_len; 1714 1.2.4.2 uebayasi } 1715 1.2.4.2 uebayasi 1716 1.2.4.2 uebayasi /* Skip on first 2byte (HW header) */ 1717 1.2.4.2 uebayasi m_adj(m, MVGBE_HWHEADER_SIZE); 1718 1.2.4.2 uebayasi m->m_flags |= M_HASFCS; 1719 1.2.4.2 uebayasi 1720 1.2.4.2 uebayasi ifp->if_ipackets++; 1721 1.2.4.2 uebayasi 1722 1.2.4.2 uebayasi if (ifp->if_bpf) 1723 1.2.4.2 uebayasi bpf_ops->bpf_mtap(ifp->if_bpf, m); 1724 1.2.4.2 uebayasi 1725 1.2.4.2 uebayasi /* pass it on. */ 1726 1.2.4.2 uebayasi (*ifp->if_input)(ifp, m); 1727 1.2.4.2 uebayasi } 1728 1.2.4.2 uebayasi } 1729 1.2.4.2 uebayasi 1730 1.2.4.2 uebayasi static void 1731 1.2.4.2 uebayasi mvgbe_txeof(struct mvgbe_softc *sc) 1732 1.2.4.2 uebayasi { 1733 1.2.4.2 uebayasi struct mvgbe_chain_data *cdata = &sc->sc_cdata; 1734 1.2.4.2 uebayasi struct mvgbe_tx_desc *cur_tx; 1735 1.2.4.2 uebayasi struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1736 1.2.4.2 uebayasi struct mvgbe_txmap_entry *entry; 1737 1.2.4.2 uebayasi int idx; 1738 1.2.4.2 uebayasi 1739 1.2.4.2 uebayasi DPRINTFN(3, ("mvgbe_txeof\n")); 1740 1.2.4.2 uebayasi 1741 1.2.4.2 uebayasi /* 1742 1.2.4.2 uebayasi * Go through our tx ring and free mbufs for those 1743 1.2.4.2 uebayasi * frames that have been sent. 1744 1.2.4.2 uebayasi */ 1745 1.2.4.2 uebayasi idx = cdata->mvgbe_tx_cons; 1746 1.2.4.2 uebayasi while (idx != cdata->mvgbe_tx_prod) { 1747 1.2.4.2 uebayasi MVGBE_CDTXSYNC(sc, idx, 1, 1748 1.2.4.2 uebayasi BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1749 1.2.4.2 uebayasi 1750 1.2.4.2 uebayasi cur_tx = &sc->sc_rdata->mvgbe_tx_ring[idx]; 1751 1.2.4.2 uebayasi #ifdef MVGBE_DEBUG 1752 1.2.4.2 uebayasi if (mvgbe_debug >= 3) 1753 1.2.4.2 uebayasi mvgbe_dump_txdesc(cur_tx, idx); 1754 1.2.4.2 uebayasi #endif 1755 1.2.4.2 uebayasi if ((cur_tx->cmdsts & MVGBE_BUFFER_OWNED_MASK) == 1756 1.2.4.2 uebayasi MVGBE_BUFFER_OWNED_BY_DMA) { 1757 1.2.4.2 uebayasi MVGBE_CDTXSYNC(sc, idx, 1, BUS_DMASYNC_PREREAD); 1758 1.2.4.2 uebayasi break; 1759 1.2.4.2 uebayasi } 1760 1.2.4.2 uebayasi if (cur_tx->cmdsts & MVGBE_TX_LAST_DESC) 1761 1.2.4.2 uebayasi ifp->if_opackets++; 1762 1.2.4.2 uebayasi if (cur_tx->cmdsts & MVGBE_ERROR_SUMMARY) { 1763 1.2.4.2 uebayasi int err = cur_tx->cmdsts & MVGBE_TX_ERROR_CODE_MASK; 1764 1.2.4.2 uebayasi 1765 1.2.4.2 uebayasi if (err == MVGBE_TX_LATE_COLLISION_ERROR) 1766 1.2.4.2 uebayasi ifp->if_collisions++; 1767 1.2.4.2 uebayasi if (err == MVGBE_TX_UNDERRUN_ERROR) 1768 1.2.4.2 uebayasi ifp->if_oerrors++; 1769 1.2.4.2 uebayasi if (err == MVGBE_TX_EXCESSIVE_COLLISION_ERRO) 1770 1.2.4.2 uebayasi ifp->if_collisions++; 1771 1.2.4.2 uebayasi } 1772 1.2.4.2 uebayasi if (cdata->mvgbe_tx_chain[idx].mvgbe_mbuf != NULL) { 1773 1.2.4.2 uebayasi entry = cdata->mvgbe_tx_map[idx]; 1774 1.2.4.2 uebayasi 1775 1.2.4.2 uebayasi m_freem(cdata->mvgbe_tx_chain[idx].mvgbe_mbuf); 1776 1.2.4.2 uebayasi cdata->mvgbe_tx_chain[idx].mvgbe_mbuf = NULL; 1777 1.2.4.2 uebayasi 1778 1.2.4.2 uebayasi bus_dmamap_sync(sc->sc_dmat, entry->dmamap, 0, 1779 1.2.4.2 uebayasi entry->dmamap->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1780 1.2.4.2 uebayasi 1781 1.2.4.2 uebayasi bus_dmamap_unload(sc->sc_dmat, entry->dmamap); 1782 1.2.4.2 uebayasi SIMPLEQ_INSERT_TAIL(&sc->sc_txmap_head, entry, link); 1783 1.2.4.2 uebayasi cdata->mvgbe_tx_map[idx] = NULL; 1784 1.2.4.2 uebayasi } 1785 1.2.4.2 uebayasi cdata->mvgbe_tx_cnt--; 1786 1.2.4.2 uebayasi idx = (idx + 1) % MVGBE_TX_RING_CNT; 1787 1.2.4.2 uebayasi } 1788 1.2.4.2 uebayasi if (cdata->mvgbe_tx_cnt == 0) 1789 1.2.4.2 uebayasi ifp->if_timer = 0; 1790 1.2.4.2 uebayasi 1791 1.2.4.2 uebayasi if (cdata->mvgbe_tx_cnt < MVGBE_TX_RING_CNT - 2) 1792 1.2.4.2 uebayasi ifp->if_flags &= ~IFF_OACTIVE; 1793 1.2.4.2 uebayasi 1794 1.2.4.2 uebayasi cdata->mvgbe_tx_cons = idx; 1795 1.2.4.2 uebayasi } 1796 1.2.4.2 uebayasi 1797 1.2.4.2 uebayasi static void 1798 1.2.4.2 uebayasi mvgbe_setmulti(struct mvgbe_softc *sc) 1799 1.2.4.2 uebayasi { 1800 1.2.4.2 uebayasi struct ifnet *ifp= &sc->sc_ethercom.ec_if; 1801 1.2.4.2 uebayasi uint32_t pxc, dfut, upm = 0, filter = 0; 1802 1.2.4.2 uebayasi uint8_t ln = sc->sc_enaddr[5] & 0xf; /* last nibble */ 1803 1.2.4.2 uebayasi 1804 1.2.4.2 uebayasi if (ifp->if_flags & IFF_PROMISC) { 1805 1.2.4.2 uebayasi upm = MVGBE_PXC_UPM; 1806 1.2.4.2 uebayasi filter = 1807 1.2.4.2 uebayasi MVGBE_DF(0, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS) | 1808 1.2.4.2 uebayasi MVGBE_DF(1, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS) | 1809 1.2.4.2 uebayasi MVGBE_DF(2, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS) | 1810 1.2.4.2 uebayasi MVGBE_DF(3, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS); 1811 1.2.4.2 uebayasi } else if (ifp->if_flags & IFF_ALLMULTI) { 1812 1.2.4.2 uebayasi filter = 1813 1.2.4.2 uebayasi MVGBE_DF(0, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS) | 1814 1.2.4.2 uebayasi MVGBE_DF(1, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS) | 1815 1.2.4.2 uebayasi MVGBE_DF(2, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS) | 1816 1.2.4.2 uebayasi MVGBE_DF(3, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS); 1817 1.2.4.2 uebayasi } 1818 1.2.4.2 uebayasi 1819 1.2.4.2 uebayasi /* Set Unicast Promiscuous mode */ 1820 1.2.4.2 uebayasi pxc = MVGBE_READ(sc, MVGBE_PXC); 1821 1.2.4.2 uebayasi pxc &= ~MVGBE_PXC_UPM; 1822 1.2.4.2 uebayasi pxc |= upm; 1823 1.2.4.2 uebayasi MVGBE_WRITE(sc, MVGBE_PXC, pxc); 1824 1.2.4.2 uebayasi 1825 1.2.4.2 uebayasi /* Set Destination Address Filter Multicast Tables */ 1826 1.2.4.2 uebayasi MVGBE_WRITE_FILTER(sc, MVGBE_DFSMT, filter, MVGBE_NDFSMT); 1827 1.2.4.2 uebayasi MVGBE_WRITE_FILTER(sc, MVGBE_DFOMT, filter, MVGBE_NDFOMT); 1828 1.2.4.2 uebayasi 1829 1.2.4.2 uebayasi if (ifp->if_flags & IFF_PROMISC) { 1830 1.2.4.2 uebayasi /* necessary ? */ 1831 1.2.4.2 uebayasi MVGBE_WRITE_FILTER(sc, MVGBE_DFUT, filter, MVGBE_NDFUT); 1832 1.2.4.2 uebayasi return; 1833 1.2.4.2 uebayasi } 1834 1.2.4.2 uebayasi 1835 1.2.4.2 uebayasi /* Set Destination Address Filter Unicast Table */ 1836 1.2.4.2 uebayasi dfut = MVGBE_READ_FILTER(sc, MVGBE_DFUT + (ln & 0x0c)); 1837 1.2.4.2 uebayasi dfut &= ~MVGBE_DF(ln & 0x03, MVGBE_DF_QUEUE_MASK);; 1838 1.2.4.2 uebayasi dfut |= MVGBE_DF(ln & 0x03, MVGBE_DF_QUEUE(0) | MVGBE_DF_PASS); 1839 1.2.4.2 uebayasi MVGBE_WRITE_FILTER(sc, MVGBE_DFUT + (ln & 0x0c), dfut, 1); 1840 1.2.4.2 uebayasi } 1841 1.2.4.2 uebayasi 1842 1.2.4.2 uebayasi #ifdef MVGBE_DEBUG 1843 1.2.4.2 uebayasi static void 1844 1.2.4.2 uebayasi mvgbe_dump_txdesc(struct mvgbe_tx_desc *desc, int idx) 1845 1.2.4.2 uebayasi { 1846 1.2.4.2 uebayasi #define DESC_PRINT(X) \ 1847 1.2.4.2 uebayasi if (X) \ 1848 1.2.4.2 uebayasi printf("txdesc[%d]." #X "=%#x\n", idx, X); 1849 1.2.4.2 uebayasi 1850 1.2.4.2 uebayasi #if BYTE_ORDER == BIG_ENDIAN 1851 1.2.4.2 uebayasi DESC_PRINT(desc->bytecnt); 1852 1.2.4.2 uebayasi DESC_PRINT(desc->l4ichk); 1853 1.2.4.2 uebayasi DESC_PRINT(desc->cmdsts); 1854 1.2.4.2 uebayasi DESC_PRINT(desc->nextdescptr); 1855 1.2.4.2 uebayasi DESC_PRINT(desc->bufptr); 1856 1.2.4.2 uebayasi #else /* LITTLE_ENDIAN */ 1857 1.2.4.2 uebayasi DESC_PRINT(desc->cmdsts); 1858 1.2.4.2 uebayasi DESC_PRINT(desc->l4ichk); 1859 1.2.4.2 uebayasi DESC_PRINT(desc->bytecnt); 1860 1.2.4.2 uebayasi DESC_PRINT(desc->bufptr); 1861 1.2.4.2 uebayasi DESC_PRINT(desc->nextdescptr); 1862 1.2.4.2 uebayasi #endif 1863 1.2.4.2 uebayasi #undef DESC_PRINT 1864 1.2.4.2 uebayasi printf("txdesc[%d].desc->returninfo=%#lx\n", idx, desc->returninfo); 1865 1.2.4.2 uebayasi printf("txdesc[%d].desc->alignbufptr=%p\n", idx, desc->alignbufptr); 1866 1.2.4.2 uebayasi } 1867 1.2.4.2 uebayasi #endif 1868
Indexes created Thu Oct 23 22:10:10 GMT 2025