mvsata_mv.c revision 1.8 1 1.8 kiyohara /* $NetBSD: mvsata_mv.c,v 1.8 2017/01/07 14:24:27 kiyohara Exp $ */
2 1.1 kiyohara /*
3 1.1 kiyohara * Copyright (c) 2008 KIYOHARA Takashi
4 1.1 kiyohara * All rights reserved.
5 1.1 kiyohara *
6 1.1 kiyohara * Redistribution and use in source and binary forms, with or without
7 1.1 kiyohara * modification, are permitted provided that the following conditions
8 1.1 kiyohara * are met:
9 1.1 kiyohara * 1. Redistributions of source code must retain the above copyright
10 1.1 kiyohara * notice, this list of conditions and the following disclaimer.
11 1.1 kiyohara * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 kiyohara * notice, this list of conditions and the following disclaimer in the
13 1.1 kiyohara * documentation and/or other materials provided with the distribution.
14 1.1 kiyohara *
15 1.1 kiyohara * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 1.1 kiyohara * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 1.1 kiyohara * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 1.1 kiyohara * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19 1.1 kiyohara * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20 1.1 kiyohara * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 1.1 kiyohara * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 1.1 kiyohara * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23 1.1 kiyohara * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 1.1 kiyohara * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 1.1 kiyohara * POSSIBILITY OF SUCH DAMAGE.
26 1.1 kiyohara */
27 1.1 kiyohara
28 1.1 kiyohara #include <sys/cdefs.h>
29 1.8 kiyohara __KERNEL_RCSID(0, "$NetBSD: mvsata_mv.c,v 1.8 2017/01/07 14:24:27 kiyohara Exp $");
30 1.1 kiyohara
31 1.1 kiyohara #include <sys/param.h>
32 1.1 kiyohara #include <sys/bus.h>
33 1.1 kiyohara #include <sys/device.h>
34 1.1 kiyohara #include <sys/errno.h>
35 1.1 kiyohara
36 1.1 kiyohara #include <dev/ata/atareg.h>
37 1.1 kiyohara #include <dev/ata/atavar.h>
38 1.1 kiyohara #include <dev/ic/wdcvar.h>
39 1.1 kiyohara
40 1.1 kiyohara #include <dev/ic/mvsatareg.h>
41 1.1 kiyohara #include <dev/ic/mvsatavar.h>
42 1.1 kiyohara
43 1.1 kiyohara #include <dev/marvell/marvellreg.h>
44 1.1 kiyohara #include <dev/marvell/marvellvar.h>
45 1.1 kiyohara
46 1.1 kiyohara #include "locators.h"
47 1.1 kiyohara
48 1.1 kiyohara
49 1.1 kiyohara #define MVSATAHC_SIZE 0x8000
50 1.1 kiyohara
51 1.1 kiyohara #define MVSATAHC_NWINDOW 4
52 1.1 kiyohara
53 1.1 kiyohara #define MVSATAHC_MICR 0x20 /* Main Interrupt Cause */
54 1.1 kiyohara #define MVSATAHC_MIMR 0x24 /* Main Interrupt Mask */
55 1.1 kiyohara #define MVSATAHC_MI_SATAERR(p) (1 << ((p) * 2))
56 1.1 kiyohara #define MVSATAHC_MI_SATADONE(p) (1 << (((p) * 2) + 1))
57 1.1 kiyohara #define MVSATAHC_MI_SATADMADONE(p) (1 << ((p) + 4))
58 1.1 kiyohara #define MVSATAHC_MI_SATACOALDONE (1 << 8)
59 1.1 kiyohara #define MVSATAHC_WCR(n) (0x30 + (n) * 0x10) /* WinN Control */
60 1.1 kiyohara #define MVSATAHC_WCR_WINEN (1 << 0)
61 1.1 kiyohara #define MVSATAHC_WCR_TARGET(t) (((t) & 0xf) << 4)
62 1.1 kiyohara #define MVSATAHC_WCR_ATTR(a) (((a) & 0xff) << 8)
63 1.1 kiyohara #define MVSATAHC_WCR_SIZE(s) (((s) - 1) & 0xffff0000)
64 1.1 kiyohara #define MVSATAHC_WBR(n) (0x34 + (n) * 0x10) /* WinN Base */
65 1.1 kiyohara #define MVSATAHC_WBR_BASE(b) ((b) & 0xffff0000)
66 1.1 kiyohara
67 1.1 kiyohara
68 1.1 kiyohara static int mvsatahc_match(device_t, cfdata_t, void *);
69 1.1 kiyohara static void mvsatahc_attach(device_t, device_t, void *);
70 1.1 kiyohara
71 1.1 kiyohara static int mvsatahc_intr(void *);
72 1.1 kiyohara
73 1.1 kiyohara static void mvsatahc_enable_intr(struct mvsata_port *, int);
74 1.7 kiyohara static void mvsatahc_wininit(struct mvsata_softc *, enum marvell_tags *);
75 1.1 kiyohara
76 1.1 kiyohara CFATTACH_DECL_NEW(mvsata_gt, sizeof(struct mvsata_softc),
77 1.1 kiyohara mvsatahc_match, mvsatahc_attach, NULL, NULL);
78 1.1 kiyohara CFATTACH_DECL_NEW(mvsata_mbus, sizeof(struct mvsata_softc),
79 1.1 kiyohara mvsatahc_match, mvsatahc_attach, NULL, NULL);
80 1.1 kiyohara
81 1.1 kiyohara
82 1.1 kiyohara struct mvsata_product mvsata_products[] = {
83 1.1 kiyohara #if 0
84 1.1 kiyohara /* Discovery VI */
85 1.1 kiyohara { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV64660, ?, ?, gen2?, 0 },
86 1.1 kiyohara #endif
87 1.1 kiyohara
88 1.1 kiyohara /* Orion */
89 1.1 kiyohara { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F5082, 1, 1, gen2e, 0 },
90 1.1 kiyohara { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F5182, 1, 2, gen2e, 0 },
91 1.1 kiyohara { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F6082, 1, 1, gen2e, 0 },
92 1.1 kiyohara
93 1.1 kiyohara /* Kirkwood */
94 1.1 kiyohara { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F6192, 1, 2, gen2e, 0 },
95 1.1 kiyohara { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F6281, 1, 2, gen2e, 0 },
96 1.4 kiyohara { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F6282, 1, 2, gen2e, 0 },
97 1.1 kiyohara
98 1.3 kiyohara /* Discovery Innovation */
99 1.3 kiyohara { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV78100, 1, 2, gen2e, 0 },
100 1.1 kiyohara { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV78200, 1, 2, gen2e, 0 },
101 1.5 rkujawa
102 1.8 kiyohara /* Dove */
103 1.8 kiyohara { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88AP510, 1, 1, gen2e, 0 },
104 1.8 kiyohara
105 1.5 rkujawa /* Armada XP */
106 1.6 kiyohara { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV78130, 1, 2, gen2e, 0 },
107 1.6 kiyohara { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV78160, 1, 2, gen2e, 0 },
108 1.6 kiyohara { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV78230, 1, 2, gen2e, 0 },
109 1.6 kiyohara { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV78260, 1, 2, gen2e, 0 },
110 1.5 rkujawa { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV78460, 1, 2, gen2e, 0 },
111 1.7 kiyohara
112 1.7 kiyohara /* Armada 370 */
113 1.7 kiyohara { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV6707, 1, 2, gen2e, 0 },
114 1.7 kiyohara { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV6710, 1, 2, gen2e, 0 },
115 1.7 kiyohara { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV6W11, 1, 2, gen2e, 0 },
116 1.1 kiyohara };
117 1.1 kiyohara
118 1.1 kiyohara
119 1.1 kiyohara /* ARGSUSED */
120 1.1 kiyohara static int
121 1.1 kiyohara mvsatahc_match(device_t parent, cfdata_t match, void *aux)
122 1.1 kiyohara {
123 1.1 kiyohara struct marvell_attach_args *mva = aux;
124 1.1 kiyohara int i;
125 1.1 kiyohara
126 1.2 kiyohara if (strcmp(mva->mva_name, match->cf_name) != 0)
127 1.2 kiyohara return 0;
128 1.1 kiyohara if (mva->mva_offset == MVA_OFFSET_DEFAULT ||
129 1.1 kiyohara mva->mva_irq == MVA_IRQ_DEFAULT)
130 1.1 kiyohara return 0;
131 1.1 kiyohara
132 1.1 kiyohara for (i = 0; i < __arraycount(mvsata_products); i++)
133 1.1 kiyohara if (mva->mva_model == mvsata_products[i].model) {
134 1.1 kiyohara mva->mva_size = MVSATAHC_SIZE;
135 1.1 kiyohara return 1;
136 1.1 kiyohara }
137 1.1 kiyohara return 0;
138 1.1 kiyohara }
139 1.1 kiyohara
140 1.1 kiyohara /* ARGSUSED */
141 1.1 kiyohara static void
142 1.1 kiyohara mvsatahc_attach(device_t parent, device_t self, void *aux)
143 1.1 kiyohara {
144 1.1 kiyohara struct mvsata_softc *sc = device_private(self);
145 1.1 kiyohara struct marvell_attach_args *mva = aux;
146 1.1 kiyohara uint32_t mask;
147 1.1 kiyohara int port, i;
148 1.1 kiyohara
149 1.1 kiyohara aprint_normal(": Marvell Serial-ATA Host Controller (SATAHC)\n");
150 1.1 kiyohara aprint_naive("\n");
151 1.1 kiyohara
152 1.1 kiyohara sc->sc_wdcdev.sc_atac.atac_dev = self;
153 1.1 kiyohara sc->sc_model = mva->mva_model;
154 1.1 kiyohara sc->sc_iot = mva->mva_iot;
155 1.1 kiyohara if (bus_space_subregion(mva->mva_iot, mva->mva_ioh, mva->mva_offset,
156 1.1 kiyohara mva->mva_size, &sc->sc_ioh)) {
157 1.1 kiyohara aprint_error_dev(self, "can't map registers\n");
158 1.1 kiyohara return;
159 1.1 kiyohara }
160 1.1 kiyohara sc->sc_dmat = mva->mva_dmat;
161 1.1 kiyohara sc->sc_enable_intr = mvsatahc_enable_intr;
162 1.1 kiyohara
163 1.7 kiyohara mvsatahc_wininit(sc, mva->mva_tags);
164 1.1 kiyohara
165 1.1 kiyohara for (i = 0; i < __arraycount(mvsata_products); i++)
166 1.1 kiyohara if (mva->mva_model == mvsata_products[i].model)
167 1.1 kiyohara break;
168 1.1 kiyohara KASSERT(i < __arraycount(mvsata_products));
169 1.1 kiyohara
170 1.1 kiyohara if (mvsata_attach(sc, &mvsata_products[i], NULL, NULL, 0) != 0)
171 1.1 kiyohara return;
172 1.1 kiyohara
173 1.1 kiyohara marvell_intr_establish(mva->mva_irq, IPL_BIO, mvsatahc_intr, sc);
174 1.1 kiyohara mask = 0;
175 1.1 kiyohara for (port = 0; port < sc->sc_port; port++)
176 1.1 kiyohara mask |=
177 1.1 kiyohara MVSATAHC_MI_SATAERR(port) |
178 1.1 kiyohara MVSATAHC_MI_SATADONE(port);
179 1.1 kiyohara bus_space_write_4(sc->sc_iot, sc->sc_ioh, MVSATAHC_MIMR, mask);
180 1.1 kiyohara }
181 1.1 kiyohara
182 1.1 kiyohara static int
183 1.1 kiyohara mvsatahc_intr(void *arg)
184 1.1 kiyohara {
185 1.1 kiyohara struct mvsata_softc *sc = (struct mvsata_softc *)arg;
186 1.1 kiyohara struct mvsata_hc *mvhc = &sc->sc_hcs[0];
187 1.1 kiyohara uint32_t cause, handled = 0;
188 1.1 kiyohara
189 1.1 kiyohara cause = bus_space_read_4(sc->sc_iot, sc->sc_ioh, MVSATAHC_MICR);
190 1.1 kiyohara if (cause & MVSATAHC_MI_SATAERR(0))
191 1.1 kiyohara handled |= mvsata_error(mvhc->hc_ports[0]);
192 1.1 kiyohara if (cause & MVSATAHC_MI_SATAERR(1))
193 1.1 kiyohara handled |= mvsata_error(mvhc->hc_ports[1]);
194 1.1 kiyohara if (cause & (MVSATAHC_MI_SATADONE(0) | MVSATAHC_MI_SATADONE(1)))
195 1.1 kiyohara handled |= mvsata_intr(mvhc);
196 1.1 kiyohara
197 1.1 kiyohara return handled;
198 1.1 kiyohara }
199 1.1 kiyohara
200 1.1 kiyohara
201 1.1 kiyohara static void
202 1.1 kiyohara mvsatahc_enable_intr(struct mvsata_port *mvport, int on)
203 1.1 kiyohara {
204 1.1 kiyohara struct mvsata_softc *sc =
205 1.1 kiyohara device_private(mvport->port_ata_channel.ch_atac->atac_dev);
206 1.1 kiyohara uint32_t mask;
207 1.1 kiyohara
208 1.1 kiyohara mask = bus_space_read_4(sc->sc_iot, sc->sc_ioh, MVSATAHC_MIMR);
209 1.1 kiyohara if (on)
210 1.1 kiyohara mask |= MVSATAHC_MI_SATADONE(mvport->port);
211 1.1 kiyohara else
212 1.1 kiyohara mask &= ~MVSATAHC_MI_SATADONE(mvport->port);
213 1.1 kiyohara bus_space_write_4(sc->sc_iot, sc->sc_ioh, MVSATAHC_MIMR, mask);
214 1.1 kiyohara }
215 1.1 kiyohara
216 1.1 kiyohara static void
217 1.7 kiyohara mvsatahc_wininit(struct mvsata_softc *sc, enum marvell_tags *tags)
218 1.1 kiyohara {
219 1.1 kiyohara device_t pdev = device_parent(sc->sc_wdcdev.sc_atac.atac_dev);
220 1.1 kiyohara uint64_t base;
221 1.1 kiyohara uint32_t size;
222 1.1 kiyohara int window, target, attr, rv, i;
223 1.1 kiyohara
224 1.1 kiyohara for (window = 0, i = 0;
225 1.1 kiyohara tags[i] != MARVELL_TAG_UNDEFINED && window < MVSATAHC_NWINDOW;
226 1.1 kiyohara i++) {
227 1.1 kiyohara rv = marvell_winparams_by_tag(pdev, tags[i],
228 1.1 kiyohara &target, &attr, &base, &size);
229 1.1 kiyohara if (rv != 0 || size == 0)
230 1.1 kiyohara continue;
231 1.1 kiyohara if (base > 0xffffffffULL) {
232 1.1 kiyohara aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev,
233 1.1 kiyohara "tag %d address 0x%llx not support\n",
234 1.1 kiyohara tags[i], base);
235 1.1 kiyohara continue;
236 1.1 kiyohara }
237 1.1 kiyohara
238 1.1 kiyohara bus_space_write_4(sc->sc_iot, sc->sc_ioh,
239 1.1 kiyohara MVSATAHC_WCR(window),
240 1.1 kiyohara MVSATAHC_WCR_WINEN |
241 1.1 kiyohara MVSATAHC_WCR_TARGET(target) |
242 1.1 kiyohara MVSATAHC_WCR_ATTR(attr) |
243 1.1 kiyohara MVSATAHC_WCR_SIZE(size));
244 1.1 kiyohara bus_space_write_4(sc->sc_iot, sc->sc_ioh,
245 1.1 kiyohara MVSATAHC_WBR(window), MVSATAHC_WBR_BASE(base));
246 1.1 kiyohara window++;
247 1.1 kiyohara }
248 1.1 kiyohara for (; window < MVSATAHC_NWINDOW; window++)
249 1.1 kiyohara bus_space_write_4(sc->sc_iot, sc->sc_ioh,
250 1.1 kiyohara MVSATAHC_WCR(window), 0);
251 1.1 kiyohara }
252