if_elmc_mca.c revision 1.4.2.3 1 1.4.2.3 nathanw /* $NetBSD: if_elmc_mca.c,v 1.4.2.3 2001/06/21 20:04:04 nathanw Exp $ */
2 1.4.2.2 nathanw
3 1.4.2.2 nathanw /*-
4 1.4.2.2 nathanw * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 1.4.2.2 nathanw * All rights reserved.
6 1.4.2.2 nathanw *
7 1.4.2.2 nathanw * This code is derived from software contributed to The NetBSD Foundation
8 1.4.2.2 nathanw * by Rafal K. Boni and Jaromir Dolecek.
9 1.4.2.2 nathanw *
10 1.4.2.2 nathanw * Redistribution and use in source and binary forms, with or without
11 1.4.2.2 nathanw * modification, are permitted provided that the following conditions
12 1.4.2.2 nathanw * are met:
13 1.4.2.2 nathanw * 1. Redistributions of source code must retain the above copyright
14 1.4.2.2 nathanw * notice, this list of conditions and the following disclaimer.
15 1.4.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
16 1.4.2.2 nathanw * notice, this list of conditions and the following disclaimer in the
17 1.4.2.2 nathanw * documentation and/or other materials provided with the distribution.
18 1.4.2.2 nathanw * 3. All advertising materials mentioning features or use of this software
19 1.4.2.2 nathanw * must display the following acknowledgement:
20 1.4.2.2 nathanw * This product includes software developed by the NetBSD
21 1.4.2.2 nathanw * Foundation, Inc. and its contributors.
22 1.4.2.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.4.2.2 nathanw * contributors may be used to endorse or promote products derived
24 1.4.2.2 nathanw * from this software without specific prior written permission.
25 1.4.2.2 nathanw *
26 1.4.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.4.2.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.4.2.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.4.2.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.4.2.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.4.2.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.4.2.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.4.2.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.4.2.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.4.2.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.4.2.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
37 1.4.2.2 nathanw */
38 1.4.2.2 nathanw
39 1.4.2.2 nathanw /*
40 1.4.2.2 nathanw * 3Com 3c523 EtherLink/MC Ethernet card driver (uses i82586 Ethernet chip).
41 1.4.2.2 nathanw *
42 1.4.2.2 nathanw * The 3c523-specific hooks were derived from Linux driver (file
43 1.4.2.2 nathanw * drivers/net/3c523.[ch]).
44 1.4.2.2 nathanw *
45 1.4.2.2 nathanw * This driver uses generic i82586 stuff. See also ai(4), ef(4), ix(4).
46 1.4.2.2 nathanw */
47 1.4.2.2 nathanw
48 1.4.2.2 nathanw #include <sys/param.h>
49 1.4.2.2 nathanw #include <sys/systm.h>
50 1.4.2.2 nathanw #include <sys/mbuf.h>
51 1.4.2.2 nathanw #include <sys/errno.h>
52 1.4.2.2 nathanw #include <sys/device.h>
53 1.4.2.2 nathanw #include <sys/protosw.h>
54 1.4.2.2 nathanw #include <sys/socket.h>
55 1.4.2.2 nathanw
56 1.4.2.2 nathanw #include <net/if.h>
57 1.4.2.2 nathanw #include <net/if_types.h>
58 1.4.2.2 nathanw #include <net/if_media.h>
59 1.4.2.2 nathanw #include <net/if_ether.h>
60 1.4.2.2 nathanw
61 1.4.2.2 nathanw #include <machine/bus.h>
62 1.4.2.2 nathanw
63 1.4.2.2 nathanw #include <dev/ic/i82586reg.h>
64 1.4.2.2 nathanw #include <dev/ic/i82586var.h>
65 1.4.2.2 nathanw #include <dev/mca/mcadevs.h>
66 1.4.2.2 nathanw #include <dev/mca/mcavar.h>
67 1.4.2.2 nathanw
68 1.4.2.2 nathanw #include <dev/mca/3c523reg.h>
69 1.4.2.2 nathanw
70 1.4.2.2 nathanw struct elmc_mca_softc {
71 1.4.2.2 nathanw struct ie_softc sc_ie;
72 1.4.2.2 nathanw
73 1.4.2.2 nathanw bus_space_tag_t sc_regt; /* space tag for registers */
74 1.4.2.2 nathanw bus_space_handle_t sc_regh; /* space handle for registers */
75 1.4.2.2 nathanw
76 1.4.2.2 nathanw void *sc_ih; /* interrupt handle */
77 1.4.2.2 nathanw };
78 1.4.2.2 nathanw
79 1.4.2.2 nathanw int elmc_mca_match __P((struct device *, struct cfdata *, void *));
80 1.4.2.2 nathanw void elmc_mca_attach __P((struct device *, struct device *, void *));
81 1.4.2.2 nathanw
82 1.4.2.2 nathanw static void elmc_mca_copyin __P((struct ie_softc *, void *, int, size_t));
83 1.4.2.2 nathanw static void elmc_mca_copyout __P((struct ie_softc *, const void *, int, size_t));
84 1.4.2.2 nathanw static u_int16_t elmc_mca_read_16 __P((struct ie_softc *, int));
85 1.4.2.2 nathanw static void elmc_mca_write_16 __P((struct ie_softc *, int, u_int16_t));
86 1.4.2.2 nathanw static void elmc_mca_write_24 __P((struct ie_softc *, int, int));
87 1.4.2.2 nathanw static void elmc_mca_attn __P((struct ie_softc *, int));
88 1.4.2.2 nathanw static void elmc_mca_hwreset __P((struct ie_softc *, int));
89 1.4.2.2 nathanw static int elmc_mca_intrhook __P((struct ie_softc *, int));
90 1.4.2.2 nathanw
91 1.4.2.2 nathanw int
92 1.4.2.2 nathanw elmc_mca_match(struct device *parent, struct cfdata *cf, void *aux)
93 1.4.2.2 nathanw {
94 1.4.2.2 nathanw struct mca_attach_args *ma = aux;
95 1.4.2.2 nathanw
96 1.4.2.2 nathanw switch (ma->ma_id) {
97 1.4.2.2 nathanw case MCA_PRODUCT_3C523:
98 1.4.2.2 nathanw return 1;
99 1.4.2.2 nathanw }
100 1.4.2.2 nathanw
101 1.4.2.2 nathanw return 0;
102 1.4.2.2 nathanw }
103 1.4.2.2 nathanw
104 1.4.2.2 nathanw void
105 1.4.2.2 nathanw elmc_mca_attach(struct device *parent, struct device *self, void *aux)
106 1.4.2.2 nathanw {
107 1.4.2.2 nathanw struct elmc_mca_softc *asc = (void *) self;
108 1.4.2.2 nathanw struct ie_softc *sc = &asc->sc_ie;
109 1.4.2.2 nathanw struct mca_attach_args *ma = aux;
110 1.4.2.2 nathanw int pos2, pos3, i, revision;
111 1.4.2.2 nathanw int iobase, irq, pbram_addr;
112 1.4.2.2 nathanw bus_space_handle_t ioh, memh;
113 1.4.2.2 nathanw u_int8_t myaddr[ETHER_ADDR_LEN];
114 1.4.2.2 nathanw
115 1.4.2.2 nathanw pos2 = mca_conf_read(ma->ma_mc, ma->ma_slot, 2);
116 1.4.2.2 nathanw pos3 = mca_conf_read(ma->ma_mc, ma->ma_slot, 3);
117 1.4.2.2 nathanw
118 1.4.2.2 nathanw /*
119 1.4.2.2 nathanw * POS register 2: (adf pos0)
120 1.4.2.2 nathanw *
121 1.4.2.2 nathanw * 7 6 5 4 3 2 1 0
122 1.4.2.2 nathanw * \ \_/ \_/ \__ enable: 0=adapter disabled, 1=adapter enabled
123 1.4.2.2 nathanw * \ \ \____ I/O Address Range: 00=300-307, 01=1300-1307,
124 1.4.2.2 nathanw * \ \ 10=2300-2307, 11=3300-3307
125 1.4.2.2 nathanw * \ \______ Packet Buffer RAM Address Range:
126 1.4.2.2 nathanw * \ 00=0x0c0000-0x0c5fff 01=0x0c8000-0x0cdfff
127 1.4.2.2 nathanw * \ 10=0x0d0000-0x0d5fff 11=0x0d8000-0x0ddfff
128 1.4.2.2 nathanw * \______ Transceiver Type: 0=onboard(BNC) 1=ext(DIX)
129 1.4.2.2 nathanw *
130 1.4.2.2 nathanw * POS register 3: (adf pos1)
131 1.4.2.2 nathanw *
132 1.4.2.2 nathanw * 7 6 5 4 3 2 1 0
133 1.4.2.2 nathanw * \____/
134 1.4.2.2 nathanw * \__ Interrupt level: 0100=3, 0010=7, 1000=9, 0001=12
135 1.4.2.2 nathanw */
136 1.4.2.2 nathanw
137 1.4.2.2 nathanw iobase = ELMC_IOADDR_BASE + (0x1000 * ((pos2 & 0x6) >> 1));
138 1.4.2.2 nathanw
139 1.4.2.2 nathanw /* get irq */
140 1.4.2.2 nathanw switch (pos3 & 0x1f) {
141 1.4.2.2 nathanw case 4: irq = 3; break;
142 1.4.2.2 nathanw case 2: irq = 7; break;
143 1.4.2.2 nathanw case 8: irq = 9; break;
144 1.4.2.2 nathanw case 1: irq = 12; break;
145 1.4.2.2 nathanw }
146 1.4.2.2 nathanw
147 1.4.2.2 nathanw pbram_addr = ELMC_MADDR_BASE + (((pos2 & 24) >> 3) * 0x8000);
148 1.4.2.2 nathanw
149 1.4.2.3 nathanw printf(" slot %d irq %d: 3Com EtherLink/MC Ethernet Adapter (3C523)\n",
150 1.4.2.3 nathanw ma->ma_slot + 1, irq);
151 1.4.2.3 nathanw
152 1.4.2.2 nathanw /* map the pio registers */
153 1.4.2.2 nathanw if (bus_space_map(ma->ma_iot, iobase, ELMC_IOADDR_SIZE, 0, &ioh)) {
154 1.4.2.2 nathanw printf("%s: unable to map i/o space\n", sc->sc_dev.dv_xname);
155 1.4.2.2 nathanw return;
156 1.4.2.2 nathanw }
157 1.4.2.2 nathanw
158 1.4.2.2 nathanw /*
159 1.4.2.2 nathanw * 3c523 has a 24K memory. The first 16K is the shared memory, while
160 1.4.2.2 nathanw * the last 8K is for the EtherStart BIOS ROM, which we don't care
161 1.4.2.2 nathanw * about. Just use the first 16K.
162 1.4.2.2 nathanw */
163 1.4.2.2 nathanw if (bus_space_map(ma->ma_memt, pbram_addr, ELMC_MADDR_SIZE, 0, &memh)) {
164 1.4.2.2 nathanw printf("%s: unable to map memory space\n", sc->sc_dev.dv_xname);
165 1.4.2.2 nathanw if (pbram_addr == 0xc0000) {
166 1.4.2.2 nathanw printf("%s: memory space 0xc0000 may conflict with vga\n",
167 1.4.2.2 nathanw sc->sc_dev.dv_xname);
168 1.4.2.2 nathanw }
169 1.4.2.2 nathanw
170 1.4.2.2 nathanw bus_space_unmap(ma->ma_iot, ioh, ELMC_IOADDR_SIZE);
171 1.4.2.2 nathanw return;
172 1.4.2.2 nathanw }
173 1.4.2.2 nathanw
174 1.4.2.2 nathanw asc->sc_regt = ma->ma_iot;
175 1.4.2.2 nathanw asc->sc_regh = ioh;
176 1.4.2.2 nathanw
177 1.4.2.2 nathanw sc->hwinit = NULL;
178 1.4.2.2 nathanw sc->intrhook = elmc_mca_intrhook;
179 1.4.2.2 nathanw sc->hwreset = elmc_mca_hwreset;
180 1.4.2.2 nathanw sc->chan_attn = elmc_mca_attn;
181 1.4.2.2 nathanw
182 1.4.2.2 nathanw sc->ie_bus_barrier = NULL;
183 1.4.2.2 nathanw
184 1.4.2.2 nathanw sc->memcopyin = elmc_mca_copyin;
185 1.4.2.2 nathanw sc->memcopyout = elmc_mca_copyout;
186 1.4.2.2 nathanw sc->ie_bus_read16 = elmc_mca_read_16;
187 1.4.2.2 nathanw sc->ie_bus_write16 = elmc_mca_write_16;
188 1.4.2.2 nathanw sc->ie_bus_write24 = elmc_mca_write_24;
189 1.4.2.2 nathanw
190 1.4.2.2 nathanw sc->do_xmitnopchain = 0;
191 1.4.2.2 nathanw
192 1.4.2.2 nathanw sc->sc_mediachange = NULL;
193 1.4.2.2 nathanw sc->sc_mediastatus = NULL;
194 1.4.2.2 nathanw
195 1.4.2.2 nathanw sc->bt = ma->ma_memt;
196 1.4.2.2 nathanw sc->bh = memh;
197 1.4.2.2 nathanw
198 1.4.2.2 nathanw /* Map i/o space. */
199 1.4.2.2 nathanw sc->sc_msize = ELMC_MADDR_SIZE;
200 1.4.2.2 nathanw sc->sc_maddr = (void *)memh;
201 1.4.2.2 nathanw sc->sc_iobase = (char *)sc->sc_maddr + sc->sc_msize - (1 << 24);
202 1.4.2.2 nathanw
203 1.4.2.2 nathanw /* set up pointers to important on-card control structures */
204 1.4.2.2 nathanw sc->iscp = 0;
205 1.4.2.2 nathanw sc->scb = IE_ISCP_SZ;
206 1.4.2.2 nathanw sc->scp = sc->sc_msize + IE_SCP_ADDR - (1 << 24);
207 1.4.2.2 nathanw
208 1.4.2.2 nathanw sc->buf_area = sc->scb + IE_SCB_SZ;
209 1.4.2.2 nathanw sc->buf_area_sz = sc->sc_msize - IE_ISCP_SZ - IE_SCB_SZ - IE_SCP_SZ;
210 1.4.2.2 nathanw
211 1.4.2.2 nathanw /*
212 1.4.2.2 nathanw * According to docs, we might need to read the interrupt number and
213 1.4.2.2 nathanw * write it back to the IRQ select register, since the POST might not
214 1.4.2.2 nathanw * configure the IRQ properly.
215 1.4.2.2 nathanw */
216 1.4.2.2 nathanw (void) mca_conf_write(ma->ma_mc, ma->ma_slot, 3, pos3 & 0x1f);
217 1.4.2.2 nathanw
218 1.4.2.2 nathanw /* reset the card first */
219 1.4.2.2 nathanw elmc_mca_hwreset(sc, CARD_RESET);
220 1.4.2.2 nathanw delay(1000000 / ( 1<< 5));
221 1.4.2.2 nathanw
222 1.4.2.2 nathanw /* zero card memory */
223 1.4.2.2 nathanw bus_space_set_region_1(sc->bt, sc->bh, 0, 0, sc->sc_msize);
224 1.4.2.2 nathanw
225 1.4.2.2 nathanw /* set card to 16-bit bus mode */
226 1.4.2.2 nathanw bus_space_write_1(sc->bt, sc->bh, IE_SCP_BUS_USE((u_long)sc->scp), 0);
227 1.4.2.2 nathanw
228 1.4.2.2 nathanw /* set up pointers to key structures */
229 1.4.2.2 nathanw elmc_mca_write_24(sc, IE_SCP_ISCP((u_long)sc->scp), (u_long) sc->iscp);
230 1.4.2.2 nathanw elmc_mca_write_16(sc, IE_ISCP_SCB((u_long)sc->iscp), (u_long) sc->scb);
231 1.4.2.2 nathanw elmc_mca_write_24(sc, IE_ISCP_BASE((u_long)sc->iscp), (u_long) sc->iscp);
232 1.4.2.2 nathanw
233 1.4.2.2 nathanw /* flush setup of pointers, check if chip answers */
234 1.4.2.2 nathanw bus_space_barrier(sc->bt, sc->bh, 0, sc->sc_msize,
235 1.4.2.2 nathanw BUS_SPACE_BARRIER_WRITE);
236 1.4.2.2 nathanw if (!i82586_proberam(sc)) {
237 1.4.2.2 nathanw printf("%s: can't talk to i82586!\n", sc->sc_dev.dv_xname);
238 1.4.2.2 nathanw
239 1.4.2.2 nathanw bus_space_unmap(asc->sc_regt, asc->sc_regh, ELMC_IOADDR_SIZE);
240 1.4.2.2 nathanw bus_space_unmap(sc->bt, sc->bh, ELMC_MADDR_SIZE);
241 1.4.2.2 nathanw return;
242 1.4.2.2 nathanw }
243 1.4.2.2 nathanw
244 1.4.2.2 nathanw /* revision is stored in the first 4 bits of the revision register */
245 1.4.2.2 nathanw revision = (int) bus_space_read_1(asc->sc_regt, asc->sc_regh,
246 1.4.2.2 nathanw ELMC_REVISION) & ELMC_REVISION_MASK;
247 1.4.2.2 nathanw
248 1.4.2.2 nathanw /* dump known info */
249 1.4.2.2 nathanw printf("%s: rev %d, i/o %#04x-%#04x, mem %#06x-%#06x, %sternal xcvr\n",
250 1.4.2.2 nathanw sc->sc_dev.dv_xname, revision,
251 1.4.2.2 nathanw iobase, iobase + ELMC_IOADDR_SIZE - 1,
252 1.4.2.2 nathanw pbram_addr, pbram_addr + ELMC_MADDR_SIZE - 1,
253 1.4.2.2 nathanw (pos2 & 0x20) ? "ex" : "in");
254 1.4.2.2 nathanw
255 1.4.2.2 nathanw /*
256 1.4.2.2 nathanw * Hardware ethernet address is stored in the first six bytes
257 1.4.2.2 nathanw * of the IO space.
258 1.4.2.2 nathanw */
259 1.4.2.2 nathanw for(i=0; i < MIN(6, ETHER_ADDR_LEN); i++)
260 1.4.2.2 nathanw myaddr[i] = bus_space_read_1(asc->sc_regt, asc->sc_regh, i);
261 1.4.2.2 nathanw
262 1.4.2.2 nathanw printf("%s:", sc->sc_dev.dv_xname);
263 1.4.2.2 nathanw i82586_attach((void *)sc, "3C523", myaddr, NULL, 0, 0);
264 1.4.2.2 nathanw
265 1.4.2.2 nathanw /* establish interrupt handler */
266 1.4.2.2 nathanw asc->sc_ih = mca_intr_establish(ma->ma_mc, irq, IPL_NET, i82586_intr,
267 1.4.2.2 nathanw sc);
268 1.4.2.3 nathanw if (asc->sc_ih == NULL) {
269 1.4.2.2 nathanw printf("%s: couldn't establish interrupt handler\n",
270 1.4.2.2 nathanw sc->sc_dev.dv_xname);
271 1.4.2.3 nathanw return;
272 1.4.2.3 nathanw }
273 1.4.2.2 nathanw }
274 1.4.2.2 nathanw
275 1.4.2.2 nathanw static void
276 1.4.2.2 nathanw elmc_mca_copyin (sc, dst, offset, size)
277 1.4.2.2 nathanw struct ie_softc *sc;
278 1.4.2.2 nathanw void *dst;
279 1.4.2.2 nathanw int offset;
280 1.4.2.2 nathanw size_t size;
281 1.4.2.2 nathanw {
282 1.4.2.2 nathanw int dribble;
283 1.4.2.2 nathanw u_int8_t* bptr = dst;
284 1.4.2.2 nathanw
285 1.4.2.2 nathanw bus_space_barrier(sc->bt, sc->bh, offset, size,
286 1.4.2.2 nathanw BUS_SPACE_BARRIER_READ);
287 1.4.2.2 nathanw
288 1.4.2.2 nathanw if (offset % 2) {
289 1.4.2.2 nathanw *bptr = bus_space_read_1(sc->bt, sc->bh, offset);
290 1.4.2.2 nathanw offset++; bptr++; size--;
291 1.4.2.2 nathanw }
292 1.4.2.2 nathanw
293 1.4.2.2 nathanw dribble = size % 2;
294 1.4.2.2 nathanw bus_space_read_region_2(sc->bt, sc->bh, offset, (u_int16_t *) bptr,
295 1.4.2.2 nathanw size >> 1);
296 1.4.2.2 nathanw
297 1.4.2.2 nathanw if (dribble) {
298 1.4.2.2 nathanw bptr += size - 1;
299 1.4.2.2 nathanw offset += size - 1;
300 1.4.2.2 nathanw *bptr = bus_space_read_1(sc->bt, sc->bh, offset);
301 1.4.2.2 nathanw }
302 1.4.2.2 nathanw }
303 1.4.2.2 nathanw
304 1.4.2.2 nathanw static void
305 1.4.2.2 nathanw elmc_mca_copyout (sc, src, offset, size)
306 1.4.2.2 nathanw struct ie_softc *sc;
307 1.4.2.2 nathanw const void *src;
308 1.4.2.2 nathanw int offset;
309 1.4.2.2 nathanw size_t size;
310 1.4.2.2 nathanw {
311 1.4.2.2 nathanw int dribble;
312 1.4.2.2 nathanw int osize = size;
313 1.4.2.2 nathanw int ooffset = offset;
314 1.4.2.2 nathanw const u_int8_t* bptr = src;
315 1.4.2.2 nathanw
316 1.4.2.2 nathanw if (offset % 2) {
317 1.4.2.2 nathanw bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
318 1.4.2.2 nathanw offset++; bptr++; size--;
319 1.4.2.2 nathanw }
320 1.4.2.2 nathanw
321 1.4.2.2 nathanw dribble = size % 2;
322 1.4.2.2 nathanw bus_space_write_region_2(sc->bt, sc->bh, offset, (u_int16_t *)bptr,
323 1.4.2.2 nathanw size >> 1);
324 1.4.2.2 nathanw if (dribble) {
325 1.4.2.2 nathanw bptr += size - 1;
326 1.4.2.2 nathanw offset += size - 1;
327 1.4.2.2 nathanw bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
328 1.4.2.2 nathanw }
329 1.4.2.2 nathanw
330 1.4.2.2 nathanw bus_space_barrier(sc->bt, sc->bh, ooffset, osize,
331 1.4.2.2 nathanw BUS_SPACE_BARRIER_WRITE);
332 1.4.2.2 nathanw }
333 1.4.2.2 nathanw
334 1.4.2.2 nathanw static u_int16_t
335 1.4.2.2 nathanw elmc_mca_read_16 (sc, offset)
336 1.4.2.2 nathanw struct ie_softc *sc;
337 1.4.2.2 nathanw int offset;
338 1.4.2.2 nathanw {
339 1.4.2.2 nathanw bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_READ);
340 1.4.2.2 nathanw return bus_space_read_2(sc->bt, sc->bh, offset);
341 1.4.2.2 nathanw }
342 1.4.2.2 nathanw
343 1.4.2.2 nathanw static void
344 1.4.2.2 nathanw elmc_mca_write_16 (sc, offset, value)
345 1.4.2.2 nathanw struct ie_softc *sc;
346 1.4.2.2 nathanw int offset;
347 1.4.2.2 nathanw u_int16_t value;
348 1.4.2.2 nathanw {
349 1.4.2.2 nathanw bus_space_write_2(sc->bt, sc->bh, offset, value);
350 1.4.2.2 nathanw bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_WRITE);
351 1.4.2.2 nathanw }
352 1.4.2.2 nathanw
353 1.4.2.2 nathanw static void
354 1.4.2.2 nathanw elmc_mca_write_24 (sc, offset, addr)
355 1.4.2.2 nathanw struct ie_softc *sc;
356 1.4.2.2 nathanw int offset, addr;
357 1.4.2.2 nathanw {
358 1.4.2.2 nathanw bus_space_write_4(sc->bt, sc->bh, offset, addr +
359 1.4.2.2 nathanw (u_long) sc->sc_maddr - (u_long) sc->sc_iobase);
360 1.4.2.2 nathanw bus_space_barrier(sc->bt, sc->bh, offset, 4, BUS_SPACE_BARRIER_WRITE);
361 1.4.2.2 nathanw }
362 1.4.2.2 nathanw
363 1.4.2.2 nathanw /*
364 1.4.2.2 nathanw * Channel attention hook.
365 1.4.2.2 nathanw */
366 1.4.2.2 nathanw static void
367 1.4.2.2 nathanw elmc_mca_attn(sc, why)
368 1.4.2.2 nathanw struct ie_softc *sc;
369 1.4.2.2 nathanw int why;
370 1.4.2.2 nathanw {
371 1.4.2.2 nathanw struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc;
372 1.4.2.2 nathanw int intr = 0;
373 1.4.2.2 nathanw
374 1.4.2.2 nathanw switch (why) {
375 1.4.2.2 nathanw case CHIP_PROBE:
376 1.4.2.2 nathanw intr = 0;
377 1.4.2.2 nathanw break;
378 1.4.2.2 nathanw case CARD_RESET:
379 1.4.2.2 nathanw intr = ELMC_CTRL_INT;
380 1.4.2.2 nathanw break;
381 1.4.2.2 nathanw }
382 1.4.2.2 nathanw
383 1.4.2.2 nathanw bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
384 1.4.2.2 nathanw ELMC_CTRL_RST | ELMC_CTRL_BS3 | ELMC_CTRL_CHA | intr);
385 1.4.2.3 nathanw delay(1); /* should be > 500 ns */
386 1.4.2.2 nathanw bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
387 1.4.2.2 nathanw ELMC_CTRL_RST | ELMC_CTRL_BS3 | intr);
388 1.4.2.2 nathanw }
389 1.4.2.2 nathanw
390 1.4.2.2 nathanw /*
391 1.4.2.2 nathanw * Do full card hardware reset.
392 1.4.2.2 nathanw */
393 1.4.2.2 nathanw static void
394 1.4.2.2 nathanw elmc_mca_hwreset(sc, why)
395 1.4.2.2 nathanw struct ie_softc *sc;
396 1.4.2.2 nathanw int why;
397 1.4.2.2 nathanw {
398 1.4.2.2 nathanw struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc;
399 1.4.2.2 nathanw int intr = 0;
400 1.4.2.2 nathanw
401 1.4.2.2 nathanw switch (why) {
402 1.4.2.2 nathanw case CHIP_PROBE:
403 1.4.2.2 nathanw intr = 0;
404 1.4.2.2 nathanw break;
405 1.4.2.2 nathanw case CARD_RESET:
406 1.4.2.2 nathanw intr = ELMC_CTRL_INT;
407 1.4.2.2 nathanw break;
408 1.4.2.2 nathanw }
409 1.4.2.2 nathanw
410 1.4.2.2 nathanw /* toggle the RST bit low then high */
411 1.4.2.2 nathanw bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
412 1.4.2.2 nathanw ELMC_CTRL_BS3 | ELMC_CTRL_LOOP);
413 1.4.2.3 nathanw delay(1); /* should be > 500 ns */
414 1.4.2.2 nathanw bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
415 1.4.2.2 nathanw ELMC_CTRL_BS3 | ELMC_CTRL_LOOP | ELMC_CTRL_RST);
416 1.4.2.2 nathanw
417 1.4.2.2 nathanw elmc_mca_attn(sc, why);
418 1.4.2.2 nathanw }
419 1.4.2.2 nathanw
420 1.4.2.2 nathanw /*
421 1.4.2.2 nathanw * Interrupt hook.
422 1.4.2.2 nathanw */
423 1.4.2.2 nathanw static int
424 1.4.2.2 nathanw elmc_mca_intrhook(sc, why)
425 1.4.2.2 nathanw struct ie_softc *sc;
426 1.4.2.2 nathanw int why;
427 1.4.2.2 nathanw {
428 1.4.2.2 nathanw switch (why) {
429 1.4.2.2 nathanw case INTR_ACK:
430 1.4.2.2 nathanw elmc_mca_attn(sc, CHIP_PROBE);
431 1.4.2.2 nathanw break;
432 1.4.2.2 nathanw default:
433 1.4.2.2 nathanw /* do nothing */
434 1.4.2.2 nathanw break;
435 1.4.2.2 nathanw }
436 1.4.2.2 nathanw
437 1.4.2.2 nathanw return (0);
438 1.4.2.2 nathanw }
439 1.4.2.2 nathanw
440 1.4.2.2 nathanw struct cfattach elmc_mca_ca = {
441 1.4.2.2 nathanw sizeof(struct elmc_mca_softc), elmc_mca_match, elmc_mca_attach
442 1.4.2.2 nathanw };
443