if_elmc_mca.c revision 1.1 1 /* $NetBSD: if_elmc_mca.c,v 1.1 2001/03/16 23:03:15 jdolecek Exp $ */
2
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Rafal K. Boni and Jaromir Dolecek.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * 3Com 3c523 EtherLink/MC Ethernet card driver (uses i82586 Ethernet chip).
41 *
42 * The 3c523-specific hooks were derived from Linux driver (file
43 * drivers/net/3c523.[ch]).
44 *
45 * This driver uses generic i82586 stuff. See also ai(4), ef(4), ix(4).
46 *
47 * Known issues:
48 * o seems like the initialization is not bullet proof; initially, the
49 * card I had responded with "incorrect termination" warning and started
50 * to work correctly after I booted the PS/2 with Slackware 3.3 bootdisk
51 */
52
53 #include <sys/param.h>
54 #include <sys/systm.h>
55 #include <sys/mbuf.h>
56 #include <sys/errno.h>
57 #include <sys/device.h>
58 #include <sys/protosw.h>
59 #include <sys/socket.h>
60 #include <sys/syslog.h>
61 #include <sys/reboot.h>
62
63 #include <net/if.h>
64 #include <net/if_dl.h>
65 #include <net/if_types.h>
66 #include <net/if_media.h>
67 #include <net/if_ether.h>
68
69 #include <machine/cpu.h>
70 #include <machine/bus.h>
71 #include <machine/intr.h>
72
73 #include <dev/isa/isareg.h>
74 #include <dev/isa/isavar.h>
75
76 #include <dev/ic/i82586reg.h>
77 #include <dev/ic/i82586var.h>
78 #include <dev/isa/if_efreg.h>
79 #include <dev/isa/elink.h>
80
81 #include <dev/mca/mcadevs.h>
82 #include <dev/mca/mcavar.h>
83
84 #include <dev/mca/3c523reg.h>
85
86 struct elmc_mca_softc {
87 struct ie_softc sc_ie;
88
89 bus_space_tag_t sc_regt; /* space tag for registers */
90 bus_space_handle_t sc_regh; /* space handle for registers */
91
92 void *sc_ih; /* interrupt handle */
93 };
94
95 int elmc_mca_match __P((struct device *, struct cfdata *, void *));
96 void elmc_mca_attach __P((struct device *, struct device *, void *));
97
98 static void elmc_mca_copyin __P((struct ie_softc *, void *, int, size_t));
99 static void elmc_mca_copyout __P((struct ie_softc *, const void *, int, size_t));
100 static u_int16_t elmc_mca_read_16 __P((struct ie_softc *, int));
101 static void elmc_mca_write_16 __P((struct ie_softc *, int, u_int16_t));
102 static void elmc_mca_write_24 __P((struct ie_softc *, int, int));
103 static void elmc_mca_attn __P((struct ie_softc *, int));
104 static void elmc_mca_hwreset __P((struct ie_softc *, int));
105 static int elmc_mca_intrhook __P((struct ie_softc *, int));
106
107 int
108 elmc_mca_match(struct device *parent, struct cfdata *cf, void *aux)
109 {
110 struct mca_attach_args *ma = aux;
111
112 switch (ma->ma_id) {
113 case MCA_PRODUCT_3C523:
114 return 1;
115 }
116
117 return 0;
118 }
119
120 void
121 elmc_mca_attach(struct device *parent, struct device *self, void *aux)
122 {
123 struct elmc_mca_softc *asc = (void *) self;
124 struct ie_softc *sc = &asc->sc_ie;
125 struct mca_attach_args *ma = aux;
126 int pos2, pos3, i, revision;
127 char buf[100];
128 int iobase, irq, pbram_addr;
129 bus_space_handle_t ioh, memh;
130 u_int8_t myaddr[ETHER_ADDR_LEN];
131
132 mca_devinfo(ma->ma_id, buf);
133 printf(" slot %d: %s\n", ma->ma_slot + 1, buf);
134
135 pos2 = mca_conf_read(ma->ma_mc, ma->ma_slot, 2);
136 pos3 = mca_conf_read(ma->ma_mc, ma->ma_slot, 3);
137
138 /*
139 * POS register 2: (adf pos0)
140 *
141 * 7 6 5 4 3 2 1 0
142 * \ \_/ \_/ \__ enable: 0=adapter disabled, 1=adapter enabled
143 * \ \ \____ I/O Address Range: 00=300-307, 01=1300-1307,
144 * \ \ 10=2300-2307, 11=3300-3307
145 * \ \______ Packet Buffer RAM Address Range:
146 * \ 00=0x0c0000-0x0c5fff 01=0x0c8000-0x0cdfff
147 * \ 10=0x0d0000-0x0d5fff 11=0x0d8000-0x0ddfff
148 * \______ Transceiver Type: 0=onboard(BNC) 1=ext(DIX)
149 *
150 * POS register 3: (adf pos1)
151 *
152 * 7 6 5 4 3 2 1 0
153 * \____/
154 * \__ Interrupt level: 0100=3, 0010=7, 1000=9, 0001=12
155 */
156
157 iobase = ELMC_IOADDR_BASE + (0x1000 * ((pos2 & 0x6) >> 1));
158
159 /* get irq */
160 switch (pos3 & 0x1f) {
161 case 4: irq = 3; break;
162 case 2: irq = 7; break;
163 case 8: irq = 9; break;
164 case 1: irq = 12; break;
165 }
166
167 pbram_addr = ELMC_MADDR_BASE + (((pos2 & 24) >> 3) * 0x8000);
168
169 /* map the pio registers */
170 if (bus_space_map(ma->ma_iot, iobase, ELMC_IOADDR_SIZE, 0, &ioh)) {
171 printf("%s: unable to map i/o space\n", sc->sc_dev.dv_xname);
172 return;
173 }
174
175 /*
176 * 3c523 has a 24K memory. The first 16K is the shared memory, while
177 * the last 8K is for the EtherStart BIOS ROM, which we don't care
178 * about. Just use the first 16K.
179 */
180 if (bus_space_map(ma->ma_memt, pbram_addr, ELMC_MADDR_SIZE, 0, &memh)) {
181 printf("%s: unable to map memory space\n", sc->sc_dev.dv_xname);
182 if (pbram_addr == 0xc0000) {
183 printf("%s: memory space 0xc0000 may conflict with vga\n",
184 sc->sc_dev.dv_xname);
185 }
186
187 bus_space_unmap(ma->ma_iot, ioh, ELMC_IOADDR_SIZE);
188 return;
189 }
190
191 asc->sc_regt = ma->ma_iot;
192 asc->sc_regh = ioh;
193
194 sc->hwinit = NULL;
195 sc->intrhook = elmc_mca_intrhook;
196 sc->hwreset = elmc_mca_hwreset;
197 sc->chan_attn = elmc_mca_attn;
198
199 sc->ie_bus_barrier = NULL;
200
201 sc->memcopyin = elmc_mca_copyin;
202 sc->memcopyout = elmc_mca_copyout;
203 sc->ie_bus_read16 = elmc_mca_read_16;
204 sc->ie_bus_write16 = elmc_mca_write_16;
205 sc->ie_bus_write24 = elmc_mca_write_24;
206
207 sc->do_xmitnopchain = 0;
208
209 sc->sc_mediachange = NULL;
210 sc->sc_mediastatus = NULL;
211
212 sc->bt = ma->ma_memt;
213 sc->bh = memh;
214
215 /* Map i/o space. */
216 sc->sc_msize = ELMC_MADDR_SIZE;
217 sc->sc_maddr = (void *)memh;
218 sc->sc_iobase = (char *)sc->sc_maddr + sc->sc_msize - (1 << 24);
219
220 /* set up pointers to important on-card control structures */
221 sc->iscp = 0;
222 sc->scb = IE_ISCP_SZ;
223 sc->scp = sc->sc_msize + IE_SCP_ADDR - (1 << 24);
224
225 sc->buf_area = sc->scb + IE_SCB_SZ;
226 sc->buf_area_sz = sc->sc_msize - IE_ISCP_SZ - IE_SCB_SZ - IE_SCP_SZ;
227
228 /* reset the card first */
229 elmc_mca_hwreset(sc, CARD_RESET);
230 delay(1000000 / ( 1<< 5));
231
232 /* zero card memory */
233 bus_space_set_region_1(sc->bt, sc->bh, 0, 0, sc->sc_msize);
234
235 /* set card to 16-bit bus mode */
236 bus_space_write_1(sc->bt, sc->bh, IE_SCP_BUS_USE((u_long)sc->scp), 0);
237
238 /* set up pointers to key structures */
239 elmc_mca_write_24(sc, IE_SCP_ISCP((u_long)sc->scp), (u_long) sc->iscp);
240 elmc_mca_write_16(sc, IE_ISCP_SCB((u_long)sc->iscp), (u_long) sc->scb);
241 elmc_mca_write_24(sc, IE_ISCP_BASE((u_long)sc->iscp), (u_long) sc->iscp);
242
243 /* flush setup of pointers, check if chip answers */
244 bus_space_barrier(sc->bt, sc->bh, 0, sc->sc_msize,
245 BUS_SPACE_BARRIER_WRITE);
246 if (!i82586_proberam(sc)) {
247 printf("%s: can't talk to i82586!\n", sc->sc_dev.dv_xname);
248
249 bus_space_unmap(asc->sc_regt, asc->sc_regh, ELMC_IOADDR_SIZE);
250 bus_space_unmap(sc->bt, sc->bh, ELMC_MADDR_SIZE);
251 return;
252 }
253
254 /* revision is stored in the first 4 bits of the revision register */
255 revision = (int) bus_space_read_1(asc->sc_regt, asc->sc_regh,
256 ELMC_REVISION) & ELMC_REVISION_MASK;
257
258 /* dump known info */
259 printf("%s: rev %d, i/o %#04x-%#04x, mem %#06x-%#06x, %sternal xcvr\n",
260 sc->sc_dev.dv_xname, revision,
261 iobase, iobase + ELMC_IOADDR_SIZE - 1,
262 pbram_addr, pbram_addr + ELMC_MADDR_SIZE - 1,
263 (pos2 & 0x20) ? "ex" : "in");
264
265 /*
266 * Hardware ethernet address is stored in the first six bytes
267 * of the IO space.
268 */
269 for(i=0; i < MIN(6, ETHER_ADDR_LEN); i++)
270 myaddr[i] = bus_space_read_1(asc->sc_regt, asc->sc_regh, i);
271
272 printf("%s:", sc->sc_dev.dv_xname);
273 i82586_attach((void *)sc, "3C523", myaddr, NULL, 0, 0);
274
275 /* establish interrupt handler */
276 asc->sc_ih = mca_intr_establish(ma->ma_mc, irq, IPL_NET, i82586_intr,
277 sc);
278 if (asc->sc_ih == NULL)
279 printf("%s: couldn't establish interrupt handler\n",
280 sc->sc_dev.dv_xname);
281 else
282 printf("%s: interrupting at irq %d\n", sc->sc_dev.dv_xname, irq);
283
284 /*
285 * According to docs, we might need to read the interrupt number and
286 * write it back to the IRQ select register, since the POST might not
287 * configure the IRQ properly.
288 */
289 (void) mca_conf_write(ma->ma_mc, ma->ma_slot, 3, pos3 & 0x1f);
290
291 return;
292 }
293
294 static void
295 elmc_mca_copyin (sc, dst, offset, size)
296 struct ie_softc *sc;
297 void *dst;
298 int offset;
299 size_t size;
300 {
301 int dribble;
302 u_int8_t* bptr = dst;
303
304 bus_space_barrier(sc->bt, sc->bh, offset, size,
305 BUS_SPACE_BARRIER_READ);
306
307 if (offset % 2) {
308 *bptr = bus_space_read_1(sc->bt, sc->bh, offset);
309 offset++; bptr++; size--;
310 }
311
312 dribble = size % 2;
313 bus_space_read_region_2(sc->bt, sc->bh, offset, (u_int16_t *) bptr,
314 size >> 1);
315
316 if (dribble) {
317 bptr += size - 1;
318 offset += size - 1;
319 *bptr = bus_space_read_1(sc->bt, sc->bh, offset);
320 }
321 }
322
323 static void
324 elmc_mca_copyout (sc, src, offset, size)
325 struct ie_softc *sc;
326 const void *src;
327 int offset;
328 size_t size;
329 {
330 int dribble;
331 int osize = size;
332 int ooffset = offset;
333 const u_int8_t* bptr = src;
334
335 if (offset % 2) {
336 bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
337 offset++; bptr++; size--;
338 }
339
340 dribble = size % 2;
341 bus_space_write_region_2(sc->bt, sc->bh, offset, (u_int16_t *)bptr,
342 size >> 1);
343 if (dribble) {
344 bptr += size - 1;
345 offset += size - 1;
346 bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
347 }
348
349 bus_space_barrier(sc->bt, sc->bh, ooffset, osize,
350 BUS_SPACE_BARRIER_WRITE);
351 }
352
353 static u_int16_t
354 elmc_mca_read_16 (sc, offset)
355 struct ie_softc *sc;
356 int offset;
357 {
358 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_READ);
359 return bus_space_read_2(sc->bt, sc->bh, offset);
360 }
361
362 static void
363 elmc_mca_write_16 (sc, offset, value)
364 struct ie_softc *sc;
365 int offset;
366 u_int16_t value;
367 {
368 bus_space_write_2(sc->bt, sc->bh, offset, value);
369 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_WRITE);
370 }
371
372 static void
373 elmc_mca_write_24 (sc, offset, addr)
374 struct ie_softc *sc;
375 int offset, addr;
376 {
377 bus_space_write_4(sc->bt, sc->bh, offset, addr +
378 (u_long) sc->sc_maddr - (u_long) sc->sc_iobase);
379 bus_space_barrier(sc->bt, sc->bh, offset, 4, BUS_SPACE_BARRIER_WRITE);
380 }
381
382 /*
383 * Channel attention hook.
384 */
385 static void
386 elmc_mca_attn(sc, why)
387 struct ie_softc *sc;
388 int why;
389 {
390 struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc;
391 int intr = 0;
392
393 switch (why) {
394 case CHIP_PROBE:
395 intr = 0;
396 break;
397 case CARD_RESET:
398 intr = ELMC_CTRL_INT;
399 break;
400 }
401
402 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
403 ELMC_CTRL_RST | ELMC_CTRL_BS3 | ELMC_CTRL_CHA | intr);
404 delay(16); /* should be > 500 ns */
405 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
406 ELMC_CTRL_RST | ELMC_CTRL_BS3 | intr);
407 }
408
409 /*
410 * Do full card hardware reset.
411 */
412 static void
413 elmc_mca_hwreset(sc, why)
414 struct ie_softc *sc;
415 int why;
416 {
417 struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc;
418 int intr = 0;
419
420 switch (why) {
421 case CHIP_PROBE:
422 intr = 0;
423 break;
424 case CARD_RESET:
425 intr = ELMC_CTRL_INT;
426 break;
427 }
428
429 /* toggle the RST bit low then high */
430 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
431 ELMC_CTRL_BS3 | ELMC_CTRL_LOOP);
432 delay(16); /* should be > 500 ns */
433 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
434 ELMC_CTRL_BS3 | ELMC_CTRL_LOOP | ELMC_CTRL_RST);
435
436 elmc_mca_attn(sc, why);
437 }
438
439 /*
440 * Interrupt hook.
441 */
442 static int
443 elmc_mca_intrhook(sc, why)
444 struct ie_softc *sc;
445 int why;
446 {
447 switch (why) {
448 case INTR_ACK:
449 elmc_mca_attn(sc, CHIP_PROBE);
450 break;
451 default:
452 /* do nothing */
453 break;
454 }
455
456 return (0);
457 }
458
459 struct cfattach elmc_mca_ca = {
460 sizeof(struct elmc_mca_softc), elmc_mca_match, elmc_mca_attach
461 };
462