if_elmc_mca.c revision 1.10
1 /* $NetBSD: if_elmc_mca.c,v 1.10 2002/09/30 21:36:45 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Rafal K. Boni and Jaromir Dolecek. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * 3Com 3c523 EtherLink/MC Ethernet card driver (uses i82586 Ethernet chip). 41 * 42 * The 3c523-specific hooks were derived from Linux driver (file 43 * drivers/net/3c523.[ch]). 44 * 45 * This driver uses generic i82586 stuff. See also ai(4), ef(4), ix(4). 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: if_elmc_mca.c,v 1.10 2002/09/30 21:36:45 thorpej Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/mbuf.h> 54 #include <sys/errno.h> 55 #include <sys/device.h> 56 #include <sys/protosw.h> 57 #include <sys/socket.h> 58 59 #include <net/if.h> 60 #include <net/if_types.h> 61 #include <net/if_media.h> 62 #include <net/if_ether.h> 63 64 #include <machine/bus.h> 65 66 #include <dev/ic/i82586reg.h> 67 #include <dev/ic/i82586var.h> 68 #include <dev/mca/mcadevs.h> 69 #include <dev/mca/mcavar.h> 70 71 #include <dev/mca/3c523reg.h> 72 73 struct elmc_mca_softc { 74 struct ie_softc sc_ie; 75 76 bus_space_tag_t sc_regt; /* space tag for registers */ 77 bus_space_handle_t sc_regh; /* space handle for registers */ 78 79 void *sc_ih; /* interrupt handle */ 80 }; 81 82 int elmc_mca_match __P((struct device *, struct cfdata *, void *)); 83 void elmc_mca_attach __P((struct device *, struct device *, void *)); 84 85 static void elmc_mca_copyin __P((struct ie_softc *, void *, int, size_t)); 86 static void elmc_mca_copyout __P((struct ie_softc *, const void *, int, size_t)); 87 static u_int16_t elmc_mca_read_16 __P((struct ie_softc *, int)); 88 static void elmc_mca_write_16 __P((struct ie_softc *, int, u_int16_t)); 89 static void elmc_mca_write_24 __P((struct ie_softc *, int, int)); 90 static void elmc_mca_attn __P((struct ie_softc *, int)); 91 static void elmc_mca_hwreset __P((struct ie_softc *, int)); 92 static int elmc_mca_intrhook __P((struct ie_softc *, int)); 93 94 int 95 elmc_mca_match(struct device *parent, struct cfdata *cf, void *aux) 96 { 97 struct mca_attach_args *ma = aux; 98 99 switch (ma->ma_id) { 100 case MCA_PRODUCT_3C523: 101 return 1; 102 } 103 104 return 0; 105 } 106 107 void 108 elmc_mca_attach(struct device *parent, struct device *self, void *aux) 109 { 110 struct elmc_mca_softc *asc = (void *) self; 111 struct ie_softc *sc = &asc->sc_ie; 112 struct mca_attach_args *ma = aux; 113 int pos2, pos3, i, revision; 114 int iobase, irq, pbram_addr; 115 bus_space_handle_t ioh, memh; 116 u_int8_t myaddr[ETHER_ADDR_LEN]; 117 118 pos2 = mca_conf_read(ma->ma_mc, ma->ma_slot, 2); 119 pos3 = mca_conf_read(ma->ma_mc, ma->ma_slot, 3); 120 121 /* 122 * POS register 2: (adf pos0) 123 * 124 * 7 6 5 4 3 2 1 0 125 * \ \_/ \_/ \__ enable: 0=adapter disabled, 1=adapter enabled 126 * \ \ \____ I/O Address Range: 00=300-307, 01=1300-1307, 127 * \ \ 10=2300-2307, 11=3300-3307 128 * \ \______ Packet Buffer RAM Address Range: 129 * \ 00=0x0c0000-0x0c5fff 01=0x0c8000-0x0cdfff 130 * \ 10=0x0d0000-0x0d5fff 11=0x0d8000-0x0ddfff 131 * \______ Transceiver Type: 0=onboard(BNC) 1=ext(DIX) 132 * 133 * POS register 3: (adf pos1) 134 * 135 * 7 6 5 4 3 2 1 0 136 * \____/ 137 * \__ Interrupt level: 0100=3, 0010=7, 1000=9, 0001=12 138 */ 139 140 iobase = ELMC_IOADDR_BASE + (0x1000 * ((pos2 & 0x6) >> 1)); 141 142 /* get irq */ 143 switch (pos3 & 0x1f) { 144 case 4: irq = 3; break; 145 case 2: irq = 7; break; 146 case 8: irq = 9; break; 147 case 1: irq = 12; break; 148 } 149 150 pbram_addr = ELMC_MADDR_BASE + (((pos2 & 24) >> 3) * 0x8000); 151 152 printf(" slot %d irq %d: 3Com EtherLink/MC Ethernet Adapter (3C523)\n", 153 ma->ma_slot + 1, irq); 154 155 /* map the pio registers */ 156 if (bus_space_map(ma->ma_iot, iobase, ELMC_IOADDR_SIZE, 0, &ioh)) { 157 printf("%s: unable to map i/o space\n", sc->sc_dev.dv_xname); 158 return; 159 } 160 161 /* 162 * 3c523 has a 24K memory. The first 16K is the shared memory, while 163 * the last 8K is for the EtherStart BIOS ROM, which we don't care 164 * about. Just use the first 16K. 165 */ 166 if (bus_space_map(ma->ma_memt, pbram_addr, ELMC_MADDR_SIZE, 0, &memh)) { 167 printf("%s: unable to map memory space\n", sc->sc_dev.dv_xname); 168 if (pbram_addr == 0xc0000) { 169 printf("%s: memory space 0xc0000 may conflict with vga\n", 170 sc->sc_dev.dv_xname); 171 } 172 173 bus_space_unmap(ma->ma_iot, ioh, ELMC_IOADDR_SIZE); 174 return; 175 } 176 177 asc->sc_regt = ma->ma_iot; 178 asc->sc_regh = ioh; 179 180 sc->hwinit = NULL; 181 sc->intrhook = elmc_mca_intrhook; 182 sc->hwreset = elmc_mca_hwreset; 183 sc->chan_attn = elmc_mca_attn; 184 185 sc->ie_bus_barrier = NULL; 186 187 sc->memcopyin = elmc_mca_copyin; 188 sc->memcopyout = elmc_mca_copyout; 189 sc->ie_bus_read16 = elmc_mca_read_16; 190 sc->ie_bus_write16 = elmc_mca_write_16; 191 sc->ie_bus_write24 = elmc_mca_write_24; 192 193 sc->do_xmitnopchain = 0; 194 195 sc->sc_mediachange = NULL; 196 sc->sc_mediastatus = NULL; 197 198 sc->bt = ma->ma_memt; 199 sc->bh = memh; 200 201 /* Map i/o space. */ 202 sc->sc_msize = ELMC_MADDR_SIZE; 203 sc->sc_maddr = (void *)memh; 204 sc->sc_iobase = (char *)sc->sc_maddr + sc->sc_msize - (1 << 24); 205 206 /* set up pointers to important on-card control structures */ 207 sc->iscp = 0; 208 sc->scb = IE_ISCP_SZ; 209 sc->scp = sc->sc_msize + IE_SCP_ADDR - (1 << 24); 210 211 sc->buf_area = sc->scb + IE_SCB_SZ; 212 sc->buf_area_sz = sc->sc_msize - IE_ISCP_SZ - IE_SCB_SZ - IE_SCP_SZ; 213 214 /* 215 * According to docs, we might need to read the interrupt number and 216 * write it back to the IRQ select register, since the POST might not 217 * configure the IRQ properly. 218 */ 219 (void) mca_conf_write(ma->ma_mc, ma->ma_slot, 3, pos3 & 0x1f); 220 221 /* reset the card first */ 222 elmc_mca_hwreset(sc, CARD_RESET); 223 delay(1000000 / ( 1<< 5)); 224 225 /* zero card memory */ 226 bus_space_set_region_1(sc->bt, sc->bh, 0, 0, sc->sc_msize); 227 228 /* set card to 16-bit bus mode */ 229 bus_space_write_1(sc->bt, sc->bh, IE_SCP_BUS_USE((u_long)sc->scp), 230 IE_SYSBUS_16BIT); 231 232 /* set up pointers to key structures */ 233 elmc_mca_write_24(sc, IE_SCP_ISCP((u_long)sc->scp), (u_long) sc->iscp); 234 elmc_mca_write_16(sc, IE_ISCP_SCB((u_long)sc->iscp), (u_long) sc->scb); 235 elmc_mca_write_24(sc, IE_ISCP_BASE((u_long)sc->iscp), (u_long) sc->iscp); 236 237 /* flush setup of pointers, check if chip answers */ 238 bus_space_barrier(sc->bt, sc->bh, 0, sc->sc_msize, 239 BUS_SPACE_BARRIER_WRITE); 240 if (!i82586_proberam(sc)) { 241 printf("%s: can't talk to i82586!\n", sc->sc_dev.dv_xname); 242 243 bus_space_unmap(asc->sc_regt, asc->sc_regh, ELMC_IOADDR_SIZE); 244 bus_space_unmap(sc->bt, sc->bh, ELMC_MADDR_SIZE); 245 return; 246 } 247 248 /* revision is stored in the first 4 bits of the revision register */ 249 revision = (int) bus_space_read_1(asc->sc_regt, asc->sc_regh, 250 ELMC_REVISION) & ELMC_REVISION_MASK; 251 252 /* dump known info */ 253 printf("%s: rev %d, i/o %#04x-%#04x, mem %#06x-%#06x, %sternal xcvr\n", 254 sc->sc_dev.dv_xname, revision, 255 iobase, iobase + ELMC_IOADDR_SIZE - 1, 256 pbram_addr, pbram_addr + ELMC_MADDR_SIZE - 1, 257 (pos2 & 0x20) ? "ex" : "in"); 258 259 /* 260 * Hardware ethernet address is stored in the first six bytes 261 * of the IO space. 262 */ 263 for(i=0; i < MIN(6, ETHER_ADDR_LEN); i++) 264 myaddr[i] = bus_space_read_1(asc->sc_regt, asc->sc_regh, i); 265 266 printf("%s:", sc->sc_dev.dv_xname); 267 i82586_attach((void *)sc, "3C523", myaddr, NULL, 0, 0); 268 269 /* establish interrupt handler */ 270 asc->sc_ih = mca_intr_establish(ma->ma_mc, irq, IPL_NET, i82586_intr, 271 sc); 272 if (asc->sc_ih == NULL) { 273 printf("%s: couldn't establish interrupt handler\n", 274 sc->sc_dev.dv_xname); 275 return; 276 } 277 } 278 279 static void 280 elmc_mca_copyin (sc, dst, offset, size) 281 struct ie_softc *sc; 282 void *dst; 283 int offset; 284 size_t size; 285 { 286 int dribble; 287 u_int8_t* bptr = dst; 288 289 bus_space_barrier(sc->bt, sc->bh, offset, size, 290 BUS_SPACE_BARRIER_READ); 291 292 if (offset % 2) { 293 *bptr = bus_space_read_1(sc->bt, sc->bh, offset); 294 offset++; bptr++; size--; 295 } 296 297 dribble = size % 2; 298 bus_space_read_region_2(sc->bt, sc->bh, offset, (u_int16_t *) bptr, 299 size >> 1); 300 301 if (dribble) { 302 bptr += size - 1; 303 offset += size - 1; 304 *bptr = bus_space_read_1(sc->bt, sc->bh, offset); 305 } 306 } 307 308 static void 309 elmc_mca_copyout (sc, src, offset, size) 310 struct ie_softc *sc; 311 const void *src; 312 int offset; 313 size_t size; 314 { 315 int dribble; 316 int osize = size; 317 int ooffset = offset; 318 const u_int8_t* bptr = src; 319 320 if (offset % 2) { 321 bus_space_write_1(sc->bt, sc->bh, offset, *bptr); 322 offset++; bptr++; size--; 323 } 324 325 dribble = size % 2; 326 bus_space_write_region_2(sc->bt, sc->bh, offset, (u_int16_t *)bptr, 327 size >> 1); 328 if (dribble) { 329 bptr += size - 1; 330 offset += size - 1; 331 bus_space_write_1(sc->bt, sc->bh, offset, *bptr); 332 } 333 334 bus_space_barrier(sc->bt, sc->bh, ooffset, osize, 335 BUS_SPACE_BARRIER_WRITE); 336 } 337 338 static u_int16_t 339 elmc_mca_read_16 (sc, offset) 340 struct ie_softc *sc; 341 int offset; 342 { 343 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_READ); 344 return bus_space_read_2(sc->bt, sc->bh, offset); 345 } 346 347 static void 348 elmc_mca_write_16 (sc, offset, value) 349 struct ie_softc *sc; 350 int offset; 351 u_int16_t value; 352 { 353 bus_space_write_2(sc->bt, sc->bh, offset, value); 354 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_WRITE); 355 } 356 357 static void 358 elmc_mca_write_24 (sc, offset, addr) 359 struct ie_softc *sc; 360 int offset, addr; 361 { 362 bus_space_write_4(sc->bt, sc->bh, offset, addr + 363 (u_long) sc->sc_maddr - (u_long) sc->sc_iobase); 364 bus_space_barrier(sc->bt, sc->bh, offset, 4, BUS_SPACE_BARRIER_WRITE); 365 } 366 367 /* 368 * Channel attention hook. 369 */ 370 static void 371 elmc_mca_attn(sc, why) 372 struct ie_softc *sc; 373 int why; 374 { 375 struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc; 376 int intr = 0; 377 378 switch (why) { 379 case CHIP_PROBE: 380 intr = 0; 381 break; 382 case CARD_RESET: 383 intr = ELMC_CTRL_INT; 384 break; 385 } 386 387 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL, 388 ELMC_CTRL_RST | ELMC_CTRL_BS3 | ELMC_CTRL_CHA | intr); 389 delay(1); /* should be > 500 ns */ 390 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL, 391 ELMC_CTRL_RST | ELMC_CTRL_BS3 | intr); 392 } 393 394 /* 395 * Do full card hardware reset. 396 */ 397 static void 398 elmc_mca_hwreset(sc, why) 399 struct ie_softc *sc; 400 int why; 401 { 402 struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc; 403 int intr = 0; 404 405 switch (why) { 406 case CHIP_PROBE: 407 intr = 0; 408 break; 409 case CARD_RESET: 410 intr = ELMC_CTRL_INT; 411 break; 412 } 413 414 /* toggle the RST bit low then high */ 415 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL, 416 ELMC_CTRL_BS3 | ELMC_CTRL_LOOP); 417 delay(1); /* should be > 500 ns */ 418 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL, 419 ELMC_CTRL_BS3 | ELMC_CTRL_LOOP | ELMC_CTRL_RST); 420 421 elmc_mca_attn(sc, why); 422 } 423 424 /* 425 * Interrupt hook. 426 */ 427 static int 428 elmc_mca_intrhook(sc, why) 429 struct ie_softc *sc; 430 int why; 431 { 432 switch (why) { 433 case INTR_ACK: 434 elmc_mca_attn(sc, CHIP_PROBE); 435 break; 436 default: 437 /* do nothing */ 438 break; 439 } 440 441 return (0); 442 } 443 444 CFATTACH_DECL(elmc_mca, sizeof(struct elmc_mca_softc), 445 elmc_mca_match, elmc_mca_attach, NULL, NULL) 446
Indexes created Tue Sep 30 11:09:46 GMT 2025