if_elmc_mca.c revision 1.2 1 /* $NetBSD: if_elmc_mca.c,v 1.2 2001/03/17 16:59:29 jdolecek Exp $ */
2
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Rafal K. Boni and Jaromir Dolecek.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * 3Com 3c523 EtherLink/MC Ethernet card driver (uses i82586 Ethernet chip).
41 *
42 * The 3c523-specific hooks were derived from Linux driver (file
43 * drivers/net/3c523.[ch]).
44 *
45 * This driver uses generic i82586 stuff. See also ai(4), ef(4), ix(4).
46 */
47
48 #include <sys/param.h>
49 #include <sys/systm.h>
50 #include <sys/mbuf.h>
51 #include <sys/errno.h>
52 #include <sys/device.h>
53 #include <sys/protosw.h>
54 #include <sys/socket.h>
55 #include <sys/syslog.h>
56 #include <sys/reboot.h>
57
58 #include <net/if.h>
59 #include <net/if_dl.h>
60 #include <net/if_types.h>
61 #include <net/if_media.h>
62 #include <net/if_ether.h>
63
64 #include <machine/cpu.h>
65 #include <machine/bus.h>
66 #include <machine/intr.h>
67
68 #include <dev/isa/isareg.h>
69 #include <dev/isa/isavar.h>
70
71 #include <dev/ic/i82586reg.h>
72 #include <dev/ic/i82586var.h>
73 #include <dev/isa/if_efreg.h>
74 #include <dev/isa/elink.h>
75
76 #include <dev/mca/mcadevs.h>
77 #include <dev/mca/mcavar.h>
78
79 #include <dev/mca/3c523reg.h>
80
81 struct elmc_mca_softc {
82 struct ie_softc sc_ie;
83
84 bus_space_tag_t sc_regt; /* space tag for registers */
85 bus_space_handle_t sc_regh; /* space handle for registers */
86
87 void *sc_ih; /* interrupt handle */
88 };
89
90 int elmc_mca_match __P((struct device *, struct cfdata *, void *));
91 void elmc_mca_attach __P((struct device *, struct device *, void *));
92
93 static void elmc_mca_copyin __P((struct ie_softc *, void *, int, size_t));
94 static void elmc_mca_copyout __P((struct ie_softc *, const void *, int, size_t));
95 static u_int16_t elmc_mca_read_16 __P((struct ie_softc *, int));
96 static void elmc_mca_write_16 __P((struct ie_softc *, int, u_int16_t));
97 static void elmc_mca_write_24 __P((struct ie_softc *, int, int));
98 static void elmc_mca_attn __P((struct ie_softc *, int));
99 static void elmc_mca_hwreset __P((struct ie_softc *, int));
100 static int elmc_mca_intrhook __P((struct ie_softc *, int));
101
102 int
103 elmc_mca_match(struct device *parent, struct cfdata *cf, void *aux)
104 {
105 struct mca_attach_args *ma = aux;
106
107 switch (ma->ma_id) {
108 case MCA_PRODUCT_3C523:
109 return 1;
110 }
111
112 return 0;
113 }
114
115 void
116 elmc_mca_attach(struct device *parent, struct device *self, void *aux)
117 {
118 struct elmc_mca_softc *asc = (void *) self;
119 struct ie_softc *sc = &asc->sc_ie;
120 struct mca_attach_args *ma = aux;
121 int pos2, pos3, i, revision;
122 char buf[100];
123 int iobase, irq, pbram_addr;
124 bus_space_handle_t ioh, memh;
125 u_int8_t myaddr[ETHER_ADDR_LEN];
126
127 mca_devinfo(ma->ma_id, buf);
128 printf(" slot %d: %s\n", ma->ma_slot + 1, buf);
129
130 pos2 = mca_conf_read(ma->ma_mc, ma->ma_slot, 2);
131 pos3 = mca_conf_read(ma->ma_mc, ma->ma_slot, 3);
132
133 /*
134 * POS register 2: (adf pos0)
135 *
136 * 7 6 5 4 3 2 1 0
137 * \ \_/ \_/ \__ enable: 0=adapter disabled, 1=adapter enabled
138 * \ \ \____ I/O Address Range: 00=300-307, 01=1300-1307,
139 * \ \ 10=2300-2307, 11=3300-3307
140 * \ \______ Packet Buffer RAM Address Range:
141 * \ 00=0x0c0000-0x0c5fff 01=0x0c8000-0x0cdfff
142 * \ 10=0x0d0000-0x0d5fff 11=0x0d8000-0x0ddfff
143 * \______ Transceiver Type: 0=onboard(BNC) 1=ext(DIX)
144 *
145 * POS register 3: (adf pos1)
146 *
147 * 7 6 5 4 3 2 1 0
148 * \____/
149 * \__ Interrupt level: 0100=3, 0010=7, 1000=9, 0001=12
150 */
151
152 iobase = ELMC_IOADDR_BASE + (0x1000 * ((pos2 & 0x6) >> 1));
153
154 /* get irq */
155 switch (pos3 & 0x1f) {
156 case 4: irq = 3; break;
157 case 2: irq = 7; break;
158 case 8: irq = 9; break;
159 case 1: irq = 12; break;
160 }
161
162 pbram_addr = ELMC_MADDR_BASE + (((pos2 & 24) >> 3) * 0x8000);
163
164 /* map the pio registers */
165 if (bus_space_map(ma->ma_iot, iobase, ELMC_IOADDR_SIZE, 0, &ioh)) {
166 printf("%s: unable to map i/o space\n", sc->sc_dev.dv_xname);
167 return;
168 }
169
170 /*
171 * 3c523 has a 24K memory. The first 16K is the shared memory, while
172 * the last 8K is for the EtherStart BIOS ROM, which we don't care
173 * about. Just use the first 16K.
174 */
175 if (bus_space_map(ma->ma_memt, pbram_addr, ELMC_MADDR_SIZE, 0, &memh)) {
176 printf("%s: unable to map memory space\n", sc->sc_dev.dv_xname);
177 if (pbram_addr == 0xc0000) {
178 printf("%s: memory space 0xc0000 may conflict with vga\n",
179 sc->sc_dev.dv_xname);
180 }
181
182 bus_space_unmap(ma->ma_iot, ioh, ELMC_IOADDR_SIZE);
183 return;
184 }
185
186 asc->sc_regt = ma->ma_iot;
187 asc->sc_regh = ioh;
188
189 sc->hwinit = NULL;
190 sc->intrhook = elmc_mca_intrhook;
191 sc->hwreset = elmc_mca_hwreset;
192 sc->chan_attn = elmc_mca_attn;
193
194 sc->ie_bus_barrier = NULL;
195
196 sc->memcopyin = elmc_mca_copyin;
197 sc->memcopyout = elmc_mca_copyout;
198 sc->ie_bus_read16 = elmc_mca_read_16;
199 sc->ie_bus_write16 = elmc_mca_write_16;
200 sc->ie_bus_write24 = elmc_mca_write_24;
201
202 sc->do_xmitnopchain = 0;
203
204 sc->sc_mediachange = NULL;
205 sc->sc_mediastatus = NULL;
206
207 sc->bt = ma->ma_memt;
208 sc->bh = memh;
209
210 /* Map i/o space. */
211 sc->sc_msize = ELMC_MADDR_SIZE;
212 sc->sc_maddr = (void *)memh;
213 sc->sc_iobase = (char *)sc->sc_maddr + sc->sc_msize - (1 << 24);
214
215 /* set up pointers to important on-card control structures */
216 sc->iscp = 0;
217 sc->scb = IE_ISCP_SZ;
218 sc->scp = sc->sc_msize + IE_SCP_ADDR - (1 << 24);
219
220 sc->buf_area = sc->scb + IE_SCB_SZ;
221 sc->buf_area_sz = sc->sc_msize - IE_ISCP_SZ - IE_SCB_SZ - IE_SCP_SZ;
222
223 /*
224 * According to docs, we might need to read the interrupt number and
225 * write it back to the IRQ select register, since the POST might not
226 * configure the IRQ properly.
227 */
228 (void) mca_conf_write(ma->ma_mc, ma->ma_slot, 3, pos3 & 0x1f);
229
230 /* reset the card first */
231 elmc_mca_hwreset(sc, CARD_RESET);
232 delay(1000000 / ( 1<< 5));
233
234 /* zero card memory */
235 bus_space_set_region_1(sc->bt, sc->bh, 0, 0, sc->sc_msize);
236
237 /* set card to 16-bit bus mode */
238 bus_space_write_1(sc->bt, sc->bh, IE_SCP_BUS_USE((u_long)sc->scp), 0);
239
240 /* set up pointers to key structures */
241 elmc_mca_write_24(sc, IE_SCP_ISCP((u_long)sc->scp), (u_long) sc->iscp);
242 elmc_mca_write_16(sc, IE_ISCP_SCB((u_long)sc->iscp), (u_long) sc->scb);
243 elmc_mca_write_24(sc, IE_ISCP_BASE((u_long)sc->iscp), (u_long) sc->iscp);
244
245 /* flush setup of pointers, check if chip answers */
246 bus_space_barrier(sc->bt, sc->bh, 0, sc->sc_msize,
247 BUS_SPACE_BARRIER_WRITE);
248 if (!i82586_proberam(sc)) {
249 printf("%s: can't talk to i82586!\n", sc->sc_dev.dv_xname);
250
251 bus_space_unmap(asc->sc_regt, asc->sc_regh, ELMC_IOADDR_SIZE);
252 bus_space_unmap(sc->bt, sc->bh, ELMC_MADDR_SIZE);
253 return;
254 }
255
256 /* revision is stored in the first 4 bits of the revision register */
257 revision = (int) bus_space_read_1(asc->sc_regt, asc->sc_regh,
258 ELMC_REVISION) & ELMC_REVISION_MASK;
259
260 /* dump known info */
261 printf("%s: rev %d, i/o %#04x-%#04x, mem %#06x-%#06x, %sternal xcvr\n",
262 sc->sc_dev.dv_xname, revision,
263 iobase, iobase + ELMC_IOADDR_SIZE - 1,
264 pbram_addr, pbram_addr + ELMC_MADDR_SIZE - 1,
265 (pos2 & 0x20) ? "ex" : "in");
266
267 /*
268 * Hardware ethernet address is stored in the first six bytes
269 * of the IO space.
270 */
271 for(i=0; i < MIN(6, ETHER_ADDR_LEN); i++)
272 myaddr[i] = bus_space_read_1(asc->sc_regt, asc->sc_regh, i);
273
274 printf("%s:", sc->sc_dev.dv_xname);
275 i82586_attach((void *)sc, "3C523", myaddr, NULL, 0, 0);
276
277 /* establish interrupt handler */
278 asc->sc_ih = mca_intr_establish(ma->ma_mc, irq, IPL_NET, i82586_intr,
279 sc);
280 if (asc->sc_ih == NULL)
281 printf("%s: couldn't establish interrupt handler\n",
282 sc->sc_dev.dv_xname);
283 else
284 printf("%s: interrupting at irq %d\n", sc->sc_dev.dv_xname,irq);
285
286 return;
287 }
288
289 static void
290 elmc_mca_copyin (sc, dst, offset, size)
291 struct ie_softc *sc;
292 void *dst;
293 int offset;
294 size_t size;
295 {
296 int dribble;
297 u_int8_t* bptr = dst;
298
299 bus_space_barrier(sc->bt, sc->bh, offset, size,
300 BUS_SPACE_BARRIER_READ);
301
302 if (offset % 2) {
303 *bptr = bus_space_read_1(sc->bt, sc->bh, offset);
304 offset++; bptr++; size--;
305 }
306
307 dribble = size % 2;
308 bus_space_read_region_2(sc->bt, sc->bh, offset, (u_int16_t *) bptr,
309 size >> 1);
310
311 if (dribble) {
312 bptr += size - 1;
313 offset += size - 1;
314 *bptr = bus_space_read_1(sc->bt, sc->bh, offset);
315 }
316 }
317
318 static void
319 elmc_mca_copyout (sc, src, offset, size)
320 struct ie_softc *sc;
321 const void *src;
322 int offset;
323 size_t size;
324 {
325 int dribble;
326 int osize = size;
327 int ooffset = offset;
328 const u_int8_t* bptr = src;
329
330 if (offset % 2) {
331 bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
332 offset++; bptr++; size--;
333 }
334
335 dribble = size % 2;
336 bus_space_write_region_2(sc->bt, sc->bh, offset, (u_int16_t *)bptr,
337 size >> 1);
338 if (dribble) {
339 bptr += size - 1;
340 offset += size - 1;
341 bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
342 }
343
344 bus_space_barrier(sc->bt, sc->bh, ooffset, osize,
345 BUS_SPACE_BARRIER_WRITE);
346 }
347
348 static u_int16_t
349 elmc_mca_read_16 (sc, offset)
350 struct ie_softc *sc;
351 int offset;
352 {
353 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_READ);
354 return bus_space_read_2(sc->bt, sc->bh, offset);
355 }
356
357 static void
358 elmc_mca_write_16 (sc, offset, value)
359 struct ie_softc *sc;
360 int offset;
361 u_int16_t value;
362 {
363 bus_space_write_2(sc->bt, sc->bh, offset, value);
364 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_WRITE);
365 }
366
367 static void
368 elmc_mca_write_24 (sc, offset, addr)
369 struct ie_softc *sc;
370 int offset, addr;
371 {
372 bus_space_write_4(sc->bt, sc->bh, offset, addr +
373 (u_long) sc->sc_maddr - (u_long) sc->sc_iobase);
374 bus_space_barrier(sc->bt, sc->bh, offset, 4, BUS_SPACE_BARRIER_WRITE);
375 }
376
377 /*
378 * Channel attention hook.
379 */
380 static void
381 elmc_mca_attn(sc, why)
382 struct ie_softc *sc;
383 int why;
384 {
385 struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc;
386 int intr = 0;
387
388 switch (why) {
389 case CHIP_PROBE:
390 intr = 0;
391 break;
392 case CARD_RESET:
393 intr = ELMC_CTRL_INT;
394 break;
395 }
396
397 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
398 ELMC_CTRL_RST | ELMC_CTRL_BS3 | ELMC_CTRL_CHA | intr);
399 delay(16); /* should be > 500 ns */
400 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
401 ELMC_CTRL_RST | ELMC_CTRL_BS3 | intr);
402 }
403
404 /*
405 * Do full card hardware reset.
406 */
407 static void
408 elmc_mca_hwreset(sc, why)
409 struct ie_softc *sc;
410 int why;
411 {
412 struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc;
413 int intr = 0;
414
415 switch (why) {
416 case CHIP_PROBE:
417 intr = 0;
418 break;
419 case CARD_RESET:
420 intr = ELMC_CTRL_INT;
421 break;
422 }
423
424 /* toggle the RST bit low then high */
425 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
426 ELMC_CTRL_BS3 | ELMC_CTRL_LOOP);
427 delay(16); /* should be > 500 ns */
428 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
429 ELMC_CTRL_BS3 | ELMC_CTRL_LOOP | ELMC_CTRL_RST);
430
431 elmc_mca_attn(sc, why);
432 }
433
434 /*
435 * Interrupt hook.
436 */
437 static int
438 elmc_mca_intrhook(sc, why)
439 struct ie_softc *sc;
440 int why;
441 {
442 switch (why) {
443 case INTR_ACK:
444 elmc_mca_attn(sc, CHIP_PROBE);
445 break;
446 default:
447 /* do nothing */
448 break;
449 }
450
451 return (0);
452 }
453
454 struct cfattach elmc_mca_ca = {
455 sizeof(struct elmc_mca_softc), elmc_mca_match, elmc_mca_attach
456 };
457