if_elmc_mca.c revision 1.24 1 /* $NetBSD: if_elmc_mca.c,v 1.24 2008/04/08 20:41:00 cegger Exp $ */
2
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Rafal K. Boni and Jaromir Dolecek.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * 3Com 3c523 EtherLink/MC Ethernet card driver (uses i82586 Ethernet chip).
41 *
42 * The 3c523-specific hooks were derived from Linux driver (file
43 * drivers/net/3c523.[ch]).
44 *
45 * This driver uses generic i82586 stuff. See also ai(4), ef(4), ix(4).
46 */
47
48 #include <sys/cdefs.h>
49 __KERNEL_RCSID(0, "$NetBSD: if_elmc_mca.c,v 1.24 2008/04/08 20:41:00 cegger Exp $");
50
51 #include <sys/param.h>
52 #include <sys/systm.h>
53 #include <sys/mbuf.h>
54 #include <sys/errno.h>
55 #include <sys/device.h>
56 #include <sys/protosw.h>
57 #include <sys/socket.h>
58
59 #include <net/if.h>
60 #include <net/if_types.h>
61 #include <net/if_media.h>
62 #include <net/if_ether.h>
63
64 #include <sys/bus.h>
65
66 #include <dev/ic/i82586reg.h>
67 #include <dev/ic/i82586var.h>
68 #include <dev/mca/mcadevs.h>
69 #include <dev/mca/mcavar.h>
70
71 #include <dev/mca/3c523reg.h>
72
73 struct elmc_mca_softc {
74 struct ie_softc sc_ie;
75
76 bus_space_tag_t sc_regt; /* space tag for registers */
77 bus_space_handle_t sc_regh; /* space handle for registers */
78
79 void *sc_ih; /* interrupt handle */
80 };
81
82 int elmc_mca_match(struct device *, struct cfdata *, void *);
83 void elmc_mca_attach(struct device *, struct device *, void *);
84
85 static void elmc_mca_copyin(struct ie_softc *, void *, int, size_t);
86 static void elmc_mca_copyout(struct ie_softc *, const void *, int, size_t);
87 static u_int16_t elmc_mca_read_16(struct ie_softc *, int);
88 static void elmc_mca_write_16(struct ie_softc *, int, u_int16_t);
89 static void elmc_mca_write_24(struct ie_softc *, int, int);
90 static void elmc_mca_attn(struct ie_softc *, int);
91 static void elmc_mca_hwreset(struct ie_softc *, int);
92 static int elmc_mca_intrhook(struct ie_softc *, int);
93
94 int
95 elmc_mca_match(struct device *parent, struct cfdata *cf,
96 void *aux)
97 {
98 struct mca_attach_args *ma = aux;
99
100 switch (ma->ma_id) {
101 case MCA_PRODUCT_3C523:
102 return 1;
103 }
104
105 return 0;
106 }
107
108 void
109 elmc_mca_attach(struct device *parent, struct device *self, void *aux)
110 {
111 struct elmc_mca_softc *asc = device_private(self);
112 struct ie_softc *sc = &asc->sc_ie;
113 struct mca_attach_args *ma = aux;
114 int pos2, pos3, i, revision;
115 int iobase, irq, pbram_addr;
116 bus_space_handle_t ioh, memh;
117 u_int8_t myaddr[ETHER_ADDR_LEN];
118
119 pos2 = mca_conf_read(ma->ma_mc, ma->ma_slot, 2);
120 pos3 = mca_conf_read(ma->ma_mc, ma->ma_slot, 3);
121
122 /*
123 * POS register 2: (adf pos0)
124 *
125 * 7 6 5 4 3 2 1 0
126 * \ \_/ \_/ \__ enable: 0=adapter disabled, 1=adapter enabled
127 * \ \ \____ I/O Address Range: 00=300-307, 01=1300-1307,
128 * \ \ 10=2300-2307, 11=3300-3307
129 * \ \______ Packet Buffer RAM Address Range:
130 * \ 00=0x0c0000-0x0c5fff 01=0x0c8000-0x0cdfff
131 * \ 10=0x0d0000-0x0d5fff 11=0x0d8000-0x0ddfff
132 * \______ Transceiver Type: 0=onboard(BNC) 1=ext(DIX)
133 *
134 * POS register 3: (adf pos1)
135 *
136 * 7 6 5 4 3 2 1 0
137 * \____/
138 * \__ Interrupt level: 0100=3, 0010=7, 1000=9, 0001=12
139 */
140
141 iobase = ELMC_IOADDR_BASE + (0x1000 * ((pos2 & 0x6) >> 1));
142
143 /* get irq */
144 switch (pos3 & 0x1f) {
145 case 4: irq = 3; break;
146 case 2: irq = 7; break;
147 case 8: irq = 9; break;
148 case 1: irq = 12; break;
149 default:
150 printf(": cannot determine irq\n");
151 return;
152 }
153
154 pbram_addr = ELMC_MADDR_BASE + (((pos2 & 0x18) >> 3) * 0x8000);
155
156 printf(" slot %d irq %d: 3Com EtherLink/MC Ethernet Adapter (3C523)\n",
157 ma->ma_slot + 1, irq);
158
159 /* map the pio registers */
160 if (bus_space_map(ma->ma_iot, iobase, ELMC_IOADDR_SIZE, 0, &ioh)) {
161 aprint_error_dev(&sc->sc_dev, "unable to map i/o space\n");
162 return;
163 }
164
165 /*
166 * 3c523 has a 24K memory. The first 16K is the shared memory, while
167 * the last 8K is for the EtherStart BIOS ROM, which we don't care
168 * about. Just use the first 16K.
169 */
170 if (bus_space_map(ma->ma_memt, pbram_addr, ELMC_MADDR_SIZE, 0, &memh)) {
171 aprint_error_dev(&sc->sc_dev, "unable to map memory space\n");
172 if (pbram_addr == 0xc0000) {
173 aprint_error_dev(&sc->sc_dev, "memory space 0xc0000 may conflict with vga\n");
174 }
175
176 bus_space_unmap(ma->ma_iot, ioh, ELMC_IOADDR_SIZE);
177 return;
178 }
179
180 asc->sc_regt = ma->ma_iot;
181 asc->sc_regh = ioh;
182
183 sc->hwinit = NULL;
184 sc->intrhook = elmc_mca_intrhook;
185 sc->hwreset = elmc_mca_hwreset;
186 sc->chan_attn = elmc_mca_attn;
187
188 sc->ie_bus_barrier = NULL;
189
190 sc->memcopyin = elmc_mca_copyin;
191 sc->memcopyout = elmc_mca_copyout;
192 sc->ie_bus_read16 = elmc_mca_read_16;
193 sc->ie_bus_write16 = elmc_mca_write_16;
194 sc->ie_bus_write24 = elmc_mca_write_24;
195
196 sc->do_xmitnopchain = 0;
197
198 sc->sc_mediachange = NULL;
199 sc->sc_mediastatus = NULL;
200
201 sc->bt = ma->ma_memt;
202 sc->bh = memh;
203
204 /* Map i/o space. */
205 sc->sc_msize = ELMC_MADDR_SIZE;
206 sc->sc_maddr = (void *)memh;
207 sc->sc_iobase = (char *)sc->sc_maddr + sc->sc_msize - (1 << 24);
208
209 /* set up pointers to important on-card control structures */
210 sc->iscp = 0;
211 sc->scb = IE_ISCP_SZ;
212 sc->scp = sc->sc_msize + IE_SCP_ADDR - (1 << 24);
213
214 sc->buf_area = sc->scb + IE_SCB_SZ;
215 sc->buf_area_sz = sc->sc_msize - IE_ISCP_SZ - IE_SCB_SZ - IE_SCP_SZ;
216
217 /*
218 * According to docs, we might need to read the interrupt number and
219 * write it back to the IRQ select register, since the POST might not
220 * configure the IRQ properly.
221 */
222 (void) mca_conf_write(ma->ma_mc, ma->ma_slot, 3, pos3 & 0x1f);
223
224 /* reset the card first */
225 elmc_mca_hwreset(sc, CARD_RESET);
226 delay(1000000 / ( 1<< 5));
227
228 /* zero card memory */
229 bus_space_set_region_1(sc->bt, sc->bh, 0, 0, sc->sc_msize);
230
231 /* set card to 16-bit bus mode */
232 bus_space_write_1(sc->bt, sc->bh, IE_SCP_BUS_USE((u_long)sc->scp),
233 IE_SYSBUS_16BIT);
234
235 /* set up pointers to key structures */
236 elmc_mca_write_24(sc, IE_SCP_ISCP((u_long)sc->scp), (u_long) sc->iscp);
237 elmc_mca_write_16(sc, IE_ISCP_SCB((u_long)sc->iscp), (u_long) sc->scb);
238 elmc_mca_write_24(sc, IE_ISCP_BASE((u_long)sc->iscp), (u_long) sc->iscp);
239
240 /* flush setup of pointers, check if chip answers */
241 bus_space_barrier(sc->bt, sc->bh, 0, sc->sc_msize,
242 BUS_SPACE_BARRIER_WRITE);
243 if (!i82586_proberam(sc)) {
244 aprint_error_dev(&sc->sc_dev, "can't talk to i82586!\n");
245
246 bus_space_unmap(asc->sc_regt, asc->sc_regh, ELMC_IOADDR_SIZE);
247 bus_space_unmap(sc->bt, sc->bh, ELMC_MADDR_SIZE);
248 return;
249 }
250
251 /* revision is stored in the first 4 bits of the revision register */
252 revision = (int) bus_space_read_1(asc->sc_regt, asc->sc_regh,
253 ELMC_REVISION) & ELMC_REVISION_MASK;
254
255 /* dump known info */
256 printf("%s: rev %d, i/o %#04x-%#04x, mem %#06x-%#06x, %sternal xcvr\n",
257 device_xname(&sc->sc_dev), revision,
258 iobase, iobase + ELMC_IOADDR_SIZE - 1,
259 pbram_addr, pbram_addr + ELMC_MADDR_SIZE - 1,
260 (pos2 & 0x20) ? "ex" : "in");
261
262 /*
263 * Hardware ethernet address is stored in the first six bytes
264 * of the IO space.
265 */
266 for(i=0; i < MIN(6, ETHER_ADDR_LEN); i++)
267 myaddr[i] = bus_space_read_1(asc->sc_regt, asc->sc_regh, i);
268
269 printf("%s:", device_xname(&sc->sc_dev));
270 i82586_attach((void *)sc, "3C523", myaddr, NULL, 0, 0);
271
272 /* establish interrupt handler */
273 asc->sc_ih = mca_intr_establish(ma->ma_mc, irq, IPL_NET, i82586_intr,
274 sc);
275 if (asc->sc_ih == NULL) {
276 aprint_error_dev(&sc->sc_dev, "couldn't establish interrupt handler\n");
277 return;
278 }
279 }
280
281 static void
282 elmc_mca_copyin (sc, dst, offset, size)
283 struct ie_softc *sc;
284 void *dst;
285 int offset;
286 size_t size;
287 {
288 int dribble;
289 u_int8_t* bptr = dst;
290
291 bus_space_barrier(sc->bt, sc->bh, offset, size,
292 BUS_SPACE_BARRIER_READ);
293
294 if (offset % 2) {
295 *bptr = bus_space_read_1(sc->bt, sc->bh, offset);
296 offset++; bptr++; size--;
297 }
298
299 dribble = size % 2;
300 bus_space_read_region_2(sc->bt, sc->bh, offset, (u_int16_t *) bptr,
301 size >> 1);
302
303 if (dribble) {
304 bptr += size - 1;
305 offset += size - 1;
306 *bptr = bus_space_read_1(sc->bt, sc->bh, offset);
307 }
308 }
309
310 static void
311 elmc_mca_copyout (sc, src, offset, size)
312 struct ie_softc *sc;
313 const void *src;
314 int offset;
315 size_t size;
316 {
317 int dribble;
318 int osize = size;
319 int ooffset = offset;
320 const u_int8_t* bptr = src;
321
322 if (offset % 2) {
323 bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
324 offset++; bptr++; size--;
325 }
326
327 dribble = size % 2;
328 bus_space_write_region_2(sc->bt, sc->bh, offset,
329 (const u_int16_t *)bptr, size >> 1);
330 if (dribble) {
331 bptr += size - 1;
332 offset += size - 1;
333 bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
334 }
335
336 bus_space_barrier(sc->bt, sc->bh, ooffset, osize,
337 BUS_SPACE_BARRIER_WRITE);
338 }
339
340 static u_int16_t
341 elmc_mca_read_16 (sc, offset)
342 struct ie_softc *sc;
343 int offset;
344 {
345 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_READ);
346 return bus_space_read_2(sc->bt, sc->bh, offset);
347 }
348
349 static void
350 elmc_mca_write_16 (sc, offset, value)
351 struct ie_softc *sc;
352 int offset;
353 u_int16_t value;
354 {
355 bus_space_write_2(sc->bt, sc->bh, offset, value);
356 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_WRITE);
357 }
358
359 static void
360 elmc_mca_write_24 (sc, offset, addr)
361 struct ie_softc *sc;
362 int offset, addr;
363 {
364 bus_space_write_4(sc->bt, sc->bh, offset, addr +
365 (u_long) sc->sc_maddr - (u_long) sc->sc_iobase);
366 bus_space_barrier(sc->bt, sc->bh, offset, 4, BUS_SPACE_BARRIER_WRITE);
367 }
368
369 /*
370 * Channel attention hook.
371 */
372 static void
373 elmc_mca_attn(sc, why)
374 struct ie_softc *sc;
375 int why;
376 {
377 struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc;
378 int intr = 0;
379
380 switch (why) {
381 case CHIP_PROBE:
382 intr = 0;
383 break;
384 case CARD_RESET:
385 intr = ELMC_CTRL_INT;
386 break;
387 }
388
389 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
390 ELMC_CTRL_RST | ELMC_CTRL_BS3 | ELMC_CTRL_CHA | intr);
391 delay(1); /* should be > 500 ns */
392 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
393 ELMC_CTRL_RST | ELMC_CTRL_BS3 | intr);
394 }
395
396 /*
397 * Do full card hardware reset.
398 */
399 static void
400 elmc_mca_hwreset(sc, why)
401 struct ie_softc *sc;
402 int why;
403 {
404 struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc;
405
406 /* toggle the RST bit low then high */
407 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
408 ELMC_CTRL_BS3 | ELMC_CTRL_LOOP);
409 delay(1); /* should be > 500 ns */
410 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
411 ELMC_CTRL_BS3 | ELMC_CTRL_LOOP | ELMC_CTRL_RST);
412
413 elmc_mca_attn(sc, why);
414 }
415
416 /*
417 * Interrupt hook.
418 */
419 static int
420 elmc_mca_intrhook(sc, why)
421 struct ie_softc *sc;
422 int why;
423 {
424 switch (why) {
425 case INTR_ACK:
426 elmc_mca_attn(sc, CHIP_PROBE);
427 break;
428 default:
429 /* do nothing */
430 break;
431 }
432
433 return (0);
434 }
435
436 CFATTACH_DECL(elmc_mca, sizeof(struct elmc_mca_softc),
437 elmc_mca_match, elmc_mca_attach, NULL, NULL);
438