if_elmc_mca.c revision 1.3.2.2
1 /* $NetBSD: if_elmc_mca.c,v 1.3.2.2 2001/03/27 15:32:05 bouyer Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Rafal K. Boni and Jaromir Dolecek. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * 3Com 3c523 EtherLink/MC Ethernet card driver (uses i82586 Ethernet chip). 41 * 42 * The 3c523-specific hooks were derived from Linux driver (file 43 * drivers/net/3c523.[ch]). 44 * 45 * This driver uses generic i82586 stuff. See also ai(4), ef(4), ix(4). 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/errno.h> 52 #include <sys/device.h> 53 #include <sys/protosw.h> 54 #include <sys/socket.h> 55 #include <sys/syslog.h> 56 #include <sys/reboot.h> 57 58 #include <net/if.h> 59 #include <net/if_dl.h> 60 #include <net/if_types.h> 61 #include <net/if_media.h> 62 #include <net/if_ether.h> 63 64 #include <machine/cpu.h> 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 68 #include <dev/isa/isareg.h> 69 #include <dev/isa/isavar.h> 70 71 #include <dev/ic/i82586reg.h> 72 #include <dev/ic/i82586var.h> 73 #include <dev/isa/if_efreg.h> 74 #include <dev/isa/elink.h> 75 76 #include <dev/mca/mcadevs.h> 77 #include <dev/mca/mcavar.h> 78 79 #include <dev/mca/3c523reg.h> 80 81 struct elmc_mca_softc { 82 struct ie_softc sc_ie; 83 84 bus_space_tag_t sc_regt; /* space tag for registers */ 85 bus_space_handle_t sc_regh; /* space handle for registers */ 86 87 void *sc_ih; /* interrupt handle */ 88 }; 89 90 int elmc_mca_match __P((struct device *, struct cfdata *, void *)); 91 void elmc_mca_attach __P((struct device *, struct device *, void *)); 92 93 static void elmc_mca_copyin __P((struct ie_softc *, void *, int, size_t)); 94 static void elmc_mca_copyout __P((struct ie_softc *, const void *, int, size_t)); 95 static u_int16_t elmc_mca_read_16 __P((struct ie_softc *, int)); 96 static void elmc_mca_write_16 __P((struct ie_softc *, int, u_int16_t)); 97 static void elmc_mca_write_24 __P((struct ie_softc *, int, int)); 98 static void elmc_mca_attn __P((struct ie_softc *, int)); 99 static void elmc_mca_hwreset __P((struct ie_softc *, int)); 100 static int elmc_mca_intrhook __P((struct ie_softc *, int)); 101 102 int 103 elmc_mca_match(struct device *parent, struct cfdata *cf, void *aux) 104 { 105 struct mca_attach_args *ma = aux; 106 107 switch (ma->ma_id) { 108 case MCA_PRODUCT_3C523: 109 return 1; 110 } 111 112 return 0; 113 } 114 115 void 116 elmc_mca_attach(struct device *parent, struct device *self, void *aux) 117 { 118 struct elmc_mca_softc *asc = (void *) self; 119 struct ie_softc *sc = &asc->sc_ie; 120 struct mca_attach_args *ma = aux; 121 int pos2, pos3, i, revision; 122 int iobase, irq, pbram_addr; 123 bus_space_handle_t ioh, memh; 124 u_int8_t myaddr[ETHER_ADDR_LEN]; 125 126 printf(" slot %d: 3Com EtherLink/MC Ethernet Adapter (3C523)\n", 127 ma->ma_slot + 1); 128 129 pos2 = mca_conf_read(ma->ma_mc, ma->ma_slot, 2); 130 pos3 = mca_conf_read(ma->ma_mc, ma->ma_slot, 3); 131 132 /* 133 * POS register 2: (adf pos0) 134 * 135 * 7 6 5 4 3 2 1 0 136 * \ \_/ \_/ \__ enable: 0=adapter disabled, 1=adapter enabled 137 * \ \ \____ I/O Address Range: 00=300-307, 01=1300-1307, 138 * \ \ 10=2300-2307, 11=3300-3307 139 * \ \______ Packet Buffer RAM Address Range: 140 * \ 00=0x0c0000-0x0c5fff 01=0x0c8000-0x0cdfff 141 * \ 10=0x0d0000-0x0d5fff 11=0x0d8000-0x0ddfff 142 * \______ Transceiver Type: 0=onboard(BNC) 1=ext(DIX) 143 * 144 * POS register 3: (adf pos1) 145 * 146 * 7 6 5 4 3 2 1 0 147 * \____/ 148 * \__ Interrupt level: 0100=3, 0010=7, 1000=9, 0001=12 149 */ 150 151 iobase = ELMC_IOADDR_BASE + (0x1000 * ((pos2 & 0x6) >> 1)); 152 153 /* get irq */ 154 switch (pos3 & 0x1f) { 155 case 4: irq = 3; break; 156 case 2: irq = 7; break; 157 case 8: irq = 9; break; 158 case 1: irq = 12; break; 159 } 160 161 pbram_addr = ELMC_MADDR_BASE + (((pos2 & 24) >> 3) * 0x8000); 162 163 /* map the pio registers */ 164 if (bus_space_map(ma->ma_iot, iobase, ELMC_IOADDR_SIZE, 0, &ioh)) { 165 printf("%s: unable to map i/o space\n", sc->sc_dev.dv_xname); 166 return; 167 } 168 169 /* 170 * 3c523 has a 24K memory. The first 16K is the shared memory, while 171 * the last 8K is for the EtherStart BIOS ROM, which we don't care 172 * about. Just use the first 16K. 173 */ 174 if (bus_space_map(ma->ma_memt, pbram_addr, ELMC_MADDR_SIZE, 0, &memh)) { 175 printf("%s: unable to map memory space\n", sc->sc_dev.dv_xname); 176 if (pbram_addr == 0xc0000) { 177 printf("%s: memory space 0xc0000 may conflict with vga\n", 178 sc->sc_dev.dv_xname); 179 } 180 181 bus_space_unmap(ma->ma_iot, ioh, ELMC_IOADDR_SIZE); 182 return; 183 } 184 185 asc->sc_regt = ma->ma_iot; 186 asc->sc_regh = ioh; 187 188 sc->hwinit = NULL; 189 sc->intrhook = elmc_mca_intrhook; 190 sc->hwreset = elmc_mca_hwreset; 191 sc->chan_attn = elmc_mca_attn; 192 193 sc->ie_bus_barrier = NULL; 194 195 sc->memcopyin = elmc_mca_copyin; 196 sc->memcopyout = elmc_mca_copyout; 197 sc->ie_bus_read16 = elmc_mca_read_16; 198 sc->ie_bus_write16 = elmc_mca_write_16; 199 sc->ie_bus_write24 = elmc_mca_write_24; 200 201 sc->do_xmitnopchain = 0; 202 203 sc->sc_mediachange = NULL; 204 sc->sc_mediastatus = NULL; 205 206 sc->bt = ma->ma_memt; 207 sc->bh = memh; 208 209 /* Map i/o space. */ 210 sc->sc_msize = ELMC_MADDR_SIZE; 211 sc->sc_maddr = (void *)memh; 212 sc->sc_iobase = (char *)sc->sc_maddr + sc->sc_msize - (1 << 24); 213 214 /* set up pointers to important on-card control structures */ 215 sc->iscp = 0; 216 sc->scb = IE_ISCP_SZ; 217 sc->scp = sc->sc_msize + IE_SCP_ADDR - (1 << 24); 218 219 sc->buf_area = sc->scb + IE_SCB_SZ; 220 sc->buf_area_sz = sc->sc_msize - IE_ISCP_SZ - IE_SCB_SZ - IE_SCP_SZ; 221 222 /* 223 * According to docs, we might need to read the interrupt number and 224 * write it back to the IRQ select register, since the POST might not 225 * configure the IRQ properly. 226 */ 227 (void) mca_conf_write(ma->ma_mc, ma->ma_slot, 3, pos3 & 0x1f); 228 229 /* reset the card first */ 230 elmc_mca_hwreset(sc, CARD_RESET); 231 delay(1000000 / ( 1<< 5)); 232 233 /* zero card memory */ 234 bus_space_set_region_1(sc->bt, sc->bh, 0, 0, sc->sc_msize); 235 236 /* set card to 16-bit bus mode */ 237 bus_space_write_1(sc->bt, sc->bh, IE_SCP_BUS_USE((u_long)sc->scp), 0); 238 239 /* set up pointers to key structures */ 240 elmc_mca_write_24(sc, IE_SCP_ISCP((u_long)sc->scp), (u_long) sc->iscp); 241 elmc_mca_write_16(sc, IE_ISCP_SCB((u_long)sc->iscp), (u_long) sc->scb); 242 elmc_mca_write_24(sc, IE_ISCP_BASE((u_long)sc->iscp), (u_long) sc->iscp); 243 244 /* flush setup of pointers, check if chip answers */ 245 bus_space_barrier(sc->bt, sc->bh, 0, sc->sc_msize, 246 BUS_SPACE_BARRIER_WRITE); 247 if (!i82586_proberam(sc)) { 248 printf("%s: can't talk to i82586!\n", sc->sc_dev.dv_xname); 249 250 bus_space_unmap(asc->sc_regt, asc->sc_regh, ELMC_IOADDR_SIZE); 251 bus_space_unmap(sc->bt, sc->bh, ELMC_MADDR_SIZE); 252 return; 253 } 254 255 /* revision is stored in the first 4 bits of the revision register */ 256 revision = (int) bus_space_read_1(asc->sc_regt, asc->sc_regh, 257 ELMC_REVISION) & ELMC_REVISION_MASK; 258 259 /* dump known info */ 260 printf("%s: rev %d, i/o %#04x-%#04x, mem %#06x-%#06x, %sternal xcvr\n", 261 sc->sc_dev.dv_xname, revision, 262 iobase, iobase + ELMC_IOADDR_SIZE - 1, 263 pbram_addr, pbram_addr + ELMC_MADDR_SIZE - 1, 264 (pos2 & 0x20) ? "ex" : "in"); 265 266 /* 267 * Hardware ethernet address is stored in the first six bytes 268 * of the IO space. 269 */ 270 for(i=0; i < MIN(6, ETHER_ADDR_LEN); i++) 271 myaddr[i] = bus_space_read_1(asc->sc_regt, asc->sc_regh, i); 272 273 printf("%s:", sc->sc_dev.dv_xname); 274 i82586_attach((void *)sc, "3C523", myaddr, NULL, 0, 0); 275 276 /* establish interrupt handler */ 277 asc->sc_ih = mca_intr_establish(ma->ma_mc, irq, IPL_NET, i82586_intr, 278 sc); 279 if (asc->sc_ih == NULL) 280 printf("%s: couldn't establish interrupt handler\n", 281 sc->sc_dev.dv_xname); 282 else 283 printf("%s: interrupting at irq %d\n", sc->sc_dev.dv_xname,irq); 284 285 return; 286 } 287 288 static void 289 elmc_mca_copyin (sc, dst, offset, size) 290 struct ie_softc *sc; 291 void *dst; 292 int offset; 293 size_t size; 294 { 295 int dribble; 296 u_int8_t* bptr = dst; 297 298 bus_space_barrier(sc->bt, sc->bh, offset, size, 299 BUS_SPACE_BARRIER_READ); 300 301 if (offset % 2) { 302 *bptr = bus_space_read_1(sc->bt, sc->bh, offset); 303 offset++; bptr++; size--; 304 } 305 306 dribble = size % 2; 307 bus_space_read_region_2(sc->bt, sc->bh, offset, (u_int16_t *) bptr, 308 size >> 1); 309 310 if (dribble) { 311 bptr += size - 1; 312 offset += size - 1; 313 *bptr = bus_space_read_1(sc->bt, sc->bh, offset); 314 } 315 } 316 317 static void 318 elmc_mca_copyout (sc, src, offset, size) 319 struct ie_softc *sc; 320 const void *src; 321 int offset; 322 size_t size; 323 { 324 int dribble; 325 int osize = size; 326 int ooffset = offset; 327 const u_int8_t* bptr = src; 328 329 if (offset % 2) { 330 bus_space_write_1(sc->bt, sc->bh, offset, *bptr); 331 offset++; bptr++; size--; 332 } 333 334 dribble = size % 2; 335 bus_space_write_region_2(sc->bt, sc->bh, offset, (u_int16_t *)bptr, 336 size >> 1); 337 if (dribble) { 338 bptr += size - 1; 339 offset += size - 1; 340 bus_space_write_1(sc->bt, sc->bh, offset, *bptr); 341 } 342 343 bus_space_barrier(sc->bt, sc->bh, ooffset, osize, 344 BUS_SPACE_BARRIER_WRITE); 345 } 346 347 static u_int16_t 348 elmc_mca_read_16 (sc, offset) 349 struct ie_softc *sc; 350 int offset; 351 { 352 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_READ); 353 return bus_space_read_2(sc->bt, sc->bh, offset); 354 } 355 356 static void 357 elmc_mca_write_16 (sc, offset, value) 358 struct ie_softc *sc; 359 int offset; 360 u_int16_t value; 361 { 362 bus_space_write_2(sc->bt, sc->bh, offset, value); 363 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_WRITE); 364 } 365 366 static void 367 elmc_mca_write_24 (sc, offset, addr) 368 struct ie_softc *sc; 369 int offset, addr; 370 { 371 bus_space_write_4(sc->bt, sc->bh, offset, addr + 372 (u_long) sc->sc_maddr - (u_long) sc->sc_iobase); 373 bus_space_barrier(sc->bt, sc->bh, offset, 4, BUS_SPACE_BARRIER_WRITE); 374 } 375 376 /* 377 * Channel attention hook. 378 */ 379 static void 380 elmc_mca_attn(sc, why) 381 struct ie_softc *sc; 382 int why; 383 { 384 struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc; 385 int intr = 0; 386 387 switch (why) { 388 case CHIP_PROBE: 389 intr = 0; 390 break; 391 case CARD_RESET: 392 intr = ELMC_CTRL_INT; 393 break; 394 } 395 396 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL, 397 ELMC_CTRL_RST | ELMC_CTRL_BS3 | ELMC_CTRL_CHA | intr); 398 delay(16); /* should be > 500 ns */ 399 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL, 400 ELMC_CTRL_RST | ELMC_CTRL_BS3 | intr); 401 } 402 403 /* 404 * Do full card hardware reset. 405 */ 406 static void 407 elmc_mca_hwreset(sc, why) 408 struct ie_softc *sc; 409 int why; 410 { 411 struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc; 412 int intr = 0; 413 414 switch (why) { 415 case CHIP_PROBE: 416 intr = 0; 417 break; 418 case CARD_RESET: 419 intr = ELMC_CTRL_INT; 420 break; 421 } 422 423 /* toggle the RST bit low then high */ 424 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL, 425 ELMC_CTRL_BS3 | ELMC_CTRL_LOOP); 426 delay(16); /* should be > 500 ns */ 427 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL, 428 ELMC_CTRL_BS3 | ELMC_CTRL_LOOP | ELMC_CTRL_RST); 429 430 elmc_mca_attn(sc, why); 431 } 432 433 /* 434 * Interrupt hook. 435 */ 436 static int 437 elmc_mca_intrhook(sc, why) 438 struct ie_softc *sc; 439 int why; 440 { 441 switch (why) { 442 case INTR_ACK: 443 elmc_mca_attn(sc, CHIP_PROBE); 444 break; 445 default: 446 /* do nothing */ 447 break; 448 } 449 450 return (0); 451 } 452 453 struct cfattach elmc_mca_ca = { 454 sizeof(struct elmc_mca_softc), elmc_mca_match, elmc_mca_attach 455 }; 456
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