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if_elmc_mca.c revision 1.31
      1 /*	$NetBSD: if_elmc_mca.c,v 1.31 2016/07/11 11:31:51 msaitoh Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Rafal K. Boni and Jaromir Dolecek.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 /*
     33  * 3Com 3c523 EtherLink/MC Ethernet card driver (uses i82586 Ethernet chip).
     34  *
     35  * The 3c523-specific hooks were derived from Linux driver (file
     36  * drivers/net/3c523.[ch]).
     37  *
     38  * This driver uses generic i82586 stuff. See also ai(4), ef(4), ix(4).
     39  */
     40 
     41 #include <sys/cdefs.h>
     42 __KERNEL_RCSID(0, "$NetBSD: if_elmc_mca.c,v 1.31 2016/07/11 11:31:51 msaitoh Exp $");
     43 
     44 #include <sys/param.h>
     45 #include <sys/systm.h>
     46 #include <sys/mbuf.h>
     47 #include <sys/errno.h>
     48 #include <sys/device.h>
     49 #include <sys/protosw.h>
     50 #include <sys/socket.h>
     51 
     52 #include <net/if.h>
     53 #include <net/if_types.h>
     54 #include <net/if_media.h>
     55 #include <net/if_ether.h>
     56 
     57 #include <sys/bus.h>
     58 
     59 #include <dev/ic/i82586reg.h>
     60 #include <dev/ic/i82586var.h>
     61 #include <dev/mca/mcadevs.h>
     62 #include <dev/mca/mcavar.h>
     63 
     64 #include <dev/mca/3c523reg.h>
     65 
     66 struct elmc_mca_softc {
     67 	struct ie_softc sc_ie;
     68 
     69 	bus_space_tag_t sc_regt;	/* space tag for registers */
     70 	bus_space_handle_t sc_regh;	/* space handle for registers */
     71 
     72 	void		*sc_ih;		/* interrupt handle */
     73 };
     74 
     75 int	elmc_mca_match(device_t, cfdata_t, void *);
     76 void	elmc_mca_attach(device_t, device_t, void *);
     77 
     78 static void	elmc_mca_copyin(struct ie_softc *, void *, int, size_t);
     79 static void	elmc_mca_copyout(struct ie_softc *, const void *, int, size_t);
     80 static u_int16_t elmc_mca_read_16(struct ie_softc *, int);
     81 static void	elmc_mca_write_16(struct ie_softc *, int, u_int16_t);
     82 static void	elmc_mca_write_24(struct ie_softc *, int, int);
     83 static void	elmc_mca_attn(struct ie_softc *, int);
     84 static void	elmc_mca_hwreset(struct ie_softc *, int);
     85 static int	elmc_mca_intrhook(struct ie_softc *, int);
     86 
     87 int
     88 elmc_mca_match(device_t parent, cfdata_t cf,
     89     void *aux)
     90 {
     91 	struct mca_attach_args *ma = aux;
     92 
     93 	switch (ma->ma_id) {
     94 	case MCA_PRODUCT_3C523:
     95 		return 1;
     96 	}
     97 
     98 	return 0;
     99 }
    100 
    101 void
    102 elmc_mca_attach(device_t parent, device_t self, void *aux)
    103 {
    104 	struct elmc_mca_softc *asc = device_private(self);
    105 	struct ie_softc *sc = &asc->sc_ie;
    106 	struct mca_attach_args *ma = aux;
    107 	int pos2, pos3, i, revision;
    108 	int iobase, irq, pbram_addr;
    109 	bus_space_handle_t ioh, memh;
    110 	u_int8_t myaddr[ETHER_ADDR_LEN];
    111 
    112 	pos2 = mca_conf_read(ma->ma_mc, ma->ma_slot, 2);
    113 	pos3 = mca_conf_read(ma->ma_mc, ma->ma_slot, 3);
    114 
    115 	/*
    116 	 * POS register 2: (adf pos0)
    117 	 *
    118 	 * 7 6 5 4 3 2 1 0
    119 	 *     \ \_/ \_/ \__ enable: 0=adapter disabled, 1=adapter enabled
    120 	 *      \  \   \____ I/O Address Range: 00=300-307, 01=1300-1307,
    121 	 *       \  \                           10=2300-2307, 11=3300-3307
    122 	 *        \  \______ Packet Buffer RAM Address Range:
    123 	 *         \            00=0x0c0000-0x0c5fff 01=0x0c8000-0x0cdfff
    124 	 *          \           10=0x0d0000-0x0d5fff 11=0x0d8000-0x0ddfff
    125 	 *           \______ Transceiver Type: 0=onboard(BNC) 1=ext(DIX)
    126 	 *
    127 	 * POS register 3: (adf pos1)
    128 	 *
    129 	 * 7 6 5 4 3 2 1 0
    130 	 *          \____/
    131 	 *               \__ Interrupt level: 0100=3, 0010=7, 1000=9, 0001=12
    132 	 */
    133 
    134 	iobase = ELMC_IOADDR_BASE + (0x1000 * ((pos2 & 0x6) >> 1));
    135 
    136 	/* get irq */
    137 	switch (pos3 & 0x1f) {
    138 	case 4: irq = 3; break;
    139 	case 2: irq = 7; break;
    140 	case 8: irq = 9; break;
    141 	case 1: irq = 12; break;
    142 	default:
    143 		printf(": cannot determine irq\n");
    144 		return;
    145 	}
    146 
    147 	sc->sc_dev = self;
    148 	pbram_addr = ELMC_MADDR_BASE + (((pos2 & 0x18) >> 3) * 0x8000);
    149 
    150 	printf(" slot %d irq %d: 3Com EtherLink/MC Ethernet Adapter (3C523)\n",
    151 		ma->ma_slot + 1, irq);
    152 
    153 	/* map the pio registers */
    154 	if (bus_space_map(ma->ma_iot, iobase, ELMC_IOADDR_SIZE, 0, &ioh)) {
    155 		aprint_error_dev(self, "unable to map i/o space\n");
    156 		return;
    157 	}
    158 
    159 	/*
    160 	 * 3c523 has a 24K memory. The first 16K is the shared memory, while
    161 	 * the last 8K is for the EtherStart BIOS ROM, which we don't care
    162 	 * about. Just use the first 16K.
    163 	 */
    164 	if (bus_space_map(ma->ma_memt, pbram_addr, ELMC_MADDR_SIZE, 0, &memh)) {
    165 		aprint_error_dev(self, "unable to map memory space\n");
    166 		if (pbram_addr == 0xc0000) {
    167 			aprint_error_dev(self,
    168 			    "memory space 0xc0000 may conflict with vga\n");
    169 		}
    170 
    171 		bus_space_unmap(ma->ma_iot, ioh, ELMC_IOADDR_SIZE);
    172 		return;
    173 	}
    174 
    175 	asc->sc_regt = ma->ma_iot;
    176 	asc->sc_regh = ioh;
    177 
    178 	sc->hwinit = NULL;
    179 	sc->intrhook = elmc_mca_intrhook;
    180 	sc->hwreset = elmc_mca_hwreset;
    181 	sc->chan_attn = elmc_mca_attn;
    182 
    183 	sc->ie_bus_barrier = NULL;
    184 
    185 	sc->memcopyin = elmc_mca_copyin;
    186 	sc->memcopyout = elmc_mca_copyout;
    187 	sc->ie_bus_read16 = elmc_mca_read_16;
    188 	sc->ie_bus_write16 = elmc_mca_write_16;
    189 	sc->ie_bus_write24 = elmc_mca_write_24;
    190 
    191 	sc->do_xmitnopchain = 0;
    192 
    193 	sc->sc_mediachange = NULL;
    194 	sc->sc_mediastatus = NULL;
    195 
    196 	sc->bt = ma->ma_memt;
    197 	sc->bh = memh;
    198 
    199 	/* Map i/o space. */
    200 	sc->sc_msize = ELMC_MADDR_SIZE;
    201 	sc->sc_maddr = (void *)memh;
    202 	sc->sc_iobase = (char *)sc->sc_maddr + sc->sc_msize - (1 << 24);
    203 
    204 	/* set up pointers to important on-card control structures */
    205 	sc->iscp = 0;
    206 	sc->scb = IE_ISCP_SZ;
    207 	sc->scp = sc->sc_msize + IE_SCP_ADDR - (1 << 24);
    208 
    209 	sc->buf_area = sc->scb + IE_SCB_SZ;
    210 	sc->buf_area_sz = sc->sc_msize - IE_ISCP_SZ - IE_SCB_SZ - IE_SCP_SZ;
    211 
    212 	/*
    213 	 * According to docs, we might need to read the interrupt number and
    214 	 * write it back to the IRQ select register, since the POST might not
    215 	 * configure the IRQ properly.
    216 	 */
    217 	(void) mca_conf_write(ma->ma_mc, ma->ma_slot, 3, pos3 & 0x1f);
    218 
    219 	/* reset the card first */
    220 	elmc_mca_hwreset(sc, CARD_RESET);
    221 	delay(1000000 / ( 1<< 5));
    222 
    223 	/* zero card memory */
    224 	bus_space_set_region_1(sc->bt, sc->bh, 0, 0, sc->sc_msize);
    225 
    226 	/* set card to 16-bit bus mode */
    227 	bus_space_write_1(sc->bt, sc->bh, IE_SCP_BUS_USE((u_long)sc->scp),
    228 			  IE_SYSBUS_16BIT);
    229 
    230 	/* set up pointers to key structures */
    231 	elmc_mca_write_24(sc, IE_SCP_ISCP((u_long)sc->scp), (u_long) sc->iscp);
    232 	elmc_mca_write_16(sc, IE_ISCP_SCB((u_long)sc->iscp), (u_long) sc->scb);
    233 	elmc_mca_write_24(sc, IE_ISCP_BASE((u_long)sc->iscp),
    234 	    (u_long) sc->iscp);
    235 
    236 	/* flush setup of pointers, check if chip answers */
    237 	bus_space_barrier(sc->bt, sc->bh, 0, sc->sc_msize,
    238 			  BUS_SPACE_BARRIER_WRITE);
    239 	if (!i82586_proberam(sc)) {
    240 		aprint_error_dev(self, "can't talk to i82586!\n");
    241 
    242 		bus_space_unmap(asc->sc_regt, asc->sc_regh, ELMC_IOADDR_SIZE);
    243 		bus_space_unmap(sc->bt, sc->bh, ELMC_MADDR_SIZE);
    244 		return;
    245 	}
    246 
    247 	/* revision is stored in the first 4 bits of the revision register */
    248 	revision = (int) bus_space_read_1(asc->sc_regt, asc->sc_regh,
    249 				ELMC_REVISION) & ELMC_REVISION_MASK;
    250 
    251 	/* dump known info */
    252 	printf("%s: rev %d, i/o %#04x-%#04x, mem %#06x-%#06x, %sternal xcvr\n",
    253 		device_xname(self), revision,
    254 		iobase, iobase + ELMC_IOADDR_SIZE - 1,
    255 		pbram_addr, pbram_addr + ELMC_MADDR_SIZE - 1,
    256 		(pos2 & 0x20) ? "ex" : "in");
    257 
    258 	/*
    259 	 * Hardware ethernet address is stored in the first six bytes
    260 	 * of the IO space.
    261 	 */
    262 	for(i=0; i < MIN(6, ETHER_ADDR_LEN); i++)
    263 		myaddr[i] = bus_space_read_1(asc->sc_regt, asc->sc_regh, i);
    264 
    265 	printf("%s:", device_xname(self));
    266 	i82586_attach(sc, "3C523", myaddr, NULL, 0, 0);
    267 
    268 	/* establish interrupt handler */
    269 	asc->sc_ih = mca_intr_establish(ma->ma_mc, irq, IPL_NET, i82586_intr,
    270 			sc);
    271 	if (asc->sc_ih == NULL) {
    272 		aprint_error_dev(self,
    273 		    "couldn't establish interrupt handler\n");
    274 		return;
    275 	}
    276 }
    277 
    278 static void
    279 elmc_mca_copyin (struct ie_softc *sc, void *dst, int offset, size_t size)
    280 {
    281 	int dribble;
    282 	u_int8_t* bptr = dst;
    283 
    284 	bus_space_barrier(sc->bt, sc->bh, offset, size,
    285 			  BUS_SPACE_BARRIER_READ);
    286 
    287 	if (offset % 2) {
    288 		*bptr = bus_space_read_1(sc->bt, sc->bh, offset);
    289 		offset++; bptr++; size--;
    290 	}
    291 
    292 	dribble = size % 2;
    293 	bus_space_read_region_2(sc->bt, sc->bh, offset, (u_int16_t *) bptr,
    294 				size >> 1);
    295 
    296 	if (dribble) {
    297 		bptr += size - 1;
    298 		offset += size - 1;
    299 		*bptr = bus_space_read_1(sc->bt, sc->bh, offset);
    300 	}
    301 }
    302 
    303 static void
    304 elmc_mca_copyout (struct ie_softc *sc, const void *src, int offset,
    305     size_t size)
    306 {
    307 	int dribble;
    308 	int osize = size;
    309 	int ooffset = offset;
    310 	const u_int8_t* bptr = src;
    311 
    312 	if (offset % 2) {
    313 		bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
    314 		offset++; bptr++; size--;
    315 	}
    316 
    317 	dribble = size % 2;
    318 	bus_space_write_region_2(sc->bt, sc->bh, offset,
    319 	    (const u_int16_t *)bptr, size >> 1);
    320 	if (dribble) {
    321 		bptr += size - 1;
    322 		offset += size - 1;
    323 		bus_space_write_1(sc->bt, sc->bh, offset, *bptr);
    324 	}
    325 
    326 	bus_space_barrier(sc->bt, sc->bh, ooffset, osize,
    327 			  BUS_SPACE_BARRIER_WRITE);
    328 }
    329 
    330 static u_int16_t
    331 elmc_mca_read_16 (struct ie_softc *sc, int offset)
    332 {
    333 	bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_READ);
    334         return bus_space_read_2(sc->bt, sc->bh, offset);
    335 }
    336 
    337 static void
    338 elmc_mca_write_16 (struct ie_softc *sc, int offset, u_int16_t value)
    339 {
    340         bus_space_write_2(sc->bt, sc->bh, offset, value);
    341 	bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_WRITE);
    342 }
    343 
    344 static void
    345 elmc_mca_write_24 (struct ie_softc *sc, int offset, int addr)
    346 {
    347         bus_space_write_4(sc->bt, sc->bh, offset, addr +
    348 	    (u_long) sc->sc_maddr - (u_long) sc->sc_iobase);
    349 	bus_space_barrier(sc->bt, sc->bh, offset, 4, BUS_SPACE_BARRIER_WRITE);
    350 }
    351 
    352 /*
    353  * Channel attention hook.
    354  */
    355 static void
    356 elmc_mca_attn(struct ie_softc *sc, int why)
    357 {
    358 	struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc;
    359 	int intr = 0;
    360 
    361 	switch (why) {
    362 	case CHIP_PROBE:
    363 		intr = 0;
    364 		break;
    365 	case CARD_RESET:
    366 		intr = ELMC_CTRL_INT;
    367 		break;
    368 	}
    369 
    370 	bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
    371 	    ELMC_CTRL_RST | ELMC_CTRL_BS3 | ELMC_CTRL_CHA | intr);
    372 	delay(1);	/* should be > 500 ns */
    373 	bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
    374 	    ELMC_CTRL_RST | ELMC_CTRL_BS3 | intr);
    375 }
    376 
    377 /*
    378  * Do full card hardware reset.
    379  */
    380 static void
    381 elmc_mca_hwreset(struct ie_softc *sc, int why)
    382 {
    383 	struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc;
    384 
    385 	/* toggle the RST bit low then high */
    386 	bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
    387 	    ELMC_CTRL_BS3 | ELMC_CTRL_LOOP);
    388 	delay(1);	/* should be > 500 ns */
    389 	bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL,
    390 	    ELMC_CTRL_BS3 | ELMC_CTRL_LOOP | ELMC_CTRL_RST);
    391 
    392 	elmc_mca_attn(sc, why);
    393 }
    394 
    395 /*
    396  * Interrupt hook.
    397  */
    398 static int
    399 elmc_mca_intrhook(struct ie_softc *sc, int why)
    400 {
    401 	switch (why) {
    402 	case INTR_ACK:
    403 		elmc_mca_attn(sc, CHIP_PROBE);
    404 		break;
    405 	default:
    406 		/* do nothing */
    407 		break;
    408 	}
    409 
    410 	return (0);
    411 }
    412 
    413 CFATTACH_DECL_NEW(elmc_mca, sizeof(struct elmc_mca_softc),
    414     elmc_mca_match, elmc_mca_attach, NULL, NULL);
    415