if_elmc_mca.c revision 1.6
1 /* $NetBSD: if_elmc_mca.c,v 1.6 2001/05/03 11:17:36 jdolecek Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Rafal K. Boni and Jaromir Dolecek. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * 3Com 3c523 EtherLink/MC Ethernet card driver (uses i82586 Ethernet chip). 41 * 42 * The 3c523-specific hooks were derived from Linux driver (file 43 * drivers/net/3c523.[ch]). 44 * 45 * This driver uses generic i82586 stuff. See also ai(4), ef(4), ix(4). 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/errno.h> 52 #include <sys/device.h> 53 #include <sys/protosw.h> 54 #include <sys/socket.h> 55 56 #include <net/if.h> 57 #include <net/if_types.h> 58 #include <net/if_media.h> 59 #include <net/if_ether.h> 60 61 #include <machine/bus.h> 62 63 #include <dev/ic/i82586reg.h> 64 #include <dev/ic/i82586var.h> 65 #include <dev/mca/mcadevs.h> 66 #include <dev/mca/mcavar.h> 67 68 #include <dev/mca/3c523reg.h> 69 70 struct elmc_mca_softc { 71 struct ie_softc sc_ie; 72 73 bus_space_tag_t sc_regt; /* space tag for registers */ 74 bus_space_handle_t sc_regh; /* space handle for registers */ 75 76 void *sc_ih; /* interrupt handle */ 77 }; 78 79 int elmc_mca_match __P((struct device *, struct cfdata *, void *)); 80 void elmc_mca_attach __P((struct device *, struct device *, void *)); 81 82 static void elmc_mca_copyin __P((struct ie_softc *, void *, int, size_t)); 83 static void elmc_mca_copyout __P((struct ie_softc *, const void *, int, size_t)); 84 static u_int16_t elmc_mca_read_16 __P((struct ie_softc *, int)); 85 static void elmc_mca_write_16 __P((struct ie_softc *, int, u_int16_t)); 86 static void elmc_mca_write_24 __P((struct ie_softc *, int, int)); 87 static void elmc_mca_attn __P((struct ie_softc *, int)); 88 static void elmc_mca_hwreset __P((struct ie_softc *, int)); 89 static int elmc_mca_intrhook __P((struct ie_softc *, int)); 90 91 int 92 elmc_mca_match(struct device *parent, struct cfdata *cf, void *aux) 93 { 94 struct mca_attach_args *ma = aux; 95 96 switch (ma->ma_id) { 97 case MCA_PRODUCT_3C523: 98 return 1; 99 } 100 101 return 0; 102 } 103 104 void 105 elmc_mca_attach(struct device *parent, struct device *self, void *aux) 106 { 107 struct elmc_mca_softc *asc = (void *) self; 108 struct ie_softc *sc = &asc->sc_ie; 109 struct mca_attach_args *ma = aux; 110 int pos2, pos3, i, revision; 111 int iobase, irq, pbram_addr; 112 bus_space_handle_t ioh, memh; 113 u_int8_t myaddr[ETHER_ADDR_LEN]; 114 115 pos2 = mca_conf_read(ma->ma_mc, ma->ma_slot, 2); 116 pos3 = mca_conf_read(ma->ma_mc, ma->ma_slot, 3); 117 118 /* 119 * POS register 2: (adf pos0) 120 * 121 * 7 6 5 4 3 2 1 0 122 * \ \_/ \_/ \__ enable: 0=adapter disabled, 1=adapter enabled 123 * \ \ \____ I/O Address Range: 00=300-307, 01=1300-1307, 124 * \ \ 10=2300-2307, 11=3300-3307 125 * \ \______ Packet Buffer RAM Address Range: 126 * \ 00=0x0c0000-0x0c5fff 01=0x0c8000-0x0cdfff 127 * \ 10=0x0d0000-0x0d5fff 11=0x0d8000-0x0ddfff 128 * \______ Transceiver Type: 0=onboard(BNC) 1=ext(DIX) 129 * 130 * POS register 3: (adf pos1) 131 * 132 * 7 6 5 4 3 2 1 0 133 * \____/ 134 * \__ Interrupt level: 0100=3, 0010=7, 1000=9, 0001=12 135 */ 136 137 iobase = ELMC_IOADDR_BASE + (0x1000 * ((pos2 & 0x6) >> 1)); 138 139 /* get irq */ 140 switch (pos3 & 0x1f) { 141 case 4: irq = 3; break; 142 case 2: irq = 7; break; 143 case 8: irq = 9; break; 144 case 1: irq = 12; break; 145 } 146 147 pbram_addr = ELMC_MADDR_BASE + (((pos2 & 24) >> 3) * 0x8000); 148 149 printf(" slot %d irq %d: 3Com EtherLink/MC Ethernet Adapter (3C523)\n", 150 ma->ma_slot + 1, irq); 151 152 /* map the pio registers */ 153 if (bus_space_map(ma->ma_iot, iobase, ELMC_IOADDR_SIZE, 0, &ioh)) { 154 printf("%s: unable to map i/o space\n", sc->sc_dev.dv_xname); 155 return; 156 } 157 158 /* 159 * 3c523 has a 24K memory. The first 16K is the shared memory, while 160 * the last 8K is for the EtherStart BIOS ROM, which we don't care 161 * about. Just use the first 16K. 162 */ 163 if (bus_space_map(ma->ma_memt, pbram_addr, ELMC_MADDR_SIZE, 0, &memh)) { 164 printf("%s: unable to map memory space\n", sc->sc_dev.dv_xname); 165 if (pbram_addr == 0xc0000) { 166 printf("%s: memory space 0xc0000 may conflict with vga\n", 167 sc->sc_dev.dv_xname); 168 } 169 170 bus_space_unmap(ma->ma_iot, ioh, ELMC_IOADDR_SIZE); 171 return; 172 } 173 174 asc->sc_regt = ma->ma_iot; 175 asc->sc_regh = ioh; 176 177 sc->hwinit = NULL; 178 sc->intrhook = elmc_mca_intrhook; 179 sc->hwreset = elmc_mca_hwreset; 180 sc->chan_attn = elmc_mca_attn; 181 182 sc->ie_bus_barrier = NULL; 183 184 sc->memcopyin = elmc_mca_copyin; 185 sc->memcopyout = elmc_mca_copyout; 186 sc->ie_bus_read16 = elmc_mca_read_16; 187 sc->ie_bus_write16 = elmc_mca_write_16; 188 sc->ie_bus_write24 = elmc_mca_write_24; 189 190 sc->do_xmitnopchain = 0; 191 192 sc->sc_mediachange = NULL; 193 sc->sc_mediastatus = NULL; 194 195 sc->bt = ma->ma_memt; 196 sc->bh = memh; 197 198 /* Map i/o space. */ 199 sc->sc_msize = ELMC_MADDR_SIZE; 200 sc->sc_maddr = (void *)memh; 201 sc->sc_iobase = (char *)sc->sc_maddr + sc->sc_msize - (1 << 24); 202 203 /* set up pointers to important on-card control structures */ 204 sc->iscp = 0; 205 sc->scb = IE_ISCP_SZ; 206 sc->scp = sc->sc_msize + IE_SCP_ADDR - (1 << 24); 207 208 sc->buf_area = sc->scb + IE_SCB_SZ; 209 sc->buf_area_sz = sc->sc_msize - IE_ISCP_SZ - IE_SCB_SZ - IE_SCP_SZ; 210 211 /* 212 * According to docs, we might need to read the interrupt number and 213 * write it back to the IRQ select register, since the POST might not 214 * configure the IRQ properly. 215 */ 216 (void) mca_conf_write(ma->ma_mc, ma->ma_slot, 3, pos3 & 0x1f); 217 218 /* reset the card first */ 219 elmc_mca_hwreset(sc, CARD_RESET); 220 delay(1000000 / ( 1<< 5)); 221 222 /* zero card memory */ 223 bus_space_set_region_1(sc->bt, sc->bh, 0, 0, sc->sc_msize); 224 225 /* set card to 16-bit bus mode */ 226 bus_space_write_1(sc->bt, sc->bh, IE_SCP_BUS_USE((u_long)sc->scp), 0); 227 228 /* set up pointers to key structures */ 229 elmc_mca_write_24(sc, IE_SCP_ISCP((u_long)sc->scp), (u_long) sc->iscp); 230 elmc_mca_write_16(sc, IE_ISCP_SCB((u_long)sc->iscp), (u_long) sc->scb); 231 elmc_mca_write_24(sc, IE_ISCP_BASE((u_long)sc->iscp), (u_long) sc->iscp); 232 233 /* flush setup of pointers, check if chip answers */ 234 bus_space_barrier(sc->bt, sc->bh, 0, sc->sc_msize, 235 BUS_SPACE_BARRIER_WRITE); 236 if (!i82586_proberam(sc)) { 237 printf("%s: can't talk to i82586!\n", sc->sc_dev.dv_xname); 238 239 bus_space_unmap(asc->sc_regt, asc->sc_regh, ELMC_IOADDR_SIZE); 240 bus_space_unmap(sc->bt, sc->bh, ELMC_MADDR_SIZE); 241 return; 242 } 243 244 /* revision is stored in the first 4 bits of the revision register */ 245 revision = (int) bus_space_read_1(asc->sc_regt, asc->sc_regh, 246 ELMC_REVISION) & ELMC_REVISION_MASK; 247 248 /* dump known info */ 249 printf("%s: rev %d, i/o %#04x-%#04x, mem %#06x-%#06x, %sternal xcvr\n", 250 sc->sc_dev.dv_xname, revision, 251 iobase, iobase + ELMC_IOADDR_SIZE - 1, 252 pbram_addr, pbram_addr + ELMC_MADDR_SIZE - 1, 253 (pos2 & 0x20) ? "ex" : "in"); 254 255 /* 256 * Hardware ethernet address is stored in the first six bytes 257 * of the IO space. 258 */ 259 for(i=0; i < MIN(6, ETHER_ADDR_LEN); i++) 260 myaddr[i] = bus_space_read_1(asc->sc_regt, asc->sc_regh, i); 261 262 printf("%s:", sc->sc_dev.dv_xname); 263 i82586_attach((void *)sc, "3C523", myaddr, NULL, 0, 0); 264 265 /* establish interrupt handler */ 266 asc->sc_ih = mca_intr_establish(ma->ma_mc, irq, IPL_NET, i82586_intr, 267 sc); 268 if (asc->sc_ih == NULL) { 269 printf("%s: couldn't establish interrupt handler\n", 270 sc->sc_dev.dv_xname); 271 return; 272 } 273 } 274 275 static void 276 elmc_mca_copyin (sc, dst, offset, size) 277 struct ie_softc *sc; 278 void *dst; 279 int offset; 280 size_t size; 281 { 282 int dribble; 283 u_int8_t* bptr = dst; 284 285 bus_space_barrier(sc->bt, sc->bh, offset, size, 286 BUS_SPACE_BARRIER_READ); 287 288 if (offset % 2) { 289 *bptr = bus_space_read_1(sc->bt, sc->bh, offset); 290 offset++; bptr++; size--; 291 } 292 293 dribble = size % 2; 294 bus_space_read_region_2(sc->bt, sc->bh, offset, (u_int16_t *) bptr, 295 size >> 1); 296 297 if (dribble) { 298 bptr += size - 1; 299 offset += size - 1; 300 *bptr = bus_space_read_1(sc->bt, sc->bh, offset); 301 } 302 } 303 304 static void 305 elmc_mca_copyout (sc, src, offset, size) 306 struct ie_softc *sc; 307 const void *src; 308 int offset; 309 size_t size; 310 { 311 int dribble; 312 int osize = size; 313 int ooffset = offset; 314 const u_int8_t* bptr = src; 315 316 if (offset % 2) { 317 bus_space_write_1(sc->bt, sc->bh, offset, *bptr); 318 offset++; bptr++; size--; 319 } 320 321 dribble = size % 2; 322 bus_space_write_region_2(sc->bt, sc->bh, offset, (u_int16_t *)bptr, 323 size >> 1); 324 if (dribble) { 325 bptr += size - 1; 326 offset += size - 1; 327 bus_space_write_1(sc->bt, sc->bh, offset, *bptr); 328 } 329 330 bus_space_barrier(sc->bt, sc->bh, ooffset, osize, 331 BUS_SPACE_BARRIER_WRITE); 332 } 333 334 static u_int16_t 335 elmc_mca_read_16 (sc, offset) 336 struct ie_softc *sc; 337 int offset; 338 { 339 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_READ); 340 return bus_space_read_2(sc->bt, sc->bh, offset); 341 } 342 343 static void 344 elmc_mca_write_16 (sc, offset, value) 345 struct ie_softc *sc; 346 int offset; 347 u_int16_t value; 348 { 349 bus_space_write_2(sc->bt, sc->bh, offset, value); 350 bus_space_barrier(sc->bt, sc->bh, offset, 2, BUS_SPACE_BARRIER_WRITE); 351 } 352 353 static void 354 elmc_mca_write_24 (sc, offset, addr) 355 struct ie_softc *sc; 356 int offset, addr; 357 { 358 bus_space_write_4(sc->bt, sc->bh, offset, addr + 359 (u_long) sc->sc_maddr - (u_long) sc->sc_iobase); 360 bus_space_barrier(sc->bt, sc->bh, offset, 4, BUS_SPACE_BARRIER_WRITE); 361 } 362 363 /* 364 * Channel attention hook. 365 */ 366 static void 367 elmc_mca_attn(sc, why) 368 struct ie_softc *sc; 369 int why; 370 { 371 struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc; 372 int intr = 0; 373 374 switch (why) { 375 case CHIP_PROBE: 376 intr = 0; 377 break; 378 case CARD_RESET: 379 intr = ELMC_CTRL_INT; 380 break; 381 } 382 383 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL, 384 ELMC_CTRL_RST | ELMC_CTRL_BS3 | ELMC_CTRL_CHA | intr); 385 delay(1); /* should be > 500 ns */ 386 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL, 387 ELMC_CTRL_RST | ELMC_CTRL_BS3 | intr); 388 } 389 390 /* 391 * Do full card hardware reset. 392 */ 393 static void 394 elmc_mca_hwreset(sc, why) 395 struct ie_softc *sc; 396 int why; 397 { 398 struct elmc_mca_softc* asc = (struct elmc_mca_softc *) sc; 399 int intr = 0; 400 401 switch (why) { 402 case CHIP_PROBE: 403 intr = 0; 404 break; 405 case CARD_RESET: 406 intr = ELMC_CTRL_INT; 407 break; 408 } 409 410 /* toggle the RST bit low then high */ 411 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL, 412 ELMC_CTRL_BS3 | ELMC_CTRL_LOOP); 413 delay(1); /* should be > 500 ns */ 414 bus_space_write_1(asc->sc_regt, asc->sc_regh, ELMC_CTRL, 415 ELMC_CTRL_BS3 | ELMC_CTRL_LOOP | ELMC_CTRL_RST); 416 417 elmc_mca_attn(sc, why); 418 } 419 420 /* 421 * Interrupt hook. 422 */ 423 static int 424 elmc_mca_intrhook(sc, why) 425 struct ie_softc *sc; 426 int why; 427 { 428 switch (why) { 429 case INTR_ACK: 430 elmc_mca_attn(sc, CHIP_PROBE); 431 break; 432 default: 433 /* do nothing */ 434 break; 435 } 436 437 return (0); 438 } 439 440 struct cfattach elmc_mca_ca = { 441 sizeof(struct elmc_mca_softc), elmc_mca_match, elmc_mca_attach 442 }; 443
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