if_le_mca.c revision 1.1.2.4 1 1.1.2.4 nathanw /* $NetBSD: if_le_mca.c,v 1.1.2.4 2001/11/14 19:15:00 nathanw Exp $ */
2 1.1.2.2 nathanw
3 1.1.2.2 nathanw /*-
4 1.1.2.2 nathanw * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 1.1.2.2 nathanw * All rights reserved.
6 1.1.2.2 nathanw *
7 1.1.2.2 nathanw * This code is derived from software contributed to The NetBSD Foundation
8 1.1.2.2 nathanw * by Jaromir Dolecek.
9 1.1.2.2 nathanw *
10 1.1.2.2 nathanw * Redistribution and use in source and binary forms, with or without
11 1.1.2.2 nathanw * modification, are permitted provided that the following conditions
12 1.1.2.2 nathanw * are met:
13 1.1.2.2 nathanw * 1. Redistributions of source code must retain the above copyright
14 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer.
15 1.1.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
16 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer in the
17 1.1.2.2 nathanw * documentation and/or other materials provided with the distribution.
18 1.1.2.2 nathanw * 3. All advertising materials mentioning features or use of this software
19 1.1.2.2 nathanw * must display the following acknowledgement:
20 1.1.2.2 nathanw * This product includes software developed by the NetBSD
21 1.1.2.2 nathanw * Foundation, Inc. and its contributors.
22 1.1.2.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1.2.2 nathanw * contributors may be used to endorse or promote products derived
24 1.1.2.2 nathanw * from this software without specific prior written permission.
25 1.1.2.2 nathanw *
26 1.1.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1.2.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1.2.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1.2.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1.2.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1.2.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1.2.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1.2.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1.2.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1.2.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1.2.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
37 1.1.2.2 nathanw */
38 1.1.2.2 nathanw
39 1.1.2.2 nathanw /*
40 1.1.2.2 nathanw * Driver for SKNET Personal and MC2+ cards, which are AMD Lance 7990 based
41 1.1.2.2 nathanw * cards made by Syskonnect, former Schneider & Koch Datensysteme GmbH.
42 1.1.2.2 nathanw *
43 1.1.2.2 nathanw * Syskonnect was very helpful and provided docs for these cards promptly.
44 1.1.2.2 nathanw * I wish all vendors would be like that!
45 1.1.2.2 nathanw * I'd like to thank to Alfred Arnold, author of the Linux driver, for
46 1.1.2.2 nathanw * giving me contact to The Right Syskonnect person, too :-)
47 1.1.2.2 nathanw *
48 1.1.2.2 nathanw * Sources:
49 1.1.2.2 nathanw * SKNET MC+ Technical Manual, version 1.1, July 21 1993
50 1.1.2.2 nathanw * SKNET personal Technisches Manual, version 1.2, April 14 1988
51 1.1.2.2 nathanw * SKNET junior Technisches Manual, version 1.0, July 14 1987
52 1.1.2.2 nathanw */
53 1.1.2.2 nathanw
54 1.1.2.4 nathanw #include <sys/cdefs.h>
55 1.1.2.4 nathanw __KERNEL_RCSID(0, "$NetBSD: if_le_mca.c,v 1.1.2.4 2001/11/14 19:15:00 nathanw Exp $");
56 1.1.2.4 nathanw
57 1.1.2.2 nathanw #include <sys/param.h>
58 1.1.2.2 nathanw #include <sys/systm.h>
59 1.1.2.2 nathanw #include <sys/mbuf.h>
60 1.1.2.2 nathanw #include <sys/syslog.h>
61 1.1.2.2 nathanw #include <sys/socket.h>
62 1.1.2.2 nathanw #include <sys/device.h>
63 1.1.2.2 nathanw
64 1.1.2.2 nathanw #include <uvm/uvm_extern.h>
65 1.1.2.2 nathanw
66 1.1.2.2 nathanw #include <net/if.h>
67 1.1.2.2 nathanw #include <net/if_ether.h>
68 1.1.2.2 nathanw #include <net/if_media.h>
69 1.1.2.2 nathanw
70 1.1.2.2 nathanw #include <machine/cpu.h>
71 1.1.2.2 nathanw #include <machine/intr.h>
72 1.1.2.2 nathanw #include <machine/bus.h>
73 1.1.2.2 nathanw
74 1.1.2.2 nathanw #include <dev/ic/lancereg.h>
75 1.1.2.2 nathanw #include <dev/ic/lancevar.h>
76 1.1.2.2 nathanw #include <dev/ic/am7990reg.h>
77 1.1.2.2 nathanw #include <dev/ic/am7990var.h>
78 1.1.2.2 nathanw
79 1.1.2.2 nathanw #include <dev/mca/mcareg.h>
80 1.1.2.2 nathanw #include <dev/mca/mcavar.h>
81 1.1.2.2 nathanw #include <dev/mca/mcadevs.h>
82 1.1.2.2 nathanw
83 1.1.2.2 nathanw #include <dev/mca/if_lereg.h>
84 1.1.2.2 nathanw
85 1.1.2.2 nathanw int le_mca_match __P((struct device *, struct cfdata *, void *));
86 1.1.2.2 nathanw void le_mca_attach __P((struct device *, struct device *, void *));
87 1.1.2.2 nathanw
88 1.1.2.2 nathanw struct le_mca_softc {
89 1.1.2.2 nathanw struct am7990_softc sc_am7990; /* glue to MI code */
90 1.1.2.2 nathanw
91 1.1.2.2 nathanw void *sc_ih;
92 1.1.2.2 nathanw bus_space_tag_t sc_memt;
93 1.1.2.2 nathanw bus_space_handle_t sc_memh;
94 1.1.2.2 nathanw };
95 1.1.2.2 nathanw
96 1.1.2.2 nathanw static void le_mca_wrcsr __P((struct lance_softc *, u_int16_t, u_int16_t));
97 1.1.2.2 nathanw static u_int16_t le_mca_rdcsr __P((struct lance_softc *, u_int16_t));
98 1.1.2.2 nathanw static void le_mca_hwreset __P((struct lance_softc *));
99 1.1.2.2 nathanw static int le_mca_intredge __P((void *));
100 1.1.2.2 nathanw
101 1.1.2.2 nathanw static void le_mca_copytobuf(struct lance_softc *, void *, int, int);
102 1.1.2.2 nathanw static void le_mca_copyfrombuf(struct lance_softc *, void *, int, int);
103 1.1.2.2 nathanw static void le_mca_zerobuf(struct lance_softc *, int, int);
104 1.1.2.2 nathanw
105 1.1.2.2 nathanw static __inline void le_mca_wrreg __P((struct le_mca_softc *, int, int));
106 1.1.2.2 nathanw #define le_mca_set_RAP(sc, reg_number) \
107 1.1.2.2 nathanw le_mca_wrreg(sc, reg_number, RAP | REGWRITE)
108 1.1.2.2 nathanw
109 1.1.2.2 nathanw struct cfattach le_mca_ca = {
110 1.1.2.2 nathanw sizeof(struct le_mca_softc), le_mca_match, le_mca_attach
111 1.1.2.2 nathanw };
112 1.1.2.2 nathanw
113 1.1.2.2 nathanw /* SKNET MC+ POS mapping */
114 1.1.2.2 nathanw static const u_int8_t sknet_mcp_irq[] = {
115 1.1.2.2 nathanw 3, 5, 10, 11
116 1.1.2.2 nathanw };
117 1.1.2.2 nathanw static const u_int8_t sknet_mcp_media[] = {
118 1.1.2.2 nathanw IFM_ETHER|IFM_10_2,
119 1.1.2.2 nathanw IFM_ETHER|IFM_10_T,
120 1.1.2.2 nathanw IFM_ETHER|IFM_10_5,
121 1.1.2.2 nathanw 0
122 1.1.2.2 nathanw };
123 1.1.2.2 nathanw
124 1.1.2.2 nathanw int
125 1.1.2.2 nathanw le_mca_match(struct device *parent, struct cfdata *cf, void *aux)
126 1.1.2.2 nathanw {
127 1.1.2.2 nathanw struct mca_attach_args *ma = aux;
128 1.1.2.2 nathanw
129 1.1.2.2 nathanw switch(ma->ma_id) {
130 1.1.2.2 nathanw case MCA_PRODUCT_SKNETPER:
131 1.1.2.2 nathanw case MCA_PRODUCT_SKNETG:
132 1.1.2.2 nathanw return (1);
133 1.1.2.2 nathanw }
134 1.1.2.2 nathanw
135 1.1.2.2 nathanw return (0);
136 1.1.2.2 nathanw }
137 1.1.2.2 nathanw
138 1.1.2.2 nathanw void
139 1.1.2.2 nathanw le_mca_attach(struct device *parent, struct device *self, void *aux)
140 1.1.2.2 nathanw {
141 1.1.2.2 nathanw struct le_mca_softc *lesc = (struct le_mca_softc *) self;
142 1.1.2.2 nathanw struct lance_softc *sc = &lesc->sc_am7990.lsc;
143 1.1.2.2 nathanw struct mca_attach_args *ma = aux;
144 1.1.2.2 nathanw int i, pos2, pos3, pos4, irq, membase, supmedia=0;
145 1.1.2.2 nathanw const char *typestr;
146 1.1.2.2 nathanw
147 1.1.2.2 nathanw /*
148 1.1.2.2 nathanw * SKNET Personal:
149 1.1.2.2 nathanw *
150 1.1.2.2 nathanw * POS register 2: (adf pos0)
151 1.1.2.2 nathanw *
152 1.1.2.2 nathanw * 7 6 5 4 3 2 1 0
153 1.1.2.2 nathanw * | \___/ \__ enable: 0=adapter disabled, 1=adapter enabled
154 1.1.2.2 nathanw * \ \____ Memory: 0xC0000-0xC3FFF + XX*0x4000
155 1.1.2.2 nathanw * \________ IRQ: 0=10 1=11
156 1.1.2.2 nathanw *
157 1.1.2.2 nathanw *
158 1.1.2.2 nathanw * SKNET MC+:
159 1.1.2.2 nathanw * POS register 2: (adf pos0)
160 1.1.2.2 nathanw *
161 1.1.2.2 nathanw * 7 6 5 4 3 2 1 0
162 1.1.2.2 nathanw * \___/ \ \__ enable: 0=adapter disabled, 1=adapter enabled
163 1.1.2.2 nathanw * \ \___ BootEPROM disable
164 1.1.2.2 nathanw * \_____ BootEPROM start address: 0xC0000 + XX*0x4000
165 1.1.2.2 nathanw *
166 1.1.2.2 nathanw * POS register 3: (adf pos1)
167 1.1.2.2 nathanw *
168 1.1.2.2 nathanw * 7 6 5 4 3 2 1 0
169 1.1.2.2 nathanw * 0 0 1 1 \_____/
170 1.1.2.2 nathanw * \__ RAM: 0xC0000 + XX*0x4000
171 1.1.2.2 nathanw *
172 1.1.2.2 nathanw * POS register 4: (adf pos2)
173 1.1.2.2 nathanw *
174 1.1.2.2 nathanw * 7 6 5 4 3 2 1 0
175 1.1.2.2 nathanw * \_/ \_/ \_/
176 1.1.2.2 nathanw * \ \ \__ Need to be reset to 0 0 after boot
177 1.1.2.2 nathanw * \ \_____ IRQ: 00=3 01=5 10=10 11=11
178 1.1.2.2 nathanw * \____________ Medium: 00=BNC 01=UTP 10=AUI 11=not allowed
179 1.1.2.2 nathanw */
180 1.1.2.2 nathanw
181 1.1.2.2 nathanw switch (ma->ma_id) {
182 1.1.2.2 nathanw case MCA_PRODUCT_SKNETPER:
183 1.1.2.2 nathanw typestr = "Personal MC2";
184 1.1.2.2 nathanw
185 1.1.2.2 nathanw pos2 = mca_conf_read(ma->ma_mc, ma->ma_slot, 2);
186 1.1.2.2 nathanw irq = (pos2 & (1<<4)) ? 11 : 10;
187 1.1.2.2 nathanw membase = 0xc0000 + ((pos2 & 0x0e) >> 1) * 0x4000;
188 1.1.2.2 nathanw break;
189 1.1.2.2 nathanw case MCA_PRODUCT_SKNETG:
190 1.1.2.2 nathanw typestr = "MC2+";
191 1.1.2.2 nathanw
192 1.1.2.2 nathanw /*
193 1.1.2.2 nathanw * SKNET MC+ needs the driver to clear 0, 1 bits of pos4
194 1.1.2.2 nathanw * and explicitly set the enable bit. Somebody at Syskonnect
195 1.1.2.2 nathanw * was obviously misguided when the card was designed ...
196 1.1.2.2 nathanw */
197 1.1.2.2 nathanw pos3 = mca_conf_read(ma->ma_mc, ma->ma_slot, 3);
198 1.1.2.2 nathanw pos4 = mca_conf_read(ma->ma_mc, ma->ma_slot, 4);
199 1.1.2.2 nathanw if ((pos4 & 0x03) != 0) {
200 1.1.2.2 nathanw /* clear the bits 0, 1 */
201 1.1.2.2 nathanw mca_conf_write(ma->ma_mc, ma->ma_slot, 4,
202 1.1.2.2 nathanw pos4 & ~0x03);
203 1.1.2.2 nathanw }
204 1.1.2.2 nathanw
205 1.1.2.2 nathanw pos2 = mca_conf_read(ma->ma_mc, ma->ma_slot, 2);
206 1.1.2.2 nathanw if ((pos2 & 0x01) == 0) {
207 1.1.2.2 nathanw /* enable the card */
208 1.1.2.2 nathanw mca_conf_write(ma->ma_mc, ma->ma_slot, 2, pos2 | 0x01);
209 1.1.2.2 nathanw }
210 1.1.2.2 nathanw
211 1.1.2.2 nathanw /* get irq and memory base */
212 1.1.2.2 nathanw irq = sknet_mcp_irq[(pos4 & 0x0c) >> 2];
213 1.1.2.2 nathanw membase = 0xc0000 + ((pos3 & 0x0f) * 0x4000);
214 1.1.2.2 nathanw
215 1.1.2.2 nathanw /* Get configured media type */
216 1.1.2.2 nathanw supmedia = sknet_mcp_media[(pos4 & 0xc0) >> 6];
217 1.1.2.2 nathanw break;
218 1.1.2.2 nathanw }
219 1.1.2.2 nathanw
220 1.1.2.2 nathanw lesc->sc_memt = ma->ma_memt;
221 1.1.2.2 nathanw
222 1.1.2.2 nathanw if (bus_space_map(lesc->sc_memt, membase, LE_MCA_MEMSIZE,
223 1.1.2.2 nathanw 0, &lesc->sc_memh)) {
224 1.1.2.3 nathanw printf("%s: can't map memory\n", sc->sc_dev.dv_xname);
225 1.1.2.2 nathanw return;
226 1.1.2.2 nathanw }
227 1.1.2.2 nathanw
228 1.1.2.2 nathanw printf(" slot %d irq %d: SKNET %s Ethernet\n",
229 1.1.2.2 nathanw ma->ma_slot + 1, irq, typestr);
230 1.1.2.2 nathanw
231 1.1.2.2 nathanw /*
232 1.1.2.2 nathanw * Extract the physical MAC address from the ROM.
233 1.1.2.2 nathanw */
234 1.1.2.2 nathanw for (i = 0; i < ETHER_ADDR_LEN; i++)
235 1.1.2.2 nathanw sc->sc_enaddr[i] = bus_space_read_1(lesc->sc_memt,
236 1.1.2.2 nathanw lesc->sc_memh, LE_PROMOFF + i*2);
237 1.1.2.2 nathanw
238 1.1.2.2 nathanw sc->sc_conf3 = LE_C3_ACON;
239 1.1.2.2 nathanw sc->sc_addr = 0;
240 1.1.2.2 nathanw sc->sc_memsize = LE_MCA_RAMSIZE;
241 1.1.2.2 nathanw
242 1.1.2.2 nathanw sc->sc_copytodesc = le_mca_copytobuf;
243 1.1.2.2 nathanw sc->sc_copyfromdesc = le_mca_copyfrombuf;
244 1.1.2.2 nathanw sc->sc_copytobuf = le_mca_copytobuf;
245 1.1.2.2 nathanw sc->sc_copyfrombuf = le_mca_copyfrombuf;
246 1.1.2.2 nathanw sc->sc_zerobuf = le_mca_zerobuf;
247 1.1.2.2 nathanw
248 1.1.2.2 nathanw sc->sc_rdcsr = le_mca_rdcsr;
249 1.1.2.2 nathanw sc->sc_wrcsr = le_mca_wrcsr;
250 1.1.2.2 nathanw sc->sc_hwinit = NULL;
251 1.1.2.2 nathanw
252 1.1.2.2 nathanw sc->sc_hwreset = le_mca_hwreset;
253 1.1.2.2 nathanw
254 1.1.2.2 nathanw /*
255 1.1.2.2 nathanw * This is merely cosmetic since it's not possible to switch
256 1.1.2.2 nathanw * the media anyway, even for MC2+.
257 1.1.2.2 nathanw */
258 1.1.2.2 nathanw if (supmedia != 0) {
259 1.1.2.2 nathanw sc->sc_supmedia = &supmedia;
260 1.1.2.2 nathanw sc->sc_nsupmedia = 1;
261 1.1.2.2 nathanw sc->sc_defaultmedia = supmedia;
262 1.1.2.2 nathanw }
263 1.1.2.2 nathanw
264 1.1.2.2 nathanw lesc->sc_ih = mca_intr_establish(ma->ma_mc, irq, IPL_NET,
265 1.1.2.2 nathanw le_mca_intredge, sc);
266 1.1.2.2 nathanw if (lesc->sc_ih == NULL) {
267 1.1.2.2 nathanw printf("%s: couldn't establish interrupt handler\n",
268 1.1.2.2 nathanw sc->sc_dev.dv_xname);
269 1.1.2.2 nathanw return;
270 1.1.2.2 nathanw }
271 1.1.2.2 nathanw
272 1.1.2.2 nathanw printf("%s", sc->sc_dev.dv_xname);
273 1.1.2.2 nathanw am7990_config(&lesc->sc_am7990);
274 1.1.2.2 nathanw }
275 1.1.2.2 nathanw
276 1.1.2.2 nathanw /*
277 1.1.2.2 nathanw * Controller interrupt.
278 1.1.2.2 nathanw */
279 1.1.2.2 nathanw int
280 1.1.2.2 nathanw le_mca_intredge(arg)
281 1.1.2.2 nathanw void *arg;
282 1.1.2.2 nathanw {
283 1.1.2.2 nathanw /*
284 1.1.2.2 nathanw * We could check the IRQ bit of LE_PORT, but it seems to be unset
285 1.1.2.2 nathanw * at this time anyway.
286 1.1.2.2 nathanw */
287 1.1.2.2 nathanw
288 1.1.2.2 nathanw if (am7990_intr(arg) == 0);
289 1.1.2.2 nathanw return (0);
290 1.1.2.2 nathanw for(;;)
291 1.1.2.2 nathanw if (am7990_intr(arg) == 0)
292 1.1.2.2 nathanw return (1);
293 1.1.2.2 nathanw }
294 1.1.2.2 nathanw
295 1.1.2.2 nathanw /*
296 1.1.2.2 nathanw * Push a value to LANCE controller.
297 1.1.2.2 nathanw */
298 1.1.2.2 nathanw static __inline void
299 1.1.2.2 nathanw le_mca_wrreg(sc, val, type)
300 1.1.2.2 nathanw struct le_mca_softc *sc;
301 1.1.2.2 nathanw int val, type;
302 1.1.2.2 nathanw {
303 1.1.2.2 nathanw /*
304 1.1.2.2 nathanw * This follows steps in SKNET Personal/MC2+ docs:
305 1.1.2.2 nathanw * 1. write reg. number to LANCE register
306 1.1.2.2 nathanw * 2. write value RESET | type to port
307 1.1.2.2 nathanw * 3. flag REGDO
308 1.1.2.2 nathanw * 4. wait until REGREQ is cleared
309 1.1.2.2 nathanw */
310 1.1.2.2 nathanw if ((type & REGREAD) == 0)
311 1.1.2.2 nathanw bus_space_write_2(sc->sc_memt, sc->sc_memh, LE_LANCEREG, val);
312 1.1.2.2 nathanw bus_space_write_1(sc->sc_memt, sc->sc_memh, LE_PORT,
313 1.1.2.2 nathanw RESET | type);
314 1.1.2.2 nathanw bus_space_write_1(sc->sc_memt, sc->sc_memh, LE_REGIO,
315 1.1.2.2 nathanw REGDO);
316 1.1.2.2 nathanw /* Delay here doesn't seem to be necessary */
317 1.1.2.2 nathanw /* delay(1); */
318 1.1.2.2 nathanw while(bus_space_read_1(sc->sc_memt, sc->sc_memh, LE_PORT) & REGREQ)
319 1.1.2.2 nathanw ;
320 1.1.2.2 nathanw }
321 1.1.2.2 nathanw
322 1.1.2.2 nathanw static void
323 1.1.2.2 nathanw le_mca_wrcsr(sc, port, val)
324 1.1.2.2 nathanw struct lance_softc *sc;
325 1.1.2.2 nathanw u_int16_t port, val;
326 1.1.2.2 nathanw {
327 1.1.2.2 nathanw struct le_mca_softc *lsc = (struct le_mca_softc *)sc;
328 1.1.2.2 nathanw
329 1.1.2.2 nathanw le_mca_set_RAP(lsc, port);
330 1.1.2.2 nathanw le_mca_wrreg(lsc, val, RDATA | REGWRITE);
331 1.1.2.2 nathanw }
332 1.1.2.2 nathanw
333 1.1.2.2 nathanw static u_int16_t
334 1.1.2.2 nathanw le_mca_rdcsr(sc, port)
335 1.1.2.2 nathanw struct lance_softc *sc;
336 1.1.2.2 nathanw u_int16_t port;
337 1.1.2.2 nathanw {
338 1.1.2.2 nathanw struct le_mca_softc *lsc = (struct le_mca_softc *)sc;
339 1.1.2.2 nathanw
340 1.1.2.2 nathanw le_mca_set_RAP(lsc, port);
341 1.1.2.2 nathanw le_mca_wrreg(lsc, 0, RDATA | REGREAD);
342 1.1.2.2 nathanw
343 1.1.2.2 nathanw return (bus_space_read_2(lsc->sc_memt, lsc->sc_memh, LE_LANCEREG));
344 1.1.2.2 nathanw }
345 1.1.2.2 nathanw
346 1.1.2.2 nathanw static void
347 1.1.2.2 nathanw le_mca_hwreset(sc)
348 1.1.2.2 nathanw struct lance_softc *sc;
349 1.1.2.2 nathanw {
350 1.1.2.2 nathanw struct le_mca_softc *lsc = (struct le_mca_softc *)sc;
351 1.1.2.2 nathanw
352 1.1.2.2 nathanw bus_space_write_1(lsc->sc_memt, lsc->sc_memh, LE_PORT, 0);
353 1.1.2.2 nathanw delay(5); /* Delay >= 5 microseconds */
354 1.1.2.2 nathanw bus_space_write_1(lsc->sc_memt, lsc->sc_memh, LE_PORT, RESET);
355 1.1.2.2 nathanw }
356 1.1.2.2 nathanw
357 1.1.2.2 nathanw static void
358 1.1.2.2 nathanw le_mca_copytobuf(struct lance_softc *sc, void *from, int boff, int len)
359 1.1.2.2 nathanw {
360 1.1.2.2 nathanw struct le_mca_softc *dsc = (void *) sc;
361 1.1.2.2 nathanw
362 1.1.2.2 nathanw bus_space_write_region_1(dsc->sc_memt, dsc->sc_memh, boff,
363 1.1.2.2 nathanw from, len);
364 1.1.2.2 nathanw }
365 1.1.2.2 nathanw
366 1.1.2.2 nathanw static void
367 1.1.2.2 nathanw le_mca_copyfrombuf(struct lance_softc *sc, void *to, int boff, int len)
368 1.1.2.2 nathanw {
369 1.1.2.2 nathanw struct le_mca_softc *dsc = (void *) sc;
370 1.1.2.2 nathanw
371 1.1.2.2 nathanw bus_space_read_region_1(dsc->sc_memt, dsc->sc_memh, boff,
372 1.1.2.2 nathanw to, len);
373 1.1.2.2 nathanw }
374 1.1.2.2 nathanw
375 1.1.2.2 nathanw static void
376 1.1.2.2 nathanw le_mca_zerobuf(struct lance_softc *sc, int boff, int len)
377 1.1.2.2 nathanw {
378 1.1.2.2 nathanw struct le_mca_softc *dsc = (void *) sc;
379 1.1.2.2 nathanw
380 1.1.2.2 nathanw bus_space_set_region_1(dsc->sc_memt, dsc->sc_memh, boff,
381 1.1.2.2 nathanw 0x00, len);
382 1.1.2.2 nathanw }
383