if_le_mca.c revision 1.1
1 /* $NetBSD: if_le_mca.c,v 1.1 2001/04/27 18:03:41 jdolecek Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jaromir Dolecek. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Driver for SKNET Personal and MC2+ cards, which are AMD Lance 7990 based 41 * cards made by Syskonnect, former Schneider & Koch Datensysteme GmbH. 42 * 43 * Syskonnect was very helpful and provided docs for these cards promptly. 44 * I wish all vendors would be like that! 45 * I'd like to thank to Alfred Arnold, author of the Linux driver, for 46 * giving me contact to The Right Syskonnect person, too :-) 47 * 48 * Sources: 49 * SKNET MC+ Technical Manual, version 1.1, July 21 1993 50 * SKNET personal Technisches Manual, version 1.2, April 14 1988 51 * SKNET junior Technisches Manual, version 1.0, July 14 1987 52 */ 53 54 #include <sys/param.h> 55 #include <sys/systm.h> 56 #include <sys/mbuf.h> 57 #include <sys/syslog.h> 58 #include <sys/socket.h> 59 #include <sys/device.h> 60 61 #include <uvm/uvm_extern.h> 62 63 #include <net/if.h> 64 #include <net/if_ether.h> 65 #include <net/if_media.h> 66 67 #include <machine/cpu.h> 68 #include <machine/intr.h> 69 #include <machine/bus.h> 70 71 #include <dev/ic/lancereg.h> 72 #include <dev/ic/lancevar.h> 73 #include <dev/ic/am7990reg.h> 74 #include <dev/ic/am7990var.h> 75 76 #include <dev/mca/mcareg.h> 77 #include <dev/mca/mcavar.h> 78 #include <dev/mca/mcadevs.h> 79 80 #include <dev/mca/if_lereg.h> 81 82 int le_mca_match __P((struct device *, struct cfdata *, void *)); 83 void le_mca_attach __P((struct device *, struct device *, void *)); 84 85 struct le_mca_softc { 86 struct am7990_softc sc_am7990; /* glue to MI code */ 87 88 void *sc_ih; 89 bus_space_tag_t sc_memt; 90 bus_space_handle_t sc_memh; 91 }; 92 93 static void le_mca_wrcsr __P((struct lance_softc *, u_int16_t, u_int16_t)); 94 static u_int16_t le_mca_rdcsr __P((struct lance_softc *, u_int16_t)); 95 static void le_mca_hwreset __P((struct lance_softc *)); 96 static int le_mca_intredge __P((void *)); 97 98 static void le_mca_copytobuf(struct lance_softc *, void *, int, int); 99 static void le_mca_copyfrombuf(struct lance_softc *, void *, int, int); 100 static void le_mca_zerobuf(struct lance_softc *, int, int); 101 102 static __inline void le_mca_wrreg __P((struct le_mca_softc *, int, int)); 103 #define le_mca_set_RAP(sc, reg_number) \ 104 le_mca_wrreg(sc, reg_number, RAP | REGWRITE) 105 106 struct cfattach le_mca_ca = { 107 sizeof(struct le_mca_softc), le_mca_match, le_mca_attach 108 }; 109 110 /* SKNET MC+ POS mapping */ 111 static const u_int8_t sknet_mcp_irq[] = { 112 3, 5, 10, 11 113 }; 114 static const u_int8_t sknet_mcp_media[] = { 115 IFM_ETHER|IFM_10_2, 116 IFM_ETHER|IFM_10_T, 117 IFM_ETHER|IFM_10_5, 118 0 119 }; 120 121 int 122 le_mca_match(struct device *parent, struct cfdata *cf, void *aux) 123 { 124 struct mca_attach_args *ma = aux; 125 126 switch(ma->ma_id) { 127 case MCA_PRODUCT_SKNETPER: 128 case MCA_PRODUCT_SKNETG: 129 return (1); 130 } 131 132 return (0); 133 } 134 135 void 136 le_mca_attach(struct device *parent, struct device *self, void *aux) 137 { 138 struct le_mca_softc *lesc = (struct le_mca_softc *) self; 139 struct lance_softc *sc = &lesc->sc_am7990.lsc; 140 struct mca_attach_args *ma = aux; 141 int i, pos2, pos3, pos4, irq, membase, supmedia=0; 142 const char *typestr; 143 144 /* 145 * SKNET Personal: 146 * 147 * POS register 2: (adf pos0) 148 * 149 * 7 6 5 4 3 2 1 0 150 * | \___/ \__ enable: 0=adapter disabled, 1=adapter enabled 151 * \ \____ Memory: 0xC0000-0xC3FFF + XX*0x4000 152 * \________ IRQ: 0=10 1=11 153 * 154 * 155 * SKNET MC+: 156 * POS register 2: (adf pos0) 157 * 158 * 7 6 5 4 3 2 1 0 159 * \___/ \ \__ enable: 0=adapter disabled, 1=adapter enabled 160 * \ \___ BootEPROM disable 161 * \_____ BootEPROM start address: 0xC0000 + XX*0x4000 162 * 163 * POS register 3: (adf pos1) 164 * 165 * 7 6 5 4 3 2 1 0 166 * 0 0 1 1 \_____/ 167 * \__ RAM: 0xC0000 + XX*0x4000 168 * 169 * POS register 4: (adf pos2) 170 * 171 * 7 6 5 4 3 2 1 0 172 * \_/ \_/ \_/ 173 * \ \ \__ Need to be reset to 0 0 after boot 174 * \ \_____ IRQ: 00=3 01=5 10=10 11=11 175 * \____________ Medium: 00=BNC 01=UTP 10=AUI 11=not allowed 176 */ 177 178 switch (ma->ma_id) { 179 case MCA_PRODUCT_SKNETPER: 180 typestr = "Personal MC2"; 181 182 pos2 = mca_conf_read(ma->ma_mc, ma->ma_slot, 2); 183 irq = (pos2 & (1<<4)) ? 11 : 10; 184 membase = 0xc0000 + ((pos2 & 0x0e) >> 1) * 0x4000; 185 break; 186 case MCA_PRODUCT_SKNETG: 187 typestr = "MC2+"; 188 189 /* 190 * SKNET MC+ needs the driver to clear 0, 1 bits of pos4 191 * and explicitly set the enable bit. Somebody at Syskonnect 192 * was obviously misguided when the card was designed ... 193 */ 194 pos3 = mca_conf_read(ma->ma_mc, ma->ma_slot, 3); 195 pos4 = mca_conf_read(ma->ma_mc, ma->ma_slot, 4); 196 if ((pos4 & 0x03) != 0) { 197 /* clear the bits 0, 1 */ 198 mca_conf_write(ma->ma_mc, ma->ma_slot, 4, 199 pos4 & ~0x03); 200 } 201 202 pos2 = mca_conf_read(ma->ma_mc, ma->ma_slot, 2); 203 if ((pos2 & 0x01) == 0) { 204 /* enable the card */ 205 mca_conf_write(ma->ma_mc, ma->ma_slot, 2, pos2 | 0x01); 206 } 207 208 /* get irq and memory base */ 209 irq = sknet_mcp_irq[(pos4 & 0x0c) >> 2]; 210 membase = 0xc0000 + ((pos3 & 0x0f) * 0x4000); 211 212 /* Get configured media type */ 213 supmedia = sknet_mcp_media[(pos4 & 0xc0) >> 6]; 214 break; 215 } 216 217 lesc->sc_memt = ma->ma_memt; 218 219 if (bus_space_map(lesc->sc_memt, membase, LE_MCA_MEMSIZE, 220 0, &lesc->sc_memh)) { 221 printf(": can't map memory\n", sc->sc_dev.dv_xname); 222 return; 223 } 224 225 printf(" slot %d irq %d: SKNET %s Ethernet\n", 226 ma->ma_slot + 1, irq, typestr); 227 228 /* 229 * Extract the physical MAC address from the ROM. 230 */ 231 for (i = 0; i < ETHER_ADDR_LEN; i++) 232 sc->sc_enaddr[i] = bus_space_read_1(lesc->sc_memt, 233 lesc->sc_memh, LE_PROMOFF + i*2); 234 235 sc->sc_conf3 = LE_C3_ACON; 236 sc->sc_addr = 0; 237 sc->sc_memsize = LE_MCA_RAMSIZE; 238 239 sc->sc_copytodesc = le_mca_copytobuf; 240 sc->sc_copyfromdesc = le_mca_copyfrombuf; 241 sc->sc_copytobuf = le_mca_copytobuf; 242 sc->sc_copyfrombuf = le_mca_copyfrombuf; 243 sc->sc_zerobuf = le_mca_zerobuf; 244 245 sc->sc_rdcsr = le_mca_rdcsr; 246 sc->sc_wrcsr = le_mca_wrcsr; 247 sc->sc_hwinit = NULL; 248 249 sc->sc_hwreset = le_mca_hwreset; 250 251 /* 252 * This is merely cosmetic since it's not possible to switch 253 * the media anyway, even for MC2+. 254 */ 255 if (supmedia != 0) { 256 sc->sc_supmedia = &supmedia; 257 sc->sc_nsupmedia = 1; 258 sc->sc_defaultmedia = supmedia; 259 } 260 261 lesc->sc_ih = mca_intr_establish(ma->ma_mc, irq, IPL_NET, 262 le_mca_intredge, sc); 263 if (lesc->sc_ih == NULL) { 264 printf("%s: couldn't establish interrupt handler\n", 265 sc->sc_dev.dv_xname); 266 return; 267 } 268 269 printf("%s", sc->sc_dev.dv_xname); 270 am7990_config(&lesc->sc_am7990); 271 } 272 273 /* 274 * Controller interrupt. 275 */ 276 int 277 le_mca_intredge(arg) 278 void *arg; 279 { 280 /* 281 * We could check the IRQ bit of LE_PORT, but it seems to be unset 282 * at this time anyway. 283 */ 284 285 if (am7990_intr(arg) == 0); 286 return (0); 287 for(;;) 288 if (am7990_intr(arg) == 0) 289 return (1); 290 } 291 292 /* 293 * Push a value to LANCE controller. 294 */ 295 static __inline void 296 le_mca_wrreg(sc, val, type) 297 struct le_mca_softc *sc; 298 int val, type; 299 { 300 /* 301 * This follows steps in SKNET Personal/MC2+ docs: 302 * 1. write reg. number to LANCE register 303 * 2. write value RESET | type to port 304 * 3. flag REGDO 305 * 4. wait until REGREQ is cleared 306 */ 307 if ((type & REGREAD) == 0) 308 bus_space_write_2(sc->sc_memt, sc->sc_memh, LE_LANCEREG, val); 309 bus_space_write_1(sc->sc_memt, sc->sc_memh, LE_PORT, 310 RESET | type); 311 bus_space_write_1(sc->sc_memt, sc->sc_memh, LE_REGIO, 312 REGDO); 313 /* Delay here doesn't seem to be necessary */ 314 /* delay(1); */ 315 while(bus_space_read_1(sc->sc_memt, sc->sc_memh, LE_PORT) & REGREQ) 316 ; 317 } 318 319 static void 320 le_mca_wrcsr(sc, port, val) 321 struct lance_softc *sc; 322 u_int16_t port, val; 323 { 324 struct le_mca_softc *lsc = (struct le_mca_softc *)sc; 325 326 le_mca_set_RAP(lsc, port); 327 le_mca_wrreg(lsc, val, RDATA | REGWRITE); 328 } 329 330 static u_int16_t 331 le_mca_rdcsr(sc, port) 332 struct lance_softc *sc; 333 u_int16_t port; 334 { 335 struct le_mca_softc *lsc = (struct le_mca_softc *)sc; 336 337 le_mca_set_RAP(lsc, port); 338 le_mca_wrreg(lsc, 0, RDATA | REGREAD); 339 340 return (bus_space_read_2(lsc->sc_memt, lsc->sc_memh, LE_LANCEREG)); 341 } 342 343 static void 344 le_mca_hwreset(sc) 345 struct lance_softc *sc; 346 { 347 struct le_mca_softc *lsc = (struct le_mca_softc *)sc; 348 349 bus_space_write_1(lsc->sc_memt, lsc->sc_memh, LE_PORT, 0); 350 delay(5); /* Delay >= 5 microseconds */ 351 bus_space_write_1(lsc->sc_memt, lsc->sc_memh, LE_PORT, RESET); 352 } 353 354 static void 355 le_mca_copytobuf(struct lance_softc *sc, void *from, int boff, int len) 356 { 357 struct le_mca_softc *dsc = (void *) sc; 358 359 bus_space_write_region_1(dsc->sc_memt, dsc->sc_memh, boff, 360 from, len); 361 } 362 363 static void 364 le_mca_copyfrombuf(struct lance_softc *sc, void *to, int boff, int len) 365 { 366 struct le_mca_softc *dsc = (void *) sc; 367 368 bus_space_read_region_1(dsc->sc_memt, dsc->sc_memh, boff, 369 to, len); 370 } 371 372 static void 373 le_mca_zerobuf(struct lance_softc *sc, int boff, int len) 374 { 375 struct le_mca_softc *dsc = (void *) sc; 376 377 bus_space_set_region_1(dsc->sc_memt, dsc->sc_memh, boff, 378 0x00, len); 379 } 380
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