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aicasm_gram.y revision 1.1.8.1
      1      1.1     fvdl %{
      2  1.1.8.1  nathanw /*	$NetBSD: aicasm_gram.y,v 1.1.8.1 2002/06/20 03:45:12 nathanw Exp $	*/
      3      1.1     fvdl 
      4      1.1     fvdl /*
      5      1.1     fvdl  * Parser for the Aic7xxx SCSI Host adapter sequencer assembler.
      6      1.1     fvdl  *
      7      1.1     fvdl  * Copyright (c) 1997-1998 Justin T. Gibbs.
      8      1.1     fvdl  * All rights reserved.
      9      1.1     fvdl  *
     10      1.1     fvdl  * Redistribution and use in source and binary forms, with or without
     11      1.1     fvdl  * modification, are permitted provided that the following conditions
     12      1.1     fvdl  * are met:
     13      1.1     fvdl  * 1. Redistributions of source code must retain the above copyright
     14      1.1     fvdl  *    notice, this list of conditions, and the following disclaimer,
     15      1.1     fvdl  *    without modification.
     16      1.1     fvdl  * 2. The name of the author may not be used to endorse or promote products
     17      1.1     fvdl  *    derived from this software without specific prior written permission.
     18      1.1     fvdl  *
     19      1.1     fvdl  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     20      1.1     fvdl  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     21      1.1     fvdl  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     22      1.1     fvdl  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
     23      1.1     fvdl  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     24      1.1     fvdl  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     25      1.1     fvdl  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     26      1.1     fvdl  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     27      1.1     fvdl  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     28      1.1     fvdl  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     29      1.1     fvdl  * SUCH DAMAGE.
     30      1.1     fvdl  *
     31      1.1     fvdl  * $FreeBSD: src/sys/dev/aic7xxx/aicasm_gram.y,v 1.8 1999/12/06 18:23:30 gibbs Exp $
     32      1.1     fvdl  */
     33      1.1     fvdl 
     34      1.1     fvdl #include <stdio.h>
     35      1.1     fvdl #include <stdlib.h>
     36      1.1     fvdl #include <string.h>
     37      1.1     fvdl #include <sysexits.h>
     38      1.1     fvdl 
     39      1.1     fvdl #include <sys/types.h>
     40      1.1     fvdl #include <sys/queue.h>
     41      1.1     fvdl 
     42      1.1     fvdl #include "aicasm.h"
     43      1.1     fvdl #include "aicasm_symbol.h"
     44      1.1     fvdl #include "sequencer.h"
     45      1.1     fvdl 
     46      1.1     fvdl int yylineno;
     47      1.1     fvdl char *yyfilename;
     48      1.1     fvdl static symbol_t *cur_symbol;
     49      1.1     fvdl static symtype cur_symtype;
     50      1.1     fvdl static symbol_t *accumulator;
     51      1.1     fvdl static symbol_ref_t allones;
     52      1.1     fvdl static symbol_ref_t allzeros;
     53      1.1     fvdl static symbol_ref_t none;
     54      1.1     fvdl static symbol_ref_t sindex;
     55      1.1     fvdl static int instruction_ptr;
     56      1.1     fvdl static int sram_or_scb_offset;
     57      1.1     fvdl static int download_constant_count;
     58      1.1     fvdl 
     59      1.1     fvdl static void process_bitmask __P((int mask_type, symbol_t *sym, int mask));
     60      1.1     fvdl static void initialize_symbol __P((symbol_t *symbol));
     61      1.1     fvdl static void process_register __P((symbol_t **p_symbol));
     62      1.1     fvdl static void format_1_instr __P((int opcode, symbol_ref_t *dest,
     63      1.1     fvdl 				expression_t *immed, symbol_ref_t *src,
     64      1.1     fvdl 				int ret));
     65      1.1     fvdl static void format_2_instr __P((int opcode, symbol_ref_t *dest,
     66      1.1     fvdl 				expression_t *places, symbol_ref_t *src,
     67      1.1     fvdl 				int ret));
     68      1.1     fvdl static void format_3_instr __P((int opcode, symbol_ref_t *src,
     69      1.1     fvdl 				expression_t *immed, symbol_ref_t *address));
     70      1.1     fvdl static void test_readable_symbol __P((symbol_t *symbol));
     71      1.1     fvdl static void test_writable_symbol __P((symbol_t *symbol));
     72      1.1     fvdl static void type_check __P((symbol_t *symbol, expression_t *expression,
     73      1.1     fvdl 			    int and_op));
     74      1.1     fvdl static void make_expression __P((expression_t *immed, int value));
     75      1.1     fvdl static void add_conditional __P((symbol_t *symbol));
     76      1.1     fvdl static int  is_download_const __P((expression_t *immed));
     77      1.1     fvdl 
     78      1.1     fvdl #define YYDEBUG 1
     79      1.1     fvdl #define SRAM_SYMNAME "SRAM_BASE"
     80      1.1     fvdl #define SCB_SYMNAME "SCB_BASE"
     81      1.1     fvdl %}
     82      1.1     fvdl 
     83      1.1     fvdl %union {
     84      1.1     fvdl 	int		value;
     85      1.1     fvdl 	char		*str;
     86      1.1     fvdl 	symbol_t	*sym;
     87      1.1     fvdl 	symbol_ref_t	sym_ref;
     88      1.1     fvdl 	expression_t	expression;
     89      1.1     fvdl }
     90      1.1     fvdl 
     91      1.1     fvdl %token T_REGISTER
     92      1.1     fvdl 
     93      1.1     fvdl %token <value> T_CONST
     94      1.1     fvdl 
     95      1.1     fvdl %token T_DOWNLOAD
     96      1.1     fvdl 
     97      1.1     fvdl %token T_SCB
     98      1.1     fvdl 
     99      1.1     fvdl %token T_SRAM
    100      1.1     fvdl 
    101      1.1     fvdl %token T_ALIAS
    102      1.1     fvdl 
    103      1.1     fvdl %token T_SIZE
    104      1.1     fvdl 
    105      1.1     fvdl %token <value> T_ADDRESS
    106      1.1     fvdl 
    107      1.1     fvdl %token T_ACCESS_MODE
    108      1.1     fvdl 
    109      1.1     fvdl %token <value> T_MODE
    110      1.1     fvdl 
    111      1.1     fvdl %token T_BIT
    112      1.1     fvdl 
    113      1.1     fvdl %token T_MASK
    114      1.1     fvdl 
    115      1.1     fvdl %token <value> T_NUMBER
    116      1.1     fvdl 
    117      1.1     fvdl %token <str> T_PATH
    118      1.1     fvdl 
    119      1.1     fvdl %token <sym> T_CEXPR
    120      1.1     fvdl 
    121      1.1     fvdl %token T_EOF T_INCLUDE
    122      1.1     fvdl 
    123      1.1     fvdl %token <value> T_SHR T_SHL T_ROR T_ROL
    124      1.1     fvdl 
    125      1.1     fvdl %token <value> T_MVI T_MOV T_CLR T_BMOV
    126      1.1     fvdl 
    127      1.1     fvdl %token <value> T_JMP T_JC T_JNC T_JE T_JNE T_JNZ T_JZ T_CALL
    128      1.1     fvdl 
    129      1.1     fvdl %token <value> T_ADD T_ADC
    130      1.1     fvdl 
    131      1.1     fvdl %token <value> T_INC T_DEC
    132      1.1     fvdl 
    133      1.1     fvdl %token <value> T_STC T_CLC
    134      1.1     fvdl 
    135      1.1     fvdl %token <value> T_CMP T_XOR
    136      1.1     fvdl 
    137      1.1     fvdl %token <value> T_TEST T_AND
    138      1.1     fvdl 
    139      1.1     fvdl %token <value> T_OR
    140      1.1     fvdl 
    141      1.1     fvdl %token T_RET
    142      1.1     fvdl 
    143      1.1     fvdl %token T_NOP
    144      1.1     fvdl 
    145      1.1     fvdl %token T_ACCUM T_ALLONES T_ALLZEROS T_NONE T_SINDEX
    146      1.1     fvdl 
    147      1.1     fvdl %token T_A
    148      1.1     fvdl 
    149      1.1     fvdl %token <sym> T_SYMBOL
    150      1.1     fvdl 
    151      1.1     fvdl %token T_NL
    152      1.1     fvdl 
    153      1.1     fvdl %token T_IF T_ELSE T_ELSE_IF T_ENDIF
    154      1.1     fvdl 
    155      1.1     fvdl %type <sym_ref> reg_symbol address destination source opt_source
    156      1.1     fvdl 
    157      1.1     fvdl %type <expression> expression immediate immediate_or_a
    158      1.1     fvdl 
    159      1.1     fvdl %type <value> ret f1_opcode f2_opcode jmp_jc_jnc_call jz_jnz je_jne
    160      1.1     fvdl 
    161      1.1     fvdl %type <value> numerical_value
    162      1.1     fvdl 
    163      1.1     fvdl %left '|'
    164      1.1     fvdl %left '&'
    165      1.1     fvdl %left '+' '-'
    166      1.1     fvdl %right '~'
    167      1.1     fvdl %nonassoc UMINUS
    168      1.1     fvdl %%
    169      1.1     fvdl 
    170      1.1     fvdl program:
    171      1.1     fvdl 	include
    172      1.1     fvdl |	program include
    173      1.1     fvdl |	register
    174      1.1     fvdl |	program register
    175      1.1     fvdl |	constant
    176      1.1     fvdl |	program constant
    177      1.1     fvdl |	scratch_ram
    178      1.1     fvdl |	program scratch_ram
    179      1.1     fvdl |	scb
    180      1.1     fvdl |	program scb
    181      1.1     fvdl |	label
    182      1.1     fvdl |	program label
    183      1.1     fvdl |	conditional
    184      1.1     fvdl |	program conditional
    185      1.1     fvdl |	code
    186      1.1     fvdl |	program code
    187      1.1     fvdl ;
    188      1.1     fvdl 
    189      1.1     fvdl include:
    190      1.1     fvdl 	T_INCLUDE '<' T_PATH '>'
    191      1.1     fvdl 	{ include_file($3, BRACKETED_INCLUDE); }
    192      1.1     fvdl |	T_INCLUDE '"' T_PATH '"'
    193      1.1     fvdl 	{ include_file($3, QUOTED_INCLUDE); }
    194      1.1     fvdl ;
    195      1.1     fvdl 
    196      1.1     fvdl register:
    197      1.1     fvdl 	T_REGISTER { cur_symtype = REGISTER; } reg_definition
    198      1.1     fvdl ;
    199      1.1     fvdl 
    200      1.1     fvdl reg_definition:
    201      1.1     fvdl 	T_SYMBOL '{'
    202      1.1     fvdl 		{
    203      1.1     fvdl 			if ($1->type != UNINITIALIZED) {
    204      1.1     fvdl 				stop("Register multiply defined", EX_DATAERR);
    205      1.1     fvdl 				/* NOTREACHED */
    206      1.1     fvdl 			}
    207      1.1     fvdl 			cur_symbol = $1;
    208      1.1     fvdl 			cur_symbol->type = cur_symtype;
    209      1.1     fvdl 			initialize_symbol(cur_symbol);
    210      1.1     fvdl 		}
    211      1.1     fvdl 		reg_attribute_list
    212      1.1     fvdl 	'}'
    213      1.1     fvdl 		{
    214      1.1     fvdl 			/*
    215      1.1     fvdl 			 * Default to allowing everything in for registers
    216      1.1     fvdl 			 * with no bit or mask definitions.
    217      1.1     fvdl 			 */
    218      1.1     fvdl 			if (cur_symbol->info.rinfo->valid_bitmask == 0)
    219      1.1     fvdl 				cur_symbol->info.rinfo->valid_bitmask = 0xFF;
    220      1.1     fvdl 
    221      1.1     fvdl 			if (cur_symbol->info.rinfo->size == 0)
    222      1.1     fvdl 				cur_symbol->info.rinfo->size = 1;
    223      1.1     fvdl 
    224      1.1     fvdl 			/*
    225      1.1     fvdl 			 * This might be useful for registers too.
    226      1.1     fvdl 			 */
    227      1.1     fvdl 			if (cur_symbol->type != REGISTER) {
    228      1.1     fvdl 				if (cur_symbol->info.rinfo->address == 0)
    229      1.1     fvdl 					cur_symbol->info.rinfo->address =
    230      1.1     fvdl 					    sram_or_scb_offset;
    231      1.1     fvdl 				sram_or_scb_offset +=
    232      1.1     fvdl 				    cur_symbol->info.rinfo->size;
    233      1.1     fvdl 			}
    234      1.1     fvdl 			cur_symbol = NULL;
    235      1.1     fvdl 		}
    236      1.1     fvdl ;
    237      1.1     fvdl 
    238      1.1     fvdl reg_attribute_list:
    239      1.1     fvdl 	reg_attribute
    240      1.1     fvdl |	reg_attribute_list reg_attribute
    241      1.1     fvdl ;
    242      1.1     fvdl 
    243      1.1     fvdl reg_attribute:
    244      1.1     fvdl 	reg_address
    245      1.1     fvdl |	size
    246      1.1     fvdl |	access_mode
    247      1.1     fvdl |	bit_defn
    248      1.1     fvdl |	mask_defn
    249      1.1     fvdl |	alias
    250      1.1     fvdl |	accumulator
    251      1.1     fvdl |	allones
    252      1.1     fvdl |	allzeros
    253      1.1     fvdl |	none
    254      1.1     fvdl |	sindex
    255      1.1     fvdl ;
    256      1.1     fvdl 
    257      1.1     fvdl reg_address:
    258      1.1     fvdl 	T_ADDRESS T_NUMBER
    259      1.1     fvdl 	{
    260      1.1     fvdl 		cur_symbol->info.rinfo->address = $2;
    261      1.1     fvdl 	}
    262      1.1     fvdl ;
    263      1.1     fvdl 
    264      1.1     fvdl size:
    265      1.1     fvdl 	T_SIZE T_NUMBER
    266      1.1     fvdl 	{
    267      1.1     fvdl 		cur_symbol->info.rinfo->size = $2;
    268      1.1     fvdl 	}
    269      1.1     fvdl ;
    270      1.1     fvdl 
    271      1.1     fvdl access_mode:
    272      1.1     fvdl 	T_ACCESS_MODE T_MODE
    273      1.1     fvdl 	{
    274      1.1     fvdl 		cur_symbol->info.rinfo->mode = $2;
    275      1.1     fvdl 	}
    276      1.1     fvdl ;
    277      1.1     fvdl 
    278      1.1     fvdl bit_defn:
    279      1.1     fvdl 	T_BIT T_SYMBOL T_NUMBER
    280      1.1     fvdl 	{
    281      1.1     fvdl 		process_bitmask(BIT, $2, $3);
    282      1.1     fvdl 	}
    283      1.1     fvdl ;
    284      1.1     fvdl 
    285      1.1     fvdl mask_defn:
    286      1.1     fvdl 	T_MASK T_SYMBOL expression
    287      1.1     fvdl 	{
    288      1.1     fvdl 		process_bitmask(MASK, $2, $3.value);
    289      1.1     fvdl 	}
    290      1.1     fvdl ;
    291      1.1     fvdl 
    292      1.1     fvdl alias:
    293      1.1     fvdl 	T_ALIAS	T_SYMBOL
    294      1.1     fvdl 	{
    295      1.1     fvdl 		if ($2->type != UNINITIALIZED) {
    296      1.1     fvdl 			stop("Re-definition of register alias",
    297      1.1     fvdl 			     EX_DATAERR);
    298      1.1     fvdl 			/* NOTREACHED */
    299      1.1     fvdl 		}
    300      1.1     fvdl 		$2->type = ALIAS;
    301      1.1     fvdl 		initialize_symbol($2);
    302      1.1     fvdl 		$2->info.ainfo->parent = cur_symbol;
    303      1.1     fvdl 	}
    304      1.1     fvdl ;
    305      1.1     fvdl 
    306      1.1     fvdl accumulator:
    307      1.1     fvdl 	T_ACCUM
    308      1.1     fvdl 	{
    309      1.1     fvdl 		if (accumulator != NULL) {
    310      1.1     fvdl 			stop("Only one accumulator definition allowed",
    311      1.1     fvdl 			     EX_DATAERR);
    312      1.1     fvdl 			/* NOTREACHED */
    313      1.1     fvdl 		}
    314      1.1     fvdl 		accumulator = cur_symbol;
    315      1.1     fvdl 	}
    316      1.1     fvdl ;
    317      1.1     fvdl 
    318      1.1     fvdl allones:
    319      1.1     fvdl 	T_ALLONES
    320      1.1     fvdl 	{
    321      1.1     fvdl 		if (allones.symbol != NULL) {
    322      1.1     fvdl 			stop("Only one definition of allones allowed",
    323      1.1     fvdl 			     EX_DATAERR);
    324      1.1     fvdl 			/* NOTREACHED */
    325      1.1     fvdl 		}
    326      1.1     fvdl 		allones.symbol = cur_symbol;
    327      1.1     fvdl 	}
    328      1.1     fvdl ;
    329      1.1     fvdl 
    330      1.1     fvdl allzeros:
    331      1.1     fvdl 	T_ALLZEROS
    332      1.1     fvdl 	{
    333      1.1     fvdl 		if (allzeros.symbol != NULL) {
    334      1.1     fvdl 			stop("Only one definition of allzeros allowed",
    335      1.1     fvdl 			     EX_DATAERR);
    336      1.1     fvdl 			/* NOTREACHED */
    337      1.1     fvdl 		}
    338      1.1     fvdl 		allzeros.symbol = cur_symbol;
    339      1.1     fvdl 	}
    340      1.1     fvdl ;
    341      1.1     fvdl 
    342      1.1     fvdl none:
    343      1.1     fvdl 	T_NONE
    344      1.1     fvdl 	{
    345      1.1     fvdl 		if (none.symbol != NULL) {
    346      1.1     fvdl 			stop("Only one definition of none allowed",
    347      1.1     fvdl 			     EX_DATAERR);
    348      1.1     fvdl 			/* NOTREACHED */
    349      1.1     fvdl 		}
    350      1.1     fvdl 		none.symbol = cur_symbol;
    351      1.1     fvdl 	}
    352      1.1     fvdl ;
    353      1.1     fvdl 
    354      1.1     fvdl sindex:
    355      1.1     fvdl 	T_SINDEX
    356      1.1     fvdl 	{
    357      1.1     fvdl 		if (sindex.symbol != NULL) {
    358      1.1     fvdl 			stop("Only one definition of sindex allowed",
    359      1.1     fvdl 			     EX_DATAERR);
    360      1.1     fvdl 			/* NOTREACHED */
    361      1.1     fvdl 		}
    362      1.1     fvdl 		sindex.symbol = cur_symbol;
    363      1.1     fvdl 	}
    364      1.1     fvdl ;
    365      1.1     fvdl 
    366      1.1     fvdl expression:
    367      1.1     fvdl 	expression '|' expression
    368      1.1     fvdl 	{
    369      1.1     fvdl 		 $$.value = $1.value | $3.value;
    370      1.1     fvdl 		 symlist_merge(&$$.referenced_syms,
    371      1.1     fvdl 			       &$1.referenced_syms,
    372      1.1     fvdl 			       &$3.referenced_syms);
    373      1.1     fvdl 	}
    374      1.1     fvdl |	expression '&' expression
    375      1.1     fvdl 	{
    376      1.1     fvdl 		$$.value = $1.value & $3.value;
    377      1.1     fvdl 		symlist_merge(&$$.referenced_syms,
    378      1.1     fvdl 			       &$1.referenced_syms,
    379      1.1     fvdl 			       &$3.referenced_syms);
    380      1.1     fvdl 	}
    381      1.1     fvdl |	expression '+' expression
    382      1.1     fvdl 	{
    383      1.1     fvdl 		$$.value = $1.value + $3.value;
    384      1.1     fvdl 		symlist_merge(&$$.referenced_syms,
    385      1.1     fvdl 			       &$1.referenced_syms,
    386      1.1     fvdl 			       &$3.referenced_syms);
    387      1.1     fvdl 	}
    388      1.1     fvdl |	expression '-' expression
    389      1.1     fvdl 	{
    390      1.1     fvdl 		$$.value = $1.value - $3.value;
    391      1.1     fvdl 		symlist_merge(&($$.referenced_syms),
    392      1.1     fvdl 			       &($1.referenced_syms),
    393      1.1     fvdl 			       &($3.referenced_syms));
    394      1.1     fvdl 	}
    395      1.1     fvdl |	'(' expression ')'
    396      1.1     fvdl 	{
    397      1.1     fvdl 		$$ = $2;
    398      1.1     fvdl 	}
    399      1.1     fvdl |	'~' expression
    400      1.1     fvdl 	{
    401      1.1     fvdl 		$$ = $2;
    402      1.1     fvdl 		$$.value = (~$$.value) & 0xFF;
    403      1.1     fvdl 	}
    404      1.1     fvdl |	'-' expression %prec UMINUS
    405      1.1     fvdl 	{
    406      1.1     fvdl 		$$ = $2;
    407      1.1     fvdl 		$$.value = -$$.value;
    408      1.1     fvdl 	}
    409      1.1     fvdl |	T_NUMBER
    410      1.1     fvdl 	{
    411      1.1     fvdl 		$$.value = $1;
    412      1.1     fvdl 		SLIST_INIT(&$$.referenced_syms);
    413      1.1     fvdl 	}
    414      1.1     fvdl |	T_SYMBOL
    415      1.1     fvdl 	{
    416      1.1     fvdl 		symbol_t *symbol;
    417      1.1     fvdl 
    418      1.1     fvdl 		symbol = $1;
    419      1.1     fvdl 		switch (symbol->type) {
    420      1.1     fvdl 		case ALIAS:
    421      1.1     fvdl 			symbol = $1->info.ainfo->parent;
    422      1.1     fvdl 		case REGISTER:
    423      1.1     fvdl 		case SCBLOC:
    424      1.1     fvdl 		case SRAMLOC:
    425      1.1     fvdl 			$$.value = symbol->info.rinfo->address;
    426      1.1     fvdl 			break;
    427      1.1     fvdl 		case MASK:
    428      1.1     fvdl 		case BIT:
    429      1.1     fvdl 			$$.value = symbol->info.minfo->mask;
    430      1.1     fvdl 			break;
    431      1.1     fvdl 		case DOWNLOAD_CONST:
    432      1.1     fvdl 		case CONST:
    433      1.1     fvdl 			$$.value = symbol->info.cinfo->value;
    434      1.1     fvdl 			break;
    435      1.1     fvdl 		case UNINITIALIZED:
    436      1.1     fvdl 		default:
    437      1.1     fvdl 		{
    438      1.1     fvdl 			char buf[255];
    439      1.1     fvdl 
    440      1.1     fvdl 			snprintf(buf, sizeof(buf),
    441      1.1     fvdl 				 "Undefined symbol %s referenced",
    442      1.1     fvdl 				 symbol->name);
    443      1.1     fvdl 			stop(buf, EX_DATAERR);
    444      1.1     fvdl 			/* NOTREACHED */
    445      1.1     fvdl 			break;
    446      1.1     fvdl 		}
    447      1.1     fvdl 		}
    448      1.1     fvdl 		SLIST_INIT(&$$.referenced_syms);
    449      1.1     fvdl 		symlist_add(&$$.referenced_syms, symbol, SYMLIST_INSERT_HEAD);
    450      1.1     fvdl 	}
    451      1.1     fvdl ;
    452      1.1     fvdl 
    453      1.1     fvdl constant:
    454      1.1     fvdl 	T_CONST T_SYMBOL numerical_value
    455      1.1     fvdl 	{
    456      1.1     fvdl 		if ($2->type != UNINITIALIZED) {
    457      1.1     fvdl 			stop("Re-definition of symbol as a constant",
    458      1.1     fvdl 			     EX_DATAERR);
    459      1.1     fvdl 			/* NOTREACHED */
    460      1.1     fvdl 		}
    461      1.1     fvdl 		$2->type = CONST;
    462      1.1     fvdl 		initialize_symbol($2);
    463      1.1     fvdl 		$2->info.cinfo->value = $3;
    464      1.1     fvdl 		$2->info.cinfo->define = $1;
    465      1.1     fvdl 	}
    466      1.1     fvdl |	T_CONST T_SYMBOL T_DOWNLOAD
    467      1.1     fvdl 	{
    468      1.1     fvdl 		if ($1) {
    469      1.1     fvdl 			stop("Invalid downloaded constant declaration",
    470      1.1     fvdl 			     EX_DATAERR);
    471      1.1     fvdl 			/* NOTREACHED */
    472      1.1     fvdl 		}
    473      1.1     fvdl 		if ($2->type != UNINITIALIZED) {
    474      1.1     fvdl 			stop("Re-definition of symbol as a downloaded constant",
    475      1.1     fvdl 			     EX_DATAERR);
    476      1.1     fvdl 			/* NOTREACHED */
    477      1.1     fvdl 		}
    478      1.1     fvdl 		$2->type = DOWNLOAD_CONST;
    479      1.1     fvdl 		initialize_symbol($2);
    480      1.1     fvdl 		$2->info.cinfo->value = download_constant_count++;
    481      1.1     fvdl 		$2->info.cinfo->define = FALSE;
    482      1.1     fvdl 	}
    483      1.1     fvdl ;
    484      1.1     fvdl 
    485      1.1     fvdl numerical_value:
    486      1.1     fvdl 	T_NUMBER
    487      1.1     fvdl 	{
    488      1.1     fvdl 		$$ = $1;
    489      1.1     fvdl 	}
    490      1.1     fvdl |	'-' T_NUMBER
    491      1.1     fvdl 	{
    492      1.1     fvdl 		$$ = -$2;
    493      1.1     fvdl 	}
    494      1.1     fvdl ;
    495      1.1     fvdl 
    496      1.1     fvdl scratch_ram:
    497      1.1     fvdl 	T_SRAM '{'
    498      1.1     fvdl 		{
    499      1.1     fvdl 			cur_symbol = symtable_get(SRAM_SYMNAME);
    500      1.1     fvdl 			cur_symtype = SRAMLOC;
    501      1.1     fvdl 			if (cur_symbol->type != UNINITIALIZED) {
    502      1.1     fvdl 				stop("Only one SRAM definition allowed",
    503      1.1     fvdl 				     EX_DATAERR);
    504      1.1     fvdl 				/* NOTREACHED */
    505      1.1     fvdl 			}
    506      1.1     fvdl 			cur_symbol->type = SRAMLOC;
    507      1.1     fvdl 			initialize_symbol(cur_symbol);
    508      1.1     fvdl 		}
    509      1.1     fvdl 		reg_address
    510      1.1     fvdl 		{
    511      1.1     fvdl 			sram_or_scb_offset = cur_symbol->info.rinfo->address;
    512      1.1     fvdl 		}
    513      1.1     fvdl 		scb_or_sram_reg_list
    514      1.1     fvdl 	'}'
    515      1.1     fvdl 		{
    516      1.1     fvdl 			cur_symbol = NULL;
    517      1.1     fvdl 		}
    518      1.1     fvdl ;
    519      1.1     fvdl 
    520      1.1     fvdl scb:
    521      1.1     fvdl 	T_SCB '{'
    522      1.1     fvdl 		{
    523      1.1     fvdl 			cur_symbol = symtable_get(SCB_SYMNAME);
    524      1.1     fvdl 			cur_symtype = SCBLOC;
    525      1.1     fvdl 			if (cur_symbol->type != UNINITIALIZED) {
    526      1.1     fvdl 				stop("Only one SRAM definition allowed",
    527      1.1     fvdl 				     EX_SOFTWARE);
    528      1.1     fvdl 				/* NOTREACHED */
    529      1.1     fvdl 			}
    530      1.1     fvdl 			cur_symbol->type = SCBLOC;
    531      1.1     fvdl 			initialize_symbol(cur_symbol);
    532      1.1     fvdl 		}
    533      1.1     fvdl 		reg_address
    534      1.1     fvdl 		{
    535      1.1     fvdl 			sram_or_scb_offset = cur_symbol->info.rinfo->address;
    536      1.1     fvdl 		}
    537      1.1     fvdl 		scb_or_sram_reg_list
    538      1.1     fvdl 	'}'
    539      1.1     fvdl 		{
    540      1.1     fvdl 			cur_symbol = NULL;
    541      1.1     fvdl 		}
    542      1.1     fvdl ;
    543      1.1     fvdl 
    544      1.1     fvdl scb_or_sram_reg_list:
    545      1.1     fvdl 	reg_definition
    546      1.1     fvdl |	scb_or_sram_reg_list reg_definition
    547      1.1     fvdl ;
    548      1.1     fvdl 
    549      1.1     fvdl reg_symbol:
    550      1.1     fvdl 	T_SYMBOL
    551      1.1     fvdl 	{
    552      1.1     fvdl 		process_register(&$1);
    553      1.1     fvdl 		$$.symbol = $1;
    554      1.1     fvdl 		$$.offset = 0;
    555      1.1     fvdl 	}
    556      1.1     fvdl |	T_SYMBOL '[' T_NUMBER ']'
    557      1.1     fvdl 	{
    558      1.1     fvdl 		process_register(&$1);
    559      1.1     fvdl 		if (($3 + 1) > $1->info.rinfo->size) {
    560      1.1     fvdl 			stop("Accessing offset beyond range of register",
    561      1.1     fvdl 			     EX_DATAERR);
    562      1.1     fvdl 			/* NOTREACHED */
    563      1.1     fvdl 		}
    564      1.1     fvdl 		$$.symbol = $1;
    565      1.1     fvdl 		$$.offset = $3;
    566      1.1     fvdl 	}
    567      1.1     fvdl |	T_A
    568      1.1     fvdl 	{
    569      1.1     fvdl 		if (accumulator == NULL) {
    570      1.1     fvdl 			stop("No accumulator has been defined", EX_DATAERR);
    571      1.1     fvdl 			/* NOTREACHED */
    572      1.1     fvdl 		}
    573      1.1     fvdl 		$$.symbol = accumulator;
    574      1.1     fvdl 		$$.offset = 0;
    575      1.1     fvdl 	}
    576      1.1     fvdl ;
    577      1.1     fvdl 
    578      1.1     fvdl destination:
    579      1.1     fvdl 	reg_symbol
    580      1.1     fvdl 	{
    581      1.1     fvdl 		test_writable_symbol($1.symbol);
    582      1.1     fvdl 		$$ = $1;
    583      1.1     fvdl 	}
    584      1.1     fvdl ;
    585      1.1     fvdl 
    586      1.1     fvdl immediate:
    587      1.1     fvdl 	expression
    588      1.1     fvdl 	{ $$ = $1; }
    589      1.1     fvdl ;
    590      1.1     fvdl 
    591      1.1     fvdl immediate_or_a:
    592      1.1     fvdl 	expression
    593      1.1     fvdl 	{
    594      1.1     fvdl 		$$ = $1;
    595      1.1     fvdl 	}
    596      1.1     fvdl |	T_A
    597      1.1     fvdl 	{
    598      1.1     fvdl 		SLIST_INIT(&$$.referenced_syms);
    599      1.1     fvdl 		$$.value = 0;
    600      1.1     fvdl 	}
    601      1.1     fvdl ;
    602      1.1     fvdl 
    603      1.1     fvdl source:
    604      1.1     fvdl 	reg_symbol
    605      1.1     fvdl 	{
    606      1.1     fvdl 		test_readable_symbol($1.symbol);
    607      1.1     fvdl 		$$ = $1;
    608      1.1     fvdl 	}
    609      1.1     fvdl ;
    610      1.1     fvdl 
    611      1.1     fvdl opt_source:
    612      1.1     fvdl 	{
    613      1.1     fvdl 		$$.symbol = NULL;
    614      1.1     fvdl 		$$.offset = 0;
    615      1.1     fvdl 	}
    616      1.1     fvdl |	',' source
    617      1.1     fvdl 	{ $$ = $2; }
    618      1.1     fvdl ;
    619      1.1     fvdl 
    620      1.1     fvdl ret:
    621      1.1     fvdl 	{ $$ = 0; }
    622      1.1     fvdl |	T_RET
    623      1.1     fvdl 	{ $$ = 1; }
    624      1.1     fvdl ;
    625      1.1     fvdl 
    626      1.1     fvdl label:
    627      1.1     fvdl 	T_SYMBOL ':'
    628      1.1     fvdl 	{
    629      1.1     fvdl 		if ($1->type != UNINITIALIZED) {
    630      1.1     fvdl 			stop("Program label multiply defined", EX_DATAERR);
    631      1.1     fvdl 			/* NOTREACHED */
    632      1.1     fvdl 		}
    633      1.1     fvdl 		$1->type = LABEL;
    634      1.1     fvdl 		initialize_symbol($1);
    635      1.1     fvdl 		$1->info.linfo->address = instruction_ptr;
    636      1.1     fvdl 	}
    637      1.1     fvdl ;
    638      1.1     fvdl 
    639      1.1     fvdl address:
    640      1.1     fvdl 	T_SYMBOL
    641      1.1     fvdl 	{
    642      1.1     fvdl 		$$.symbol = $1;
    643      1.1     fvdl 		$$.offset = 0;
    644      1.1     fvdl 	}
    645      1.1     fvdl |	T_SYMBOL '+' T_NUMBER
    646      1.1     fvdl 	{
    647      1.1     fvdl 		$$.symbol = $1;
    648      1.1     fvdl 		$$.offset = $3;
    649      1.1     fvdl 	}
    650      1.1     fvdl |	T_SYMBOL '-' T_NUMBER
    651      1.1     fvdl 	{
    652      1.1     fvdl 		$$.symbol = $1;
    653      1.1     fvdl 		$$.offset = -$3;
    654      1.1     fvdl 	}
    655      1.1     fvdl |	'.'
    656      1.1     fvdl 	{
    657      1.1     fvdl 		$$.symbol = NULL;
    658      1.1     fvdl 		$$.offset = 0;
    659      1.1     fvdl 	}
    660      1.1     fvdl |	'.' '+' T_NUMBER
    661      1.1     fvdl 	{
    662      1.1     fvdl 		$$.symbol = NULL;
    663      1.1     fvdl 		$$.offset = $3;
    664      1.1     fvdl 	}
    665      1.1     fvdl |	'.' '-' T_NUMBER
    666      1.1     fvdl 	{
    667      1.1     fvdl 		$$.symbol = NULL;
    668      1.1     fvdl 		$$.offset = -$3;
    669      1.1     fvdl 	}
    670      1.1     fvdl ;
    671      1.1     fvdl 
    672      1.1     fvdl conditional:
    673      1.1     fvdl 	T_IF T_CEXPR '{'
    674      1.1     fvdl 	{
    675      1.1     fvdl 		scope_t *new_scope;
    676      1.1     fvdl 
    677      1.1     fvdl 		add_conditional($2);
    678      1.1     fvdl 		new_scope = scope_alloc();
    679      1.1     fvdl 		new_scope->type = SCOPE_IF;
    680      1.1     fvdl 		new_scope->begin_addr = instruction_ptr;
    681      1.1     fvdl 		new_scope->func_num = $2->info.condinfo->func_num;
    682      1.1     fvdl 	}
    683      1.1     fvdl |	T_ELSE T_IF T_CEXPR '{'
    684      1.1     fvdl 	{
    685      1.1     fvdl 		scope_t *new_scope;
    686      1.1     fvdl 		scope_t *scope_context;
    687      1.1     fvdl 		scope_t *last_scope;
    688      1.1     fvdl 
    689      1.1     fvdl 		/*
    690      1.1     fvdl 		 * Ensure that the previous scope is either an
    691      1.1     fvdl 		 * if or and else if.
    692      1.1     fvdl 		 */
    693      1.1     fvdl 		scope_context = SLIST_FIRST(&scope_stack);
    694      1.1     fvdl 		last_scope = TAILQ_LAST(&scope_context->inner_scope,
    695      1.1     fvdl 					scope_tailq);
    696      1.1     fvdl 		if (last_scope == NULL
    697      1.1     fvdl 		 || last_scope->type == T_ELSE) {
    698      1.1     fvdl 
    699      1.1     fvdl 			stop("'else if' without leading 'if'", EX_DATAERR);
    700      1.1     fvdl 			/* NOTREACHED */
    701      1.1     fvdl 		}
    702      1.1     fvdl 		add_conditional($3);
    703      1.1     fvdl 		new_scope = scope_alloc();
    704      1.1     fvdl 		new_scope->type = SCOPE_ELSE_IF;
    705      1.1     fvdl 		new_scope->begin_addr = instruction_ptr;
    706      1.1     fvdl 		new_scope->func_num = $3->info.condinfo->func_num;
    707      1.1     fvdl 	}
    708      1.1     fvdl |	T_ELSE '{'
    709      1.1     fvdl 	{
    710      1.1     fvdl 		scope_t *new_scope;
    711      1.1     fvdl 		scope_t *scope_context;
    712      1.1     fvdl 		scope_t *last_scope;
    713      1.1     fvdl 
    714      1.1     fvdl 		/*
    715      1.1     fvdl 		 * Ensure that the previous scope is either an
    716      1.1     fvdl 		 * if or and else if.
    717      1.1     fvdl 		 */
    718      1.1     fvdl 		scope_context = SLIST_FIRST(&scope_stack);
    719      1.1     fvdl 		last_scope = TAILQ_LAST(&scope_context->inner_scope,
    720      1.1     fvdl 					scope_tailq);
    721      1.1     fvdl 		if (last_scope == NULL
    722      1.1     fvdl 		 || last_scope->type == SCOPE_ELSE) {
    723      1.1     fvdl 
    724      1.1     fvdl 			stop("'else' without leading 'if'", EX_DATAERR);
    725      1.1     fvdl 			/* NOTREACHED */
    726      1.1     fvdl 		}
    727      1.1     fvdl 		new_scope = scope_alloc();
    728      1.1     fvdl 		new_scope->type = SCOPE_ELSE;
    729      1.1     fvdl 		new_scope->begin_addr = instruction_ptr;
    730      1.1     fvdl 	}
    731      1.1     fvdl ;
    732      1.1     fvdl 
    733      1.1     fvdl conditional:
    734      1.1     fvdl 	'}'
    735      1.1     fvdl 	{
    736      1.1     fvdl 		scope_t *scope_context;
    737      1.1     fvdl 		scope_t *last_scope;
    738      1.1     fvdl 
    739      1.1     fvdl 		scope_context = SLIST_FIRST(&scope_stack);
    740      1.1     fvdl 		if (scope_context->type == SCOPE_ROOT) {
    741      1.1     fvdl 			stop("Unexpected '}' encountered", EX_DATAERR);
    742      1.1     fvdl 			/* NOTREACHED */
    743      1.1     fvdl 		}
    744      1.1     fvdl 
    745      1.1     fvdl 		scope_context->end_addr = instruction_ptr;
    746      1.1     fvdl 
    747      1.1     fvdl 		/* Pop the scope */
    748      1.1     fvdl 		SLIST_REMOVE_HEAD(&scope_stack, scope_stack_links);
    749      1.1     fvdl 
    750      1.1     fvdl 		process_scope(scope_context);
    751      1.1     fvdl 
    752      1.1     fvdl 		if (SLIST_FIRST(&scope_stack) == NULL) {
    753      1.1     fvdl 			stop("Unexpected '}' encountered", EX_DATAERR);
    754      1.1     fvdl 			/* NOTREACHED */
    755      1.1     fvdl 		}
    756      1.1     fvdl 	}
    757      1.1     fvdl ;
    758      1.1     fvdl 
    759      1.1     fvdl f1_opcode:
    760      1.1     fvdl 	T_AND { $$ = AIC_OP_AND; }
    761      1.1     fvdl |	T_XOR { $$ = AIC_OP_XOR; }
    762      1.1     fvdl |	T_ADD { $$ = AIC_OP_ADD; }
    763      1.1     fvdl |	T_ADC { $$ = AIC_OP_ADC; }
    764      1.1     fvdl ;
    765      1.1     fvdl 
    766      1.1     fvdl code:
    767      1.1     fvdl 	f1_opcode destination ',' immediate_or_a opt_source ret ';'
    768      1.1     fvdl 	{
    769      1.1     fvdl 		format_1_instr($1, &$2, &$4, &$5, $6);
    770      1.1     fvdl 	}
    771      1.1     fvdl ;
    772      1.1     fvdl 
    773      1.1     fvdl code:
    774      1.1     fvdl 	T_OR reg_symbol ',' immediate_or_a opt_source ret ';'
    775      1.1     fvdl 	{
    776      1.1     fvdl 		format_1_instr(AIC_OP_OR, &$2, &$4, &$5, $6);
    777      1.1     fvdl 	}
    778      1.1     fvdl ;
    779      1.1     fvdl 
    780      1.1     fvdl code:
    781      1.1     fvdl 	T_INC destination opt_source ret ';'
    782      1.1     fvdl 	{
    783      1.1     fvdl 		expression_t immed;
    784      1.1     fvdl 
    785      1.1     fvdl 		make_expression(&immed, 1);
    786      1.1     fvdl 		format_1_instr(AIC_OP_ADD, &$2, &immed, &$3, $4);
    787      1.1     fvdl 	}
    788      1.1     fvdl ;
    789      1.1     fvdl 
    790      1.1     fvdl code:
    791      1.1     fvdl 	T_DEC destination opt_source ret ';'
    792      1.1     fvdl 	{
    793      1.1     fvdl 		expression_t immed;
    794      1.1     fvdl 
    795      1.1     fvdl 		make_expression(&immed, -1);
    796      1.1     fvdl 		format_1_instr(AIC_OP_ADD, &$2, &immed, &$3, $4);
    797      1.1     fvdl 	}
    798      1.1     fvdl ;
    799      1.1     fvdl 
    800      1.1     fvdl code:
    801      1.1     fvdl 	T_CLC ret ';'
    802      1.1     fvdl 	{
    803      1.1     fvdl 		expression_t immed;
    804      1.1     fvdl 
    805      1.1     fvdl 		make_expression(&immed, -1);
    806      1.1     fvdl 		format_1_instr(AIC_OP_ADD, &none, &immed, &allzeros, $2);
    807      1.1     fvdl 	}
    808      1.1     fvdl |	T_CLC T_MVI destination ',' immediate_or_a ret ';'
    809      1.1     fvdl 	{
    810      1.1     fvdl 		format_1_instr(AIC_OP_ADD, &$3, &$5, &allzeros, $6);
    811      1.1     fvdl 	}
    812      1.1     fvdl ;
    813      1.1     fvdl 
    814      1.1     fvdl code:
    815      1.1     fvdl 	T_STC ret ';'
    816      1.1     fvdl 	{
    817      1.1     fvdl 		expression_t immed;
    818      1.1     fvdl 
    819      1.1     fvdl 		make_expression(&immed, 1);
    820      1.1     fvdl 		format_1_instr(AIC_OP_ADD, &none, &immed, &allones, $2);
    821      1.1     fvdl 	}
    822      1.1     fvdl |	T_STC destination ret ';'
    823      1.1     fvdl 	{
    824      1.1     fvdl 		expression_t immed;
    825      1.1     fvdl 
    826      1.1     fvdl 		make_expression(&immed, 1);
    827      1.1     fvdl 		format_1_instr(AIC_OP_ADD, &$2, &immed, &allones, $3);
    828      1.1     fvdl 	}
    829      1.1     fvdl ;
    830      1.1     fvdl 
    831      1.1     fvdl code:
    832      1.1     fvdl 	T_BMOV destination ',' source ',' immediate ret ';'
    833      1.1     fvdl 	{
    834      1.1     fvdl 		format_1_instr(AIC_OP_BMOV, &$2, &$6, &$4, $7);
    835      1.1     fvdl 	}
    836      1.1     fvdl ;
    837      1.1     fvdl 
    838      1.1     fvdl code:
    839      1.1     fvdl 	T_MOV destination ',' source ret ';'
    840      1.1     fvdl 	{
    841      1.1     fvdl 		expression_t immed;
    842      1.1     fvdl 
    843      1.1     fvdl 		make_expression(&immed, 0xff);
    844      1.1     fvdl 		format_1_instr(AIC_OP_AND, &$2, &immed, &$4, $5);
    845      1.1     fvdl 	}
    846      1.1     fvdl ;
    847      1.1     fvdl 
    848      1.1     fvdl code:
    849      1.1     fvdl 	T_MVI destination ',' immediate_or_a ret ';'
    850      1.1     fvdl 	{
    851      1.1     fvdl 		format_1_instr(AIC_OP_OR, &$2, &$4, &allzeros, $5);
    852      1.1     fvdl 	}
    853      1.1     fvdl ;
    854      1.1     fvdl 
    855      1.1     fvdl code:
    856      1.1     fvdl 	T_CLR destination ret ';'
    857      1.1     fvdl 	{
    858      1.1     fvdl 		expression_t immed;
    859      1.1     fvdl 
    860      1.1     fvdl 		make_expression(&immed, 0xff);
    861      1.1     fvdl 		format_1_instr(AIC_OP_AND, &$2, &immed, &allzeros, $3);
    862      1.1     fvdl 	}
    863      1.1     fvdl ;
    864      1.1     fvdl 
    865      1.1     fvdl code:
    866      1.1     fvdl 	T_NOP ret ';'
    867      1.1     fvdl 	{
    868      1.1     fvdl 		expression_t immed;
    869      1.1     fvdl 
    870      1.1     fvdl 		make_expression(&immed, 0xff);
    871      1.1     fvdl 		format_1_instr(AIC_OP_AND, &none, &immed, &allzeros, $2);
    872      1.1     fvdl 	}
    873      1.1     fvdl ;
    874      1.1     fvdl 
    875      1.1     fvdl code:
    876      1.1     fvdl 	T_RET ';'
    877      1.1     fvdl 	{
    878      1.1     fvdl 		expression_t immed;
    879      1.1     fvdl 
    880      1.1     fvdl 		make_expression(&immed, 0xff);
    881      1.1     fvdl 		format_1_instr(AIC_OP_AND, &none, &immed, &allzeros, TRUE);
    882      1.1     fvdl 	}
    883      1.1     fvdl ;
    884      1.1     fvdl 
    885      1.1     fvdl 	/*
    886      1.1     fvdl 	 * This grammer differs from the one in the aic7xxx
    887      1.1     fvdl 	 * reference manual since the grammer listed there is
    888      1.1     fvdl 	 * ambiguous and causes a shift/reduce conflict.
    889      1.1     fvdl 	 * It also seems more logical as the "immediate"
    890      1.1     fvdl 	 * argument is listed as the second arg like the
    891      1.1     fvdl 	 * other formats.
    892      1.1     fvdl 	 */
    893      1.1     fvdl 
    894      1.1     fvdl f2_opcode:
    895      1.1     fvdl 	T_SHL { $$ = AIC_OP_SHL; }
    896      1.1     fvdl |	T_SHR { $$ = AIC_OP_SHR; }
    897      1.1     fvdl |	T_ROL { $$ = AIC_OP_ROL; }
    898      1.1     fvdl |	T_ROR { $$ = AIC_OP_ROR; }
    899      1.1     fvdl ;
    900      1.1     fvdl 
    901      1.1     fvdl code:
    902      1.1     fvdl 	f2_opcode destination ',' expression opt_source ret ';'
    903      1.1     fvdl 	{
    904      1.1     fvdl 		format_2_instr($1, &$2, &$4, &$5, $6);
    905      1.1     fvdl 	}
    906      1.1     fvdl ;
    907      1.1     fvdl 
    908      1.1     fvdl jmp_jc_jnc_call:
    909      1.1     fvdl 	T_JMP	{ $$ = AIC_OP_JMP; }
    910      1.1     fvdl |	T_JC	{ $$ = AIC_OP_JC; }
    911      1.1     fvdl |	T_JNC	{ $$ = AIC_OP_JNC; }
    912      1.1     fvdl |	T_CALL	{ $$ = AIC_OP_CALL; }
    913      1.1     fvdl ;
    914      1.1     fvdl 
    915      1.1     fvdl jz_jnz:
    916      1.1     fvdl 	T_JZ	{ $$ = AIC_OP_JZ; }
    917      1.1     fvdl |	T_JNZ	{ $$ = AIC_OP_JNZ; }
    918      1.1     fvdl ;
    919      1.1     fvdl 
    920      1.1     fvdl je_jne:
    921      1.1     fvdl 	T_JE	{ $$ = AIC_OP_JE; }
    922      1.1     fvdl |	T_JNE	{ $$ = AIC_OP_JNE; }
    923      1.1     fvdl ;
    924      1.1     fvdl 
    925      1.1     fvdl code:
    926      1.1     fvdl 	jmp_jc_jnc_call address ';'
    927      1.1     fvdl 	{
    928      1.1     fvdl 		expression_t immed;
    929      1.1     fvdl 
    930      1.1     fvdl 		make_expression(&immed, 0);
    931      1.1     fvdl 		format_3_instr($1, &sindex, &immed, &$2);
    932      1.1     fvdl 	}
    933      1.1     fvdl ;
    934      1.1     fvdl 
    935      1.1     fvdl code:
    936      1.1     fvdl 	T_OR reg_symbol ',' immediate jmp_jc_jnc_call address ';'
    937      1.1     fvdl 	{
    938      1.1     fvdl 		format_3_instr($5, &$2, &$4, &$6);
    939      1.1     fvdl 	}
    940      1.1     fvdl ;
    941      1.1     fvdl 
    942      1.1     fvdl code:
    943      1.1     fvdl 	T_TEST source ',' immediate_or_a jz_jnz address ';'
    944      1.1     fvdl 	{
    945      1.1     fvdl 		format_3_instr($5, &$2, &$4, &$6);
    946      1.1     fvdl 	}
    947      1.1     fvdl ;
    948      1.1     fvdl 
    949      1.1     fvdl code:
    950      1.1     fvdl 	T_CMP source ',' immediate_or_a je_jne address ';'
    951      1.1     fvdl 	{
    952      1.1     fvdl 		format_3_instr($5, &$2, &$4, &$6);
    953      1.1     fvdl 	}
    954      1.1     fvdl ;
    955      1.1     fvdl 
    956      1.1     fvdl code:
    957      1.1     fvdl 	T_MOV source jmp_jc_jnc_call address ';'
    958      1.1     fvdl 	{
    959      1.1     fvdl 		expression_t immed;
    960      1.1     fvdl 
    961      1.1     fvdl 		make_expression(&immed, 0);
    962      1.1     fvdl 		format_3_instr($3, &$2, &immed, &$4);
    963      1.1     fvdl 	}
    964      1.1     fvdl ;
    965      1.1     fvdl 
    966      1.1     fvdl code:
    967      1.1     fvdl 	T_MVI immediate jmp_jc_jnc_call address ';'
    968      1.1     fvdl 	{
    969      1.1     fvdl 		format_3_instr($3, &allzeros, &$2, &$4);
    970      1.1     fvdl 	}
    971      1.1     fvdl ;
    972      1.1     fvdl 
    973      1.1     fvdl %%
    974      1.1     fvdl 
    975      1.1     fvdl static void
    976      1.1     fvdl process_bitmask(mask_type, sym, mask)
    977      1.1     fvdl 	int		mask_type;
    978      1.1     fvdl 	symbol_t	*sym;
    979      1.1     fvdl 	int		mask;
    980      1.1     fvdl {
    981      1.1     fvdl 	/*
    982      1.1     fvdl 	 * Add the current register to its
    983      1.1     fvdl 	 * symbol list, if it already exists,
    984      1.1     fvdl 	 * warn if we are setting it to a
    985      1.1     fvdl 	 * different value, or in the bit to
    986      1.1     fvdl 	 * the "allowed bits" of this register.
    987      1.1     fvdl 	 */
    988      1.1     fvdl 	if (sym->type == UNINITIALIZED) {
    989      1.1     fvdl 		sym->type = mask_type;
    990      1.1     fvdl 		initialize_symbol(sym);
    991      1.1     fvdl 		if (mask_type == BIT) {
    992      1.1     fvdl 			if (mask == 0) {
    993      1.1     fvdl 				stop("Bitmask with no bits set", EX_DATAERR);
    994      1.1     fvdl 				/* NOTREACHED */
    995      1.1     fvdl 			}
    996      1.1     fvdl 			if ((mask & ~(0x01 << (ffs(mask) - 1))) != 0) {
    997      1.1     fvdl 				stop("Bitmask with more than one bit set",
    998      1.1     fvdl 				     EX_DATAERR);
    999      1.1     fvdl 				/* NOTREACHED */
   1000      1.1     fvdl 			}
   1001      1.1     fvdl 		}
   1002      1.1     fvdl 		sym->info.minfo->mask = mask;
   1003      1.1     fvdl 	} else if (sym->type != mask_type) {
   1004      1.1     fvdl 		stop("Bit definition mirrors a definition of the same "
   1005      1.1     fvdl 		     " name, but a different type", EX_DATAERR);
   1006      1.1     fvdl 		/* NOTREACHED */
   1007      1.1     fvdl 	} else if (mask != sym->info.minfo->mask) {
   1008      1.1     fvdl 		stop("Bitmask redefined with a conflicting value", EX_DATAERR);
   1009      1.1     fvdl 		/* NOTREACHED */
   1010      1.1     fvdl 	}
   1011      1.1     fvdl 	/* Fail if this symbol is already listed */
   1012      1.1     fvdl 	if (symlist_search(&(sym->info.minfo->symrefs),
   1013      1.1     fvdl 			   cur_symbol->name) != NULL) {
   1014      1.1     fvdl 		stop("Bitmask defined multiple times for register", EX_DATAERR);
   1015      1.1     fvdl 		/* NOTREACHED */
   1016      1.1     fvdl 	}
   1017      1.1     fvdl 	symlist_add(&(sym->info.minfo->symrefs), cur_symbol,
   1018      1.1     fvdl 		    SYMLIST_INSERT_HEAD);
   1019      1.1     fvdl 	cur_symbol->info.rinfo->valid_bitmask |= mask;
   1020      1.1     fvdl 	cur_symbol->info.rinfo->typecheck_masks = TRUE;
   1021      1.1     fvdl }
   1022      1.1     fvdl 
   1023      1.1     fvdl static void
   1024      1.1     fvdl initialize_symbol(symbol)
   1025      1.1     fvdl 	symbol_t *symbol;
   1026      1.1     fvdl {
   1027      1.1     fvdl 	switch (symbol->type) {
   1028      1.1     fvdl         case UNINITIALIZED:
   1029      1.1     fvdl 		stop("Call to initialize_symbol with type field unset",
   1030      1.1     fvdl 		     EX_SOFTWARE);
   1031      1.1     fvdl 		/* NOTREACHED */
   1032      1.1     fvdl 		break;
   1033      1.1     fvdl         case REGISTER:
   1034      1.1     fvdl         case SRAMLOC:
   1035      1.1     fvdl         case SCBLOC:
   1036      1.1     fvdl 		symbol->info.rinfo =
   1037      1.1     fvdl 		    (struct reg_info *)malloc(sizeof(struct reg_info));
   1038      1.1     fvdl 		if (symbol->info.rinfo == NULL) {
   1039      1.1     fvdl 			stop("Can't create register info", EX_SOFTWARE);
   1040      1.1     fvdl 			/* NOTREACHED */
   1041      1.1     fvdl 		}
   1042      1.1     fvdl 		memset(symbol->info.rinfo, 0,
   1043      1.1     fvdl 		       sizeof(struct reg_info));
   1044      1.1     fvdl 		break;
   1045      1.1     fvdl         case ALIAS:
   1046      1.1     fvdl 		symbol->info.ainfo =
   1047      1.1     fvdl 		    (struct alias_info *)malloc(sizeof(struct alias_info));
   1048      1.1     fvdl 		if (symbol->info.ainfo == NULL) {
   1049      1.1     fvdl 			stop("Can't create alias info", EX_SOFTWARE);
   1050      1.1     fvdl 			/* NOTREACHED */
   1051      1.1     fvdl 		}
   1052      1.1     fvdl 		memset(symbol->info.ainfo, 0,
   1053      1.1     fvdl 		       sizeof(struct alias_info));
   1054      1.1     fvdl 		break;
   1055      1.1     fvdl         case MASK:
   1056      1.1     fvdl         case BIT:
   1057      1.1     fvdl 		symbol->info.minfo =
   1058      1.1     fvdl 		    (struct mask_info *)malloc(sizeof(struct mask_info));
   1059      1.1     fvdl 		if (symbol->info.minfo == NULL) {
   1060      1.1     fvdl 			stop("Can't create bitmask info", EX_SOFTWARE);
   1061      1.1     fvdl 			/* NOTREACHED */
   1062      1.1     fvdl 		}
   1063      1.1     fvdl 		memset(symbol->info.minfo, 0, sizeof(struct mask_info));
   1064      1.1     fvdl 		SLIST_INIT(&(symbol->info.minfo->symrefs));
   1065      1.1     fvdl 		break;
   1066      1.1     fvdl         case CONST:
   1067      1.1     fvdl         case DOWNLOAD_CONST:
   1068      1.1     fvdl 		symbol->info.cinfo =
   1069      1.1     fvdl 		    (struct const_info *)malloc(sizeof(struct const_info));
   1070      1.1     fvdl 		if (symbol->info.cinfo == NULL) {
   1071      1.1     fvdl 			stop("Can't create alias info", EX_SOFTWARE);
   1072      1.1     fvdl 			/* NOTREACHED */
   1073      1.1     fvdl 		}
   1074      1.1     fvdl 		memset(symbol->info.cinfo, 0,
   1075      1.1     fvdl 		       sizeof(struct const_info));
   1076      1.1     fvdl 		break;
   1077      1.1     fvdl 	case LABEL:
   1078      1.1     fvdl 		symbol->info.linfo =
   1079      1.1     fvdl 		    (struct label_info *)malloc(sizeof(struct label_info));
   1080      1.1     fvdl 		if (symbol->info.linfo == NULL) {
   1081      1.1     fvdl 			stop("Can't create label info", EX_SOFTWARE);
   1082      1.1     fvdl 			/* NOTREACHED */
   1083      1.1     fvdl 		}
   1084      1.1     fvdl 		memset(symbol->info.linfo, 0,
   1085      1.1     fvdl 		       sizeof(struct label_info));
   1086      1.1     fvdl 		break;
   1087      1.1     fvdl 	case CONDITIONAL:
   1088      1.1     fvdl 		symbol->info.condinfo =
   1089      1.1     fvdl 		    (struct cond_info *)malloc(sizeof(struct cond_info));
   1090      1.1     fvdl 		if (symbol->info.condinfo == NULL) {
   1091      1.1     fvdl 			stop("Can't create conditional info", EX_SOFTWARE);
   1092      1.1     fvdl 			/* NOTREACHED */
   1093      1.1     fvdl 		}
   1094      1.1     fvdl 		memset(symbol->info.condinfo, 0,
   1095      1.1     fvdl 		       sizeof(struct cond_info));
   1096      1.1     fvdl 		break;
   1097      1.1     fvdl 	default:
   1098      1.1     fvdl 		stop("Call to initialize_symbol with invalid symbol type",
   1099      1.1     fvdl 		     EX_SOFTWARE);
   1100      1.1     fvdl 		/* NOTREACHED */
   1101      1.1     fvdl 		break;
   1102      1.1     fvdl 	}
   1103      1.1     fvdl }
   1104      1.1     fvdl 
   1105      1.1     fvdl static void
   1106      1.1     fvdl process_register(p_symbol)
   1107      1.1     fvdl 	symbol_t **p_symbol;
   1108      1.1     fvdl {
   1109      1.1     fvdl 	char buf[255];
   1110      1.1     fvdl 	symbol_t *symbol = *p_symbol;
   1111      1.1     fvdl 
   1112      1.1     fvdl 	if (symbol->type == UNINITIALIZED) {
   1113      1.1     fvdl 		snprintf(buf, sizeof(buf), "Undefined register %s",
   1114      1.1     fvdl 			 symbol->name);
   1115      1.1     fvdl 		stop(buf, EX_DATAERR);
   1116      1.1     fvdl 		/* NOTREACHED */
   1117      1.1     fvdl 	} else if (symbol->type == ALIAS) {
   1118      1.1     fvdl 		*p_symbol = symbol->info.ainfo->parent;
   1119      1.1     fvdl 	} else if ((symbol->type != REGISTER)
   1120      1.1     fvdl 		&& (symbol->type != SCBLOC)
   1121      1.1     fvdl 		&& (symbol->type != SRAMLOC)) {
   1122      1.1     fvdl 		snprintf(buf, sizeof(buf),
   1123      1.1     fvdl 			 "Specified symbol %s is not a register",
   1124      1.1     fvdl 			 symbol->name);
   1125      1.1     fvdl 		stop(buf, EX_DATAERR);
   1126      1.1     fvdl 	}
   1127      1.1     fvdl }
   1128      1.1     fvdl 
   1129      1.1     fvdl static void
   1130      1.1     fvdl format_1_instr(opcode, dest, immed, src, ret)
   1131      1.1     fvdl 	int	     opcode;
   1132      1.1     fvdl 	symbol_ref_t *dest;
   1133      1.1     fvdl 	expression_t *immed;
   1134      1.1     fvdl 	symbol_ref_t *src;
   1135      1.1     fvdl 	int	     ret;
   1136      1.1     fvdl {
   1137      1.1     fvdl 	struct instruction *instr;
   1138      1.1     fvdl 	struct ins_format1 *f1_instr;
   1139      1.1     fvdl 
   1140      1.1     fvdl 	if (src->symbol == NULL)
   1141      1.1     fvdl 		src = dest;
   1142      1.1     fvdl 
   1143      1.1     fvdl 	/* Test register permissions */
   1144      1.1     fvdl 	test_writable_symbol(dest->symbol);
   1145      1.1     fvdl 	test_readable_symbol(src->symbol);
   1146      1.1     fvdl 
   1147      1.1     fvdl 	/* Ensure that immediate makes sense for this destination */
   1148      1.1     fvdl 	type_check(dest->symbol, immed, opcode);
   1149      1.1     fvdl 
   1150      1.1     fvdl 	/* Allocate sequencer space for the instruction and fill it out */
   1151      1.1     fvdl 	instr = seq_alloc();
   1152      1.1     fvdl 	f1_instr = &instr->format.format1;
   1153      1.1     fvdl 	f1_instr->ret = ret ? 1 : 0;
   1154      1.1     fvdl 	f1_instr->opcode = opcode;
   1155      1.1     fvdl 	f1_instr->destination = dest->symbol->info.rinfo->address
   1156      1.1     fvdl 			      + dest->offset;
   1157      1.1     fvdl 	f1_instr->source = src->symbol->info.rinfo->address
   1158      1.1     fvdl 			 + src->offset;
   1159      1.1     fvdl 	f1_instr->immediate = immed->value;
   1160      1.1     fvdl 
   1161      1.1     fvdl 	if (is_download_const(immed))
   1162      1.1     fvdl 		f1_instr->parity = 1;
   1163      1.1     fvdl 
   1164      1.1     fvdl 	symlist_free(&immed->referenced_syms);
   1165      1.1     fvdl 	instruction_ptr++;
   1166      1.1     fvdl }
   1167      1.1     fvdl 
   1168      1.1     fvdl static void
   1169      1.1     fvdl format_2_instr(opcode, dest, places, src, ret)
   1170      1.1     fvdl 	int	     opcode;
   1171      1.1     fvdl 	symbol_ref_t *dest;
   1172      1.1     fvdl 	expression_t *places;
   1173      1.1     fvdl 	symbol_ref_t *src;
   1174      1.1     fvdl 	int	     ret;
   1175      1.1     fvdl {
   1176      1.1     fvdl 	struct instruction *instr;
   1177      1.1     fvdl 	struct ins_format2 *f2_instr;
   1178      1.1     fvdl 	u_int8_t shift_control;
   1179      1.1     fvdl 
   1180      1.1     fvdl 	if (src->symbol == NULL)
   1181      1.1     fvdl 		src = dest;
   1182      1.1     fvdl 
   1183      1.1     fvdl 	/* Test register permissions */
   1184      1.1     fvdl 	test_writable_symbol(dest->symbol);
   1185      1.1     fvdl 	test_readable_symbol(src->symbol);
   1186      1.1     fvdl 
   1187      1.1     fvdl 	/* Allocate sequencer space for the instruction and fill it out */
   1188      1.1     fvdl 	instr = seq_alloc();
   1189      1.1     fvdl 	f2_instr = &instr->format.format2;
   1190      1.1     fvdl 	f2_instr->ret = ret ? 1 : 0;
   1191      1.1     fvdl 	f2_instr->opcode = AIC_OP_ROL;
   1192      1.1     fvdl 	f2_instr->destination = dest->symbol->info.rinfo->address
   1193      1.1     fvdl 			      + dest->offset;
   1194      1.1     fvdl 	f2_instr->source = src->symbol->info.rinfo->address
   1195      1.1     fvdl 			 + src->offset;
   1196      1.1     fvdl 	if (places->value > 8 || places->value <= 0) {
   1197      1.1     fvdl 		stop("illegal shift value", EX_DATAERR);
   1198      1.1     fvdl 		/* NOTREACHED */
   1199      1.1     fvdl 	}
   1200      1.1     fvdl 	switch (opcode) {
   1201      1.1     fvdl 	case AIC_OP_SHL:
   1202      1.1     fvdl 		if (places->value == 8)
   1203      1.1     fvdl 			shift_control = 0xf0;
   1204      1.1     fvdl 		else
   1205      1.1     fvdl 			shift_control = (places->value << 4) | places->value;
   1206      1.1     fvdl 		break;
   1207      1.1     fvdl 	case AIC_OP_SHR:
   1208      1.1     fvdl 		if (places->value == 8) {
   1209      1.1     fvdl 			shift_control = 0xf8;
   1210      1.1     fvdl 		} else {
   1211      1.1     fvdl 			shift_control = (places->value << 4)
   1212      1.1     fvdl 				      | (8 - places->value)
   1213      1.1     fvdl 				      | 0x08;
   1214      1.1     fvdl 		}
   1215      1.1     fvdl 		break;
   1216      1.1     fvdl 	case AIC_OP_ROL:
   1217      1.1     fvdl 		shift_control = places->value & 0x7;
   1218      1.1     fvdl 		break;
   1219      1.1     fvdl 	case AIC_OP_ROR:
   1220      1.1     fvdl 		shift_control = (8 - places->value) | 0x08;
   1221      1.1     fvdl 		break;
   1222      1.1     fvdl 	default:
   1223      1.1     fvdl 		shift_control = 0; /* Quiet Compiler */
   1224      1.1     fvdl 		stop("Invalid shift operation specified", EX_SOFTWARE);
   1225      1.1     fvdl 		/* NOTREACHED */
   1226      1.1     fvdl 		break;
   1227      1.1     fvdl 	};
   1228      1.1     fvdl 	f2_instr->shift_control = shift_control;
   1229      1.1     fvdl 	symlist_free(&places->referenced_syms);
   1230      1.1     fvdl 	instruction_ptr++;
   1231      1.1     fvdl }
   1232      1.1     fvdl 
   1233      1.1     fvdl static void
   1234      1.1     fvdl format_3_instr(opcode, src, immed, address)
   1235      1.1     fvdl 	int	     opcode;
   1236      1.1     fvdl 	symbol_ref_t *src;
   1237      1.1     fvdl 	expression_t *immed;
   1238      1.1     fvdl 	symbol_ref_t *address;
   1239      1.1     fvdl {
   1240      1.1     fvdl 	struct instruction *instr;
   1241      1.1     fvdl 	struct ins_format3 *f3_instr;
   1242      1.1     fvdl 	int addr;
   1243      1.1     fvdl 
   1244      1.1     fvdl 	/* Test register permissions */
   1245      1.1     fvdl 	test_readable_symbol(src->symbol);
   1246      1.1     fvdl 
   1247      1.1     fvdl 	/* Ensure that immediate makes sense for this source */
   1248      1.1     fvdl 	type_check(src->symbol, immed, opcode);
   1249      1.1     fvdl 
   1250      1.1     fvdl 	/* Allocate sequencer space for the instruction and fill it out */
   1251      1.1     fvdl 	instr = seq_alloc();
   1252      1.1     fvdl 	f3_instr = &instr->format.format3;
   1253      1.1     fvdl 	if (address->symbol == NULL) {
   1254      1.1     fvdl 		/* 'dot' referrence.  Use the current instruction pointer */
   1255      1.1     fvdl 		addr = instruction_ptr + address->offset;
   1256      1.1     fvdl 	} else if (address->symbol->type == UNINITIALIZED) {
   1257      1.1     fvdl 		/* forward reference */
   1258      1.1     fvdl 		addr = address->offset;
   1259      1.1     fvdl 		instr->patch_label = address->symbol;
   1260      1.1     fvdl 	} else
   1261      1.1     fvdl 		addr = address->symbol->info.linfo->address + address->offset;
   1262      1.1     fvdl 	f3_instr->opcode = opcode;
   1263      1.1     fvdl 	f3_instr->address = addr;
   1264      1.1     fvdl 	f3_instr->source = src->symbol->info.rinfo->address
   1265      1.1     fvdl 			 + src->offset;
   1266      1.1     fvdl 	f3_instr->immediate = immed->value;
   1267      1.1     fvdl 
   1268      1.1     fvdl 	if (is_download_const(immed))
   1269      1.1     fvdl 		f3_instr->parity = 1;
   1270      1.1     fvdl 
   1271      1.1     fvdl 	symlist_free(&immed->referenced_syms);
   1272      1.1     fvdl 	instruction_ptr++;
   1273      1.1     fvdl }
   1274      1.1     fvdl 
   1275      1.1     fvdl static void
   1276      1.1     fvdl test_readable_symbol(symbol)
   1277      1.1     fvdl 	symbol_t *symbol;
   1278      1.1     fvdl {
   1279      1.1     fvdl 	if (symbol->info.rinfo->mode == WO) {
   1280      1.1     fvdl 		stop("Write Only register specified as source",
   1281      1.1     fvdl 		     EX_DATAERR);
   1282      1.1     fvdl 		/* NOTREACHED */
   1283      1.1     fvdl 	}
   1284      1.1     fvdl }
   1285      1.1     fvdl 
   1286      1.1     fvdl static void
   1287      1.1     fvdl test_writable_symbol(symbol)
   1288      1.1     fvdl 	symbol_t *symbol;
   1289      1.1     fvdl {
   1290      1.1     fvdl 	if (symbol->info.rinfo->mode == RO) {
   1291      1.1     fvdl 		stop("Read Only register specified as destination",
   1292      1.1     fvdl 		     EX_DATAERR);
   1293      1.1     fvdl 		/* NOTREACHED */
   1294      1.1     fvdl 	}
   1295      1.1     fvdl }
   1296      1.1     fvdl 
   1297      1.1     fvdl static void
   1298      1.1     fvdl type_check(symbol, expression, opcode)
   1299      1.1     fvdl 	symbol_t     *symbol;
   1300      1.1     fvdl 	expression_t *expression;
   1301      1.1     fvdl 	int	     opcode;
   1302      1.1     fvdl {
   1303      1.1     fvdl 	symbol_node_t *node;
   1304      1.1     fvdl 	int and_op;
   1305      1.1     fvdl 	char buf[255];
   1306      1.1     fvdl 
   1307      1.1     fvdl 	and_op = FALSE;
   1308      1.1     fvdl 	if (opcode == AIC_OP_AND || opcode == AIC_OP_JNZ || AIC_OP_JZ)
   1309      1.1     fvdl 		and_op = TRUE;
   1310      1.1     fvdl 
   1311      1.1     fvdl 	/*
   1312      1.1     fvdl 	 * Make sure that we aren't attempting to write something
   1313      1.1     fvdl 	 * that hasn't been defined.  If this is an and operation,
   1314      1.1     fvdl 	 * this is a mask, so "undefined" bits are okay.
   1315      1.1     fvdl 	 */
   1316      1.1     fvdl 	if (and_op == FALSE
   1317      1.1     fvdl 	 && (expression->value & ~symbol->info.rinfo->valid_bitmask) != 0) {
   1318      1.1     fvdl 		snprintf(buf, sizeof(buf),
   1319      1.1     fvdl 			 "Invalid bit(s) 0x%x in immediate written to %s",
   1320      1.1     fvdl 			 expression->value & ~symbol->info.rinfo->valid_bitmask,
   1321      1.1     fvdl 			 symbol->name);
   1322      1.1     fvdl 		stop(buf, EX_DATAERR);
   1323      1.1     fvdl 		/* NOTREACHED */
   1324      1.1     fvdl 	}
   1325      1.1     fvdl 
   1326      1.1     fvdl 	/*
   1327      1.1     fvdl 	 * Now make sure that all of the symbols referenced by the
   1328      1.1     fvdl 	 * expression are defined for this register.
   1329      1.1     fvdl 	 */
   1330      1.1     fvdl 	if(symbol->info.rinfo->typecheck_masks != FALSE) {
   1331  1.1.8.1  nathanw 		SLIST_FOREACH(node, &expression->referenced_syms, links) {
   1332      1.1     fvdl 			if ((node->symbol->type == MASK
   1333      1.1     fvdl 			  || node->symbol->type == BIT)
   1334      1.1     fvdl 			 && symlist_search(&node->symbol->info.minfo->symrefs,
   1335      1.1     fvdl 					   symbol->name) == NULL) {
   1336      1.1     fvdl 				snprintf(buf, sizeof(buf),
   1337      1.1     fvdl 					 "Invalid bit or mask %s "
   1338      1.1     fvdl 					 "for register %s",
   1339      1.1     fvdl 					 node->symbol->name, symbol->name);
   1340      1.1     fvdl 				stop(buf, EX_DATAERR);
   1341      1.1     fvdl 				/* NOTREACHED */
   1342      1.1     fvdl 			}
   1343      1.1     fvdl 		}
   1344      1.1     fvdl 	}
   1345      1.1     fvdl }
   1346      1.1     fvdl 
   1347      1.1     fvdl static void
   1348      1.1     fvdl make_expression(immed, value)
   1349      1.1     fvdl 	expression_t *immed;
   1350      1.1     fvdl 	int	     value;
   1351      1.1     fvdl {
   1352      1.1     fvdl 	SLIST_INIT(&immed->referenced_syms);
   1353      1.1     fvdl 	immed->value = value & 0xff;
   1354      1.1     fvdl }
   1355      1.1     fvdl 
   1356      1.1     fvdl static void
   1357      1.1     fvdl add_conditional(symbol)
   1358      1.1     fvdl 	symbol_t *symbol;
   1359      1.1     fvdl {
   1360      1.1     fvdl 	static int numfuncs;
   1361      1.1     fvdl 
   1362      1.1     fvdl 	if (numfuncs == 0) {
   1363      1.1     fvdl 		/* add a special conditional, "0" */
   1364      1.1     fvdl 		symbol_t *false_func;
   1365      1.1     fvdl 
   1366      1.1     fvdl 		false_func = symtable_get("0");
   1367      1.1     fvdl 		if (false_func->type != UNINITIALIZED) {
   1368      1.1     fvdl 			stop("Conditional expression '0' "
   1369      1.1     fvdl 			     "conflicts with a symbol", EX_DATAERR);
   1370      1.1     fvdl 			/* NOTREACHED */
   1371      1.1     fvdl 		}
   1372      1.1     fvdl 		false_func->type = CONDITIONAL;
   1373      1.1     fvdl 		initialize_symbol(false_func);
   1374      1.1     fvdl 		false_func->info.condinfo->func_num = numfuncs++;
   1375      1.1     fvdl 		symlist_add(&patch_functions, false_func, SYMLIST_INSERT_HEAD);
   1376      1.1     fvdl 	}
   1377      1.1     fvdl 
   1378      1.1     fvdl 	/* This condition has occurred before */
   1379      1.1     fvdl 	if (symbol->type == CONDITIONAL)
   1380      1.1     fvdl 		return;
   1381      1.1     fvdl 
   1382      1.1     fvdl 	if (symbol->type != UNINITIALIZED) {
   1383      1.1     fvdl 		stop("Conditional expression conflicts with a symbol",
   1384      1.1     fvdl 		     EX_DATAERR);
   1385      1.1     fvdl 		/* NOTREACHED */
   1386      1.1     fvdl 	}
   1387      1.1     fvdl 
   1388      1.1     fvdl 	symbol->type = CONDITIONAL;
   1389      1.1     fvdl 	initialize_symbol(symbol);
   1390      1.1     fvdl 	symbol->info.condinfo->func_num = numfuncs++;
   1391      1.1     fvdl 	symlist_add(&patch_functions, symbol, SYMLIST_INSERT_HEAD);
   1392      1.1     fvdl }
   1393      1.1     fvdl 
   1394      1.1     fvdl void
   1395      1.1     fvdl yyerror(string)
   1396      1.1     fvdl 	const char *string;
   1397      1.1     fvdl {
   1398      1.1     fvdl 	stop(string, EX_DATAERR);
   1399      1.1     fvdl }
   1400      1.1     fvdl 
   1401      1.1     fvdl static int
   1402      1.1     fvdl is_download_const(immed)
   1403      1.1     fvdl 	expression_t *immed;
   1404      1.1     fvdl {
   1405  1.1.8.1  nathanw 	if (! SLIST_EMPTY(&immed->referenced_syms)
   1406  1.1.8.1  nathanw 	 && (SLIST_FIRST(&immed->referenced_syms)->symbol->type ==
   1407  1.1.8.1  nathanw 	    DOWNLOAD_CONST))
   1408      1.1     fvdl 		return (TRUE);
   1409      1.1     fvdl 
   1410      1.1     fvdl 	return (FALSE);
   1411      1.1     fvdl }
   1412