atphy.c revision 1.23
1 /* $NetBSD: atphy.c,v 1.23 2019/09/02 12:48:52 msaitoh Exp $ */ 2 /* $OpenBSD: atphy.c,v 1.1 2008/09/25 20:47:16 brad Exp $ */ 3 4 /*- 5 * Copyright (c) 2008, Pyun YongHyeon <yongari (at) FreeBSD.org> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice unmodified, this list of conditions, and the following 13 * disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /* 32 * Driver for the Attansic F1 10/100/1000 PHY. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: atphy.c,v 1.23 2019/09/02 12:48:52 msaitoh Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <sys/socket.h> 43 44 #include <net/if.h> 45 #include <net/if_media.h> 46 47 #include <dev/mii/mii.h> 48 #include <dev/mii/miivar.h> 49 #include <dev/mii/miidevs.h> 50 51 /* Special Control Register */ 52 #define ATPHY_SCR 0x10 53 #define ATPHY_SCR_JABBER_DISABLE 0x0001 54 #define ATPHY_SCR_POLARITY_REVERSAL 0x0002 55 #define ATPHY_SCR_SQE_TEST 0x0004 56 #define ATPHY_SCR_MAC_PDOWN 0x0008 57 #define ATPHY_SCR_CLK125_DISABLE 0x0010 58 #define ATPHY_SCR_MDI_MANUAL_MODE 0x0000 59 #define ATPHY_SCR_MDIX_MANUAL_MODE 0x0020 60 #define ATPHY_SCR_AUTO_X_1000T 0x0040 61 #define ATPHY_SCR_AUTO_X_MODE 0x0060 62 #define ATPHY_SCR_10BT_EXT_ENABLE 0x0080 63 #define ATPHY_SCR_MII_5BIT_ENABLE 0x0100 64 #define ATPHY_SCR_SCRAMBLER_DISABLE 0x0200 65 #define ATPHY_SCR_FORCE_LINK_GOOD 0x0400 66 #define ATPHY_SCR_ASSERT_CRS_ON_TX 0x0800 67 68 /* Special Status Register. */ 69 #define ATPHY_SSR 0x11 70 #define ATPHY_SSR_SPD_DPLX_RESOLVED 0x0800 71 #define ATPHY_SSR_DUPLEX 0x2000 72 #define ATPHY_SSR_SPEED_MASK 0xC000 73 #define ATPHY_SSR_10MBS 0x0000 74 #define ATPHY_SSR_100MBS 0x4000 75 #define ATPHY_SSR_1000MBS 0x8000 76 77 static int atphy_match(device_t, cfdata_t, void *); 78 static void atphy_attach(device_t, device_t, void *); 79 80 static int atphy_service(struct mii_softc *, struct mii_data *, int); 81 static void atphy_reset(struct mii_softc *); 82 static void atphy_status(struct mii_softc *); 83 static int atphy_mii_phy_auto(struct mii_softc *); 84 static bool atphy_is_gige(const struct mii_phydesc *); 85 86 CFATTACH_DECL_NEW(atphy, sizeof(struct mii_softc), 87 atphy_match, atphy_attach, mii_phy_detach, mii_phy_activate); 88 89 const struct mii_phy_funcs atphy_funcs = { 90 atphy_service, atphy_status, atphy_reset, 91 }; 92 93 static const struct mii_phydesc atphys[] = { 94 MII_PHY_DESC(ATHEROS, F1), 95 MII_PHY_DESC(ATTANSIC, L1), 96 MII_PHY_DESC(ATTANSIC, L2), 97 MII_PHY_DESC(ATTANSIC, AR8021), 98 MII_PHY_DESC(ATTANSIC, AR8035), 99 MII_PHY_END, 100 }; 101 102 static bool 103 atphy_is_gige(const struct mii_phydesc *mpd) 104 { 105 switch (mpd->mpd_oui) { 106 case MII_OUI_ATTANSIC: 107 switch (mpd->mpd_model) { 108 case MII_MODEL_ATTANSIC_L2: 109 return false; 110 } 111 } 112 113 return true; 114 } 115 116 static int 117 atphy_match(device_t parent, cfdata_t match, void *aux) 118 { 119 struct mii_attach_args *ma = aux; 120 121 if (mii_phy_match(ma, atphys) != NULL) 122 return 10; 123 124 return 0; 125 } 126 127 void 128 atphy_attach(device_t parent, device_t self, void *aux) 129 { 130 struct mii_softc *sc = device_private(self); 131 struct mii_attach_args *ma = aux; 132 struct mii_data *mii = ma->mii_data; 133 const struct mii_phydesc *mpd; 134 uint16_t bmsr; 135 136 mpd = mii_phy_match(ma, atphys); 137 aprint_naive(": Media interface\n"); 138 aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2)); 139 140 sc->mii_dev = self; 141 sc->mii_inst = mii->mii_instance; 142 sc->mii_phy = ma->mii_phyno; 143 sc->mii_mpd_oui = MII_OUI(ma->mii_id1, ma->mii_id2); 144 sc->mii_mpd_model = MII_MODEL(ma->mii_id2); 145 sc->mii_mpd_rev = MII_REV(ma->mii_id2); 146 sc->mii_funcs = &atphy_funcs; 147 sc->mii_pdata = mii; 148 sc->mii_flags = ma->mii_flags; 149 if (atphy_is_gige(mpd)) 150 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 151 else 152 sc->mii_anegticks = MII_ANEGTICKS; 153 154 sc->mii_flags |= MIIF_NOLOOP; 155 156 PHY_RESET(sc); 157 158 PHY_READ(sc, MII_BMSR, &bmsr); 159 PHY_READ(sc, MII_BMSR, &bmsr); 160 sc->mii_capabilities = bmsr & ma->mii_capmask; 161 if (atphy_is_gige(mpd) && (sc->mii_capabilities & BMSR_EXTSTAT)) 162 PHY_READ(sc, MII_EXTSR, &sc->mii_extcapabilities); 163 164 aprint_normal_dev(self, ""); 165 mii_phy_add_media(sc); 166 aprint_normal("\n"); 167 } 168 169 int 170 atphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 171 { 172 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 173 uint16_t anar, bmcr, bmsr; 174 175 switch (cmd) { 176 case MII_POLLSTAT: 177 /* If we're not polling our PHY instance, just return. */ 178 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 179 return 0; 180 break; 181 182 case MII_MEDIACHG: 183 /* 184 * If the media indicates a different PHY instance, 185 * isolate ourselves. 186 */ 187 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 188 PHY_READ(sc, MII_BMCR, &bmcr); 189 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO); 190 return 0; 191 } 192 193 /* If the interface is not up, don't do anything. */ 194 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 195 break; 196 197 bmcr = 0; 198 switch (IFM_SUBTYPE(ife->ifm_media)) { 199 case IFM_AUTO: 200 case IFM_1000_T: 201 atphy_mii_phy_auto(sc); 202 goto done; 203 case IFM_100_TX: 204 bmcr = BMCR_S100; 205 break; 206 case IFM_10_T: 207 bmcr = BMCR_S10; 208 break; 209 case IFM_NONE: 210 PHY_READ(sc, MII_BMCR, &bmcr); 211 /* 212 * XXX 213 * Due to an unknown reason powering down PHY resulted 214 * in unexpected results such as inaccessibility of 215 * hardware of freshly rebooted system. Disable 216 * powering down PHY until I got more information for 217 * Attansic/Atheros PHY hardwares. 218 */ 219 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO); 220 goto done; 221 default: 222 return EINVAL; 223 } 224 225 anar = mii_anar(IFM_SUBTYPE(ife->ifm_media)); 226 if ((ife->ifm_media & IFM_FDX) != 0) { 227 bmcr |= BMCR_FDX; 228 /* Enable pause. */ 229 if (sc->mii_flags & MIIF_DOPAUSE) 230 anar |= ANAR_PAUSE_TOWARDS; 231 } 232 233 if ((sc->mii_extcapabilities & (EXTSR_1000TFDX | 234 EXTSR_1000THDX)) != 0) 235 PHY_WRITE(sc, MII_100T2CR, 0); 236 PHY_WRITE(sc, MII_ANAR, anar); 237 238 /* Start autonegotiation. */ 239 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_AUTOEN | BMCR_STARTNEG); 240 done: 241 break; 242 243 case MII_TICK: 244 /* If we're not currently selected, just return. */ 245 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 246 return 0; 247 248 /* Is the interface even up? */ 249 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 250 return 0; 251 252 /* Only used for autonegotiation. */ 253 if ((IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) && 254 (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)) { 255 sc->mii_ticks = 0; 256 break; 257 } 258 259 /* 260 * Check for link. 261 * Read the status register twice; BMSR_LINK is latch-low. 262 */ 263 PHY_READ(sc, MII_BMSR, &bmsr); 264 PHY_READ(sc, MII_BMSR, &bmsr); 265 if (bmsr & BMSR_LINK) { 266 sc->mii_ticks = 0; 267 break; 268 } 269 270 /* Announce link loss right after it happens. */ 271 if (sc->mii_ticks++ == 0) 272 break; 273 274 /* Only retry autonegotiation every mii_anegticks seconds. */ 275 if (sc->mii_ticks <= sc->mii_anegticks) 276 break; 277 278 atphy_mii_phy_auto(sc); 279 break; 280 } 281 282 /* Update the media status. */ 283 mii_phy_status(sc); 284 285 /* Callback if something changed. */ 286 mii_phy_update(sc, cmd); 287 return 0; 288 } 289 290 static void 291 atphy_status(struct mii_softc *sc) 292 { 293 struct mii_data *mii = sc->mii_pdata; 294 uint16_t bmsr, bmcr, gsr, ssr; 295 296 mii->mii_media_status = IFM_AVALID; 297 mii->mii_media_active = IFM_ETHER; 298 299 PHY_READ(sc, MII_BMSR, &bmsr); 300 PHY_READ(sc, MII_BMSR, &bmsr); 301 if (bmsr & BMSR_LINK) 302 mii->mii_media_status |= IFM_ACTIVE; 303 304 PHY_READ(sc, MII_BMCR, &bmcr); 305 if (bmcr & BMCR_ISO) { 306 mii->mii_media_active |= IFM_NONE; 307 mii->mii_media_status = 0; 308 return; 309 } 310 311 if (bmcr & BMCR_LOOP) 312 mii->mii_media_active |= IFM_LOOP; 313 314 PHY_READ(sc, ATPHY_SSR, &ssr); 315 if (!(ssr & ATPHY_SSR_SPD_DPLX_RESOLVED)) { 316 /* Erg, still trying, I guess... */ 317 mii->mii_media_active |= IFM_NONE; 318 return; 319 } 320 321 switch (ssr & ATPHY_SSR_SPEED_MASK) { 322 case ATPHY_SSR_1000MBS: 323 mii->mii_media_active |= IFM_1000_T; 324 /* 325 * atphy(4) has a valid link so reset mii_ticks. 326 * Resetting mii_ticks is needed in order to 327 * detect link loss after auto-negotiation. 328 */ 329 sc->mii_ticks = 0; 330 break; 331 case ATPHY_SSR_100MBS: 332 mii->mii_media_active |= IFM_100_TX; 333 sc->mii_ticks = 0; 334 break; 335 case ATPHY_SSR_10MBS: 336 mii->mii_media_active |= IFM_10_T; 337 sc->mii_ticks = 0; 338 break; 339 default: 340 mii->mii_media_active |= IFM_NONE; 341 return; 342 } 343 344 if (ssr & ATPHY_SSR_DUPLEX) 345 mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc); 346 else 347 mii->mii_media_active |= IFM_HDX; 348 349 PHY_READ(sc, MII_100T2SR, &gsr); 350 if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) && 351 gsr & GTSR_MS_RES) 352 mii->mii_media_active |= IFM_ETH_MASTER; 353 } 354 355 static void 356 atphy_reset(struct mii_softc *sc) 357 { 358 uint16_t reg; 359 int i; 360 361 /* Take PHY out of power down mode. */ 362 PHY_WRITE(sc, 29, 0x29); 363 PHY_WRITE(sc, 30, 0); 364 365 PHY_READ(sc, ATPHY_SCR, ®); 366 /* Enable automatic crossover. */ 367 reg |= ATPHY_SCR_AUTO_X_MODE; 368 /* Disable power down. */ 369 reg &= ~ATPHY_SCR_MAC_PDOWN; 370 /* Enable CRS on Tx. */ 371 reg |= ATPHY_SCR_ASSERT_CRS_ON_TX; 372 /* Auto correction for reversed cable polarity. */ 373 reg |= ATPHY_SCR_POLARITY_REVERSAL; 374 PHY_WRITE(sc, ATPHY_SCR, reg); 375 376 atphy_mii_phy_auto(sc); 377 378 /* Workaround F1 bug to reset phy. */ 379 PHY_READ(sc, MII_BMCR, ®); 380 reg |= BMCR_RESET; 381 PHY_WRITE(sc, MII_BMCR, reg); 382 383 for (i = 0; i < 1000; i++) { 384 DELAY(1); 385 PHY_READ(sc, MII_BMCR, ®); 386 if ((reg & BMCR_RESET) == 0) 387 break; 388 } 389 } 390 391 static int 392 atphy_mii_phy_auto(struct mii_softc *sc) 393 { 394 uint16_t anar; 395 396 sc->mii_ticks = 0; 397 anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA; 398 if (sc->mii_flags & MIIF_DOPAUSE) 399 anar |= ANAR_PAUSE_TOWARDS; 400 PHY_WRITE(sc, MII_ANAR, anar); 401 if (sc->mii_extcapabilities & (EXTSR_1000TFDX | EXTSR_1000THDX)) 402 PHY_WRITE(sc, MII_100T2CR, GTCR_ADV_1000TFDX | 403 GTCR_ADV_1000THDX); 404 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG); 405 406 return EJUSTRETURN; 407 } 408
Indexes created Thu Oct 23 22:10:10 GMT 2025