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brgphy.c revision 1.31
      1 /*	$NetBSD: brgphy.c,v 1.31 2006/11/26 16:31:48 tsutsui Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by the NetBSD
     22  *	Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * Copyright (c) 1997 Manuel Bouyer.  All rights reserved.
     42  *
     43  * Redistribution and use in source and binary forms, with or without
     44  * modification, are permitted provided that the following conditions
     45  * are met:
     46  * 1. Redistributions of source code must retain the above copyright
     47  *    notice, this list of conditions and the following disclaimer.
     48  * 2. Redistributions in binary form must reproduce the above copyright
     49  *    notice, this list of conditions and the following disclaimer in the
     50  *    documentation and/or other materials provided with the distribution.
     51  * 3. All advertising materials mentioning features or use of this software
     52  *    must display the following acknowledgement:
     53  *	This product includes software developed by Manuel Bouyer.
     54  * 4. The name of the author may not be used to endorse or promote products
     55  *    derived from this software without specific prior written permission.
     56  *
     57  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     58  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     59  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     60  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     61  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     62  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     63  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     64  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     65  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     66  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     67  */
     68 
     69 /*
     70  * driver for the Broadcom BCM5400 Gig-E PHY.
     71  *
     72  * Programming information for this PHY was gleaned from FreeBSD
     73  * (they were apparently able to get a datasheet from Broadcom).
     74  */
     75 
     76 #include <sys/cdefs.h>
     77 __KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.31 2006/11/26 16:31:48 tsutsui Exp $");
     78 
     79 #include <sys/param.h>
     80 #include <sys/systm.h>
     81 #include <sys/kernel.h>
     82 #include <sys/device.h>
     83 #include <sys/socket.h>
     84 #include <sys/errno.h>
     85 
     86 #include <net/if.h>
     87 #include <net/if_media.h>
     88 
     89 #include <dev/mii/mii.h>
     90 #include <dev/mii/miivar.h>
     91 #include <dev/mii/miidevs.h>
     92 
     93 #include <dev/mii/brgphyreg.h>
     94 
     95 static int	brgphymatch(struct device *, struct cfdata *, void *);
     96 static void	brgphyattach(struct device *, struct device *, void *);
     97 
     98 CFATTACH_DECL(brgphy, sizeof(struct mii_softc),
     99     brgphymatch, brgphyattach, mii_phy_detach, mii_phy_activate);
    100 
    101 static int	brgphy_service(struct mii_softc *, struct mii_data *, int);
    102 static void	brgphy_status(struct mii_softc *);
    103 
    104 static void	brgphy_5401_reset(struct mii_softc *);
    105 static void	brgphy_5411_reset(struct mii_softc *);
    106 static void	brgphy_5703_reset(struct mii_softc *);
    107 static void	brgphy_5704_reset(struct mii_softc *);
    108 static void	brgphy_5705_reset(struct mii_softc *);
    109 static void	brgphy_5750_reset(struct mii_softc *);
    110 
    111 static const struct mii_phy_funcs brgphy_funcs = {
    112 	brgphy_service, brgphy_status, mii_phy_reset,
    113 };
    114 
    115 static const struct mii_phy_funcs brgphy_5401_funcs = {
    116 	brgphy_service, brgphy_status, brgphy_5401_reset,
    117 };
    118 
    119 static const struct mii_phy_funcs brgphy_5411_funcs = {
    120 	brgphy_service, brgphy_status, brgphy_5411_reset,
    121 };
    122 
    123 static const struct mii_phy_funcs brgphy_5703_funcs = {
    124 	brgphy_service, brgphy_status, brgphy_5703_reset,
    125 };
    126 
    127 static const struct mii_phy_funcs brgphy_5704_funcs = {
    128 	brgphy_service, brgphy_status, brgphy_5704_reset,
    129 };
    130 
    131 static const struct mii_phy_funcs brgphy_5705_funcs = {
    132 	brgphy_service, brgphy_status, brgphy_5705_reset,
    133 };
    134 
    135 const struct mii_phy_funcs brgphy_5750_funcs = {
    136 	brgphy_service, brgphy_status, brgphy_5750_reset,
    137 };
    138 
    139 
    140 static const struct mii_phydesc brgphys[] = {
    141 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5400,
    142 	  MII_STR_BROADCOM_BCM5400 },
    143 
    144 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5401,
    145 	  MII_STR_BROADCOM_BCM5401 },
    146 
    147 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5411,
    148 	  MII_STR_BROADCOM_BCM5411 },
    149 
    150 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5421,
    151 	  MII_STR_BROADCOM_BCM5421 },
    152 
    153 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5701,
    154 	  MII_STR_BROADCOM_BCM5701 },
    155 
    156 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5703,
    157 	  MII_STR_BROADCOM_BCM5703 },
    158 
    159 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5704,
    160 	  MII_STR_BROADCOM_BCM5704 },
    161 
    162 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5705,
    163 	  MII_STR_BROADCOM_BCM5705 },
    164 
    165 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5714,
    166 	  MII_STR_BROADCOM_BCM5714 },
    167 
    168 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5750,
    169 	  MII_STR_BROADCOM_BCM5750 },
    170 
    171 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5752,
    172 	  MII_STR_BROADCOM_BCM5752 },
    173 
    174 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5780,
    175 	  MII_STR_BROADCOM_BCM5780 },
    176 
    177 	{ 0,				0,
    178 	  NULL },
    179 };
    180 
    181 static void bcm5401_load_dspcode(struct mii_softc *);
    182 static void bcm5411_load_dspcode(struct mii_softc *);
    183 static void bcm5703_load_dspcode(struct mii_softc *);
    184 static void bcm5704_load_dspcode(struct mii_softc *);
    185 static void bcm5750_load_dspcode(struct mii_softc *);
    186 
    187 static int
    188 brgphymatch(struct device *parent, struct cfdata *match,
    189     void *aux)
    190 {
    191 	struct mii_attach_args *ma = aux;
    192 
    193 	if (mii_phy_match(ma, brgphys) != NULL)
    194 		return (10);
    195 
    196 	return (0);
    197 }
    198 
    199 static void
    200 brgphyattach(struct device *parent, struct device *self, void *aux)
    201 {
    202 	struct mii_softc *sc = device_private(self);
    203 	struct mii_attach_args *ma = aux;
    204 	struct mii_data *mii = ma->mii_data;
    205 	const struct mii_phydesc *mpd;
    206 
    207 	mpd = mii_phy_match(ma, brgphys);
    208 	aprint_naive(": Media interface\n");
    209 	aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
    210 
    211 	sc->mii_inst = mii->mii_instance;
    212 	sc->mii_phy = ma->mii_phyno;
    213 	sc->mii_pdata = mii;
    214 	sc->mii_flags = ma->mii_flags;
    215 	sc->mii_anegticks = MII_ANEGTICKS;
    216 
    217 	switch (MII_MODEL(ma->mii_id2)) {
    218 	case MII_MODEL_BROADCOM_BCM5400:
    219 		sc->mii_funcs = &brgphy_5401_funcs;
    220 		aprint_normal("%s: using BCM5401 DSP patch\n",
    221 		    sc->mii_dev.dv_xname);
    222 		break;
    223 
    224 	case MII_MODEL_BROADCOM_BCM5401:
    225 		if (MII_REV(ma->mii_id2) == 1 || MII_REV(ma->mii_id2) == 3) {
    226 			sc->mii_funcs = &brgphy_5401_funcs;
    227 			aprint_normal("%s: using BCM5401 DSP patch\n",
    228 			    sc->mii_dev.dv_xname);
    229 		} else
    230 			sc->mii_funcs = &brgphy_funcs;
    231 		break;
    232 
    233 	case MII_MODEL_BROADCOM_BCM5411:
    234 		sc->mii_funcs = &brgphy_5411_funcs;
    235 		aprint_normal("%s: using BCM5411 DSP patch\n",
    236 		    sc->mii_dev.dv_xname);
    237 		break;
    238 
    239 #ifdef notyet /* unverified, untested */
    240 	case MII_MODEL_BROADCOM_BCM5703:
    241 		sc->mii_funcs = &brgphy_5703_funcs;
    242 		aprint_normal("%s: using BCM5703 DSP patch\n",
    243 		    sc->mii_dev.dv_xname);
    244 		break;
    245 #endif
    246 
    247 	case MII_MODEL_BROADCOM_BCM5704:
    248 		sc->mii_funcs = &brgphy_5704_funcs;
    249 		aprint_normal("%s: using BCM5704 DSP patch\n",
    250 		    sc->mii_dev.dv_xname);
    251 		break;
    252 
    253 	case MII_MODEL_BROADCOM_BCM5705:
    254 		sc->mii_funcs = &brgphy_5705_funcs;
    255 		break;
    256 
    257 	case MII_MODEL_BROADCOM_BCM5714:
    258 	case MII_MODEL_BROADCOM_BCM5780:
    259 	case MII_MODEL_BROADCOM_BCM5750:
    260 	case MII_MODEL_BROADCOM_BCM5752:
    261 		sc->mii_funcs = &brgphy_5750_funcs;
    262 		break;
    263 
    264 	default:
    265 		sc->mii_funcs = &brgphy_funcs;
    266 		break;
    267 	}
    268 
    269 	PHY_RESET(sc);
    270 
    271 	sc->mii_capabilities =
    272 	    PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
    273 	if (sc->mii_capabilities & BMSR_EXTSTAT)
    274 		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
    275 
    276 	aprint_normal("%s: ", sc->mii_dev.dv_xname);
    277 	if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 &&
    278 	    (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0)
    279 		aprint_error("no media present");
    280 	else
    281 		mii_phy_add_media(sc);
    282 	aprint_normal("\n");
    283 }
    284 
    285 static int
    286 brgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
    287 {
    288 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
    289 	int reg;
    290 
    291 	switch (cmd) {
    292 	case MII_POLLSTAT:
    293 		/*
    294 		 * If we're not polling our PHY instance, just return.
    295 		 */
    296 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
    297 			return (0);
    298 		break;
    299 
    300 	case MII_MEDIACHG:
    301 		/*
    302 		 * If the media indicates a different PHY instance,
    303 		 * isolate ourselves.
    304 		 */
    305 		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
    306 			reg = PHY_READ(sc, MII_BMCR);
    307 			PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
    308 			return (0);
    309 		}
    310 
    311 		/*
    312 		 * If the interface is not up, don't do anything.
    313 		 */
    314 		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
    315 			break;
    316 
    317 		if (sc->mii_funcs != &brgphy_5705_funcs)
    318 			mii_phy_reset(sc);    /* XXX hardware bug work-around */
    319 		mii_phy_setmedia(sc);
    320 		break;
    321 
    322 	case MII_TICK:
    323 		/*
    324 		 * If we're not currently selected, just return.
    325 		 */
    326 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
    327 			return (0);
    328 
    329 		if (mii_phy_tick(sc) == EJUSTRETURN)
    330 			return (0);
    331 		break;
    332 
    333 	case MII_DOWN:
    334 		mii_phy_down(sc);
    335 		return (0);
    336 	}
    337 
    338 	/* Update the media status. */
    339 	mii_phy_status(sc);
    340 
    341 	/*
    342 	 * Callback if something changed.  Note that we need to poke
    343 	 * the DSP on the Broadcom PHYs if the media changes.
    344 	 */
    345 	if (sc->mii_media_active != mii->mii_media_active ||
    346 	    sc->mii_media_status != mii->mii_media_status ||
    347 	    cmd == MII_MEDIACHG) {
    348 		mii_phy_update(sc, cmd);
    349 		if (sc->mii_funcs == &brgphy_5401_funcs)
    350 			bcm5401_load_dspcode(sc);
    351 		else if (sc->mii_funcs == &brgphy_5411_funcs)
    352 			bcm5411_load_dspcode(sc);
    353 	}
    354 	return (0);
    355 }
    356 
    357 static void
    358 brgphy_status(struct mii_softc *sc)
    359 {
    360 	struct mii_data *mii = sc->mii_pdata;
    361 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
    362 	int bmcr, auxsts, gtsr;
    363 
    364 	mii->mii_media_status = IFM_AVALID;
    365 	mii->mii_media_active = IFM_ETHER;
    366 
    367 	auxsts = PHY_READ(sc, BRGPHY_MII_AUXSTS);
    368 
    369 	if (auxsts & BRGPHY_AUXSTS_LINK)
    370 		mii->mii_media_status |= IFM_ACTIVE;
    371 
    372 	bmcr = PHY_READ(sc, MII_BMCR);
    373 	if (bmcr & BMCR_ISO) {
    374 		mii->mii_media_active |= IFM_NONE;
    375 		mii->mii_media_status = 0;
    376 		return;
    377 	}
    378 
    379 	if (bmcr & BMCR_LOOP)
    380 		mii->mii_media_active |= IFM_LOOP;
    381 
    382 	if (bmcr & BMCR_AUTOEN) {
    383 		/*
    384 		 * The media status bits are only valid of autonegotiation
    385 		 * has completed (or it's disabled).
    386 		 */
    387 		if ((auxsts & BRGPHY_AUXSTS_ACOMP) == 0) {
    388 			/* Erg, still trying, I guess... */
    389 			mii->mii_media_active |= IFM_NONE;
    390 			return;
    391 		}
    392 
    393 		switch (auxsts & BRGPHY_AUXSTS_AN_RES) {
    394 		case BRGPHY_RES_1000FD:
    395 			mii->mii_media_active |= IFM_1000_T|IFM_FDX;
    396 			gtsr = PHY_READ(sc, MII_100T2SR);
    397 			if (gtsr & GTSR_MS_RES)
    398 				mii->mii_media_active |= IFM_ETH_MASTER;
    399 			break;
    400 
    401 		case BRGPHY_RES_1000HD:
    402 			mii->mii_media_active |= IFM_1000_T;
    403 			gtsr = PHY_READ(sc, MII_100T2SR);
    404 			if (gtsr & GTSR_MS_RES)
    405 				mii->mii_media_active |= IFM_ETH_MASTER;
    406 			break;
    407 
    408 		case BRGPHY_RES_100FD:
    409 			mii->mii_media_active |= IFM_100_TX|IFM_FDX;
    410 			break;
    411 
    412 		case BRGPHY_RES_100T4:
    413 			mii->mii_media_active |= IFM_100_T4;
    414 			break;
    415 
    416 		case BRGPHY_RES_100HD:
    417 			mii->mii_media_active |= IFM_100_TX;
    418 			break;
    419 
    420 		case BRGPHY_RES_10FD:
    421 			mii->mii_media_active |= IFM_10_T|IFM_FDX;
    422 			break;
    423 
    424 		case BRGPHY_RES_10HD:
    425 			mii->mii_media_active |= IFM_10_T;
    426 			break;
    427 
    428 		default:
    429 			mii->mii_media_active |= IFM_NONE;
    430 			mii->mii_media_status = 0;
    431 		}
    432 		if (mii->mii_media_active & IFM_FDX)
    433 			mii->mii_media_active |= mii_phy_flowstatus(sc);
    434 	} else
    435 		mii->mii_media_active = ife->ifm_media;
    436 }
    437 
    438 static void
    439 brgphy_5401_reset(struct mii_softc *sc)
    440 {
    441 
    442 	mii_phy_reset(sc);
    443 	bcm5401_load_dspcode(sc);
    444 }
    445 
    446 static void
    447 brgphy_5411_reset(struct mii_softc *sc)
    448 {
    449 
    450 	mii_phy_reset(sc);
    451 	bcm5411_load_dspcode(sc);
    452 }
    453 
    454 
    455 static void
    456 brgphy_5703_reset(struct mii_softc *sc)
    457 {
    458 
    459 	mii_phy_reset(sc);
    460 	bcm5703_load_dspcode(sc);
    461 }
    462 
    463 static void
    464 brgphy_5704_reset(struct mii_softc *sc)
    465 {
    466 
    467 	mii_phy_reset(sc);
    468 	bcm5704_load_dspcode(sc);
    469 }
    470 
    471 /*
    472  * Hardware bug workaround.  Do nothing since after
    473  * reset the 5705 PHY would get stuck in 10/100 MII mode.
    474  */
    475 
    476 static void
    477 brgphy_5705_reset(struct mii_softc *sc)
    478 {
    479 }
    480 
    481 static void
    482 brgphy_5750_reset(struct mii_softc *sc)
    483 {
    484 	mii_phy_reset(sc);
    485 	bcm5750_load_dspcode(sc);
    486 }
    487 
    488 /* Turn off tap power management on 5401. */
    489 static void
    490 bcm5401_load_dspcode(struct mii_softc *sc)
    491 {
    492 	static const struct {
    493 		int		reg;
    494 		uint16_t	val;
    495 	} dspcode[] = {
    496 		{ BRGPHY_MII_AUXCTL,		0x0c20 },
    497 		{ BRGPHY_MII_DSP_ADDR_REG,	0x0012 },
    498 		{ BRGPHY_MII_DSP_RW_PORT,	0x1804 },
    499 		{ BRGPHY_MII_DSP_ADDR_REG,	0x0013 },
    500 		{ BRGPHY_MII_DSP_RW_PORT,	0x1204 },
    501 		{ BRGPHY_MII_DSP_ADDR_REG,	0x8006 },
    502 		{ BRGPHY_MII_DSP_RW_PORT,	0x0132 },
    503 		{ BRGPHY_MII_DSP_ADDR_REG,	0x8006 },
    504 		{ BRGPHY_MII_DSP_RW_PORT,	0x0232 },
    505 		{ BRGPHY_MII_DSP_ADDR_REG,	0x201f },
    506 		{ BRGPHY_MII_DSP_RW_PORT,	0x0a20 },
    507 		{ 0,				0 },
    508 	};
    509 	int i;
    510 
    511 	for (i = 0; dspcode[i].reg != 0; i++)
    512 		PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
    513     delay(40);
    514 }
    515 
    516 static void
    517 bcm5411_load_dspcode(struct mii_softc *sc)
    518 {
    519 	static const struct {
    520 		int		reg;
    521 		uint16_t	val;
    522 	} dspcode[] = {
    523 		{ 0x1c,				0x8c23 },
    524 		{ 0x1c,				0x8ca3 },
    525 		{ 0x1c,				0x8c23 },
    526 		{ 0,				0 },
    527 	};
    528 	int i;
    529 
    530 	for (i = 0; dspcode[i].reg != 0; i++)
    531 		PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
    532 }
    533 
    534 static void
    535 bcm5703_load_dspcode(struct mii_softc *sc)
    536 {
    537 	static const struct {
    538 		int		reg;
    539 		uint16_t	val;
    540 	} dspcode[] = {
    541 		{ BRGPHY_MII_AUXCTL,		0x0c00 },
    542 		{ BRGPHY_MII_DSP_ADDR_REG,	0x201f },
    543 		{ BRGPHY_MII_DSP_RW_PORT,	0x2aaa },
    544 		{ 0,				0 },
    545 	};
    546 	int i;
    547 
    548 	for (i = 0; dspcode[i].reg != 0; i++)
    549 		PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
    550 }
    551 
    552 static void
    553 bcm5704_load_dspcode(struct mii_softc *sc)
    554 {
    555 	static const struct {
    556 		int		reg;
    557 		uint16_t	val;
    558 	} dspcode[] = {
    559 		{ 0x1c,				0x8d68 },
    560    		{ 0x1c,				0x8d68 },
    561 		{ 0,				0 },
    562 	};
    563 	int i;
    564 
    565 	for (i = 0; dspcode[i].reg != 0; i++)
    566 		PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
    567 }
    568 
    569 static void
    570 bcm5750_load_dspcode(struct mii_softc *sc)
    571 {
    572 	static const struct {
    573 		int		reg;
    574 		uint16_t	val;
    575 	} dspcode[] = {
    576 		{ BRGPHY_MII_AUXCTL,		0x0c00 },
    577 		{ BRGPHY_MII_DSP_ADDR_REG,	0x000a },
    578 		{ BRGPHY_MII_DSP_RW_PORT,	0x310b },
    579 		{ BRGPHY_MII_DSP_ADDR_REG,	0x201f },
    580 		{ BRGPHY_MII_DSP_RW_PORT,	0x9506 },
    581 		{ BRGPHY_MII_DSP_ADDR_REG,	0x401f },
    582 		{ BRGPHY_MII_DSP_RW_PORT,	0x14e2 },
    583 		{ BRGPHY_MII_AUXCTL,		0x0400 },
    584 		{ 0,				0 },
    585 	};
    586 	int i;
    587 
    588 	for (i = 0; dspcode[i].reg != 0; i++)
    589 		PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
    590 }
    591