brgphy.c revision 1.32
1 /* $NetBSD: brgphy.c,v 1.32 2007/03/10 09:13:07 msaitoh Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1997 Manuel Bouyer. All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by Manuel Bouyer. 54 * 4. The name of the author may not be used to endorse or promote products 55 * derived from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 60 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 61 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 62 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 63 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 64 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 65 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 66 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 67 */ 68 69 /* 70 * driver for the Broadcom BCM5400 Gig-E PHY. 71 * 72 * Programming information for this PHY was gleaned from FreeBSD 73 * (they were apparently able to get a datasheet from Broadcom). 74 */ 75 76 #include <sys/cdefs.h> 77 __KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.32 2007/03/10 09:13:07 msaitoh Exp $"); 78 79 #include <sys/param.h> 80 #include <sys/systm.h> 81 #include <sys/kernel.h> 82 #include <sys/device.h> 83 #include <sys/socket.h> 84 #include <sys/errno.h> 85 86 #include <net/if.h> 87 #include <net/if_media.h> 88 89 #include <dev/mii/mii.h> 90 #include <dev/mii/miivar.h> 91 #include <dev/mii/miidevs.h> 92 93 #include <dev/mii/brgphyreg.h> 94 95 static int brgphymatch(struct device *, struct cfdata *, void *); 96 static void brgphyattach(struct device *, struct device *, void *); 97 98 CFATTACH_DECL(brgphy, sizeof(struct mii_softc), 99 brgphymatch, brgphyattach, mii_phy_detach, mii_phy_activate); 100 101 static int brgphy_service(struct mii_softc *, struct mii_data *, int); 102 static void brgphy_status(struct mii_softc *); 103 static int brgphy_mii_phy_auto(struct mii_softc *); 104 static void brgphy_loop(struct mii_softc *); 105 106 static void brgphy_5401_reset(struct mii_softc *); 107 static void brgphy_5411_reset(struct mii_softc *); 108 static void brgphy_5703_reset(struct mii_softc *); 109 static void brgphy_5704_reset(struct mii_softc *); 110 static void brgphy_5705_reset(struct mii_softc *); 111 static void brgphy_5750_reset(struct mii_softc *); 112 113 static const struct mii_phy_funcs brgphy_funcs = { 114 brgphy_service, brgphy_status, mii_phy_reset, 115 }; 116 117 static const struct mii_phy_funcs brgphy_5401_funcs = { 118 brgphy_service, brgphy_status, brgphy_5401_reset, 119 }; 120 121 static const struct mii_phy_funcs brgphy_5411_funcs = { 122 brgphy_service, brgphy_status, brgphy_5411_reset, 123 }; 124 125 static const struct mii_phy_funcs brgphy_5703_funcs = { 126 brgphy_service, brgphy_status, brgphy_5703_reset, 127 }; 128 129 static const struct mii_phy_funcs brgphy_5704_funcs = { 130 brgphy_service, brgphy_status, brgphy_5704_reset, 131 }; 132 133 static const struct mii_phy_funcs brgphy_5705_funcs = { 134 brgphy_service, brgphy_status, brgphy_5705_reset, 135 }; 136 137 const struct mii_phy_funcs brgphy_5750_funcs = { 138 brgphy_service, brgphy_status, brgphy_5750_reset, 139 }; 140 141 142 static const struct mii_phydesc brgphys[] = { 143 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5400, 144 MII_STR_BROADCOM_BCM5400 }, 145 146 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5401, 147 MII_STR_BROADCOM_BCM5401 }, 148 149 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5411, 150 MII_STR_BROADCOM_BCM5411 }, 151 152 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5421, 153 MII_STR_BROADCOM_BCM5421 }, 154 155 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5701, 156 MII_STR_BROADCOM_BCM5701 }, 157 158 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5703, 159 MII_STR_BROADCOM_BCM5703 }, 160 161 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5704, 162 MII_STR_BROADCOM_BCM5704 }, 163 164 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5705, 165 MII_STR_BROADCOM_BCM5705 }, 166 167 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5714, 168 MII_STR_BROADCOM_BCM5714 }, 169 170 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5750, 171 MII_STR_BROADCOM_BCM5750 }, 172 173 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5752, 174 MII_STR_BROADCOM_BCM5752 }, 175 176 { MII_OUI_BROADCOM, MII_MODEL_BROADCOM_BCM5780, 177 MII_STR_BROADCOM_BCM5780 }, 178 179 { 0, 0, 180 NULL }, 181 }; 182 183 static void bcm5401_load_dspcode(struct mii_softc *); 184 static void bcm5411_load_dspcode(struct mii_softc *); 185 static void bcm5703_load_dspcode(struct mii_softc *); 186 static void bcm5704_load_dspcode(struct mii_softc *); 187 static void bcm5750_load_dspcode(struct mii_softc *); 188 189 static int 190 brgphymatch(struct device *parent, struct cfdata *match, 191 void *aux) 192 { 193 struct mii_attach_args *ma = aux; 194 195 if (mii_phy_match(ma, brgphys) != NULL) 196 return (10); 197 198 return (0); 199 } 200 201 static void 202 brgphyattach(struct device *parent, struct device *self, void *aux) 203 { 204 struct mii_softc *sc = device_private(self); 205 struct mii_attach_args *ma = aux; 206 struct mii_data *mii = ma->mii_data; 207 const struct mii_phydesc *mpd; 208 209 mpd = mii_phy_match(ma, brgphys); 210 aprint_naive(": Media interface\n"); 211 aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2)); 212 213 sc->mii_inst = mii->mii_instance; 214 sc->mii_phy = ma->mii_phyno; 215 sc->mii_mpd_model = MII_MODEL(ma->mii_id2); 216 sc->mii_pdata = mii; 217 sc->mii_flags = ma->mii_flags; 218 sc->mii_anegticks = MII_ANEGTICKS; 219 220 switch (MII_MODEL(ma->mii_id2)) { 221 case MII_MODEL_BROADCOM_BCM5400: 222 sc->mii_funcs = &brgphy_5401_funcs; 223 aprint_normal("%s: using BCM5401 DSP patch\n", 224 sc->mii_dev.dv_xname); 225 break; 226 227 case MII_MODEL_BROADCOM_BCM5401: 228 if (MII_REV(ma->mii_id2) == 1 || MII_REV(ma->mii_id2) == 3) { 229 sc->mii_funcs = &brgphy_5401_funcs; 230 aprint_normal("%s: using BCM5401 DSP patch\n", 231 sc->mii_dev.dv_xname); 232 } else 233 sc->mii_funcs = &brgphy_funcs; 234 break; 235 236 case MII_MODEL_BROADCOM_BCM5411: 237 sc->mii_funcs = &brgphy_5411_funcs; 238 aprint_normal("%s: using BCM5411 DSP patch\n", 239 sc->mii_dev.dv_xname); 240 break; 241 242 #ifdef notyet /* unverified, untested */ 243 case MII_MODEL_BROADCOM_BCM5703: 244 sc->mii_funcs = &brgphy_5703_funcs; 245 aprint_normal("%s: using BCM5703 DSP patch\n", 246 sc->mii_dev.dv_xname); 247 break; 248 #endif 249 250 case MII_MODEL_BROADCOM_BCM5704: 251 sc->mii_funcs = &brgphy_5704_funcs; 252 aprint_normal("%s: using BCM5704 DSP patch\n", 253 sc->mii_dev.dv_xname); 254 break; 255 256 case MII_MODEL_BROADCOM_BCM5705: 257 sc->mii_funcs = &brgphy_5705_funcs; 258 break; 259 260 case MII_MODEL_BROADCOM_BCM5714: 261 case MII_MODEL_BROADCOM_BCM5780: 262 case MII_MODEL_BROADCOM_BCM5750: 263 case MII_MODEL_BROADCOM_BCM5752: 264 sc->mii_funcs = &brgphy_5750_funcs; 265 break; 266 267 default: 268 sc->mii_funcs = &brgphy_funcs; 269 break; 270 } 271 272 PHY_RESET(sc); 273 274 sc->mii_capabilities = 275 PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 276 if (sc->mii_capabilities & BMSR_EXTSTAT) 277 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 278 279 aprint_normal("%s: ", sc->mii_dev.dv_xname); 280 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 && 281 (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0) 282 aprint_error("no media present"); 283 else 284 mii_phy_add_media(sc); 285 aprint_normal("\n"); 286 } 287 288 static int 289 brgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 290 { 291 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 292 int reg, speed, gig; 293 294 switch (cmd) { 295 case MII_POLLSTAT: 296 /* 297 * If we're not polling our PHY instance, just return. 298 */ 299 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 300 return (0); 301 break; 302 303 case MII_MEDIACHG: 304 /* 305 * If the media indicates a different PHY instance, 306 * isolate ourselves. 307 */ 308 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 309 reg = PHY_READ(sc, MII_BMCR); 310 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 311 return (0); 312 } 313 314 /* 315 * If the interface is not up, don't do anything. 316 */ 317 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 318 break; 319 320 PHY_RESET(sc); /* XXX hardware bug work-around */ 321 322 switch (IFM_SUBTYPE(ife->ifm_media)) { 323 case IFM_AUTO: 324 (void) brgphy_mii_phy_auto(sc); 325 break; 326 case IFM_1000_T: 327 speed = BMCR_S1000; 328 goto setit; 329 case IFM_100_TX: 330 speed = BMCR_S100; 331 goto setit; 332 case IFM_10_T: 333 speed = BMCR_S10; 334 setit: 335 brgphy_loop(sc); 336 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) { 337 speed |= BMCR_FDX; 338 gig = GTCR_ADV_1000TFDX; 339 } else { 340 gig = GTCR_ADV_1000THDX; 341 } 342 343 PHY_WRITE(sc, MII_100T2CR, 0); 344 PHY_WRITE(sc, MII_BMCR, speed); 345 PHY_WRITE(sc, MII_ANAR, ANAR_CSMA); 346 347 if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T) 348 break; 349 350 PHY_WRITE(sc, MII_100T2CR, gig); 351 PHY_WRITE(sc, MII_BMCR, 352 speed|BMCR_AUTOEN|BMCR_STARTNEG); 353 354 if (sc->mii_mpd_model != MII_MODEL_BROADCOM_BCM5701) 355 break; 356 357 if (mii->mii_media.ifm_media & IFM_ETH_MASTER) 358 gig |= GTCR_MAN_MS | GTCR_ADV_MS; 359 PHY_WRITE(sc, MII_100T2CR, gig); 360 break; 361 default: 362 return (EINVAL); 363 } 364 break; 365 366 case MII_TICK: 367 /* 368 * If we're not currently selected, just return. 369 */ 370 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 371 return (0); 372 373 if (mii_phy_tick(sc) == EJUSTRETURN) 374 return (0); 375 break; 376 377 case MII_DOWN: 378 mii_phy_down(sc); 379 return (0); 380 } 381 382 /* Update the media status. */ 383 mii_phy_status(sc); 384 385 /* 386 * Callback if something changed. Note that we need to poke the DSP on 387 * the Broadcom PHYs if the media changes. 388 */ 389 if (sc->mii_media_active != mii->mii_media_active || 390 sc->mii_media_status != mii->mii_media_status || 391 cmd == MII_MEDIACHG) { 392 mii_phy_update(sc, cmd); 393 if (sc->mii_funcs == &brgphy_5401_funcs) 394 bcm5401_load_dspcode(sc); 395 else if (sc->mii_funcs == &brgphy_5411_funcs) 396 bcm5411_load_dspcode(sc); 397 } 398 return (0); 399 } 400 401 static void 402 brgphy_status(struct mii_softc *sc) 403 { 404 struct mii_data *mii = sc->mii_pdata; 405 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 406 int bmcr, auxsts, gtsr; 407 408 mii->mii_media_status = IFM_AVALID; 409 mii->mii_media_active = IFM_ETHER; 410 411 auxsts = PHY_READ(sc, BRGPHY_MII_AUXSTS); 412 413 if (auxsts & BRGPHY_AUXSTS_LINK) 414 mii->mii_media_status |= IFM_ACTIVE; 415 416 bmcr = PHY_READ(sc, MII_BMCR); 417 if (bmcr & BMCR_ISO) { 418 mii->mii_media_active |= IFM_NONE; 419 mii->mii_media_status = 0; 420 return; 421 } 422 423 if (bmcr & BMCR_LOOP) 424 mii->mii_media_active |= IFM_LOOP; 425 426 if (bmcr & BMCR_AUTOEN) { 427 /* 428 * The media status bits are only valid of autonegotiation 429 * has completed (or it's disabled). 430 */ 431 if ((auxsts & BRGPHY_AUXSTS_ACOMP) == 0) { 432 /* Erg, still trying, I guess... */ 433 mii->mii_media_active |= IFM_NONE; 434 return; 435 } 436 437 switch (auxsts & BRGPHY_AUXSTS_AN_RES) { 438 case BRGPHY_RES_1000FD: 439 mii->mii_media_active |= IFM_1000_T|IFM_FDX; 440 gtsr = PHY_READ(sc, MII_100T2SR); 441 if (gtsr & GTSR_MS_RES) 442 mii->mii_media_active |= IFM_ETH_MASTER; 443 break; 444 445 case BRGPHY_RES_1000HD: 446 mii->mii_media_active |= IFM_1000_T; 447 gtsr = PHY_READ(sc, MII_100T2SR); 448 if (gtsr & GTSR_MS_RES) 449 mii->mii_media_active |= IFM_ETH_MASTER; 450 break; 451 452 case BRGPHY_RES_100FD: 453 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 454 break; 455 456 case BRGPHY_RES_100T4: 457 mii->mii_media_active |= IFM_100_T4; 458 break; 459 460 case BRGPHY_RES_100HD: 461 mii->mii_media_active |= IFM_100_TX; 462 break; 463 464 case BRGPHY_RES_10FD: 465 mii->mii_media_active |= IFM_10_T|IFM_FDX; 466 break; 467 468 case BRGPHY_RES_10HD: 469 mii->mii_media_active |= IFM_10_T; 470 break; 471 472 default: 473 mii->mii_media_active |= IFM_NONE; 474 mii->mii_media_status = 0; 475 } 476 if (mii->mii_media_active & IFM_FDX) 477 mii->mii_media_active |= mii_phy_flowstatus(sc); 478 } else 479 mii->mii_media_active = ife->ifm_media; 480 } 481 482 int 483 brgphy_mii_phy_auto(struct mii_softc *sc) 484 { 485 int anar, ktcr = 0; 486 487 brgphy_loop(sc); 488 PHY_RESET(sc); 489 ktcr = GTCR_ADV_1000TFDX|GTCR_ADV_1000THDX; 490 if (sc->mii_mpd_model == MII_MODEL_BROADCOM_BCM5701) 491 ktcr |= GTCR_MAN_MS|GTCR_ADV_MS; 492 PHY_WRITE(sc, MII_100T2CR, ktcr); 493 ktcr = PHY_READ(sc, MII_100T2CR); 494 DELAY(1000); 495 anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA; 496 if (sc->mii_flags & MIIF_DOPAUSE) 497 anar |= ANAR_FC| ANAR_X_PAUSE_ASYM; 498 499 PHY_WRITE(sc, MII_ANAR, anar); 500 DELAY(1000); 501 PHY_WRITE(sc, MII_BMCR, 502 BMCR_AUTOEN | BMCR_STARTNEG); 503 PHY_WRITE(sc, BRGPHY_MII_IMR, 0xFF00); 504 505 return (EJUSTRETURN); 506 } 507 508 void 509 brgphy_loop(struct mii_softc *sc) 510 { 511 u_int32_t bmsr; 512 int i; 513 514 PHY_WRITE(sc, MII_BMCR, BMCR_LOOP); 515 for (i = 0; i < 15000; i++) { 516 bmsr = PHY_READ(sc, MII_BMSR); 517 if (!(bmsr & BMSR_LINK)) 518 break; 519 DELAY(10); 520 } 521 } 522 523 static void 524 brgphy_5401_reset(struct mii_softc *sc) 525 { 526 527 mii_phy_reset(sc); 528 bcm5401_load_dspcode(sc); 529 } 530 531 static void 532 brgphy_5411_reset(struct mii_softc *sc) 533 { 534 535 mii_phy_reset(sc); 536 bcm5411_load_dspcode(sc); 537 } 538 539 540 static void 541 brgphy_5703_reset(struct mii_softc *sc) 542 { 543 544 mii_phy_reset(sc); 545 bcm5703_load_dspcode(sc); 546 } 547 548 static void 549 brgphy_5704_reset(struct mii_softc *sc) 550 { 551 552 mii_phy_reset(sc); 553 bcm5704_load_dspcode(sc); 554 } 555 556 /* 557 * Hardware bug workaround. Do nothing since after 558 * reset the 5705 PHY would get stuck in 10/100 MII mode. 559 */ 560 561 static void 562 brgphy_5705_reset(struct mii_softc *sc) 563 { 564 } 565 566 static void 567 brgphy_5750_reset(struct mii_softc *sc) 568 { 569 mii_phy_reset(sc); 570 bcm5750_load_dspcode(sc); 571 } 572 573 /* Turn off tap power management on 5401. */ 574 static void 575 bcm5401_load_dspcode(struct mii_softc *sc) 576 { 577 static const struct { 578 int reg; 579 uint16_t val; 580 } dspcode[] = { 581 { BRGPHY_MII_AUXCTL, 0x0c20 }, 582 { BRGPHY_MII_DSP_ADDR_REG, 0x0012 }, 583 { BRGPHY_MII_DSP_RW_PORT, 0x1804 }, 584 { BRGPHY_MII_DSP_ADDR_REG, 0x0013 }, 585 { BRGPHY_MII_DSP_RW_PORT, 0x1204 }, 586 { BRGPHY_MII_DSP_ADDR_REG, 0x8006 }, 587 { BRGPHY_MII_DSP_RW_PORT, 0x0132 }, 588 { BRGPHY_MII_DSP_ADDR_REG, 0x8006 }, 589 { BRGPHY_MII_DSP_RW_PORT, 0x0232 }, 590 { BRGPHY_MII_DSP_ADDR_REG, 0x201f }, 591 { BRGPHY_MII_DSP_RW_PORT, 0x0a20 }, 592 { 0, 0 }, 593 }; 594 int i; 595 596 for (i = 0; dspcode[i].reg != 0; i++) 597 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 598 delay(40); 599 } 600 601 static void 602 bcm5411_load_dspcode(struct mii_softc *sc) 603 { 604 static const struct { 605 int reg; 606 uint16_t val; 607 } dspcode[] = { 608 { 0x1c, 0x8c23 }, 609 { 0x1c, 0x8ca3 }, 610 { 0x1c, 0x8c23 }, 611 { 0, 0 }, 612 }; 613 int i; 614 615 for (i = 0; dspcode[i].reg != 0; i++) 616 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 617 } 618 619 static void 620 bcm5703_load_dspcode(struct mii_softc *sc) 621 { 622 static const struct { 623 int reg; 624 uint16_t val; 625 } dspcode[] = { 626 { BRGPHY_MII_AUXCTL, 0x0c00 }, 627 { BRGPHY_MII_DSP_ADDR_REG, 0x201f }, 628 { BRGPHY_MII_DSP_RW_PORT, 0x2aaa }, 629 { 0, 0 }, 630 }; 631 int i; 632 633 for (i = 0; dspcode[i].reg != 0; i++) 634 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 635 } 636 637 static void 638 bcm5704_load_dspcode(struct mii_softc *sc) 639 { 640 static const struct { 641 int reg; 642 uint16_t val; 643 } dspcode[] = { 644 { 0x1c, 0x8d68 }, 645 { 0x1c, 0x8d68 }, 646 { 0, 0 }, 647 }; 648 int i; 649 650 for (i = 0; dspcode[i].reg != 0; i++) 651 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 652 } 653 654 static void 655 bcm5750_load_dspcode(struct mii_softc *sc) 656 { 657 static const struct { 658 int reg; 659 uint16_t val; 660 } dspcode[] = { 661 { BRGPHY_MII_AUXCTL, 0x0c00 }, 662 { BRGPHY_MII_DSP_ADDR_REG, 0x000a }, 663 { BRGPHY_MII_DSP_RW_PORT, 0x310b }, 664 { BRGPHY_MII_DSP_ADDR_REG, 0x201f }, 665 { BRGPHY_MII_DSP_RW_PORT, 0x9506 }, 666 { BRGPHY_MII_DSP_ADDR_REG, 0x401f }, 667 { BRGPHY_MII_DSP_RW_PORT, 0x14e2 }, 668 { BRGPHY_MII_AUXCTL, 0x0400 }, 669 { 0, 0 }, 670 }; 671 int i; 672 673 for (i = 0; dspcode[i].reg != 0; i++) 674 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 675 } 676
Indexes created Fri Sep 26 20:09:58 GMT 2025