gphyterreg.h revision 1.2 1 1.2 martin /* $NetBSD: gphyterreg.h,v 1.2 2008/04/28 20:23:53 martin Exp $ */
2 1.1 thorpej
3 1.1 thorpej /*-
4 1.1 thorpej * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 1.1 thorpej * All rights reserved.
6 1.1 thorpej *
7 1.1 thorpej * This code is derived from software contributed to The NetBSD Foundation
8 1.1 thorpej * by Jason R. Thorpe.
9 1.1 thorpej *
10 1.1 thorpej * Redistribution and use in source and binary forms, with or without
11 1.1 thorpej * modification, are permitted provided that the following conditions
12 1.1 thorpej * are met:
13 1.1 thorpej * 1. Redistributions of source code must retain the above copyright
14 1.1 thorpej * notice, this list of conditions and the following disclaimer.
15 1.1 thorpej * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 thorpej * notice, this list of conditions and the following disclaimer in the
17 1.1 thorpej * documentation and/or other materials provided with the distribution.
18 1.1 thorpej *
19 1.1 thorpej * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 thorpej * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 thorpej * POSSIBILITY OF SUCH DAMAGE.
30 1.1 thorpej */
31 1.1 thorpej
32 1.1 thorpej #ifndef _DEV_MII_GPHYTERREG_H_
33 1.1 thorpej #define _DEV_MII_GPHYTERREG_H_
34 1.1 thorpej
35 1.1 thorpej /*
36 1.1 thorpej * DP83861 registers.
37 1.1 thorpej */
38 1.1 thorpej
39 1.1 thorpej /*
40 1.1 thorpej * A quick node about "non-compliant mode": When set to 1, the
41 1.1 thorpej * DP83861 will auto-negotiate with both BCM5400 PHYs before rev.
42 1.1 thorpej * C5 and 802.3ab compliant PHYs. When set to 0, it will auto-
43 1.1 thorpej * negotiate *only* with 802.3ab compliant PHYs. We can change
44 1.1 thorpej * the setting, but the default comes from a strapping pin.
45 1.1 thorpej */
46 1.1 thorpej
47 1.1 thorpej #define MII_GPHYTER_STRAP 0x10 /* strap options */
48 1.1 thorpej #define STRAP_PHYADDR 0xf800 /* PHY address (ro) */
49 1.1 thorpej #define STRAP_NC_MODE 0x0400 /* non-compliant mode (rw) */
50 1.1 thorpej #define STRAP_MAN_MS_ENABLE 0x0200 /* manual master/slave enable (ro) */
51 1.1 thorpej #define STRAP_AN_ENABLE 0x0100 /* auto-negotiation enable (ro) */
52 1.1 thorpej #define STRAP_MS_VAL 0x0080 /* 1 = master, 0 = slave */
53 1.1 thorpej #define STRAP_ADV_1000HDX 0x0010 /* adv. 1000T-HDX */
54 1.1 thorpej #define STRAP_ADV_1000FDX 0x0008 /* adv. 1000T-FDX */
55 1.1 thorpej #define STRAP_ADV_100 0x0004 /* adv. 100TX-HDX and 100TX-FDX */
56 1.1 thorpej #define STRAP_SPEED1 0x0002 /* speed bit 1 */
57 1.1 thorpej #define STRAP_SPEED0 0x0001 /* speed bit 0 */
58 1.1 thorpej
59 1.1 thorpej
60 1.1 thorpej #define MII_GPHYTER_PHY_SUP 0x11 /* PHY support */
61 1.1 thorpej #define PHY_SUP_SPEED1 0x0010 /* speed bit 1 */
62 1.1 thorpej #define PHY_SUP_SPEED0 0x0008 /* speed bit 0 */
63 1.1 thorpej #define PHY_SUP_LINK 0x0004 /* 1 == link */
64 1.1 thorpej #define PHY_SUP_DUPLEX 0x0002 /* 1 == full-duplex */
65 1.1 thorpej #define PHY_SUP_10baseT 0x0001 /* 10baseT resolved */
66 1.1 thorpej
67 1.1 thorpej
68 1.1 thorpej #define MII_GPHYTER_MDIX_SEL 0x15 /* MIDX select */
69 1.1 thorpej #define MIDX_SEL_CROSSOVER 0x0001 /* 1 == cross-over A-B */
70 1.1 thorpej
71 1.1 thorpej
72 1.1 thorpej #define MII_GPHYTER_EX_MEM 0x16 /* expanded memory access */
73 1.1 thorpej #define EX_MEM_RE_TIME 0x0008 /* Re-time to MDC */
74 1.1 thorpej #define EX_MEM_ACCESS 0x0004 /* enable expanded mem access */
75 1.1 thorpej #define EX_MEM_ADDRCONTROL_16 0x0002 /* 16-bit access */
76 1.1 thorpej #define EX_MEM_ADDRCONTROL_8 0x0001 /* 8-bit access */
77 1.1 thorpej
78 1.1 thorpej
79 1.1 thorpej #define MII_GPHYTER_EX_MEM_DAT 0x1d /* expanded memory data */
80 1.1 thorpej
81 1.1 thorpej
82 1.1 thorpej #define MII_GPHYTER_EX_MEM_ADDR 0x1e /* expanded memory address */
83 1.1 thorpej
84 1.1 thorpej
85 1.1 thorpej #define GPHYTER_ISR0 0x810d /* interrupt status 0 */
86 1.1 thorpej
87 1.1 thorpej
88 1.1 thorpej #define GPHYTER_ISR1 0x810e /* interrupt status 1 */
89 1.1 thorpej
90 1.1 thorpej
91 1.1 thorpej #define GPHYTER_IRR0 0x810f /* interrupt reason 0 */
92 1.1 thorpej
93 1.1 thorpej
94 1.1 thorpej #define GPHYTER_IRR1 0x8110 /* interrupt reason 1 */
95 1.1 thorpej
96 1.1 thorpej
97 1.1 thorpej #define GPHYTER_RRR0 0x8111 /* raw reason 0 */
98 1.1 thorpej
99 1.1 thorpej
100 1.1 thorpej #define GPHYTER_RRR1 0x8112 /* raw reason 1 */
101 1.1 thorpej
102 1.1 thorpej
103 1.1 thorpej #define GPHYTER_IER0 0x8113 /* interrupt enable 0 */
104 1.1 thorpej
105 1.1 thorpej
106 1.1 thorpej #define GPHYTER_IER1 0x8114 /* interrupt enable 1 */
107 1.1 thorpej
108 1.1 thorpej
109 1.1 thorpej #define GPHYTER_ICLR0 0x8115 /* interrupt clear 0 */
110 1.1 thorpej
111 1.1 thorpej
112 1.1 thorpej #define GPHYTER_ICLR1 0x8116 /* interrupt clear 1 */
113 1.1 thorpej
114 1.1 thorpej
115 1.1 thorpej #define GPHYTER_ICTR 0x8117 /* interrupt control */
116 1.1 thorpej
117 1.1 thorpej
118 1.1 thorpej #define GPHYTER_AN_THRESH 0x8118 /* AN_threshold value */
119 1.1 thorpej
120 1.1 thorpej
121 1.1 thorpej #define GPHYTER_LINK_THRESH 0x8119 /* LINK_threshold value */
122 1.1 thorpej
123 1.1 thorpej
124 1.1 thorpej #define GPHYTER_IEC_THRESH 0x811a /* IEC_threshold value */
125 1.1 thorpej
126 1.1 thorpej
127 1.1 thorpej #endif /* _DEV_MII_GPHYTERREG_H_ */
128