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ihphy.c revision 1.17
      1 /*	$NetBSD: ihphy.c,v 1.17 2020/03/15 23:04:50 thorpej Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center, and by Frank van der Linden.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30  * POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * Copyright (c) 1997 Manuel Bouyer.  All rights reserved.
     35  *
     36  * Redistribution and use in source and binary forms, with or without
     37  * modification, are permitted provided that the following conditions
     38  * are met:
     39  * 1. Redistributions of source code must retain the above copyright
     40  *    notice, this list of conditions and the following disclaimer.
     41  * 2. Redistributions in binary form must reproduce the above copyright
     42  *    notice, this list of conditions and the following disclaimer in the
     43  *    documentation and/or other materials provided with the distribution.
     44  *
     45  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     46  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     47  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     48  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     49  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     50  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     51  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     52  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     53  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     54  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     55  */
     56 
     57 /*
     58  * Driver for Intel's 82577 (Hanksville) Ethernet 10/100/1000 PHY
     59  * Data Sheet: http://download.intel.com/design/network/datashts/319439.pdf
     60  */
     61 
     62 #include <sys/cdefs.h>
     63 __KERNEL_RCSID(0, "$NetBSD: ihphy.c,v 1.17 2020/03/15 23:04:50 thorpej Exp $");
     64 
     65 #include <sys/param.h>
     66 #include <sys/systm.h>
     67 #include <sys/kernel.h>
     68 #include <sys/device.h>
     69 #include <sys/socket.h>
     70 #include <sys/errno.h>
     71 
     72 #include <net/if.h>
     73 #include <net/if_media.h>
     74 
     75 #include <dev/mii/mii.h>
     76 #include <dev/mii/miivar.h>
     77 #include <dev/mii/miidevs.h>
     78 
     79 #include <dev/mii/ihphyreg.h>
     80 
     81 static int	ihphymatch(device_t, cfdata_t, void *);
     82 static void	ihphyattach(device_t, device_t, void *);
     83 
     84 CFATTACH_DECL3_NEW(ihphy, sizeof(struct mii_softc),
     85     ihphymatch, ihphyattach, mii_phy_detach, mii_phy_activate, NULL, NULL,
     86     DVF_DETACH_SHUTDOWN);
     87 
     88 static int	ihphy_service(struct mii_softc *, struct mii_data *, int);
     89 static void	ihphy_status(struct mii_softc *);
     90 static void	ihphy_reset(struct mii_softc *);
     91 
     92 static const struct mii_phy_funcs ihphy_funcs = {
     93 	ihphy_service, ihphy_status, ihphy_reset,
     94 };
     95 
     96 static const struct mii_phydesc ihphys[] = {
     97 	MII_PHY_DESC(INTEL, I82577),
     98 	MII_PHY_DESC(INTEL, I82579),
     99 	MII_PHY_DESC(INTEL, I217),
    100 	MII_PHY_DESC(INTEL, I82580),
    101 	MII_PHY_DESC(INTEL, I350),
    102 	MII_PHY_END,
    103 };
    104 
    105 static int
    106 ihphymatch(device_t parent, cfdata_t match, void *aux)
    107 {
    108 	struct mii_attach_args *ma = aux;
    109 
    110 	if (mii_phy_match(ma, ihphys) != NULL)
    111 		return 10;
    112 
    113 	return 0;
    114 }
    115 
    116 static void
    117 ihphyattach(device_t parent, device_t self, void *aux)
    118 {
    119 	struct mii_softc *sc = device_private(self);
    120 	struct mii_attach_args *ma = aux;
    121 	struct mii_data *mii = ma->mii_data;
    122 	const struct mii_phydesc *mpd;
    123 	uint16_t reg;
    124 
    125 	mpd = mii_phy_match(ma, ihphys);
    126 	aprint_naive(": Media interface\n");
    127 	aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
    128 
    129 	sc->mii_dev = self;
    130 	sc->mii_inst = mii->mii_instance;
    131 	sc->mii_phy = ma->mii_phyno;
    132 	sc->mii_mpd_oui = MII_OUI(ma->mii_id1, ma->mii_id2);
    133 	sc->mii_mpd_model = MII_MODEL(ma->mii_id2);
    134 	sc->mii_mpd_rev = MII_REV(ma->mii_id2);
    135 	sc->mii_funcs = &ihphy_funcs;
    136 	sc->mii_pdata = mii;
    137 	sc->mii_flags = ma->mii_flags;
    138 
    139 	mii_lock(mii);
    140 
    141 	PHY_RESET(sc);
    142 
    143 	PHY_READ(sc, MII_BMSR, &sc->mii_capabilities);
    144 	sc->mii_capabilities &= ma->mii_capmask;
    145 	if (sc->mii_capabilities & BMSR_EXTSTAT)
    146 		PHY_READ(sc, MII_EXTSR, &sc->mii_extcapabilities);
    147 
    148 	mii_unlock(mii);
    149 
    150 	mii_phy_add_media(sc);
    151 
    152 	mii_lock(mii);
    153 	/* Link setup (as done by Intel's Linux driver for the 82577). */
    154 	PHY_READ(sc, IHPHY_MII_CFG, &reg);
    155 	reg |= IHPHY_CFG_TX_CRS;
    156 	reg |= IHPHY_CFG_DOWN_SHIFT;
    157 	PHY_WRITE(sc, IHPHY_MII_CFG, reg);
    158 	mii_unlock(mii);
    159 }
    160 
    161 static int
    162 ihphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
    163 {
    164 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
    165 	uint16_t reg;
    166 
    167 	KASSERT(mii_locked(mii));
    168 
    169 	switch (cmd) {
    170 	case MII_POLLSTAT:
    171 		/* If we're not polling our PHY instance, just return. */
    172 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
    173 			return 0;
    174 		break;
    175 
    176 	case MII_MEDIACHG:
    177 		/*
    178 		 * If the media indicates a different PHY instance,
    179 		 * isolate ourselves.
    180 		 */
    181 		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
    182 			PHY_READ(sc, MII_BMCR, &reg);
    183 			PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
    184 			return 0;
    185 		}
    186 
    187 		/* If the interface is not up, don't do anything. */
    188 		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
    189 			break;
    190 
    191 		/* If media is deselected, disable link (standby). */
    192 		PHY_READ(sc, IHPHY_MII_ECR, &reg);
    193 		if (IFM_SUBTYPE(ife->ifm_media) == IFM_NONE)
    194 			reg &= ~IHPHY_ECR_LNK_EN;
    195 		else
    196 			reg |= IHPHY_ECR_LNK_EN;
    197 		PHY_WRITE(sc, IHPHY_MII_ECR, reg);
    198 
    199 		/* XXX Adjust MDI/MDIX configuration?  Other settings? */
    200 
    201 		mii_phy_setmedia(sc);
    202 		break;
    203 
    204 	case MII_TICK:
    205 		/* If we're not currently selected, just return. */
    206 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
    207 			return 0;
    208 
    209 		if (mii_phy_tick(sc) == EJUSTRETURN)
    210 			return 0;
    211 		break;
    212 
    213 	case MII_DOWN:
    214 		mii_phy_down(sc);
    215 		PHY_WRITE(sc, MII_BMCR, BMCR_PDOWN);
    216 		return 0;
    217 	}
    218 
    219 	/* Update the media status. */
    220 	mii_phy_status(sc);
    221 
    222 	/* Callback if something changed. */
    223 	mii_phy_update(sc, cmd);
    224 	return 0;
    225 }
    226 
    227 static void
    228 ihphy_status(struct mii_softc *sc)
    229 {
    230 	struct mii_data *mii = sc->mii_pdata;
    231 	uint16_t esr, bmcr, gtsr;
    232 
    233 	KASSERT(mii_locked(mii));
    234 
    235 	mii->mii_media_status = IFM_AVALID;
    236 	mii->mii_media_active = IFM_ETHER;
    237 
    238 	PHY_READ(sc, IHPHY_MII_ESR, &esr);
    239 
    240 	if (esr & IHPHY_ESR_LINK)
    241 		mii->mii_media_status |= IFM_ACTIVE;
    242 
    243 	PHY_READ(sc, MII_BMCR, &bmcr);
    244 	if (bmcr & (BMCR_ISO | BMCR_PDOWN)) {
    245 		mii->mii_media_active |= IFM_NONE;
    246 		mii->mii_media_status = 0;
    247 		return;
    248 	}
    249 
    250 	if (bmcr & BMCR_LOOP)
    251 		mii->mii_media_active |= IFM_LOOP;
    252 
    253 	if (bmcr & BMCR_AUTOEN) {
    254 		if ((esr & IHPHY_ESR_ANEG_STAT) == 0) {
    255 			/* Erg, still trying, I guess... */
    256 			mii->mii_media_active |= IFM_NONE;
    257 			return;
    258 		}
    259 	}
    260 
    261 	switch (esr & IHPHY_ESR_SPEED) {
    262 	case IHPHY_SPEED_1000:
    263 		mii->mii_media_active |= IFM_1000_T;
    264 		PHY_READ(sc, MII_100T2SR, &gtsr);
    265 		if (gtsr & GTSR_MS_RES)
    266 			mii->mii_media_active |= IFM_ETH_MASTER;
    267 		break;
    268 
    269 	case IHPHY_SPEED_100:
    270 		/* 100BASE-T2 and 100BASE-T4 are not supported. */
    271 		mii->mii_media_active |= IFM_100_TX;
    272 		break;
    273 
    274 	case IHPHY_SPEED_10:
    275 		mii->mii_media_active |= IFM_10_T;
    276 		break;
    277 
    278 	default:
    279 		mii->mii_media_active |= IFM_NONE;
    280 		mii->mii_media_status = 0;
    281 		return;
    282 	}
    283 
    284 	if (esr & IHPHY_ESR_DUPLEX)
    285 		mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
    286 	else
    287 		mii->mii_media_active |= IFM_HDX;
    288 }
    289 
    290 static void
    291 ihphy_reset(struct mii_softc *sc)
    292 {
    293 	int i;
    294 	uint16_t reg;
    295 
    296 	KASSERT(mii_locked(sc->mii_pdata));
    297 
    298 	PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_ISO);
    299 
    300 	/* Wait another 100ms for it to complete. */
    301 	for (i = 0; i < 100; i++) {
    302 		PHY_READ(sc, MII_BMCR, &reg);
    303 		if ((reg & BMCR_RESET) == 0)
    304 			break;
    305 		delay(1000);
    306 	}
    307 
    308 	if (sc->mii_inst != 0)
    309 		PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
    310 }
    311