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ihphy.c revision 1.8
      1 /*	$NetBSD: ihphy.c,v 1.8 2014/06/16 16:48:16 msaitoh Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center, and by Frank van der Linden.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30  * POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * Copyright (c) 1997 Manuel Bouyer.  All rights reserved.
     35  *
     36  * Redistribution and use in source and binary forms, with or without
     37  * modification, are permitted provided that the following conditions
     38  * are met:
     39  * 1. Redistributions of source code must retain the above copyright
     40  *    notice, this list of conditions and the following disclaimer.
     41  * 2. Redistributions in binary form must reproduce the above copyright
     42  *    notice, this list of conditions and the following disclaimer in the
     43  *    documentation and/or other materials provided with the distribution.
     44  *
     45  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     46  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     47  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     48  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     49  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     50  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     51  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     52  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     53  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     54  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     55  */
     56 
     57 /*
     58  * Driver for Intel's 82577 (Hanksville) Ethernet 10/100/1000 PHY
     59  * Data Sheet: http://download.intel.com/design/network/datashts/319439.pdf
     60  */
     61 
     62 #include <sys/cdefs.h>
     63 __KERNEL_RCSID(0, "$NetBSD: ihphy.c,v 1.8 2014/06/16 16:48:16 msaitoh Exp $");
     64 
     65 #include <sys/param.h>
     66 #include <sys/systm.h>
     67 #include <sys/kernel.h>
     68 #include <sys/device.h>
     69 #include <sys/socket.h>
     70 #include <sys/errno.h>
     71 
     72 #include <net/if.h>
     73 #include <net/if_media.h>
     74 
     75 #include <dev/mii/mii.h>
     76 #include <dev/mii/miivar.h>
     77 #include <dev/mii/miidevs.h>
     78 
     79 #include <dev/mii/ihphyreg.h>
     80 
     81 static int	ihphymatch(device_t, cfdata_t, void *);
     82 static void	ihphyattach(device_t, device_t, void *);
     83 
     84 CFATTACH_DECL3_NEW(ihphy, sizeof(struct mii_softc),
     85     ihphymatch, ihphyattach, mii_phy_detach, mii_phy_activate, NULL, NULL,
     86     DVF_DETACH_SHUTDOWN);
     87 
     88 static int	ihphy_service(struct mii_softc *, struct mii_data *, int);
     89 static void	ihphy_status(struct mii_softc *);
     90 static void	ihphy_reset(struct mii_softc *);
     91 
     92 static const struct mii_phy_funcs ihphy_funcs = {
     93 	ihphy_service, ihphy_status, ihphy_reset,
     94 };
     95 
     96 static const struct mii_phydesc ihphys[] = {
     97 	{ MII_OUI_INTEL,		MII_MODEL_INTEL_I82577,
     98 	  MII_STR_INTEL_I82577 },
     99 	{ MII_OUI_INTEL,		MII_MODEL_INTEL_I82579,
    100 	  MII_STR_INTEL_I82579 },
    101 	{ MII_OUI_INTEL,		MII_MODEL_INTEL_I217,
    102 	  MII_STR_INTEL_I217 },
    103 
    104 	{ 0,				0,
    105 	  NULL },
    106 };
    107 
    108 static int
    109 ihphymatch(device_t parent, cfdata_t match, void *aux)
    110 {
    111 	struct mii_attach_args *ma = aux;
    112 
    113 	if (mii_phy_match(ma, ihphys) != NULL)
    114 		return 10;
    115 
    116 	return 0;
    117 }
    118 
    119 static void
    120 ihphyattach(device_t parent, device_t self, void *aux)
    121 {
    122 	struct mii_softc *sc = device_private(self);
    123 	struct mii_attach_args *ma = aux;
    124 	struct mii_data *mii = ma->mii_data;
    125 	const struct mii_phydesc *mpd;
    126 	int reg;
    127 
    128 	mpd = mii_phy_match(ma, ihphys);
    129 	aprint_naive(": Media interface\n");
    130 	aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
    131 
    132 	sc->mii_dev = self;
    133 	sc->mii_inst = mii->mii_instance;
    134 	sc->mii_phy = ma->mii_phyno;
    135 	sc->mii_funcs = &ihphy_funcs;
    136 	sc->mii_pdata = mii;
    137 	sc->mii_flags = ma->mii_flags;
    138 	sc->mii_anegticks = MII_ANEGTICKS;
    139 
    140 	PHY_RESET(sc);
    141 
    142 	sc->mii_capabilities =
    143 	    PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
    144 	if (sc->mii_capabilities & BMSR_EXTSTAT)
    145 		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
    146 	aprint_normal_dev(self, "");
    147 	if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 &&
    148 	    (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0)
    149 		aprint_error("no media present");
    150 	else
    151 		mii_phy_add_media(sc);
    152 	aprint_normal("\n");
    153 
    154 	/*
    155 	 * Link setup (as done by Intel's Linux driver for the 82577).
    156 	 */
    157 	reg = PHY_READ(sc, IHPHY_MII_CFG);
    158 	reg |= IHPHY_CFG_TX_CRS;
    159 	reg |= IHPHY_CFG_DOWN_SHIFT;
    160 	PHY_WRITE(sc, IHPHY_MII_CFG, reg);
    161 }
    162 
    163 static int
    164 ihphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
    165 {
    166 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
    167 	int reg;
    168 
    169 	switch (cmd) {
    170 	case MII_POLLSTAT:
    171 		/*
    172 		 * If we're not polling our PHY instance, just return.
    173 		 */
    174 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
    175 			return 0;
    176 		break;
    177 
    178 	case MII_MEDIACHG:
    179 		/*
    180 		 * If the media indicates a different PHY instance,
    181 		 * isolate ourselves.
    182 		 */
    183 		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
    184 			reg = PHY_READ(sc, MII_BMCR);
    185 			PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
    186 			return 0;
    187 		}
    188 
    189 		/*
    190 		 * If the interface is not up, don't do anything.
    191 		 */
    192 		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
    193 			break;
    194 
    195 		/*
    196 		 * If media is deselected, disable link (standby).
    197 		 */
    198 		reg = PHY_READ(sc, IHPHY_MII_ECR);
    199 		if (IFM_SUBTYPE(ife->ifm_media) == IFM_NONE)
    200 			reg &= ~IHPHY_ECR_LNK_EN;
    201 		else
    202 			reg |= IHPHY_ECR_LNK_EN;
    203 		PHY_WRITE(sc, IHPHY_MII_ECR, reg);
    204 
    205 		/*
    206 		 * XXX Adjust MDI/MDIX configuration?  Other settings?
    207 		 */
    208 
    209 		mii_phy_setmedia(sc);
    210 		break;
    211 
    212 	case MII_TICK:
    213 		/*
    214 		 * If we're not currently selected, just return.
    215 		 */
    216 		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
    217 			return 0;
    218 
    219 		if (mii_phy_tick(sc) == EJUSTRETURN)
    220 			return 0;
    221 		break;
    222 
    223 	case MII_DOWN:
    224 		mii_phy_down(sc);
    225 		PHY_WRITE(sc, MII_BMCR, BMCR_PDOWN);
    226 		return 0;
    227 	}
    228 
    229 	/* Update the media status. */
    230 	mii_phy_status(sc);
    231 
    232 	/* Callback if something changed. */
    233 	mii_phy_update(sc, cmd);
    234 	return 0;
    235 }
    236 
    237 static void
    238 ihphy_status(struct mii_softc *sc)
    239 {
    240 	struct mii_data *mii = sc->mii_pdata;
    241 	int esr, bmcr, gtsr;
    242 
    243 	mii->mii_media_status = IFM_AVALID;
    244 	mii->mii_media_active = IFM_ETHER;
    245 
    246 	esr = PHY_READ(sc, IHPHY_MII_ESR);
    247 
    248 	if (esr & IHPHY_ESR_LINK)
    249 		mii->mii_media_status |= IFM_ACTIVE;
    250 
    251 	bmcr = PHY_READ(sc, MII_BMCR);
    252 	if (bmcr & (BMCR_ISO | BMCR_PDOWN)) {
    253 		mii->mii_media_active |= IFM_NONE;
    254 		mii->mii_media_status = 0;
    255 		return;
    256 	}
    257 
    258 	if (bmcr & BMCR_LOOP)
    259 		mii->mii_media_active |= IFM_LOOP;
    260 
    261 	if (bmcr & BMCR_AUTOEN) {
    262 		if ((esr & IHPHY_ESR_ANEG_STAT) == 0) {
    263 			/* Erg, still trying, I guess... */
    264 			mii->mii_media_active |= IFM_NONE;
    265 			return;
    266 		}
    267 	}
    268 
    269 	switch (esr & IHPHY_ESR_SPEED) {
    270 	case IHPHY_SPEED_1000:
    271 		mii->mii_media_active |= IFM_1000_T;
    272 		gtsr = PHY_READ(sc, MII_100T2SR);
    273 		if (gtsr & GTSR_MS_RES)
    274 			mii->mii_media_active |= IFM_ETH_MASTER;
    275 		break;
    276 
    277 	case IHPHY_SPEED_100:
    278 		/* 100BASE-T2 and 100BASE-T4 are not supported. */
    279 		mii->mii_media_active |= IFM_100_TX;
    280 		break;
    281 
    282 	case IHPHY_SPEED_10:
    283 		mii->mii_media_active |= IFM_10_T;
    284 		break;
    285 
    286 	default:
    287 		mii->mii_media_active |= IFM_NONE;
    288 		mii->mii_media_status = 0;
    289 		return;
    290 	}
    291 
    292 	if (esr & IHPHY_ESR_DUPLEX)
    293 		mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
    294 	else
    295 		mii->mii_media_active |= IFM_HDX;
    296 }
    297 
    298 static void
    299 ihphy_reset(struct mii_softc *sc)
    300 {
    301 	int reg, i;
    302 
    303 	PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_ISO);
    304 
    305 	/*
    306 	 * Regarding reset, the data sheet specifies (page 55):
    307 	 *
    308 	 * "After PHY reset, a delay of 10 ms is required before
    309 	 *  any register access using MDIO."
    310 	 */
    311 	delay(10000);
    312 
    313 	/* Wait another 100ms for it to complete. */
    314 	for (i = 0; i < 100; i++) {
    315 		reg = PHY_READ(sc, MII_BMCR);
    316 		if ((reg & BMCR_RESET) == 0)
    317 			break;
    318 		delay(1000);
    319 	}
    320 
    321 	if (sc->mii_inst != 0)
    322 		PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
    323 }
    324