inbmphyreg.h revision 1.1.2.2 1 1.1.2.2 sborrill /* $NetBSD: inbmphyreg.h,v 1.1.2.2 2010/01/27 22:27:41 sborrill Exp $ */
2 1.1.2.2 sborrill /*******************************************************************************
3 1.1.2.2 sborrill Copyright (c) 2001-2005, Intel Corporation
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5 1.1.2.2 sborrill
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8 1.1.2.2 sborrill
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10 1.1.2.2 sborrill this list of conditions and the following disclaimer.
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31 1.1.2.2 sborrill *******************************************************************************/
32 1.1.2.2 sborrill
33 1.1.2.2 sborrill /*
34 1.1.2.2 sborrill * Copied from the Intel code, and then modified to match NetBSD
35 1.1.2.2 sborrill * style for MII registers more.
36 1.1.2.2 sborrill */
37 1.1.2.2 sborrill
38 1.1.2.2 sborrill #ifndef _DEV_MII_INBMPHYREG_H_
39 1.1.2.2 sborrill #define _DEV_MII_INBMPHYREG_H_
40 1.1.2.2 sborrill
41 1.1.2.2 sborrill /* Bits...
42 1.1.2.2 sborrill * 15-5: page
43 1.1.2.2 sborrill * 4-0: register offset
44 1.1.2.2 sborrill */
45 1.1.2.2 sborrill #define BME1000_PAGE_SHIFT 5
46 1.1.2.2 sborrill #define BME1000_REG(page, reg) \
47 1.1.2.2 sborrill (((page) << BME1000_PAGE_SHIFT) | ((reg) & BME1000_MAX_REG_ADDRESS))
48 1.1.2.2 sborrill
49 1.1.2.2 sborrill #define BME1000_MAX_REG_ADDRESS 0x1f /* 5 bit address bus (0-0x1f) */
50 1.1.2.2 sborrill #define BME1000_MAX_MULTI_PAGE_REG 0xf /* Registers equal on all pages */
51 1.1.2.2 sborrill
52 1.1.2.2 sborrill #define BM_PHY_REG_PAGE(offset) \
53 1.1.2.2 sborrill ((uint16_t)(((offset) >> BME1000_PAGE_SHIFT) & 0xffff))
54 1.1.2.2 sborrill #define BM_PHY_REG_NUM(offset) \
55 1.1.2.2 sborrill ((uint16_t)((offset) & BME1000_MAX_REG_ADDRESS) \
56 1.1.2.2 sborrill | (((offset) >> (21 - BME1000_PAGE_SHIFT)) & ~BME1000_MAX_REG_ADDRESS))
57 1.1.2.2 sborrill
58 1.1.2.2 sborrill /* BME1000 Specific Registers */
59 1.1.2.2 sborrill #define BME1000_PHY_SPEC_CTRL BME1000_REG(0, 16) /* PHY Specific Control */
60 1.1.2.2 sborrill #define BME1000_PSCR_DISABLE_JABBER 0x0001 /* 1=Disable Jabber */
61 1.1.2.2 sborrill #define BME1000_PSCR_POLARITY_REVERSAL_DISABLE 0x0002 /* 1=Polarity Reversal Disabled */
62 1.1.2.2 sborrill #define BME1000_PSCR_POWER_DOWN 0x0004 /* 1=Power Down */
63 1.1.2.2 sborrill #define BME1000_PSCR_COPPER_TRANSMITER_DISABLE 0x0008 /* 1=Transmitter Disabled */
64 1.1.2.2 sborrill #define BME1000_PSCR_CROSSOVER_MODE_MASK 0x0060
65 1.1.2.2 sborrill #define BME1000_PSCR_CROSSOVER_MODE_MDI 0x0000 /* 00=Manual MDI configuration */
66 1.1.2.2 sborrill #define BME1000_PSCR_CROSSOVER_MODE_MDIX 0x0020 /* 01=Manual MDIX configuration */
67 1.1.2.2 sborrill #define BME1000_PSCR_CROSSOVER_MODE_AUTO 0x0060 /* 11=Automatic crossover */
68 1.1.2.2 sborrill #define BME1000_PSCR_ENALBE_EXTENDED_DISTANCE 0x0080 /* 1=Enable Extended Distance */
69 1.1.2.2 sborrill #define BME1000_PSCR_ENERGY_DETECT_MASK 0x0300
70 1.1.2.2 sborrill #define BME1000_PSCR_ENERGY_DETECT_OFF 0x0000 /* 00,01=Off */
71 1.1.2.2 sborrill #define BME1000_PSCR_ENERGY_DETECT_RX 0x0200 /* 10=Sense on Rx only (Energy Detect) */
72 1.1.2.2 sborrill #define BME1000_PSCR_ENERGY_DETECT_RX_TM 0x0300 /* 11=Sense and Tx NLP */
73 1.1.2.2 sborrill #define BME1000_PSCR_FORCE_LINK_GOOD 0x0400 /* 1=Force Link Good */
74 1.1.2.2 sborrill #define BME1000_PSCR_DOWNSHIFT_ENABLE 0x0800 /* 1=Enable Downshift */
75 1.1.2.2 sborrill #define BME1000_PSCR_DOWNSHIFT_COUNTER_MASK 0x7000
76 1.1.2.2 sborrill #define BME1000_PSCR_DOWNSHIFT_COUNTER_SHIFT 12
77 1.1.2.2 sborrill
78 1.1.2.2 sborrill #define BME1000_PHY_PAGE_SELECT BME1000_REG(0, 22) /* Page Select */
79 1.1.2.2 sborrill
80 1.1.2.2 sborrill #define BME1000_BIAS_SETTING 29
81 1.1.2.2 sborrill #define BME1000_BIAS_SETTING2 30
82 1.1.2.2 sborrill
83 1.1.2.2 sborrill #define I82578_ADDR_REG 29
84 1.1.2.2 sborrill #define I82577_ADDR_REG 16
85 1.1.2.2 sborrill #define I82577_CFG_REG 22
86 1.1.2.2 sborrill
87 1.1.2.2 sborrill #define HV_OEM_BITS BME1000_REG(0, 25)
88 1.1.2.2 sborrill #define HV_OEM_BITS_LPLU (1 << 2)
89 1.1.2.2 sborrill #define HV_OEM_BITS_A1KDIS (1 << 6)
90 1.1.2.2 sborrill #define HV_OEM_BITS_ANEGNOW (1 << 10)
91 1.1.2.2 sborrill
92 1.1.2.2 sborrill #define HV_INTC_FC_PAGE_START 768
93 1.1.2.2 sborrill #define BM_PORT_CTRL_PAGE 769
94 1.1.2.2 sborrill
95 1.1.2.2 sborrill #define IGP3_KMRN_DIAG BME1000_REG(770, 19)
96 1.1.2.2 sborrill
97 1.1.2.2 sborrill #define HV_MUX_DATA_CTRL BME1000_REG(776, 16)
98 1.1.2.2 sborrill #define HV_MUX_DATA_CTRL_FORCE_SPEED (1 << 2)
99 1.1.2.2 sborrill #define HV_MUX_DATA_CTRL_GEN_TO_MAC (1 << 10)
100 1.1.2.2 sborrill
101 1.1.2.2 sborrill #define BM_WUC_PAGE 800
102 1.1.2.2 sborrill #define BM_WUC BME1000_REG(BM_WUC_PAGE, 1)
103 1.1.2.2 sborrill #define BM_WUC_ADDRESS_OPCODE 0x11
104 1.1.2.2 sborrill #define BM_WUC_DATA_OPCODE 0x12
105 1.1.2.2 sborrill #define BM_WUC_ENABLE_PAGE BM_PORT_CTRL_PAGE
106 1.1.2.2 sborrill #define BM_WUC_ENABLE_REG 17
107 1.1.2.2 sborrill #define BM_WUC_ENABLE_BIT (1 << 2)
108 1.1.2.2 sborrill #define BM_WUC_HOST_WU_BIT (1 << 4)
109 1.1.2.2 sborrill
110 1.1.2.2 sborrill #endif /* _DEV_MII_INBMPHYREG_H_ */
111