lxtphy.c revision 1.4 1 /* $NetBSD: lxtphy.c,v 1.4 1998/11/04 23:07:15 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Copyright (c) 1997 Manuel Bouyer. All rights reserved.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by Manuel Bouyer.
54 * 4. The name of the author may not be used to endorse or promote products
55 * derived from this software without specific prior written permission.
56 *
57 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
61 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
62 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
63 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
64 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
65 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
66 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 */
68
69 /*
70 * driver for Level One's LXT-970 ethernet 10/100 PHY
71 * datasheet from www.level1.com
72 */
73
74 #include <sys/param.h>
75 #include <sys/systm.h>
76 #include <sys/kernel.h>
77 #include <sys/device.h>
78 #include <sys/malloc.h>
79 #include <sys/socket.h>
80
81 #include <net/if.h>
82 #include <net/if_media.h>
83
84 #include <dev/mii/mii.h>
85 #include <dev/mii/miivar.h>
86 #include <dev/mii/miidevs.h>
87
88 #include <dev/mii/lxtphyreg.h>
89
90 struct lxtphy_softc {
91 struct mii_softc sc_mii; /* generic PHY */
92 int sc_ticks;
93 int sc_active;
94 };
95
96 int lxtphymatch __P((struct device *, struct cfdata *, void *));
97 void lxtphyattach __P((struct device *, struct device *, void *));
98
99 struct cfattach lxtphy_ca = {
100 sizeof(struct lxtphy_softc), lxtphymatch, lxtphyattach
101 };
102
103 int lxtphy_service __P((struct mii_softc *, struct mii_data *, int));
104 void lxtphy_reset __P((struct lxtphy_softc *));
105 void lxtphy_status __P((struct lxtphy_softc *));
106
107 int
108 lxtphymatch(parent, match, aux)
109 struct device *parent;
110 struct cfdata *match;
111 void *aux;
112 {
113 struct mii_attach_args *ma = aux;
114
115 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_LEVEL1 &&
116 MII_MODEL(ma->mii_id2) == MII_MODEL_LEVEL1_LXT970)
117 return (1);
118
119 return (0);
120 }
121
122 void
123 lxtphyattach(parent, self, aux)
124 struct device *parent, *self;
125 void *aux;
126 {
127 struct lxtphy_softc *sc = (struct lxtphy_softc *)self;
128 struct mii_attach_args *ma = aux;
129 struct mii_data *mii = ma->mii_data;
130
131 printf(": %s, rev. %d\n", MII_STR_LEVEL1_LXT970,
132 MII_REV(ma->mii_id2));
133
134 sc->sc_mii.mii_inst = mii->mii_instance;
135 sc->sc_mii.mii_phy = ma->mii_phyno;
136 sc->sc_mii.mii_service = lxtphy_service;
137 sc->sc_mii.mii_pdata = mii;
138
139 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
140
141 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->sc_mii.mii_inst),
142 BMCR_ISO);
143 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->sc_mii.mii_inst),
144 BMCR_LOOP|BMCR_S100);
145
146 lxtphy_reset(sc);
147
148 sc->sc_mii.mii_capabilities =
149 PHY_READ(&sc->sc_mii, MII_BMSR) & ma->mii_capmask;
150 printf("%s: ", sc->sc_mii.mii_dev.dv_xname);
151 if ((sc->sc_mii.mii_capabilities & BMSR_MEDIAMASK) == 0)
152 printf("no media present");
153 else
154 mii_add_media(mii, sc->sc_mii.mii_capabilities,
155 sc->sc_mii.mii_inst);
156 printf("\n");
157 #undef ADD
158 }
159
160 int
161 lxtphy_service(self, mii, cmd)
162 struct mii_softc *self;
163 struct mii_data *mii;
164 int cmd;
165 {
166 struct lxtphy_softc *sc = (struct lxtphy_softc *)self;
167 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
168 int reg;
169
170 switch (cmd) {
171 case MII_POLLSTAT:
172 /*
173 * If we're not polling our PHY instance, just return.
174 */
175 if (IFM_INST(ife->ifm_media) != sc->sc_mii.mii_inst)
176 return (0);
177 break;
178
179 case MII_MEDIACHG:
180 /*
181 * If the media indicates a different PHY instance,
182 * isolate ourselves.
183 */
184 if (IFM_INST(ife->ifm_media) != sc->sc_mii.mii_inst) {
185 reg = PHY_READ(&sc->sc_mii, MII_BMCR);
186 PHY_WRITE(&sc->sc_mii, MII_BMCR, reg | BMCR_ISO);
187 return (0);
188 }
189
190 /*
191 * If the interface is not up, don't do anything.
192 */
193 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
194 break;
195
196 switch (IFM_SUBTYPE(ife->ifm_media)) {
197 case IFM_AUTO:
198 /*
199 * If we're already in auto mode, just return.
200 */
201 if (PHY_READ(&sc->sc_mii, MII_BMCR) & BMCR_AUTOEN)
202 return (0);
203 (void) mii_phy_auto(&sc->sc_mii);
204 break;
205 case IFM_100_T4:
206 /*
207 * XXX Not supported as a manual setting right now.
208 */
209 return (EINVAL);
210 default:
211 /*
212 * BMCR data is stored in the ifmedia entry.
213 */
214 PHY_WRITE(&sc->sc_mii, MII_ANAR,
215 mii_anar(ife->ifm_media));
216 PHY_WRITE(&sc->sc_mii, MII_BMCR, ife->ifm_data);
217 }
218 break;
219
220 case MII_TICK:
221 /*
222 * If we're not currently selected, just return.
223 */
224 if (IFM_INST(ife->ifm_media) != sc->sc_mii.mii_inst)
225 return (0);
226
227 /*
228 * Only used for autonegotiation.
229 */
230 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
231 return (0);
232
233 /*
234 * Is the interface even up?
235 */
236 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
237 return (0);
238
239 /*
240 * Check to see if we have link. If we do, we don't
241 * need to restart the autonegotiation process. Use
242 * the LXT CSR instead of the BMSR, since the CSR's
243 * link indication is dynamic, not latched, so only
244 * one register read is required.
245 */
246 reg = PHY_READ(&sc->sc_mii, MII_LXTPHY_CSR);
247 if (reg & CSR_LINK)
248 return (0);
249
250 /*
251 * Only retry autonegotiation every 5 seconds.
252 */
253 if (++sc->sc_ticks != 5)
254 return (0);
255
256 sc->sc_ticks = 0;
257 lxtphy_reset(sc);
258 (void) mii_phy_auto(&sc->sc_mii);
259 break;
260 }
261
262 /* Update the media status. */
263 lxtphy_status(sc);
264
265 /* Callback if something changed. */
266 if (sc->sc_active != mii->mii_media_active || cmd == MII_MEDIACHG) {
267 (*mii->mii_statchg)(sc->sc_mii.mii_dev.dv_parent);
268 sc->sc_active = mii->mii_media_active;
269 }
270 return (0);
271 }
272
273 void
274 lxtphy_status(sc)
275 struct lxtphy_softc *sc;
276 {
277 struct mii_data *mii = sc->sc_mii.mii_pdata;
278 int bmcr, csr;
279
280 mii->mii_media_status = IFM_AVALID;
281 mii->mii_media_active = IFM_ETHER;
282
283 /*
284 * Get link status from the CSR; we need to read the CSR
285 * for media type anyhow, and the link status in the CSR
286 * doens't latch, so fewer register reads are required.
287 */
288 csr = PHY_READ(&sc->sc_mii, MII_LXTPHY_CSR);
289 if (csr & CSR_LINK)
290 mii->mii_media_status |= IFM_ACTIVE;
291
292 bmcr = PHY_READ(&sc->sc_mii, MII_BMCR);
293 if (bmcr & BMCR_ISO) {
294 mii->mii_media_active |= IFM_NONE;
295 mii->mii_media_status = 0;
296 return;
297 }
298
299 if (bmcr & BMCR_LOOP)
300 mii->mii_media_active |= IFM_LOOP;
301
302 if ((bmcr & BMCR_AUTOEN) && (csr & CSR_ACOMP) == 0) {
303 /* Erg, still trying, I guess... */
304 mii->mii_media_active |= IFM_NONE;
305 return;
306 }
307
308 if (csr & CSR_SPEED)
309 mii->mii_media_active |= IFM_100_TX;
310 else
311 mii->mii_media_active |= IFM_10_T;
312 if (csr & CSR_DUPLEX)
313 mii->mii_media_active |= IFM_FDX;
314 }
315
316 void
317 lxtphy_reset(sc)
318 struct lxtphy_softc *sc;
319 {
320 int reg, i;
321
322 PHY_WRITE(&sc->sc_mii, MII_BMCR, BMCR_RESET|BMCR_ISO);
323
324 /* Wait 100ms for it to complete. */
325 for (i = 0; i < 100; i++) {
326 reg = PHY_READ(&sc->sc_mii, MII_BMCR);
327 if ((reg & BMCR_RESET) == 0)
328 break;
329 delay(1000);
330 }
331
332 /* Make sure the PHY is isolated. */
333 if (sc->sc_mii.mii_inst != 0)
334 PHY_WRITE(&sc->sc_mii, MII_BMCR, reg | BMCR_ISO);
335 }
336