mcommphy.c revision 1.1 1 /* $NetBSD: mcommphy.c,v 1.1 2022/01/03 17:18:12 jmcneill Exp $ */
2
3 /*
4 * Copyright (c) 2022 Jared McNeill <jmcneill (at) invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 /*
30 * Motorcomm YT8511C / YT8511H Integrated 10/100/1000 Gigabit Ethernet
31 * Transceiver.
32 */
33
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: mcommphy.c,v 1.1 2022/01/03 17:18:12 jmcneill Exp $");
36
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/kernel.h>
40 #include <sys/device.h>
41 #include <sys/socket.h>
42 #include <sys/errno.h>
43
44 #include <net/if.h>
45 #include <net/if_media.h>
46
47 #include <dev/mii/mii.h>
48 #include <dev/mii/miivar.h>
49 #include <dev/mii/miidevs.h>
50
51 #define MCOMMPHY_OUI 0x000000
52 #define MCOMMPHY_MODEL 0x10
53 #define MCOMMPHY_REV 0x0a
54
55 #define EXT_REG_ADDR 0x1e
56 #define EXT_REG_DATA 0x1f
57
58 /* Extended registers */
59 #define PHY_CLOCK_GATING_REG 0x0c
60 #define TX_CLK_DELAY_SEL __BITS(7,4)
61 #define CLK_25M_SEL __BITS(2,1)
62 #define CLK_25M_SEL_125M 3
63 #define RX_CLK_DELAY_EN __BIT(0)
64 #define PHY_SLEEP_CONTROL1_REG 0x27
65 #define PLLON_IN_SLP __BIT(14)
66
67 static int mcommphymatch(device_t, cfdata_t, void *);
68 static void mcommphyattach(device_t, device_t, void *);
69
70 CFATTACH_DECL_NEW(mcommphy, sizeof(struct mii_softc),
71 mcommphymatch, mcommphyattach, mii_phy_detach, mii_phy_activate);
72
73 static int mcommphy_service(struct mii_softc *, struct mii_data *, int);
74
75 static const struct mii_phy_funcs mcommphy_funcs = {
76 mcommphy_service, ukphy_status, mii_phy_reset,
77 };
78
79 static int
80 mcommphymatch(device_t parent, cfdata_t match, void *aux)
81 {
82 struct mii_attach_args *ma = aux;
83
84 /*
85 * The YT8511C reports an OUI of 0. Best we can do here is to match
86 * exactly the contents of the PHY identification registers.
87 */
88 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MCOMMPHY_OUI &&
89 MII_MODEL(ma->mii_id2) == MCOMMPHY_MODEL &&
90 MII_REV(ma->mii_id2) == MCOMMPHY_REV) {
91 return 10;
92 }
93
94 return 0;
95 }
96
97 static void
98 mcommphyattach(device_t parent, device_t self, void *aux)
99 {
100 struct mii_softc *sc = device_private(self);
101 struct mii_attach_args *ma = aux;
102 struct mii_data *mii = ma->mii_data;
103 uint16_t oldaddr, data;
104
105 aprint_normal(": Motorcomm YT8511 GbE PHY\n");
106 aprint_naive(": Media interface\n");
107
108 sc->mii_dev = self;
109 sc->mii_inst = mii->mii_instance;
110 sc->mii_phy = ma->mii_phyno;
111 sc->mii_mpd_oui = MII_OUI(ma->mii_id1, ma->mii_id2);
112 sc->mii_mpd_model = MII_MODEL(ma->mii_id2);
113 sc->mii_mpd_rev = MII_REV(ma->mii_id2);
114 sc->mii_funcs = &mcommphy_funcs;
115 sc->mii_pdata = mii;
116 sc->mii_flags = ma->mii_flags;
117
118 mii_lock(mii);
119
120 PHY_RESET(sc);
121
122 PHY_READ(sc, EXT_REG_ADDR, &oldaddr);
123
124 PHY_WRITE(sc, EXT_REG_ADDR, PHY_CLOCK_GATING_REG);
125 PHY_READ(sc, EXT_REG_DATA, &data);
126 data &= ~CLK_25M_SEL;
127 data |= __SHIFTIN(CLK_25M_SEL_125M, CLK_25M_SEL);
128 if (ISSET(sc->mii_flags, MIIF_RXID)) {
129 data |= RX_CLK_DELAY_EN;
130 } else {
131 data &= ~RX_CLK_DELAY_EN;
132 }
133 data &= ~TX_CLK_DELAY_SEL;
134 if (ISSET(sc->mii_flags, MIIF_TXID)) {
135 data |= __SHIFTIN(0xf, TX_CLK_DELAY_SEL);
136 } else {
137 data |= __SHIFTIN(0x2, TX_CLK_DELAY_SEL);
138 }
139 PHY_WRITE(sc, EXT_REG_DATA, data);
140
141 PHY_WRITE(sc, EXT_REG_ADDR, PHY_SLEEP_CONTROL1_REG);
142 PHY_READ(sc, EXT_REG_DATA, &data);
143 data |= PLLON_IN_SLP;
144 PHY_WRITE(sc, EXT_REG_DATA, data);
145
146 PHY_WRITE(sc, EXT_REG_ADDR, oldaddr);
147
148 PHY_READ(sc, MII_BMSR, &sc->mii_capabilities);
149 sc->mii_capabilities &= ma->mii_capmask;
150 if (sc->mii_capabilities & BMSR_EXTSTAT)
151 PHY_READ(sc, MII_EXTSR, &sc->mii_extcapabilities);
152
153 mii_unlock(mii);
154
155 mii_phy_add_media(sc);
156 }
157
158 static int
159 mcommphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
160 {
161 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
162
163 KASSERT(mii_locked(mii));
164
165 switch (cmd) {
166 case MII_POLLSTAT:
167 /* If we're not polling our PHY instance, just return. */
168 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
169 return 0;
170 break;
171
172 case MII_MEDIACHG:
173 /* If the interface is not up, don't do anything. */
174 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
175 break;
176
177 mii_phy_setmedia(sc);
178 break;
179
180 case MII_TICK:
181 /* If we're not currently selected, just return. */
182 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
183 return 0;
184
185 if (mii_phy_tick(sc) == EJUSTRETURN)
186 return 0;
187 break;
188
189 case MII_DOWN:
190 mii_phy_down(sc);
191 return 0;
192 }
193
194 /* Update the media status. */
195 mii_phy_status(sc);
196
197 /* Callback if something changed. */
198 mii_phy_update(sc, cmd);
199 return 0;
200 }
201