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mii.h revision 1.5
      1 /*	$NetBSD: mii.h,v 1.5 2001/04/30 19:21:03 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1997 Manuel Bouyer.  All rights reserved.
      5  *
      6  * Modification to match BSD/OS 3.0 MII interface by Jason R. Thorpe,
      7  * Numerical Aerospace Simulation Facility, NASA Ames Research Center.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed by Manuel Bouyer.
     20  * 4. The name of the author may not be used to endorse or promote products
     21  *    derived from this software without specific prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     26  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     28  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     32  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     33  */
     34 
     35 #ifndef _DEV_MII_MII_H_
     36 #define	_DEV_MII_MII_H_
     37 
     38 /*
     39  * Registers common to all PHYs.
     40  */
     41 
     42 #define	MII_NPHY	32	/* max # of PHYs per MII */
     43 
     44 /*
     45  * MII commands, used if a device must drive the MII lines
     46  * manually.
     47  */
     48 #define	MII_COMMAND_START	0x01
     49 #define	MII_COMMAND_READ	0x02
     50 #define	MII_COMMAND_WRITE	0x01
     51 #define	MII_COMMAND_ACK		0x02
     52 
     53 #define	MII_BMCR	0x00 	/* Basic mode control register (rw) */
     54 #define	BMCR_RESET	0x8000	/* reset */
     55 #define	BMCR_LOOP	0x4000	/* loopback */
     56 #define	BMCR_SPEED0	0x2000	/* speed selection (LSB) */
     57 #define	BMCR_AUTOEN	0x1000	/* autonegotiation enable */
     58 #define	BMCR_PDOWN	0x0800	/* power down */
     59 #define	BMCR_ISO	0x0400	/* isolate */
     60 #define	BMCR_STARTNEG	0x0200	/* restart autonegotiation */
     61 #define	BMCR_FDX	0x0100	/* Set duplex mode */
     62 #define	BMCR_CTEST	0x0080	/* collision test */
     63 #define	BMCR_SPEED1	0x0040	/* speed selection (MSB) */
     64 
     65 #define	BMCR_S10	0x0000		/* 10 Mb/s */
     66 #define	BMCR_S100	BMCR_SPEED0	/* 100 Mb/s */
     67 #define	BMCR_S1000	BMCR_SPEED1	/* 1000 Mb/s */
     68 
     69 #define	BMCR_SPEED(x)	((x) & (BMCR_SPEED0|BMCR_SPEED1))
     70 
     71 #define	MII_BMSR	0x01	/* Basic mode status register (ro) */
     72 #define	BMSR_100T4	0x8000	/* 100 base T4 capable */
     73 #define	BMSR_100TXFDX	0x4000	/* 100 base Tx full duplex capable */
     74 #define	BMSR_100TXHDX	0x2000	/* 100 base Tx half duplex capable */
     75 #define	BMSR_10TFDX	0x1000	/* 10 base T full duplex capable */
     76 #define	BMSR_10THDX	0x0800	/* 10 base T half duplex capable */
     77 #define	BMSR_100T2FDX	0x0400	/* 100 base T2 full duplex capable */
     78 #define	BMSR_100T2HDX	0x0200	/* 100 base T2 half duplex capable */
     79 #define	BMSR_EXTSTAT	0x0100	/* Extended status */
     80 #define	BMSR_MFPS	0x0040	/* MII Frame Preamble Suppression */
     81 #define	BMSR_ACOMP	0x0020	/* Autonegotiation complete */
     82 #define	BMSR_RFAULT	0x0010	/* Link partner fault */
     83 #define	BMSR_ANEG	0x0008	/* Autonegotiation capable */
     84 #define	BMSR_LINK	0x0004	/* Link status */
     85 #define	BMSR_JABBER	0x0002	/* Jabber detected */
     86 #define	BMSR_EXTCAP	0x0001	/* Extended capability */
     87 
     88 /*
     89  * Note that the EXTSTAT bit indicates that there is extended status
     90  * info available in register 15, but 802.3 section 22.2.4.3 also
     91  * states that that all 1000 Mb/s capable PHYs will set this bit to 1.
     92  */
     93 
     94 #define	BMSR_MEDIAMASK	(BMSR_100T4|BMSR_100TXFDX|BMSR_100TXHDX| \
     95 			 BMSR_10TFDX|BMSR_10THDX|BMSR_100T2FDX|BMSR_100T2HDX)
     96 
     97 /*
     98  * Convert BMSR media capabilities to ANAR bits for autonegotiation.
     99  * Note the shift chopps off the BMSR_ANEG bit.
    100  */
    101 #define	BMSR_MEDIA_TO_ANAR(x)	(((x) & BMSR_MEDIAMASK) >> 6)
    102 
    103 #define	MII_PHYIDR1	0x02	/* ID register 1 (ro) */
    104 
    105 #define	MII_PHYIDR2	0x03	/* ID register 2 (ro) */
    106 #define	IDR2_OUILSB	0xfc00	/* OUI LSB */
    107 #define	IDR2_MODEL	0x03f0	/* vendor model */
    108 #define	IDR2_REV	0x000f	/* vendor revision */
    109 
    110 #define	MII_ANAR	0x04	/* Autonegotiation advertisement (rw) */
    111 		/* section 28.2.4.1 and 37.2.6.1 */
    112 #define ANAR_NP		0x8000	/* Next page (ro) */
    113 #define	ANAR_ACK	0x4000	/* link partner abilities acknowledged (ro) */
    114 #define ANAR_RF		0x2000	/* remote fault (ro) */
    115 #define	ANAR_FC		0x0400	/* local device supports PAUSE */
    116 #define ANAR_T4		0x0200	/* local device supports 100bT4 */
    117 #define ANAR_TX_FD	0x0100	/* local device supports 100bTx FD */
    118 #define ANAR_TX		0x0080	/* local device supports 100bTx */
    119 #define ANAR_10_FD	0x0040	/* local device supports 10bT FD */
    120 #define ANAR_10		0x0020	/* local device supports 10bT */
    121 #define	ANAR_CSMA	0x0001	/* protocol selector CSMA/CD */
    122 
    123 #define	MII_ANLPAR	0x05	/* Autonegotiation lnk partner abilities (rw) */
    124 		/* section 28.2.4.1 and 37.2.6.1 */
    125 #define ANLPAR_NP	0x8000	/* Next page (ro) */
    126 #define	ANLPAR_ACK	0x4000	/* link partner accepted ACK (ro) */
    127 #define ANLPAR_RF	0x2000	/* remote fault (ro) */
    128 #define	ANLPAR_FC	0x0400	/* link partner supports PAUSE */
    129 #define ANLPAR_T4	0x0200	/* link partner supports 100bT4 */
    130 #define ANLPAR_TX_FD	0x0100	/* link partner supports 100bTx FD */
    131 #define ANLPAR_TX	0x0080	/* link partner supports 100bTx */
    132 #define ANLPAR_10_FD	0x0040	/* link partner supports 10bT FD */
    133 #define ANLPAR_10	0x0020	/* link partner supports 10bT */
    134 #define	ANLPAR_CSMA	0x0001	/* protocol selector CSMA/CD */
    135 
    136 #define	MII_ANER	0x06	/* Autonegotiation expansion (ro) */
    137 		/* section 28.2.4.1 and 37.2.6.1 */
    138 #define ANER_MLF	0x0010	/* multiple link detection fault */
    139 #define ANER_LPNP	0x0008	/* link parter next page-able */
    140 #define ANER_NP		0x0004	/* next page-able */
    141 #define ANER_PAGE_RX	0x0002	/* Page received */
    142 #define ANER_LPAN	0x0001	/* link parter autoneg-able */
    143 
    144 #define	MII_ANNP	0x07	/* Autonegotiation next page */
    145 		/* section 28.2.4.1 and 37.2.6.1 */
    146 
    147 #define	MII_ANLPRNP	0x08	/* Autonegotiation link partner rx next page */
    148 		/* section 32.5.1 and 37.2.6.1 */
    149 
    150 #define	MII_100T2CR	0x09	/* 100base-T2 control register */
    151 
    152 #define	MII_100T2SR	0x0a	/* 100base-T2 status register */
    153 
    154 #define	MII_EXTSR	0x0f	/* Extended status register */
    155 #define	EXTSR_1000XFDX	0x8000	/* 1000X full-duplex capable */
    156 #define	EXTSR_1000XHDX	0x4000	/* 1000X half-duplex capable */
    157 #define	EXTSR_1000TFDX	0x2000	/* 1000T full-duplex capable */
    158 #define	EXTSR_1000THDX	0x1000	/* 1000T half-duplex capable */
    159 
    160 #endif /* _DEV_MII_MII_H_ */
    161