Home | History | Annotate | Line # | Download | only in mii
mii_physubr.c revision 1.40
      1 /*	$NetBSD: mii_physubr.c,v 1.40 2004/04/11 15:40:56 thorpej Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by the NetBSD
     22  *	Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * Subroutines common to all PHYs.
     42  */
     43 
     44 #include <sys/cdefs.h>
     45 __KERNEL_RCSID(0, "$NetBSD: mii_physubr.c,v 1.40 2004/04/11 15:40:56 thorpej Exp $");
     46 
     47 #include <sys/param.h>
     48 #include <sys/device.h>
     49 #include <sys/systm.h>
     50 #include <sys/kernel.h>
     51 #include <sys/socket.h>
     52 #include <sys/errno.h>
     53 #include <sys/proc.h>
     54 
     55 #include <net/if.h>
     56 #include <net/if_media.h>
     57 #include <net/route.h>
     58 
     59 #include <dev/mii/mii.h>
     60 #include <dev/mii/miivar.h>
     61 
     62 /*
     63  * Media to register setting conversion table.  Order matters.
     64  */
     65 const struct mii_media mii_media_table[MII_NMEDIA] = {
     66 	/* None */
     67 	{ BMCR_ISO,		ANAR_CSMA,
     68 	  0, },
     69 
     70 	/* 10baseT */
     71 	{ BMCR_S10,		ANAR_CSMA|ANAR_10,
     72 	  0, },
     73 
     74 	/* 10baseT-FDX */
     75 	{ BMCR_S10|BMCR_FDX,	ANAR_CSMA|ANAR_10_FD,
     76 	  0, },
     77 
     78 	/* 100baseT4 */
     79 	{ BMCR_S100,		ANAR_CSMA|ANAR_T4,
     80 	  0, },
     81 
     82 	/* 100baseTX */
     83 	{ BMCR_S100,		ANAR_CSMA|ANAR_TX,
     84 	  0, },
     85 
     86 	/* 100baseTX-FDX */
     87 	{ BMCR_S100|BMCR_FDX,	ANAR_CSMA|ANAR_TX_FD,
     88 	  0, },
     89 
     90 	/* 1000baseX */
     91 	{ BMCR_S1000,		ANAR_CSMA,
     92 	  0, },
     93 
     94 	/* 1000baseX-FDX */
     95 	{ BMCR_S1000|BMCR_FDX,	ANAR_CSMA,
     96 	  0, },
     97 
     98 	/* 1000baseT */
     99 	{ BMCR_S1000,		ANAR_CSMA,
    100 	  GTCR_ADV_1000THDX },
    101 
    102 	/* 1000baseT-FDX */
    103 	{ BMCR_S1000,		ANAR_CSMA,
    104 	  GTCR_ADV_1000TFDX },
    105 };
    106 
    107 void	mii_phy_auto_timeout(void *);
    108 
    109 void
    110 mii_phy_setmedia(struct mii_softc *sc)
    111 {
    112 	struct mii_data *mii = sc->mii_pdata;
    113 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
    114 	int bmcr, anar, gtcr;
    115 
    116 	if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) {
    117 		/* Force renegotiation if MIIF_DOPAUSE. */
    118 		if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 ||
    119 		    (sc->mii_flags & (MIIF_FORCEANEG|MIIF_DOPAUSE)))
    120 			(void) mii_phy_auto(sc, 1);
    121 		return;
    122 	}
    123 
    124 	/*
    125 	 * Table index is stored in the media entry.
    126 	 */
    127 
    128 #ifdef DIAGNOSTIC
    129 	if (ife->ifm_data < 0 || ife->ifm_data >= MII_NMEDIA)
    130 		panic("mii_phy_setmedia");
    131 #endif
    132 
    133 	anar = mii_media_table[ife->ifm_data].mm_anar;
    134 	bmcr = mii_media_table[ife->ifm_data].mm_bmcr;
    135 	gtcr = mii_media_table[ife->ifm_data].mm_gtcr;
    136 
    137 	if (mii->mii_media.ifm_media & IFM_ETH_MASTER) {
    138 		switch (IFM_SUBTYPE(ife->ifm_media)) {
    139 		case IFM_1000_T:
    140 			gtcr |= GTCR_MAN_MS|GTCR_ADV_MS;
    141 			break;
    142 
    143 		default:
    144 			panic("mii_phy_setmedia: MASTER on wrong media");
    145 		}
    146 	}
    147 
    148 	if (mii->mii_media.ifm_media & IFM_FLOW) {
    149 		if (sc->mii_flags & MIIF_IS_1000X)
    150 			anar |= ANAR_X_PAUSE_SYM | ANAR_X_PAUSE_ASYM;
    151 		else {
    152 			anar |= ANAR_FC;
    153 			/* XXX Only 1000BASE-T has PAUSE_ASYM? */
    154 			if ((sc->mii_flags & MIIF_HAVE_GTCR) &&
    155 			    (sc->mii_extcapabilities &
    156 			     (EXTSR_1000THDX|EXTSR_1000TFDX)))
    157 				anar |= ANAR_X_PAUSE_ASYM;
    158 		}
    159 	}
    160 
    161 	if (ife->ifm_media & IFM_LOOP)
    162 		bmcr |= BMCR_LOOP;
    163 
    164 	PHY_WRITE(sc, MII_ANAR, anar);
    165 	PHY_WRITE(sc, MII_BMCR, bmcr);
    166 	if (sc->mii_flags & MIIF_HAVE_GTCR)
    167 		PHY_WRITE(sc, MII_100T2CR, gtcr);
    168 }
    169 
    170 int
    171 mii_phy_auto(struct mii_softc *sc, int waitfor)
    172 {
    173 	int i;
    174 
    175 	if ((sc->mii_flags & MIIF_DOINGAUTO) == 0) {
    176 		/*
    177 		 * Check for 1000BASE-X.  Autonegotiation is a bit
    178 		 * different on such devices.
    179 		 */
    180 		if (sc->mii_flags & MIIF_IS_1000X) {
    181 			uint16_t anar = 0;
    182 
    183 			if (sc->mii_extcapabilities & EXTSR_1000XFDX)
    184 				anar |= ANAR_X_FD;
    185 			if (sc->mii_extcapabilities & EXTSR_1000XHDX)
    186 				anar |= ANAR_X_HD;
    187 
    188 			if (sc->mii_flags & MIIF_DOPAUSE) {
    189 				/* XXX Asymmetric vs. symmetric? */
    190 				anar |= ANLPAR_X_PAUSE_TOWARDS;
    191 			}
    192 
    193 			PHY_WRITE(sc, MII_ANAR, anar);
    194 		} else {
    195 			uint16_t anar;
    196 
    197 			anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) |
    198 			    ANAR_CSMA;
    199 			if (sc->mii_flags & MIIF_DOPAUSE) {
    200 				anar |= ANAR_FC;
    201 				/* XXX Only 1000BASE-T has PAUSE_ASYM? */
    202 				if ((sc->mii_flags & MIIF_HAVE_GTCR) &&
    203 				    (sc->mii_extcapabilities &
    204 				     (EXTSR_1000THDX|EXTSR_1000TFDX)))
    205 					anar |= ANAR_X_PAUSE_ASYM;
    206 			}
    207 			PHY_WRITE(sc, MII_ANAR, anar);
    208 			if (sc->mii_flags & MIIF_HAVE_GTCR) {
    209 				uint16_t gtcr = 0;
    210 
    211 				if (sc->mii_extcapabilities & EXTSR_1000TFDX)
    212 					gtcr |= GTCR_ADV_1000TFDX;
    213 				if (sc->mii_extcapabilities & EXTSR_1000THDX)
    214 					gtcr |= GTCR_ADV_1000THDX;
    215 
    216 				PHY_WRITE(sc, MII_100T2CR, gtcr);
    217 			}
    218 		}
    219 		PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
    220 	}
    221 
    222 	if (waitfor) {
    223 		/* Wait 500ms for it to complete. */
    224 		for (i = 0; i < 500; i++) {
    225 			if (PHY_READ(sc, MII_BMSR) & BMSR_ACOMP)
    226 				return (0);
    227 			delay(1000);
    228 		}
    229 
    230 		/*
    231 		 * Don't need to worry about clearing MIIF_DOINGAUTO.
    232 		 * If that's set, a timeout is pending, and it will
    233 		 * clear the flag.
    234 		 */
    235 		return (EIO);
    236 	}
    237 
    238 	/*
    239 	 * Just let it finish asynchronously.  This is for the benefit of
    240 	 * the tick handler driving autonegotiation.  Don't want 500ms
    241 	 * delays all the time while the system is running!
    242 	 */
    243 	if (sc->mii_flags & MIIF_AUTOTSLEEP) {
    244 		sc->mii_flags |= MIIF_DOINGAUTO;
    245 		tsleep(&sc->mii_flags, PZERO, "miiaut", hz >> 1);
    246 		mii_phy_auto_timeout(sc);
    247 	} else if ((sc->mii_flags & MIIF_DOINGAUTO) == 0) {
    248 		sc->mii_flags |= MIIF_DOINGAUTO;
    249 		callout_reset(&sc->mii_nway_ch, hz >> 1,
    250 		    mii_phy_auto_timeout, sc);
    251 	}
    252 	return (EJUSTRETURN);
    253 }
    254 
    255 void
    256 mii_phy_auto_timeout(void *arg)
    257 {
    258 	struct mii_softc *sc = arg;
    259 	int s;
    260 
    261 	if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
    262 		return;
    263 
    264 	s = splnet();
    265 	sc->mii_flags &= ~MIIF_DOINGAUTO;
    266 
    267 	/* Update the media status. */
    268 	(void) PHY_SERVICE(sc, sc->mii_pdata, MII_POLLSTAT);
    269 	splx(s);
    270 }
    271 
    272 int
    273 mii_phy_tick(struct mii_softc *sc)
    274 {
    275 	struct mii_data *mii = sc->mii_pdata;
    276 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
    277 	int reg;
    278 
    279 	/* Just bail now if the interface is down. */
    280 	if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
    281 		return (EJUSTRETURN);
    282 
    283 	/*
    284 	 * If we're not doing autonegotiation, we don't need to do
    285 	 * any extra work here.  However, we need to check the link
    286 	 * status so we can generate an announcement if the status
    287 	 * changes.
    288 	 */
    289 	if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
    290 		return (0);
    291 
    292 	/* Read the status register twice; BMSR_LINK is latch-low. */
    293 	reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
    294 	if (reg & BMSR_LINK) {
    295 		/*
    296 		 * See above.
    297 		 */
    298 		return (0);
    299 	}
    300 
    301 	/*
    302 	 * Only retry autonegotiation every N seconds.
    303 	 */
    304 	KASSERT(sc->mii_anegticks != 0);
    305 	if (++sc->mii_ticks != sc->mii_anegticks)
    306 		return (EJUSTRETURN);
    307 
    308 	sc->mii_ticks = 0;
    309 	PHY_RESET(sc);
    310 
    311 	if (mii_phy_auto(sc, 0) == EJUSTRETURN)
    312 		return (EJUSTRETURN);
    313 
    314 	/*
    315 	 * Might need to generate a status message if autonegotiation
    316 	 * failed.
    317 	 */
    318 	return (0);
    319 }
    320 
    321 void
    322 mii_phy_reset(struct mii_softc *sc)
    323 {
    324 	int reg, i;
    325 
    326 	if (sc->mii_flags & MIIF_NOISOLATE)
    327 		reg = BMCR_RESET;
    328 	else
    329 		reg = BMCR_RESET | BMCR_ISO;
    330 	PHY_WRITE(sc, MII_BMCR, reg);
    331 
    332 	/*
    333 	 * It is best to allow a little time for the reset to settle
    334 	 * in before we start polling the BMCR again.  Notably, the
    335 	 * DP83840A manual states that there should be a 500us delay
    336 	 * between asserting software reset and attempting MII serial
    337 	 * operations.  Also, a DP83815 can get into a bad state on
    338 	 * cable removal and reinsertion if we do not delay here.
    339 	 */
    340 	delay(500);
    341 
    342 	/* Wait another 100ms for it to complete. */
    343 	for (i = 0; i < 100; i++) {
    344 		reg = PHY_READ(sc, MII_BMCR);
    345 		if ((reg & BMCR_RESET) == 0)
    346 			break;
    347 		delay(1000);
    348 	}
    349 
    350 	if (sc->mii_inst != 0 && ((sc->mii_flags & MIIF_NOISOLATE) == 0))
    351 		PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
    352 }
    353 
    354 void
    355 mii_phy_down(struct mii_softc *sc)
    356 {
    357 
    358 	if (sc->mii_flags & MIIF_DOINGAUTO) {
    359 		sc->mii_flags &= ~MIIF_DOINGAUTO;
    360 		callout_stop(&sc->mii_nway_ch);
    361 	}
    362 }
    363 
    364 void
    365 mii_phy_status(struct mii_softc *sc)
    366 {
    367 
    368 	PHY_STATUS(sc);
    369 }
    370 
    371 void
    372 mii_phy_update(struct mii_softc *sc, int cmd)
    373 {
    374 	struct mii_data *mii = sc->mii_pdata;
    375 	int announce, s;
    376 
    377 	if (sc->mii_media_active != mii->mii_media_active ||
    378 	    sc->mii_media_status != mii->mii_media_status ||
    379 	    cmd == MII_MEDIACHG) {
    380 		announce = mii_phy_statusmsg(sc);
    381 		(*mii->mii_statchg)(sc->mii_dev.dv_parent);
    382 		sc->mii_media_active = mii->mii_media_active;
    383 		sc->mii_media_status = mii->mii_media_status;
    384 
    385 		if (announce) {
    386 			s = splnet();
    387 			rt_ifmsg(mii->mii_ifp);
    388 			splx(s);
    389 		}
    390 	}
    391 }
    392 
    393 int
    394 mii_phy_statusmsg(struct mii_softc *sc)
    395 {
    396 	struct mii_data *mii = sc->mii_pdata;
    397 	struct ifnet *ifp = mii->mii_ifp;
    398 	int link_state, announce = 0;
    399 	u_int baudrate;
    400 
    401 	if (mii->mii_media_status & IFM_AVALID) {
    402 		if (mii->mii_media_status & IFM_ACTIVE)
    403 			link_state = LINK_STATE_UP;
    404 		else
    405 			link_state = LINK_STATE_DOWN;
    406 	} else
    407 		link_state = LINK_STATE_UNKNOWN;
    408 
    409 	baudrate = ifmedia_baudrate(mii->mii_media_active);
    410 
    411 	if (link_state != ifp->if_link_state) {
    412 		ifp->if_link_state = link_state;
    413 		/*
    414 		 * XXX Right here we'd like to notify protocols
    415 		 * XXX that the link status has changed, so that
    416 		 * XXX e.g. Duplicate Address Detection can restart.
    417 		 */
    418 		announce = 1;
    419 	}
    420 
    421 	if (baudrate != ifp->if_baudrate) {
    422 		ifp->if_baudrate = baudrate;
    423 		announce = 1;
    424 	}
    425 
    426 	return (announce);
    427 }
    428 
    429 /*
    430  * Initialize generic PHY media based on BMSR, called when a PHY is
    431  * attached.  We expect to be set up to print a comma-separated list
    432  * of media names.  Does not print a newline.
    433  */
    434 void
    435 mii_phy_add_media(struct mii_softc *sc)
    436 {
    437 	struct mii_data *mii = sc->mii_pdata;
    438 	const char *sep = "";
    439 	int fdx = 0;
    440 
    441 #define	ADD(m, c)	ifmedia_add(&mii->mii_media, (m), (c), NULL)
    442 #define	PRINT(n)	aprint_normal("%s%s", sep, (n)); sep = ", "
    443 
    444 	if ((sc->mii_flags & MIIF_NOISOLATE) == 0)
    445 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
    446 		    MII_MEDIA_NONE);
    447 
    448 	/*
    449 	 * There are different interpretations for the bits in
    450 	 * HomePNA PHYs.  And there is really only one media type
    451 	 * that is supported.
    452 	 */
    453 	if (sc->mii_flags & MIIF_IS_HPNA) {
    454 		if (sc->mii_capabilities & BMSR_10THDX) {
    455 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_HPNA_1, 0,
    456 					 sc->mii_inst),
    457 			    MII_MEDIA_10_T);
    458 			PRINT("HomePNA1");
    459 		}
    460 		return;
    461 	}
    462 
    463 	if (sc->mii_capabilities & BMSR_10THDX) {
    464 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst),
    465 		    MII_MEDIA_10_T);
    466 		PRINT("10baseT");
    467 	}
    468 	if (sc->mii_capabilities & BMSR_10TFDX) {
    469 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst),
    470 		    MII_MEDIA_10_T_FDX);
    471 		PRINT("10baseT-FDX");
    472 		fdx = 1;
    473 	}
    474 	if (sc->mii_capabilities & BMSR_100TXHDX) {
    475 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst),
    476 		    MII_MEDIA_100_TX);
    477 		PRINT("100baseTX");
    478 	}
    479 	if (sc->mii_capabilities & BMSR_100TXFDX) {
    480 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst),
    481 		    MII_MEDIA_100_TX_FDX);
    482 		PRINT("100baseTX-FDX");
    483 		fdx = 1;
    484 	}
    485 	if (sc->mii_capabilities & BMSR_100T4) {
    486 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst),
    487 		    MII_MEDIA_100_T4);
    488 		PRINT("100baseT4");
    489 	}
    490 
    491 	if (sc->mii_extcapabilities & EXTSR_MEDIAMASK) {
    492 		/*
    493 		 * XXX Right now only handle 1000SX and 1000TX.  Need
    494 		 * XXX to handle 1000LX and 1000CX some how.
    495 		 *
    496 		 * Note since it can take 5 seconds to auto-negotiate
    497 		 * a gigabit link, we make anegticks 10 seconds for
    498 		 * all the gigabit media types.
    499 		 */
    500 		if (sc->mii_extcapabilities & EXTSR_1000XHDX) {
    501 			sc->mii_anegticks = 10;
    502 			sc->mii_flags |= MIIF_IS_1000X;
    503 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0,
    504 			    sc->mii_inst), MII_MEDIA_1000_X);
    505 			PRINT("1000baseSX");
    506 		}
    507 		if (sc->mii_extcapabilities & EXTSR_1000XFDX) {
    508 			sc->mii_anegticks = 10;
    509 			sc->mii_flags |= MIIF_IS_1000X;
    510 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX,
    511 			    sc->mii_inst), MII_MEDIA_1000_X_FDX);
    512 			PRINT("1000baseSX-FDX");
    513 			fdx = 1;
    514 		}
    515 
    516 		/*
    517 		 * 1000baseT media needs to be able to manipulate
    518 		 * master/slave mode.  We set IFM_ETH_MASTER in
    519 		 * the "don't care mask" and filter it out when
    520 		 * the media is set.
    521 		 *
    522 		 * All 1000baseT PHYs have a 1000baseT control register.
    523 		 */
    524 		if (sc->mii_extcapabilities & EXTSR_1000THDX) {
    525 			sc->mii_anegticks = 10;
    526 			sc->mii_flags |= MIIF_HAVE_GTCR;
    527 			mii->mii_media.ifm_mask |= IFM_ETH_MASTER;
    528 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0,
    529 			    sc->mii_inst), MII_MEDIA_1000_T);
    530 			PRINT("1000baseT");
    531 		}
    532 		if (sc->mii_extcapabilities & EXTSR_1000TFDX) {
    533 			sc->mii_anegticks = 10;
    534 			sc->mii_flags |= MIIF_HAVE_GTCR;
    535 			mii->mii_media.ifm_mask |= IFM_ETH_MASTER;
    536 			ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX,
    537 			    sc->mii_inst), MII_MEDIA_1000_T_FDX);
    538 			PRINT("1000baseT-FDX");
    539 			fdx = 1;
    540 		}
    541 	}
    542 
    543 	if (sc->mii_capabilities & BMSR_ANEG) {
    544 		ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst),
    545 		    MII_NMEDIA);	/* intentionally invalid index */
    546 		PRINT("auto");
    547 	}
    548 #undef ADD
    549 #undef PRINT
    550 	if (fdx != 0 && (sc->mii_flags & MIIF_DOPAUSE))
    551 		mii->mii_media.ifm_mask |= IFM_ETH_FMASK;
    552 }
    553 
    554 void
    555 mii_phy_delete_media(struct mii_softc *sc)
    556 {
    557 	struct mii_data *mii = sc->mii_pdata;
    558 
    559 	ifmedia_delete_instance(&mii->mii_media, sc->mii_inst);
    560 }
    561 
    562 int
    563 mii_phy_activate(struct device *self, enum devact act)
    564 {
    565 	int rv = 0;
    566 
    567 	switch (act) {
    568 	case DVACT_ACTIVATE:
    569 		rv = EOPNOTSUPP;
    570 		break;
    571 
    572 	case DVACT_DEACTIVATE:
    573 		/* Nothing special to do. */
    574 		break;
    575 	}
    576 
    577 	return (rv);
    578 }
    579 
    580 /* ARGSUSED1 */
    581 int
    582 mii_phy_detach(struct device *self, int flags)
    583 {
    584 	struct mii_softc *sc = (void *) self;
    585 
    586 	if (sc->mii_flags & MIIF_DOINGAUTO)
    587 		callout_stop(&sc->mii_nway_ch);
    588 
    589 	mii_phy_delete_media(sc);
    590 
    591 	return (0);
    592 }
    593 
    594 const struct mii_phydesc *
    595 mii_phy_match(const struct mii_attach_args *ma, const struct mii_phydesc *mpd)
    596 {
    597 
    598 	for (; mpd->mpd_name != NULL; mpd++) {
    599 		if (MII_OUI(ma->mii_id1, ma->mii_id2) == mpd->mpd_oui &&
    600 		    MII_MODEL(ma->mii_id2) == mpd->mpd_model)
    601 			return (mpd);
    602 	}
    603 	return (NULL);
    604 }
    605 
    606 /*
    607  * Return the flow control status flag from MII_ANAR & MII_ANLPAR.
    608  */
    609 u_int
    610 mii_phy_flowstatus(struct mii_softc *sc)
    611 {
    612 	u_int anar, anlpar;
    613 
    614 	if ((sc->mii_flags & MIIF_DOPAUSE) == 0)
    615 		return (0);
    616 
    617 	anar = PHY_READ(sc, MII_ANAR);
    618 	anlpar = PHY_READ(sc, MII_ANLPAR);
    619 
    620 	if ((anar & ANAR_X_PAUSE_SYM) == 0) {
    621 		if ((anar & ANAR_X_PAUSE_ASYM) &&
    622 		    ((anlpar &
    623 		      ANLPAR_X_PAUSE_TOWARDS) == ANLPAR_X_PAUSE_TOWARDS))
    624 			return (IFM_FLOW|IFM_ETH_TXPAUSE);
    625 		else
    626 			return (0);
    627 	}
    628 
    629 	if ((anar & ANAR_X_PAUSE_ASYM) == 0) {
    630 		if (anlpar & ANLPAR_X_PAUSE_SYM)
    631 			return (IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE);
    632 		else
    633 			return (0);
    634 	}
    635 
    636 	switch ((anlpar & ANLPAR_X_PAUSE_TOWARDS)) {
    637 	case ANLPAR_X_PAUSE_NONE:
    638 		return (0);
    639 
    640 	case ANLPAR_X_PAUSE_ASYM:
    641 		return (IFM_FLOW|IFM_ETH_RXPAUSE);
    642 
    643 	default:
    644 		return (IFM_FLOW|IFM_ETH_RXPAUSE|IFM_ETH_TXPAUSE);
    645 	}
    646 	/* NOTREACHED */
    647 }
    648