mii_physubr.c revision 1.49 1 /* $NetBSD: mii_physubr.c,v 1.49 2006/03/29 07:05:24 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Subroutines common to all PHYs.
42 */
43
44 #include <sys/cdefs.h>
45 __KERNEL_RCSID(0, "$NetBSD: mii_physubr.c,v 1.49 2006/03/29 07:05:24 thorpej Exp $");
46
47 #include <sys/param.h>
48 #include <sys/device.h>
49 #include <sys/systm.h>
50 #include <sys/kernel.h>
51 #include <sys/socket.h>
52 #include <sys/errno.h>
53 #include <sys/proc.h>
54
55 #include <net/if.h>
56 #include <net/if_media.h>
57 #include <net/route.h>
58
59 #include <dev/mii/mii.h>
60 #include <dev/mii/miivar.h>
61
62 static void mii_phy_statusmsg(struct mii_softc *);
63
64 /*
65 * Media to register setting conversion table. Order matters.
66 */
67 static const struct mii_media mii_media_table[MII_NMEDIA] = {
68 /* None */
69 { BMCR_ISO, ANAR_CSMA,
70 0, },
71
72 /* 10baseT */
73 { BMCR_S10, ANAR_CSMA|ANAR_10,
74 0, },
75
76 /* 10baseT-FDX */
77 { BMCR_S10|BMCR_FDX, ANAR_CSMA|ANAR_10_FD,
78 0, },
79
80 /* 100baseT4 */
81 { BMCR_S100, ANAR_CSMA|ANAR_T4,
82 0, },
83
84 /* 100baseTX */
85 { BMCR_S100, ANAR_CSMA|ANAR_TX,
86 0, },
87
88 /* 100baseTX-FDX */
89 { BMCR_S100|BMCR_FDX, ANAR_CSMA|ANAR_TX_FD,
90 0, },
91
92 /* 1000baseX */
93 { BMCR_S1000, ANAR_CSMA,
94 0, },
95
96 /* 1000baseX-FDX */
97 { BMCR_S1000|BMCR_FDX, ANAR_CSMA,
98 0, },
99
100 /* 1000baseT */
101 { BMCR_S1000, ANAR_CSMA,
102 GTCR_ADV_1000THDX },
103
104 /* 1000baseT-FDX */
105 { BMCR_S1000, ANAR_CSMA,
106 GTCR_ADV_1000TFDX },
107 };
108
109 static void mii_phy_auto_timeout(void *);
110
111 void
112 mii_phy_setmedia(struct mii_softc *sc)
113 {
114 struct mii_data *mii = sc->mii_pdata;
115 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
116 int bmcr, anar, gtcr;
117
118 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) {
119 /*
120 * Force renegotiation if MIIF_DOPAUSE.
121 *
122 * XXX This is only necessary because many NICs don't
123 * XXX advertise PAUSE capabilities at boot time. Maybe
124 * XXX we should force this only once?
125 */
126 if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 ||
127 (sc->mii_flags & (MIIF_FORCEANEG|MIIF_DOPAUSE)))
128 (void) mii_phy_auto(sc, 1);
129 return;
130 }
131
132 /*
133 * Table index is stored in the media entry.
134 */
135
136 #ifdef DIAGNOSTIC
137 if (ife->ifm_data < 0 || ife->ifm_data >= MII_NMEDIA)
138 panic("mii_phy_setmedia");
139 #endif
140
141 anar = mii_media_table[ife->ifm_data].mm_anar;
142 bmcr = mii_media_table[ife->ifm_data].mm_bmcr;
143 gtcr = mii_media_table[ife->ifm_data].mm_gtcr;
144
145 if (mii->mii_media.ifm_media & IFM_ETH_MASTER) {
146 switch (IFM_SUBTYPE(ife->ifm_media)) {
147 case IFM_1000_T:
148 gtcr |= GTCR_MAN_MS|GTCR_ADV_MS;
149 break;
150
151 default:
152 panic("mii_phy_setmedia: MASTER on wrong media");
153 }
154 }
155
156 if (mii->mii_media.ifm_media & IFM_FLOW) {
157 if (sc->mii_flags & MIIF_IS_1000X)
158 anar |= ANAR_X_PAUSE_SYM | ANAR_X_PAUSE_ASYM;
159 else {
160 anar |= ANAR_FC;
161 /* XXX Only 1000BASE-T has PAUSE_ASYM? */
162 if ((sc->mii_flags & MIIF_HAVE_GTCR) &&
163 (sc->mii_extcapabilities &
164 (EXTSR_1000THDX|EXTSR_1000TFDX)))
165 anar |= ANAR_X_PAUSE_ASYM;
166 }
167 }
168
169 if (ife->ifm_media & IFM_LOOP)
170 bmcr |= BMCR_LOOP;
171
172 PHY_WRITE(sc, MII_ANAR, anar);
173 PHY_WRITE(sc, MII_BMCR, bmcr);
174 if (sc->mii_flags & MIIF_HAVE_GTCR)
175 PHY_WRITE(sc, MII_100T2CR, gtcr);
176 }
177
178 int
179 mii_phy_auto(struct mii_softc *sc, int waitfor)
180 {
181 int i;
182
183 if ((sc->mii_flags & MIIF_DOINGAUTO) == 0) {
184 /*
185 * Check for 1000BASE-X. Autonegotiation is a bit
186 * different on such devices.
187 */
188 if (sc->mii_flags & MIIF_IS_1000X) {
189 uint16_t anar = 0;
190
191 if (sc->mii_extcapabilities & EXTSR_1000XFDX)
192 anar |= ANAR_X_FD;
193 if (sc->mii_extcapabilities & EXTSR_1000XHDX)
194 anar |= ANAR_X_HD;
195
196 if (sc->mii_flags & MIIF_DOPAUSE) {
197 /* XXX Asymmetric vs. symmetric? */
198 anar |= ANLPAR_X_PAUSE_TOWARDS;
199 }
200
201 PHY_WRITE(sc, MII_ANAR, anar);
202 } else {
203 uint16_t anar;
204
205 anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) |
206 ANAR_CSMA;
207 if (sc->mii_flags & MIIF_DOPAUSE) {
208 anar |= ANAR_FC;
209 /* XXX Only 1000BASE-T has PAUSE_ASYM? */
210 if ((sc->mii_flags & MIIF_HAVE_GTCR) &&
211 (sc->mii_extcapabilities &
212 (EXTSR_1000THDX|EXTSR_1000TFDX)))
213 anar |= ANAR_X_PAUSE_ASYM;
214 }
215 PHY_WRITE(sc, MII_ANAR, anar);
216 if (sc->mii_flags & MIIF_HAVE_GTCR) {
217 uint16_t gtcr = 0;
218
219 if (sc->mii_extcapabilities & EXTSR_1000TFDX)
220 gtcr |= GTCR_ADV_1000TFDX;
221 if (sc->mii_extcapabilities & EXTSR_1000THDX)
222 gtcr |= GTCR_ADV_1000THDX;
223
224 PHY_WRITE(sc, MII_100T2CR, gtcr);
225 }
226 }
227 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
228 }
229
230 if (waitfor) {
231 /* Wait 500ms for it to complete. */
232 for (i = 0; i < 500; i++) {
233 if (PHY_READ(sc, MII_BMSR) & BMSR_ACOMP)
234 return (0);
235 delay(1000);
236 }
237
238 /*
239 * Don't need to worry about clearing MIIF_DOINGAUTO.
240 * If that's set, a timeout is pending, and it will
241 * clear the flag.
242 */
243 return (EIO);
244 }
245
246 /*
247 * Just let it finish asynchronously. This is for the benefit of
248 * the tick handler driving autonegotiation. Don't want 500ms
249 * delays all the time while the system is running!
250 */
251 if (sc->mii_flags & MIIF_AUTOTSLEEP) {
252 sc->mii_flags |= MIIF_DOINGAUTO;
253 tsleep(&sc->mii_flags, PZERO, "miiaut", hz >> 1);
254 mii_phy_auto_timeout(sc);
255 } else if ((sc->mii_flags & MIIF_DOINGAUTO) == 0) {
256 sc->mii_flags |= MIIF_DOINGAUTO;
257 callout_reset(&sc->mii_nway_ch, hz >> 1,
258 mii_phy_auto_timeout, sc);
259 }
260 return (EJUSTRETURN);
261 }
262
263 static void
264 mii_phy_auto_timeout(void *arg)
265 {
266 struct mii_softc *sc = arg;
267 int s;
268
269 if (!device_is_active(&sc->mii_dev))
270 return;
271
272 s = splnet();
273 sc->mii_flags &= ~MIIF_DOINGAUTO;
274
275 /* Update the media status. */
276 (void) PHY_SERVICE(sc, sc->mii_pdata, MII_POLLSTAT);
277 splx(s);
278 }
279
280 int
281 mii_phy_tick(struct mii_softc *sc)
282 {
283 struct mii_data *mii = sc->mii_pdata;
284 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
285 int reg;
286
287 /* Just bail now if the interface is down. */
288 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
289 return (EJUSTRETURN);
290
291 /*
292 * If we're not doing autonegotiation, we don't need to do
293 * any extra work here. However, we need to check the link
294 * status so we can generate an announcement if the status
295 * changes.
296 */
297 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
298 return (0);
299
300 /* Read the status register twice; BMSR_LINK is latch-low. */
301 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
302 if (reg & BMSR_LINK) {
303 /*
304 * See above.
305 */
306 return (0);
307 }
308
309 /*
310 * Only retry autonegotiation every N seconds.
311 */
312 KASSERT(sc->mii_anegticks != 0);
313 if (++sc->mii_ticks != sc->mii_anegticks)
314 return (EJUSTRETURN);
315
316 sc->mii_ticks = 0;
317 PHY_RESET(sc);
318
319 if (mii_phy_auto(sc, 0) == EJUSTRETURN)
320 return (EJUSTRETURN);
321
322 /*
323 * Might need to generate a status message if autonegotiation
324 * failed.
325 */
326 return (0);
327 }
328
329 void
330 mii_phy_reset(struct mii_softc *sc)
331 {
332 int reg, i;
333
334 if (sc->mii_flags & MIIF_NOISOLATE)
335 reg = BMCR_RESET;
336 else
337 reg = BMCR_RESET | BMCR_ISO;
338 PHY_WRITE(sc, MII_BMCR, reg);
339
340 /*
341 * It is best to allow a little time for the reset to settle
342 * in before we start polling the BMCR again. Notably, the
343 * DP83840A manual states that there should be a 500us delay
344 * between asserting software reset and attempting MII serial
345 * operations. Also, a DP83815 can get into a bad state on
346 * cable removal and reinsertion if we do not delay here.
347 */
348 delay(500);
349
350 /* Wait another 100ms for it to complete. */
351 for (i = 0; i < 100; i++) {
352 reg = PHY_READ(sc, MII_BMCR);
353 if ((reg & BMCR_RESET) == 0)
354 break;
355 delay(1000);
356 }
357
358 if (sc->mii_inst != 0 && ((sc->mii_flags & MIIF_NOISOLATE) == 0))
359 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
360 }
361
362 void
363 mii_phy_down(struct mii_softc *sc)
364 {
365
366 if (sc->mii_flags & MIIF_DOINGAUTO) {
367 sc->mii_flags &= ~MIIF_DOINGAUTO;
368 callout_stop(&sc->mii_nway_ch);
369 }
370 }
371
372 void
373 mii_phy_status(struct mii_softc *sc)
374 {
375
376 PHY_STATUS(sc);
377 }
378
379 void
380 mii_phy_update(struct mii_softc *sc, int cmd)
381 {
382 struct mii_data *mii = sc->mii_pdata;
383
384 if (sc->mii_media_active != mii->mii_media_active ||
385 sc->mii_media_status != mii->mii_media_status ||
386 cmd == MII_MEDIACHG) {
387 mii_phy_statusmsg(sc);
388 (*mii->mii_statchg)(device_parent(&sc->mii_dev));
389 sc->mii_media_active = mii->mii_media_active;
390 sc->mii_media_status = mii->mii_media_status;
391 }
392 }
393
394 static void
395 mii_phy_statusmsg(struct mii_softc *sc)
396 {
397 struct mii_data *mii = sc->mii_pdata;
398 struct ifnet *ifp = mii->mii_ifp;
399 int s;
400
401 s = splnet();
402 if (mii->mii_media_status & IFM_AVALID) {
403 if (mii->mii_media_status & IFM_ACTIVE)
404 if_link_state_change(ifp, LINK_STATE_UP);
405 else
406 if_link_state_change(ifp, LINK_STATE_DOWN);
407 } else
408 if_link_state_change(ifp, LINK_STATE_UNKNOWN);
409 splx(s);
410
411 ifp->if_baudrate = ifmedia_baudrate(mii->mii_media_active);
412 }
413
414 /*
415 * Initialize generic PHY media based on BMSR, called when a PHY is
416 * attached. We expect to be set up to print a comma-separated list
417 * of media names. Does not print a newline.
418 */
419 void
420 mii_phy_add_media(struct mii_softc *sc)
421 {
422 struct mii_data *mii = sc->mii_pdata;
423 const char *sep = "";
424 int fdx = 0;
425
426 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
427 #define PRINT(n) aprint_normal("%s%s", sep, (n)); sep = ", "
428
429 if ((sc->mii_flags & MIIF_NOISOLATE) == 0)
430 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
431 MII_MEDIA_NONE);
432
433 /*
434 * There are different interpretations for the bits in
435 * HomePNA PHYs. And there is really only one media type
436 * that is supported.
437 */
438 if (sc->mii_flags & MIIF_IS_HPNA) {
439 if (sc->mii_capabilities & BMSR_10THDX) {
440 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_HPNA_1, 0,
441 sc->mii_inst),
442 MII_MEDIA_10_T);
443 PRINT("HomePNA1");
444 }
445 return;
446 }
447
448 if (sc->mii_capabilities & BMSR_10THDX) {
449 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst),
450 MII_MEDIA_10_T);
451 PRINT("10baseT");
452 }
453 if (sc->mii_capabilities & BMSR_10TFDX) {
454 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst),
455 MII_MEDIA_10_T_FDX);
456 PRINT("10baseT-FDX");
457 fdx = 1;
458 }
459 if (sc->mii_capabilities & BMSR_100TXHDX) {
460 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst),
461 MII_MEDIA_100_TX);
462 PRINT("100baseTX");
463 }
464 if (sc->mii_capabilities & BMSR_100TXFDX) {
465 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst),
466 MII_MEDIA_100_TX_FDX);
467 PRINT("100baseTX-FDX");
468 fdx = 1;
469 }
470 if (sc->mii_capabilities & BMSR_100T4) {
471 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst),
472 MII_MEDIA_100_T4);
473 PRINT("100baseT4");
474 }
475
476 if (sc->mii_extcapabilities & EXTSR_MEDIAMASK) {
477 /*
478 * XXX Right now only handle 1000SX and 1000TX. Need
479 * XXX to handle 1000LX and 1000CX some how.
480 *
481 * Note since it can take 5 seconds to auto-negotiate
482 * a gigabit link, we make anegticks 10 seconds for
483 * all the gigabit media types.
484 */
485 if (sc->mii_extcapabilities & EXTSR_1000XHDX) {
486 sc->mii_anegticks = 10;
487 sc->mii_flags |= MIIF_IS_1000X;
488 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0,
489 sc->mii_inst), MII_MEDIA_1000_X);
490 PRINT("1000baseSX");
491 }
492 if (sc->mii_extcapabilities & EXTSR_1000XFDX) {
493 sc->mii_anegticks = 10;
494 sc->mii_flags |= MIIF_IS_1000X;
495 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX,
496 sc->mii_inst), MII_MEDIA_1000_X_FDX);
497 PRINT("1000baseSX-FDX");
498 fdx = 1;
499 }
500
501 /*
502 * 1000baseT media needs to be able to manipulate
503 * master/slave mode. We set IFM_ETH_MASTER in
504 * the "don't care mask" and filter it out when
505 * the media is set.
506 *
507 * All 1000baseT PHYs have a 1000baseT control register.
508 */
509 if (sc->mii_extcapabilities & EXTSR_1000THDX) {
510 sc->mii_anegticks = 10;
511 sc->mii_flags |= MIIF_HAVE_GTCR;
512 mii->mii_media.ifm_mask |= IFM_ETH_MASTER;
513 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0,
514 sc->mii_inst), MII_MEDIA_1000_T);
515 PRINT("1000baseT");
516 }
517 if (sc->mii_extcapabilities & EXTSR_1000TFDX) {
518 sc->mii_anegticks = 10;
519 sc->mii_flags |= MIIF_HAVE_GTCR;
520 mii->mii_media.ifm_mask |= IFM_ETH_MASTER;
521 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX,
522 sc->mii_inst), MII_MEDIA_1000_T_FDX);
523 PRINT("1000baseT-FDX");
524 fdx = 1;
525 }
526 }
527
528 if (sc->mii_capabilities & BMSR_ANEG) {
529 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst),
530 MII_NMEDIA); /* intentionally invalid index */
531 PRINT("auto");
532 }
533 #undef ADD
534 #undef PRINT
535 if (fdx != 0 && (sc->mii_flags & MIIF_DOPAUSE))
536 mii->mii_media.ifm_mask |= IFM_ETH_FMASK;
537 }
538
539 void
540 mii_phy_delete_media(struct mii_softc *sc)
541 {
542 struct mii_data *mii = sc->mii_pdata;
543
544 ifmedia_delete_instance(&mii->mii_media, sc->mii_inst);
545 }
546
547 int
548 mii_phy_activate(struct device *self, enum devact act)
549 {
550 int rv = 0;
551
552 switch (act) {
553 case DVACT_ACTIVATE:
554 rv = EOPNOTSUPP;
555 break;
556
557 case DVACT_DEACTIVATE:
558 /* Nothing special to do. */
559 break;
560 }
561
562 return (rv);
563 }
564
565 /* ARGSUSED1 */
566 int
567 mii_phy_detach(struct device *self, int flags)
568 {
569 struct mii_softc *sc = device_private(self);
570
571 if (sc->mii_flags & MIIF_DOINGAUTO)
572 callout_stop(&sc->mii_nway_ch);
573
574 mii_phy_delete_media(sc);
575
576 return (0);
577 }
578
579 const struct mii_phydesc *
580 mii_phy_match(const struct mii_attach_args *ma, const struct mii_phydesc *mpd)
581 {
582
583 for (; mpd->mpd_name != NULL; mpd++) {
584 if (MII_OUI(ma->mii_id1, ma->mii_id2) == mpd->mpd_oui &&
585 MII_MODEL(ma->mii_id2) == mpd->mpd_model)
586 return (mpd);
587 }
588 return (NULL);
589 }
590
591 /*
592 * Return the flow control status flag from MII_ANAR & MII_ANLPAR.
593 */
594 u_int
595 mii_phy_flowstatus(struct mii_softc *sc)
596 {
597 u_int anar, anlpar;
598
599 if ((sc->mii_flags & MIIF_DOPAUSE) == 0)
600 return (0);
601
602 anar = PHY_READ(sc, MII_ANAR);
603 anlpar = PHY_READ(sc, MII_ANLPAR);
604
605 if ((anar & ANAR_X_PAUSE_SYM) & (anlpar & ANLPAR_X_PAUSE_SYM))
606 return (IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE);
607
608 if ((anar & ANAR_X_PAUSE_SYM) == 0) {
609 if ((anar & ANAR_X_PAUSE_ASYM) &&
610 ((anlpar &
611 ANLPAR_X_PAUSE_TOWARDS) == ANLPAR_X_PAUSE_TOWARDS))
612 return (IFM_FLOW|IFM_ETH_TXPAUSE);
613 else
614 return (0);
615 }
616
617 if ((anar & ANAR_X_PAUSE_ASYM) == 0) {
618 if (anlpar & ANLPAR_X_PAUSE_SYM)
619 return (IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE);
620 else
621 return (0);
622 }
623
624 switch ((anlpar & ANLPAR_X_PAUSE_TOWARDS)) {
625 case ANLPAR_X_PAUSE_NONE:
626 return (0);
627
628 case ANLPAR_X_PAUSE_ASYM:
629 return (IFM_FLOW|IFM_ETH_RXPAUSE);
630
631 default:
632 return (IFM_FLOW|IFM_ETH_RXPAUSE|IFM_ETH_TXPAUSE);
633 }
634 /* NOTREACHED */
635 }
636